1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @brief This file has the System Debug Trace Logger (Mlog) Task IDs used by XRAN library
21 * @file mlog_task_id.h
22 * @ingroup group_lte_source_common
23 * @author Intel Corporation
26 #ifndef _XRAN_LIB_TASK_ID_H_
27 #define _XRAN_LIB_TASK_ID_H_
33 #define RESOURCE_CORE_0 0
34 #define RESOURCE_CORE_1 1
35 #define RESOURCE_CORE_2 2
36 #define RESOURCE_CORE_3 3
37 #define RESOURCE_CORE_4 4
38 #define RESOURCE_CORE_5 5
39 #define RESOURCE_CORE_6 6
40 #define RESOURCE_CORE_7 7
41 #define RESOURCE_CORE_8 8
42 #define RESOURCE_CORE_9 9
43 #define RESOURCE_CORE_10 10
44 #define RESOURCE_CORE_11 11
45 #define RESOURCE_CORE_12 12
46 #define RESOURCE_CORE_13 13
47 #define RESOURCE_CORE_14 14
48 #define RESOURCE_CORE_15 15
49 #define RESOURCE_CORE_16 16
51 #define RESOURCE_IA_CORE 100
53 //--------------------------------------------------------------------
55 //--------------------------------------------------------------------
57 //--------------------------------------------------------------------
59 //--------------------------------------------------------------------
60 #define PID_XRAN_MAIN 101
62 #define PID_XRAN_BBDEV_DL_POLL 51
63 #define PID_XRAN_BBDEV_DL_POLL_DISPATCH 52
64 #define PID_XRAN_BBDEV_UL_POLL 53
65 #define PID_XRAN_BBDEV_UL_POLL_DISPATCH 54
67 #define PID_TTI_TIMER 3100
68 #define PID_TTI_CB 3101
70 #define PID_SYM_TIMER 3102
71 //#define PID_GNB_PROC_TIMING_TIMEOUT 3103
73 #define PID_TIME_SYSTIME_POLL 3104
74 #define PID_TIME_SYSTIME_STOP 3105
75 #define PID_TIME_ARM_TIMER 3106
77 #define PID_RADIO_FREQ_RX_PKT 3107
78 #define PID_RADIO_RX_STOP 3108
79 #define PID_RADIO_RX_UL_IQ 3109
80 #define PID_RADIO_PRACH_PKT 3110
81 #define PID_RADIO_FE_COMPRESS 3111
82 #define PID_RADIO_FE_DECOMPRESS 3112
83 #define PID_RADIO_TX_BYPASS_PROC 3113
84 #define PID_RADIO_ETH_TX_BURST 3114
85 #define PID_RADIO_TX_DL_IQ 3115
86 #define PID_RADIO_RX_VALIDATE 3116
87 #define PID_RADIO_RX_IRQ_ON 3117
88 #define PID_RADIO_RX_IRQ_OFF 3118
89 #define PID_RADIO_RX_EPOLL_WAIT 3119
90 #define PID_RADIO_TX_LTEMODE_PROC 3120
91 #define PID_RADIO_RX_LTEMODE_PROC 3121
92 #define PID_RADIO_TX_PLAY_BACK_IQ 3122
93 #define PID_PROCESS_TX_SYM 3123
94 #define PID_DISPATCH_TX_SYM 3124
95 #define PID_PREPARE_TX_PKT 3125
96 #define PID_ATTACH_EXT_BUF 3126
97 #define PID_ETH_ENQUEUE_BURST 3127
99 #define PID_CP_DL_CB 3128
100 #define PID_CP_UL_CB 3129
101 #define PID_UP_DL_CB 3130
102 #define PID_SYM_OTA_CB 3131
103 #define PID_TTI_CB_TO_PHY 3132
104 #define PID_HALF_SLOT_CB_TO_PHY 3133
105 #define PID_FULL_SLOT_CB_TO_PHY 3134
106 #define PID_UP_UL_HALF_DEAD_LINE_CB 3135
107 #define PID_UP_UL_FULL_DEAD_LINE_CB 3136
108 #define PID_UP_UL_USER_DEAD_LINE_CB 3137
109 #define PID_PROCESS_UP_PKT 3140
110 #define PID_PROCESS_UP_PKT_SRS 3141
111 #define PID_PROCESS_UP_PKT_PARSE 3142
112 #define PID_PROCESS_CP_PKT 3143
113 #define PID_PROCESS_DELAY_MEAS_PKT 3144
114 #define PID_UP_UL_ONE_FOURTHS_DEAD_LINE_CB 3145
115 #define PID_UP_UL_THREE_FOURTHS_DEAD_LINE_CB 3146
116 #define PID_UP_STATIC_SRS_DEAD_LINE_CB 3147
118 #define PID_TIME_ARM_TIMER_DEADLINE 3150
119 #define PID_TIME_ARM_USER_TIMER_DEADLINE 3151
121 #define PID_REQUEUE_TX_SYM 3160
127 #endif /* _XRAN_LIB_TASK_ID_H_ */