1 #******************************************************************************
3 # Copyright (c) 2019 Intel.
5 # Licensed under the Apache License, Version 2.0 (the "License");
6 # you may not use this file except in compliance with the License.
7 # You may obtain a copy of the License at
9 # http://www.apache.org/licenses/LICENSE-2.0
11 # Unless required by applicable law or agreed to in writing, software
12 # distributed under the License is distributed on an "AS IS" BASIS,
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 # See the License for the specific language governing permissions and
15 # limitations under the License.
17 #******************************************************************************/
19 #TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak
22 # This is simple configuration file. Use '#' sign for comments
23 instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
24 appMode=1 # O-DU(0) | O-RU(1)
25 xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
26 ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
27 antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
28 antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
29 antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
32 muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
33 DlLayersPerUe=1 #number of RX anntennas on DL UE side
34 UlLayersPerUe=1 #number of TX anntennas on UL UE side
38 mu=1 #30Khz Sub Carrier Spacing
40 ttiPeriod=500 # in us TTI period (30Khz default 500us)
42 nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
43 nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
44 nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
45 nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
49 nFrameDuplexType=1 # 0 - FDD 1 - TDD
50 nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
51 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
52 sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
53 sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
54 sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
55 sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
56 sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
57 sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
58 sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
59 sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
60 sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
62 MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
63 #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
64 Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
67 numSlots=20 #number of slots per IQ files
68 antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
69 antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
70 antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
71 antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
72 antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
73 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
74 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
75 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
76 antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
77 antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
78 antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
79 antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
80 antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
81 antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
82 antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
83 antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
85 antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
86 antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
87 antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
88 antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
89 antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
90 antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
91 antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
92 antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
93 antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
94 antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
95 antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
96 antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
97 antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
98 antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
99 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
100 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
102 rachEnable=0 # Enable (1)| disable (0) PRACH configuration
105 srsEnable=1 # Enable (1)| disable (0) SRS
106 srsSym=4 # deprecated
107 srsSlot=3 # scheduled SRS slot within TDD period
108 srsNdmOffset=3 # delay offset to start NDM SRS U-Plane
109 srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols)
111 antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
112 antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
113 antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
114 antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
115 antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
116 antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
117 antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
118 antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
119 antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
120 antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
121 antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
122 antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
123 antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
124 antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
125 antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
126 antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
127 antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
128 antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
129 antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
130 antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
131 antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
132 antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
133 antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
134 antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
135 antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
136 antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
137 antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
138 antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
139 antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
140 antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
141 antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
142 antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
143 antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
144 antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
145 antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
146 antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
147 antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
148 antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
149 antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
150 antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
151 antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
152 antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
153 antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
154 antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
155 antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
156 antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
157 antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
158 antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
159 antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
160 antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
161 antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
162 antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
163 antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
164 antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
165 antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
166 antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
167 antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
168 antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
169 antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
170 antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
171 antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
172 antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
173 antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
174 antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
176 ###########################################################
178 DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
181 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
183 PrbElemDl0=0,48,0,14,1,1,1,9,1
184 PrbElemDl1=48,48,0,14,2,1,1,9,1
185 PrbElemDl2=96,48,0,14,3,1,1,9,1
186 PrbElemDl3=144,48,0,14,4,1,1,9,1
187 PrbElemDl4=192,48,0,14,5,1,1,9,1
188 PrbElemDl5=240,33,0,14,6,1,1,9,1
189 # Extension Parameters for Beamforming weights
190 # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth
191 ExtBfwDl0=2,24,0,0,9,1
192 ExtBfwDl1=2,24,0,0,9,1
193 ExtBfwDl2=2,24,0,0,9,1
194 ExtBfwDl3=2,24,0,0,9,1
195 ExtBfwDl4=2,24,0,0,9,1
196 ExtBfwDl5=2,17,0,0,9,1
200 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
202 PrbElemUl0=0,48,0,14,1,1,1,9,1
203 PrbElemUl1=48,48,0,14,2,1,1,9,1
204 PrbElemUl2=96,48,0,14,3,1,1,9,1
205 PrbElemUl3=144,48,0,14,4,1,1,9,1
206 PrbElemUl4=192,48,0,14,5,1,1,9,1
207 PrbElemUl5=240,33,0,14,6,1,1,9,1
208 # Extension Parameters for Beamforming weights
209 # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth
210 ExtBfwUl0=2,24,0,0,9,1
211 ExtBfwUl1=2,24,0,0,9,1
212 ExtBfwUl2=2,24,0,0,9,1
213 ExtBfwUl3=2,24,0,0,9,1
214 ExtBfwUl4=2,24,0,0,9,1
215 ExtBfwUl5=2,17,0,0,9,1
218 PrbElemSrs0=0,273,13,1,0,0,1,9,0
220 ###########################################################
222 ## control of IQ byte order
223 iqswap=0 #do swap of IQ before send buffer to eth
224 nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
225 compression=1 # (1) compression enabled (0) compression disabled
228 debugStop=1 #stop app on 1pps boundary (gps_second % 30)
229 debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
230 bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
232 CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
235 totalBFWeights=32 # Total number of Beamforming Weights on RU
237 Tadv_cp_dl=25 # in us
238 # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
239 #Reception Window C-plane DL
240 T2a_min_cp_dl=285 # 285.42us
241 T2a_max_cp_dl=429 # 428.12us
243 #Reception Window C-plane UL
244 T2a_min_cp_ul=285 # 285.42us
245 T2a_max_cp_ul=429 # 428.12us
247 #Reception Window U-plane
248 T2a_min_up=71 # 71.35in us
249 T2a_max_up=428 # 428.12us
255 ###########################################################
258 #Transmission Window Fast C-plane DL
262 ##Transmission Window Fast C-plane UL
267 ##Transmission Window
268 T1a_min_up=96 #71 + 25 us
269 T1a_max_up=196 #71 + 25 us
274 ###########################################################