1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @brief This file has the System Debug Trace Logger (Mlog) Task IDs used by PHY
21 * @file mlog_task_id.h
22 * @ingroup group_source_xran
23 * @author Intel Corporation
26 #ifndef _XRAN_TASK_ID_H_
27 #define _XRAN_TASK_ID_H_
33 #define RESOURCE_CORE_0 0
34 #define RESOURCE_CORE_1 1
35 #define RESOURCE_CORE_2 2
36 #define RESOURCE_CORE_3 3
37 #define RESOURCE_CORE_4 4
38 #define RESOURCE_CORE_5 5
39 #define RESOURCE_CORE_6 6
40 #define RESOURCE_CORE_7 7
41 #define RESOURCE_CORE_8 8
42 #define RESOURCE_CORE_9 9
43 #define RESOURCE_CORE_10 10
44 #define RESOURCE_CORE_11 11
45 #define RESOURCE_CORE_12 12
46 #define RESOURCE_CORE_13 13
47 #define RESOURCE_CORE_14 14
48 #define RESOURCE_CORE_15 15
49 #define RESOURCE_CORE_16 16
51 #define RESOURCE_IA_CORE 100
53 //--------------------------------------------------------------------
55 //--------------------------------------------------------------------
57 #define PID_GNB_PROC_TIMING 70
58 #define PID_GNB_PROC_TIMING_TIMEOUT 71
59 #define PID_GNB_PRACH_CB 73
60 #define PID_GNB_SYM_CB 72
61 #define PID_GNB_SRS_CB 74
62 #define PID_GNB_BFW_CB 75
63 //#define NR5G_SUBTASK_PROFILING_ON
64 //#define WLS_SUBTASK_ON
66 //--------------------------------------------------------------------
68 //--------------------------------------------------------------------
69 #define PID_MAC2PHY_API_HANDLER 1
70 #define PID_MAC2PHY_API_HANDLER_NULL 2
71 #define PID_MAC2PHY_API_CHECK_LATE_API 3
72 #define PID_MAC2PHY_API_RECV 4
73 #define PID_MAC2PHY_API_RECV_NULL 5
74 #define PID_MAC2PHY_API_CLEANUP 6
75 #define PID_MAC2PHY_API_ERROR_CHECK 7
76 #define PID_MAC2PHY_API_PARSE 8
77 #define PID_MAC2PHY_TX_SDU_PROC 9
78 #define PID_MAC2PHY_TX_VECTOR_PROC_DATA 10
79 #define PID_MAC2PHY_TX_SDU_ZBC 11
80 #define PID_MAC2PHY_RX_VECTOR_PROC 12
81 #define PID_MAC2PHY_API_PROC 13
83 //--------------------------------------------------------------------
85 //--------------------------------------------------------------------
86 #define PID_PHY2MAC_API_PROC_PUSCH 20
87 #define PID_PHY2MAC_API_PROC_PUCCH 21
88 #define PID_PHY2MAC_API_PROC_UPDATE 22
89 #define PID_PHY2MAC_API_PROC_SEND 23
90 #define PID_PHY2MAC_URLLC_API_PROC_SEND 24
92 //--------------------------------------------------------------------
94 //--------------------------------------------------------------------
95 #define PID_PHYSTATS 30
97 //--------------------------------------------------------------------
99 //--------------------------------------------------------------------
100 #define PID_PHYDI_IQ_COPY_DL 35
101 #define PID_PHYDI_IQ_COPY_UL 36
102 #define PID_PHYDI_IQ_COPY_DL_FRB 37
103 #define PID_PHYDI_IQ_COPY_UL_FRB 38
104 #define PID_PHYDI_IQ_COPY_PRACH_UL 39
105 #define PID_PHYDI_IQ_COPY_SRS_UL 40
107 //--------------------------------------------------------------------
108 // DISPATCH eBbuPool TASKS
109 //--------------------------------------------------------------------
110 #define PID_GNB_TTI_START_GEN_EXECUTE 43
111 #define PID_GNB_SYM2_WAKEUP_GEN_EXECUTE 44
112 #define PID_GNB_SYM6_WAKEUP_GEN_EXECUTE 45
113 #define PID_GNB_SYM11_WAKEUP_GEN_EXECUTE 46
114 #define PID_GNB_SYM13_WAKEUP_GEN_EXECUTE 47
115 #define PID_GNB_PRACH_WAKEUP_GEN_EXECUTE 48
116 #define PID_GNB_SRS_WAKEUP_GEN_EXECUTE 49
118 //--------------------------------------------------------------------
120 //--------------------------------------------------------------------
121 #define PID_AUX_BBDEV_DL_POLL 50
122 #define PID_AUX_BBDEV_DL_POLL_DISPATCH 51
123 #define PID_AUX_BBDEV_UL_POLL 52
124 #define PID_AUX_BBDEV_UL_POLL_DISPATCH 53
126 //--------------------------------------------------------------------
128 //--------------------------------------------------------------------
129 #define PID_AUX_WLS_RX_PROCESS 55
130 #define PID_AUX_WLS_SEND_API 56
131 #define PID_AUX_WLS_ADD_TO_QUEUE 57
132 #define PID_AUX_WLS_REMOVE_FROM_QUEUE 58
133 #define PID_AUX_WLS_URLLC_RX_PROCESS 59
135 //--------------------------------------------------------------------
137 //--------------------------------------------------------------------
138 #define PID_BBUPOOL_TTI_COMPLETE 60
139 #define PID_BBUPOOL_TTI_COMPLETE_PRINT 61
140 #define PID_BBUPOOL_TTI_TO_TTI_DURATION 62
142 #define PID_BBUPOOL_ACTIVATE_CELL 63
143 #define PID_BBUPOOL_DE_ACTIVATE_CELL 64
144 #define PID_BBUPOOL_CREATE_EMPTY_LIST 65
145 #define PID_BBUPOOL_RX_HANDLER 66
147 //--------------------------------------------------------------------
149 //--------------------------------------------------------------------
150 #define PID_GNB_PROC_TIMING 70
151 #define PID_GNB_PROC_TIMING_TIMEOUT 71
152 #define PID_GNB_TTI_START 72
153 #define PID_GNB_SYM2_WAKEUP 73
154 #define PID_GNB_SYM6_WAKEUP 74
155 #define PID_GNB_SYM11_WAKEUP 75
156 #define PID_GNB_SYM13_WAKEUP 76
157 #define PID_GNB_PRACH_WAKEUP 77
158 #define PID_GNB_SRS_WAKEUP 78
160 //--------------------------------------------------------------------
162 //--------------------------------------------------------------------
163 #define PID_GNB_URLLC_DL_TASK 80
164 #define PID_GNB_URLLC_DL_TOTAL_TASK 81
165 #define PID_GNB_URLLC_UL_TASK 82
166 #define PID_GNB_URLLC_UL_TOTAL_TASK 83
167 #define PID_GNB_URLLC_TASK 84
168 #define PID_GNB_URLLC_DL_CALL_BACK 85
169 #define PID_GNB_URLLC_UL_CALL_BACK 86
170 #define PID_GNB_URLLC_API_CALL_BACK 87
172 //--------------------------------------------------------------------
173 // Latency Tasks (Need 4 values (one per Numerology))
174 //--------------------------------------------------------------------
175 #define PID_GNB_DL_LINK_PRINT 88
176 #define PID_GNB_UL_LINK_PRINT 92
177 #define PID_GNB_SRS_LINK_PRINT 96
179 //--------------------------------------------------------------------
180 // GNB UL BBU Tasks (there is gap of 24 for 24 cell support)
181 //--------------------------------------------------------------------
182 #define PCID_GNB_FH_RX_DATA_CC0 100
183 #define PCID_GNB_FH_RX_SRS_CC0 124
184 #define PCID_GNB_PUSCH_CE_SYMB0_CC0 148
185 #define PCID_GNB_PUSCH_MMSE_SYMB0_CC0 172
186 #define PCID_GNB_PUSCH_MMSE_SYMB7_CC0 196
187 #define PCID_GNB_PUSCH_REDEMAP_SYMB0_CC0 220
188 #define PCID_GNB_PUSCH_REDEMAP_SYMB7_CC0 244
189 #define PCID_GNB_PUSCH_LAYDEMAP_SYMB0_CC0 268
190 #define PCID_GNB_PUSCH_LAYDEMAP_SYMB7_CC0 292
191 #define PCID_GNB_PUSCH_PN_SYMB0_CC0 316
192 #define PCID_GNB_PUSCH_PN_SYMB7_CC0 340
193 #define PCID_GNB_PUSCH_DEMOD_SYMB0_CC0 364
194 #define PCID_GNB_PUSCH_DEMOD_SYMB7_CC0 388
195 #define PCID_GNB_PUSCH_DESCRAMBLE_CC0 412
196 #define PCID_GNB_PUSCH_DECODER_CC0 436
197 #define PCID_GNB_PUSCH_TB_CC0 460
198 #define PCID_GNB_UL_CFG_CC0 484
199 #define PCID_GNB_PUSCH_DECODER_CB_CC0 508
200 #define PCID_GNB_PUSCH_RX_SYMB0_CC0 532
201 #define PCID_GNB_PUSCH_RX_SYMB7_CC0 556
202 #define PCID_GNB_PRACH_PROCESS_CC0 580
203 #define PCID_GNB_PUCCH_RX_CC0 604
204 #define PCID_GNB_SRS_RX_CC0 628
205 #define PCID_GNB_PUSCH_UCI_DECODER_CC0 652
206 #define PCID_GNB_UL_POST_CC0 676
207 #define PCID_GNB_UL_IQ_LOG_CC0 700
208 #define PCID_GNB_FH_RX_PRACH_CC0 724
209 #define PCID_GNB_PUSCH_RX_LINK_CC0 748
210 #define PCID_GNB_UL_LINK_CC0 772
211 #define PCID_GNB_PUSCH_CE_SYMB7_CC0 796
212 #define PCID_GNB_SRS_RX_LINK_CC0 820
215 #define PID_GNB_TASKLIST_NOT_COMPLETED 899
216 //--------------------------------------------------------------------
217 // GNB DL BBU Tasks (there is gap of 24 for 24 cell support)
218 //--------------------------------------------------------------------
219 #define PCID_GNB_DL_CFG_CC0 900
220 #define PCID_GNB_PDSCH_TB_CC0 924
221 #define PCID_GNB_PDSCH_SCRAMBLER_CC0 948
222 #define PCID_GNB_PDSCH_MOD_CC0 972
223 #define PCID_GNB_PDSCH_PRECODE_CC0 996
224 #define PCID_GNB_PDSCH_RS_CC0 1020
225 #define PCID_GNB_PDSCH_REMAP_CC0 1044
226 #define PCID_GNB_DL_RESET_BUF_CC0 1068
227 #define PCID_GNB_DL_SYMBOL_PROC_CC0 1092
228 #define PCID_GNB_DL_CSI_PROC_CC0 1116
229 #define PCID_GNB_DL_DCI_PROC_CC0 1140
230 #define PCID_GNB_DL_UCI_PROC_CC0 1164
231 #define PCID_GNB_DL_PBCH_PROC_CC0 1188
232 #define PCID_GNB_DL_POST_CC0 1212
233 #define PCID_GNB_PDSCH_TB_QUEUE_CC0 1236
234 #define PCID_GNB_DL_LINK_CC0 1260
235 #define PCID_GNB_DL_DCI_PRECODER_CC0 1284
236 #define PCID_GNB_PDSCH_TB_CRC_CC0 1308
237 #define PCID_GNB_PDSCH_CB_SETUP_CC0 1332
239 //--------------------------------------------------------------------
240 // Other DL / UL tasks (there is gap of 24 for 24 cell support)
241 //--------------------------------------------------------------------
242 #define PCID_GNB_PUSCH_TB_CRC_CC0 1500
243 #define PCID_GNB_PUSCH_CB_SETUP_CC0 1524
244 #define PCID_GNB_DL_BEAM_WEIGHT_TASK_CC0 1548
245 #define PCID_GNB_UL_BEAM_WEIGHT_TASK_CC0 1572
246 #define PCID_GNB_SRS_CE_CC0 1596
247 #define PCID_GNB_SRS_REPORT_CC0 1620
248 #define PCID_GNB_DL_BEAM_WEIGHT_COMPRESS_CC0 1644
249 #define PCID_GNB_UL_BEAM_WEIGHT_COMPRESS_CC0 1668
250 #define PCID_GNB_DL_IQ_COMPRESS_CC0 1692
251 #define PCID_GNB_UL_IQ_DECOMPRESS_CC0 1712
252 #define PCID_GNB_UL_IQ_FROM_XRAN_CC0 1736
253 #define PCID_GNB_UL_IQ_SP_SLOT_FROM_XRAN_CC0 1760
254 #define PCID_GNB_UL_SRS_IQ_DECOMPRESS_CC0 1784
255 #define PCID_GNB_DL_OFDM_CTRL_COMPRESS_CC0 1808
256 #define PCID_GNB_DL_OFDM_RS_COMPRESS_CC0 1832
257 #define PCID_GNB_DL_OFDM_DATA_COMPRESS_CC0 1856
259 //--------------------------------------------------------------------
261 //--------------------------------------------------------------------
262 #define PID_GNB_PUCCH_F0_SEQ_GEN 2000
263 #define PID_GNB_PUCCH_F0_DETECT 2001
264 #define PID_GNB_PUCCH_F1_SEQ_GEN1 2002
265 #define PID_GNB_PUCCH_F1_SEQ_GEN2 2003
266 #define PID_GNB_PUCCH_F1_DESPRD 2004
267 #define PID_GNB_PUCCH_F1_DEMOD 2005
268 #define PID_GNB_PUCCH_F2_DMRS_GEN 2006
269 #define PID_GNB_PUCCH_F2_CE 2007
270 #define PID_GNB_PUCCH_F2_EQU 2008
271 #define PID_GNB_PUCCH_F2_DEMOD 2009
272 #define PID_GNB_PUCCH_F2_DESCR 2010
273 #define PID_GNB_PUCCH_F2_DEC 2011
274 #define PID_GNB_PUCCH_F3_F4_DMRS_GEN 2012
275 #define PID_GNB_PUCCH_F3_F4_CE 2013
276 #define PID_GNB_PUCCH_F3_F4_EQU 2014
277 #define PID_GNB_PUCCH_F3_F4_IDFT 2015
278 #define PID_GNB_PUCCH_F3_F4_DESPRD 2016
279 #define PID_GNB_PUCCH_F3_F4_DEMOD 2017
280 #define PID_GNB_PUCCH_F3_F4_DESCR 2018
281 #define PID_GNB_PUCCH_F3_F4_DEC 2019
283 //--------------------------------------------------------------------
284 // GNB UL BBU Creation Tasks
285 //--------------------------------------------------------------------
286 #define PID_GNB_PUSCH_DMRS0_GEN_BYPASS 2700
287 #define PID_GNB_PUSCH_DMRS0_GEN_EXECUTE 2701
288 #define PID_GNB_PUSCH_DMRS1_GEN_BYPASS 2702
289 #define PID_GNB_PUSCH_DMRS1_GEN_EXECUTE 2703
290 #define PID_GNB_PRACH_GEN_BYPASS 2704
291 #define PID_GNB_PRACH_GEN_EXECUTE 2705
292 #define PID_GNB_PUCCH_GEN_BYPASS 2706
293 #define PID_GNB_PUCCH_GEN_EXECUTE 2707
294 #define PID_GNB_SRS_GEN_BYPASS 2708
295 #define PID_GNB_SRS_GEN_EXECUTE 2709
296 #define PID_GNB_UL_CFG_GEN_BYPASS 2710
297 #define PID_GNB_UL_CFG_GEN_EXECUTE 2711
298 #define PID_GNB_PUSCH_TB_TASK_GEN_BYPASS 2712
299 #define PID_GNB_PUSCH_TB_TASK_GEN_EXECUTE 2713
300 #define PID_GNB_PUSCH_DECODE_TASK_GEN_BYPASS 2714
301 #define PID_GNB_PUSCH_DECODE_TASK_GEN_EXECUTE 2715
302 #define PID_GNB_PUSCH_DATA0_GEN_BYPASS 2716
303 #define PID_GNB_PUSCH_DATA0_GEN_EXECUTE 2717
304 #define PID_GNB_PUSCH_DATA1_GEN_BYPASS 2718
305 #define PID_GNB_PUSCH_DATA1_GEN_EXECUTE 2719
307 //--------------------------------------------------------------------
308 // GNB DL BBU Creation Tasks
309 //--------------------------------------------------------------------
310 #define PID_GNB_DL_SCRAMBLER_GEN_BYPASS 2720
311 #define PID_GNB_DL_SCRAMBLER_GEN_EXECUTE 2721
312 #define PID_GNB_DL_CONFIG_GEN_BYPASS 2722
313 #define PID_GNB_DL_CONFIG_GEN_EXECUTE 2723
314 #define PID_GNB_DL_BEAM_GEN_BYPASS 2724
315 #define PID_GNB_DL_BEAM_GEN_EXECUTE 2725
317 //--------------------------------------------------------------------
319 //--------------------------------------------------------------------
320 #define PID_GNB_DL_PDSCH_SYMBOL_PRE_TASK 2730
321 #define PID_GNB_UL_PUSCH_CE0_PRE_TASK 2731
322 #define PID_GNB_UL_PUSCH_CE7_PRE_TASK 2732
323 #define PID_GNB_UL_PUSCH_MMSE0_PRE_TASK 2733
324 #define PID_GNB_UL_PUSCH_MMSE7_PRE_TASK 2734
325 #define PID_GNB_UL_PUCCH_PRE_TASK 2735
326 #define PID_GNB_UL_SRS_PRE_TASK 2736
327 #define PID_GNB_UL_PUSCH_LLR_RX_PRE_TASK 2737
328 #define PID_GNB_DL_BEAM_WEIGHT_PRE_TASK 2738
329 #define PID_GNB_UL_BEAM_WEIGHT_PRE_TASK 2739
330 #define PID_GNB_UL_PUSCH_DECODE_PRE_TASK 2740
332 //--------------------------------------------------------------------
334 //--------------------------------------------------------------------
335 #define PID_GNB_UL_PUCCH_POST_TASK 2745
337 //--------------------------------------------------------------------
339 //--------------------------------------------------------------------
340 #define PID_GNB_DL_IFFT0 2750
341 #define PID_GNB_DL_IFFT1 2751
342 #define PID_GNB_DL_IFFT2 2752
343 #define PID_GNB_DL_IFFT3 2753
344 #define PID_GNB_DL_IFFT4 2754
345 #define PID_GNB_DL_IFFT5 2755
346 #define PID_GNB_DL_IFFT6 2756
347 #define PID_GNB_DL_IFFT7 2757
348 #define PID_GNB_UL_FFT0 2758
349 #define PID_GNB_UL_FFT1 2759
350 #define PID_GNB_UL_FFT2 2760
351 #define PID_GNB_UL_FFT3 2761
352 #define PID_GNB_UL_FFT4 2762
353 #define PID_GNB_UL_FFT5 2763
354 #define PID_GNB_UL_FFT6 2764
355 #define PID_GNB_UL_FFT7 2765
357 #define PID_DLIFFT 2766
358 #define PID_DLIFFT_ADD_CP 2767
359 #define PID_ULFFT 2768
361 //--------------------------------------------------------------------
363 //--------------------------------------------------------------------
364 #define PID_AUX_RADIO_RX_BYPASS_PROC 2900
365 #define PID_AUX_RADIO_RX_STOP 2901
366 #define PID_AUX_RADIO_RX_UL_IQ 2902
367 #define PID_AUX_RADIO_PRACH_PKT 2903
368 #define PID_AUX_RADIO_FE_COMPRESS 2904
369 #define PID_AUX_RADIO_FE_DECOMPRESS 2905
370 #define PID_AUX_RADIO_TX_BYPASS_PROC 2906
371 #define PID_AUX_RADIO_ETH_TX_BURST 2907
372 #define PID_AUX_RADIO_TX_DL_IQ 2908
373 #define PID_AUX_RADIO_RX_VALIDATE 2909
374 #define PID_AUX_RADIO_RX_IRQ_ON 2910
375 #define PID_AUX_RADIO_RX_IRQ_OFF 2911
376 #define PID_AUX_RADIO_RX_EPOLL_WAIT 2912
377 #define PID_AUX_RADIO_TX_LTEMODE_PROC 2913
378 #define PID_AUX_RADIO_RX_LTEMODE_PROC 2914
379 #define PID_AUX_RADIO_TX_PLAY_BACK_IQ 2915
381 #define PCID_BBUPOOL_RADIO_DL_COMPRESSION_TASK_CC0 2940
382 #define PCID_BBUPOOL_RADIO_DL_IQ_LOG_LTE_TASK_CC0 2960
383 #define PCID_BBUPOOL_RADIO_UL_IQ_LOG_LTE_TASK_CC0 2980
385 //--------------------------------------------------------------------
387 //--------------------------------------------------------------------
388 #define PID_XRAN_TTI_TIMER 3100
389 #define PID_XRAN_TTI_CB 3101
390 #define PID_XRAN_SYM_TIMER 3102
391 #define PID_XRAN_PROC_TIMING_TIMEOUT 3103
392 #define PID_XRAN_TIME_SYSTIME_POLL 3104
393 #define PID_XRAN_TIME_SYSTIME_STOP 3105
394 #define PID_XRAN_TIME_ARM_TIMER 3106
396 #define PID_XRAN_FREQ_RX_PKT 3107
397 #define PID_XRAN_RX_STOP 3108
398 #define PID_XRAN_RX_UL_IQ 3109
399 #define PID_XRAN_PRACH_PKT 3110
400 #define PID_XRAN_FE_COMPRESS 3111
401 #define PID_XRAN_FE_DECOMPRESS 3112
402 #define PID_XRAN_TX_BYPASS_PROC 3113
403 #define PID_XRAN_ETH_TX_BURST 3114
404 #define PID_XRAN_TX_DL_IQ 3115
405 #define PID_XRAN_RX_VALIDATE 3116
406 #define PID_XRAN_RX_IRQ_ON 3117
407 #define PID_XRAN_RX_IRQ_OFF 3118
408 #define PID_XRAN_RX_EPOLL_WAIT 3119
409 #define PID_XRAN_TX_LTEMODE_PROC 3120
410 #define PID_XRAN_RX_LTEMODE_PROC 3121
411 #define PID_XRAN_TX_PLAY_BACK_IQ 3122
412 #define PID_XRAN_PROCESS_TX_SYM 3123
413 #define PID_XRAN_DISPATCH_TX_SYM 3124
414 #define PID_XRAN_PREPARE_TX_PKT 3125
415 #define PID_XRAN_ATTACH_EXT_BUF 3126
416 #define PID_XRAN_ETH_ENQUEUE_BURST 3127
418 #define PID_XRAN_CP_DL_CB 3128
419 #define PID_XRAN_CP_UL_CB 3129
420 #define PID_XRAN_UP_DL_CB 3130
421 #define PID_XRAN_SYM_OTA_CB 3131
422 #define PID_XRAN_TTI_CB_TO_PHY 3132
423 #define PID_XRAN_HALF_SLOT_CB_TO_PHY 3133
424 #define PID_XRAN_FULL_SLOT_CB_TO_PHY 3134
425 #define PID_XRAN_UP_UL_HALF_DEAD_LINE_CB 3135
426 #define PID_XRAN_UP_UL_FULL_DEAD_LINE_CB 3136
427 #define PID_XRAN_UP_UL_USER_DEAD_LINE_CB 3137
429 #define PID_XRAN_PROCESS_UP_PKT 3140
430 #define PID_XRAN_PROCESS_UP_PKT_SRS 3141
431 #define PID_XRAN_PROCESS_UP_PKT_PARSE 3142
432 #define PID_XRAN_PROCESS_CP_PKT 3143
433 #define PID_XRAN_PROCESS_DELAY_MEAS_PKT 3144
435 #define PID_XRAN_TIME_ARM_TIMER_DEADLINE 3150
436 #define PID_XRAN_TIME_ARM_USER_TIMER_DEADLINE 3151
442 #endif /* _XRAN_TASK_ID_H_ */