1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @brief Header file to implementation of BBU
23 * @author Intel Corporation
27 #ifndef _APP_BBU_POOL_H_
28 #define _APP_BBU_POOL_H_
34 #include "ebbu_pool_api.h"
35 #include "ebbu_pool_cfg.h"
38 #include "xran_fh_o_du.h"
39 #include "xran_mlog_lnx.h"
44 #endif /* #ifndef SUCCESS */
49 #endif /* #ifndef FAILURE */
51 #define MAX_NEXT_TASK_NUM 8
52 #define MAX_TEST_CTX 4
53 #define MAX_TEST_SPLIT_NUM 55 // then largest 1000 events per TTI by pre-defined event chain
55 #define EVENT_NAME(EVENT_TYPE) #EVENT_TYPE
57 #define MAX_PHY_INSTANCES ( 24 )
58 #define MAX_NUM_OF_SF_5G_CTX ( 8 )
60 /******Processing Latencies***/
61 #define DL_PROC_ADVANCE_MU0 ( 1 )
62 #define DL_PROC_ADVANCE_MU1 ( 2 )
63 #define DL_PROC_ADVANCE_MU3 ( 2 )
65 #define UL_PROC_ADVANCE_MU0 ( 1 )
66 #define UL_PROC_ADVANCE_MU1 ( 1 )
67 #define UL_PROC_ADVANCE_MU3 ( 1 )
69 extern uint32_t gMaxSlotNum[MAX_PHY_INSTANCES];
70 extern uint32_t gNumDLCtx[MAX_PHY_INSTANCES];
71 extern uint32_t gNumULCtx[MAX_PHY_INSTANCES];
72 extern uint32_t gNumDLBufferCtx[MAX_PHY_INSTANCES];
73 extern uint32_t gNumULBufferCtx[MAX_PHY_INSTANCES];
74 extern uint32_t gDLProcAdvance[MAX_PHY_INSTANCES];
75 extern int32_t gULProcAdvance[MAX_PHY_INSTANCES];
77 #define get_dl_sf_idx(nSlotNum, nCellIdx) ((nSlotNum + gDLProcAdvance[nCellIdx]) % gMaxSlotNum[nCellIdx])
78 #define get_ul_sf_idx(nSlotNum, nCellIdx) ((nSlotNum + gULProcAdvance[nCellIdx]) % gMaxSlotNum[nCellIdx])
79 #define get_dl_sf_ctx(nSlotNum, nCellIdx) (nSlotNum % gNumDLCtx[nCellIdx])
80 #define get_ul_sf_ctx(nSlotNum, nCellIdx) (nSlotNum % gNumULCtx[nCellIdx])
84 TTI_START = 0, /* 0 First task that will schedule all the other tasks for all Cells */
85 SYM2_WAKE_UP, /* 1 Sym2 Arrival which will wake up UL Tasks for all cells */
86 SYM6_WAKE_UP, /* 2 Sym6 Arrival which will wake up UL Tasks for all cells */
87 SYM11_WAKE_UP, /* 3 Sym11 Arrival which will wake up UL Tasks for all cells */
88 SYM13_WAKE_UP, /* 4 Sym13 Arrival which will wake up UL Tasks for all cells */
89 PRACH_WAKE_UP, /* 5 PRACH Arrival which will wake up will wake up PRACH for all cells */
90 SRS_WAKE_UP, /* 6 (Massive MIMO) SRS Arrival which will wake up SRS Decompression for all cells */
93 DL_PDSCH_SCRM, /* 9 */
94 DL_PDSCH_SYM, /* 10 */
98 UL_IQ_DECOMP2, /* 14 */
99 UL_IQ_DECOMP6, /* 15 */
100 UL_IQ_DECOMP11, /* 16 */
101 UL_IQ_DECOMP13, /* 17 */
102 UL_PUSCH_CE0, /* 18 */
103 UL_PUSCH_CE7, /* 19 */
104 UL_PUSCH_EQL0, /* 20 */
105 UL_PUSCH_EQL7, /* 21 */
106 UL_PUSCH_LLR, /* 22 */
107 UL_PUSCH_DEC, /* 23 */
108 UL_PUSCH_TB, /* 24 */
111 UL_SRS_DECOMP, /* 27 */
113 UL_SRS_POST, /* 29 */
116 DL_BEAM_GEN, /* 32 */
118 UL_BEAM_GEN, /* 34 */
120 MAX_TASK_NUM_G_NB /* 36 */
123 ///defines the parameters that multi-tasks are generated.
126 /*! Indicate how many tasks of the generating type. 1 means that no task splitting. */
128 /*! the parameter list for each splitted task */
129 void *pTaskExePara[MAX_TEST_SPLIT_NUM];
143 typedef struct tSampleSplitStruct
154 TaskSplitType eSplitType;
159 int32_t eventChainDepth;
160 int32_t nextEventChain[MAX_TASK_NUM_G_NB][MAX_NEXT_TASK_NUM];
161 int32_t nextEventCount[MAX_TASK_NUM_G_NB];
162 int32_t preEventCount[MAX_TASK_NUM_G_NB];
163 int32_t preEventCountSave[MAX_TASK_NUM_G_NB];
164 int32_t preEventStat[MAX_TASK_NUM_G_NB];
165 } __attribute__((aligned(IA_ALIGN))) EventChainDescStruct;
167 typedef void (*PreEventExeFunc) (uint32_t nSfIdx, uint16_t nCellIdx, TaskPreGen *pPara);
174 EventExeFunc pEventFunc;
175 PreEventExeFunc pPreEventFunc;
176 uint32_t nWakeOnExtrernalEvent;
177 uint32_t nPrefetchFlag;
178 uint32_t nCoreMaskType;
181 //uint64_t nCoreMask2;
182 //uint64_t nCoreMask3;
183 //uint64_t nCoreMask4;
184 //uint64_t nCoreMask5;
185 //uint64_t nCoreMask6;
186 //uint64_t nCoreMask7;
187 } __attribute__((aligned(IA_ALIGN))) EventConfigStruct;
199 uint8_t nBuffer[240];
200 } __attribute__((aligned(IA_ALIGN))) EventCtrlStruct;
206 EventExeFunc pEventFunc;
207 } __attribute__((aligned(IA_ALIGN))) EventInfo;
212 EventStruct *pEventStruct;
216 } __attribute__((aligned(IA_ALIGN))) gNBCellStruct;
218 extern EventChainDescStruct gEventChain[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX];
219 extern EventCtrlStruct gEventCtrl[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX][MAX_TASK_NUM_G_NB][MAX_TEST_SPLIT_NUM];
221 int32_t event_chain_gen(EventChainDescStruct *psEventChain);
222 int32_t event_chain_reset(EventChainDescStruct *psEventChain);
223 int32_t test_buffer_create();
225 eBbuPoolHandler app_get_ebbu_pool_handler(void);
227 int32_t app_bbu_init(int argc, char *argv[], char cfgName[512], UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg[],
228 uint64_t nActiveCoreMask[EBBUPOOL_MAX_CORE_MASK]);
229 int32_t app_bbu_close(void);
232 int32_t app_bbu_dl_tti_call_back(void * param);
234 int32_t test_func_gen(eBbuPoolHandler pHandler, int32_t nCell, int32_t nSlot, int32_t eventId);
235 int32_t next_event_unlock(void *pCookies);
238 int32_t app_bbu_pool_task_dl_post(void *pCookies);
239 void app_bbu_pool_pre_task_dl_post(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara);
240 int32_t app_bbu_pool_task_dl_config(void *pCookies);
241 void app_bbu_pool_pre_task_dl_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara);
242 int32_t app_bbu_pool_task_ul_config(void * pCookies);
243 void app_bbu_pool_pre_task_ul_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara);
245 int32_t app_bbu_pool_task_sym2_wakeup(void *pCookies);
246 int32_t app_bbu_pool_task_sym6_wakeup(void *pCookies);
247 int32_t app_bbu_pool_task_sym11_wakeup(void *pCookies);
248 int32_t app_bbu_pool_task_sym13_wakeup(void *pCookies);
249 int32_t app_bbu_pool_task_prach_wakeup(void *pCookies);
250 int32_t app_bbu_pool_task_srs_wakeup(void *pCookies);
252 void app_io_xran_fh_bbu_rx_callback(void *pCallbackTag, xran_status_t status);
253 void app_io_xran_fh_bbu_rx_bfw_callback(void *pCallbackTag, xran_status_t status);
254 void app_io_xran_fh_bbu_rx_prach_callback(void *pCallbackTag, xran_status_t status);
255 void app_io_xran_fh_bbu_rx_srs_callback(void *pCallbackTag, xran_status_t status);
261 #endif /*_APP_BBU_POOL_H_*/