fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c

   1 /******************************************************************************
   2 *
   3 *   Copyright (c) 2021 Intel.
   4 *
   5 *   Licensed under the Apache License, Version 2.0 (the "License");
   6 *   you may not use this file except in compliance with the License.
   7 *   You may obtain a copy of the License at
   8 *
   9 *       http://www.apache.org/licenses/LICENSE-2.0
  10 *
  11 *   Unless required by applicable law or agreed to in writing, software
  12 *   distributed under the License is distributed on an "AS IS" BASIS,
  13 *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  14 *   See the License for the specific language governing permissions and
  15 *   limitations under the License.
  16 *
  17 *******************************************************************************/
  18
  19 /**
  20  * @file
  21  * This file consist of implementation of FAPI UL_DCI.request message.
  22  *
  23  **/
  24
  25 #include "nr5g_fapi_framework.h"
  26 #include "nr5g_fapi_fapi2mac_api.h"
  27 #include "nr5g_fapi_fapi2phy_api.h"
  28 #include "nr5g_fapi_fapi2phy_p7_proc.h"
  29 #include "nr5g_fapi_fapi2phy_p7_pvt_proc.h"
  30 #include "nr5g_fapi_memory.h"
  31
  32  /** @ingroup group_source_api_p7_fapi2phy_proc
  33  *
  34  *  @param[in]  p_phy_instance Pointer to PHY instance.
  35  *  @param[in]  p_fapi_req Pointer to FAPI UL_DCI.request message structure.
  36  *
  37  *  @return     Returns ::SUCCESS and ::FAILURE.
  38  *
  39  *  @description
  40  *  This message includes DCI content used for the scheduling of PUSCH.
  41  *
  42 **/
  43 uint8_t nr5g_fapi_ul_dci_request(
  44     bool is_urllc,
  45     p_nr5g_fapi_phy_instance_t p_phy_instance,
  46     fapi_ul_dci_req_t * p_fapi_req,
  47     fapi_vendor_msg_t * p_fapi_vendor_msg)
  48 {
  49     PULDCIRequestStruct p_ia_ul_dci_req;
  50     PMAC2PHY_QUEUE_EL p_list_elem;
  51     nr5g_fapi_stats_t *p_stats;
  52
  53     if (NULL == p_phy_instance) {
  54         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Invalid " "phy instance"));
  55         return FAILURE;
  56     }
  57     p_stats = &p_phy_instance->stats;
  58     p_stats->fapi_stats.fapi_ul_dci_req++;
  59
  60     if (NULL == p_fapi_req) {
  61         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Invalid fapi " "message"));
  62         return FAILURE;
  63     }
  64
  65     p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem((uint8_t)
  66         MSG_TYPE_PHY_UL_DCI_REQ, 1, (uint32_t) sizeof(ULDCIRequestStruct));
  67     if (!p_list_elem) {
  68         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Unable to create "
  69                 "list element. Out of memory!!!"));
  70         return FAILURE;
  71     }
  72
  73     p_ia_ul_dci_req = (PULDCIRequestStruct) (p_list_elem + 1);
  74     NR5G_FAPI_MEMSET(p_ia_ul_dci_req, sizeof(PULDCIRequestStruct), 0,
  75         sizeof(PULDCIRequestStruct));
  76     p_ia_ul_dci_req->sMsgHdr.nMessageType = MSG_TYPE_PHY_UL_DCI_REQ;
  77     p_ia_ul_dci_req->sMsgHdr.nMessageLen =
  78         (uint16_t) sizeof(ULDCIRequestStruct);
  79     p_ia_ul_dci_req->sSFN_Slot.nSFN = p_fapi_req->sfn;
  80     p_ia_ul_dci_req->sSFN_Slot.nSlot = p_fapi_req->slot;
  81     p_ia_ul_dci_req->sSFN_Slot.nCarrierIdx = p_phy_instance->phy_id;
  82
  83     if (FAILURE == nr5g_fapi_ul_dci_req_to_phy_translation(p_phy_instance,
  84             p_fapi_req, p_ia_ul_dci_req)) {
  85         nr5g_fapi_fapi2phy_destroy_api_list_elem(p_list_elem);
  86         NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_DCI.request][%d][%d,%d] Not Sent",
  87                 p_phy_instance->phy_id, p_ia_ul_dci_req->sSFN_Slot.nSFN,
  88                 p_ia_ul_dci_req->sSFN_Slot.nSlot));
  89         return FAILURE;
  90     }
  91     nr5g_fapi_fapi2phy_add_to_api_list(is_urllc, p_list_elem);
  92
  93     p_stats->iapi_stats.iapi_ul_dci_req++;
  94
  95
  96     if (NULL != p_fapi_vendor_msg) {
  97         nr5g_fapi_ul_dci_req_to_phy_translation_vendor_ext(p_phy_instance,
  98                                                         p_fapi_vendor_msg,
  99                                                         p_ia_ul_dci_req);
 100     }
 101
 102     NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_DCI.request][%u][%u,%u,%u] is_urllc %u",
 103             p_phy_instance->phy_id,
 104             p_ia_ul_dci_req->sSFN_Slot.nSFN, p_ia_ul_dci_req->sSFN_Slot.nSlot,
 105             p_ia_ul_dci_req->sSFN_Slot.nSym, is_urllc));
 106
 107     return SUCCESS;
 108 }
 109
 110  /** @ingroup group_source_api_p7_fapi2phy_proc
 111  *
 112  *  @param[in]   p_fapi_req Pointer to FAPI UL_DCI.request structure.
 113  *  @param[out]  p_ia_ul_dci_req Pointer to IAPI UL_DCI.request structure.
 114  *
 115  *  @return     Returns ::SUCCESS and ::FAILURE.
 116  *
 117  *  @description
 118  *  This function converts FAPI UL_DCI.request to IAPI UL_DCI.request
 119  *  structure.
 120  *
 121 **/
 122 uint8_t nr5g_fapi_ul_dci_req_to_phy_translation(
 123     p_nr5g_fapi_phy_instance_t p_phy_instance,
 124     fapi_ul_dci_req_t * p_fapi_req,
 125     PULDCIRequestStruct p_ia_ul_dci_req)
 126 {
 127     int idx;
 128     int ruidx;
 129     fapi_dci_pdu_t *p_fapi_dci_pdu;
 130     DCIPDUStruct *p_ia_dci_pdu;
 131     nr5g_fapi_stats_t *p_stats;
 132     uint8_t *p_ia_curr, *p_freq_dom_res = NULL;
 133
 134     p_stats = &p_phy_instance->stats;
 135
 136     p_ia_ul_dci_req->nDCI = p_fapi_req->numPdus;
 137
 138     p_ia_curr = (uint8_t *) p_ia_ul_dci_req->sULDCIPDU;
 139
 140     for (idx = 0; idx < p_ia_ul_dci_req->nDCI; idx++) {
 141         p_stats->fapi_stats.fapi_ul_dci_pdus++;
 142         p_fapi_dci_pdu = &p_fapi_req->pdus[idx];
 143         p_ia_dci_pdu = (DCIPDUStruct *) p_ia_curr;
 144         p_ia_dci_pdu->sPDUHdr.nPDUType = DL_PDU_TYPE_DCI;
 145         p_ia_dci_pdu->sPDUHdr.nPDUSize = RUP32B(sizeof(DCIPDUStruct));
 146         p_ia_dci_pdu->nRNTI = p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].rnti;
 147         p_ia_dci_pdu->nBWPSize = p_fapi_dci_pdu->pdcchPduConfig.bwpSize;
 148         p_ia_dci_pdu->nBWPStart = p_fapi_dci_pdu->pdcchPduConfig.bwpStart;
 149         p_ia_dci_pdu->nSubcSpacing =
 150             p_fapi_dci_pdu->pdcchPduConfig.subCarrierSpacing;
 151         p_ia_dci_pdu->nCpType = p_fapi_dci_pdu->pdcchPduConfig.cyclicPrefix;
 152         p_freq_dom_res = &p_fapi_dci_pdu->pdcchPduConfig.freqDomainResource[0];
 153         p_ia_dci_pdu->nFreqDomain[0] =
 154             ((uint32_t) (p_freq_dom_res[0])) |
 155             (((uint32_t) (p_freq_dom_res[1])) << 8) |
 156             (((uint32_t) (p_freq_dom_res[2])) << 16) |
 157             (((uint32_t) (p_freq_dom_res[3])) << 24);
 158         p_ia_dci_pdu->nFreqDomain[1] =
 159             ((uint32_t) (p_freq_dom_res[4])) |
 160             (((uint32_t) (p_freq_dom_res[5])) << 8);
 161         p_ia_dci_pdu->nStartSymbolIndex =
 162             p_fapi_dci_pdu->pdcchPduConfig.startSymbolIndex;
 163         p_ia_dci_pdu->nNrOfSymbols =
 164             p_fapi_dci_pdu->pdcchPduConfig.durationSymbols;
 165         p_ia_dci_pdu->nCCEToREGType =
 166             p_fapi_dci_pdu->pdcchPduConfig.cceRegMappingType;
 167         p_ia_dci_pdu->nREGBundleSize =
 168             p_fapi_dci_pdu->pdcchPduConfig.regBundleSize;
 169         p_ia_dci_pdu->nShift = p_fapi_dci_pdu->pdcchPduConfig.shiftIndex;
 170         p_ia_dci_pdu->nScid =
 171             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].scramblingId;
 172         p_ia_dci_pdu->nCCEStartIndex =
 173             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].cceIndex;
 174         p_ia_dci_pdu->nAggrLvl =
 175             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].aggregationLevel;
 176         p_ia_dci_pdu->nInterleaveSize =
 177             p_fapi_dci_pdu->pdcchPduConfig.interleaverSize;
 178         p_ia_dci_pdu->nCoreSetType = p_fapi_dci_pdu->pdcchPduConfig.coreSetType;
 179         p_ia_dci_pdu->nRNTIScramb =
 180             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].scramblingRnti;
 181         p_ia_dci_pdu->nTotalBits =
 182             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payloadSizeBits;
 183
 184
 185         if (USE_VENDOR_EPREXSSB != p_phy_instance->phy_config.use_vendor_EpreXSSB)
 186         {
 187         p_ia_dci_pdu->nEpreRatioOfPDCCHToSSB =
 188                 nr5g_fapi_calculate_nEpreRatioOfPDCCHToSSB(p_fapi_dci_pdu->
 189                     pdcchPduConfig.dlDci[0].beta_pdcch_1_0);
 190         p_ia_dci_pdu->nEpreRatioOfDmrsToSSB =
 191                 nr5g_fapi_calculate_nEpreRatioOfDmrsToSSB(p_fapi_dci_pdu->
 192                     pdcchPduConfig.dlDci[0].powerControlOffsetSS);
 193         }
 194
 195         p_ia_dci_pdu->nTotalBits =
 196             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payloadSizeBits;
 197         if (FAILURE == NR5G_FAPI_MEMCPY(p_ia_dci_pdu->nDciBits,
 198                 sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN,
 199                 p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payload,
 200                 sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN)) {
 201             NR5G_FAPI_LOG(ERROR_LOG,
 202                 ("UL_DCI Pdu: RNTI: %d -- DCI Bits copy" " failed.",
 203                     p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].rnti));
 204             return FAILURE;
 205         }
 206         p_ia_dci_pdu->nID = p_ia_dci_pdu->nScid;
 207         p_ia_dci_pdu->nNrofTxRU = 0x0;
 208         p_ia_dci_pdu->nBeamId = 0x0;
 209
 210         for (ruidx = 0; ruidx < MAX_TXRU_NUM; ruidx++) {
 211             p_ia_dci_pdu->nTxRUIdx[ruidx] = 0;
 212         }
 213         p_ia_curr += RUP32B(sizeof(DCIPDUStruct));
 214     }
 215
 216     p_stats->iapi_stats.iapi_ul_dci_pdus++;
 217     return SUCCESS;
 218 }
 219
 220  /** @ingroup group_source_api_p7_fapi2phy_proc
 221  *
 222  *  @param[in]   p_fapi_vendor_msg  Pointer to FAPI UL_DCI.request vendor message.
 223  *  @param[out]  p_ia_ul_dci_req    Pointer to IAPI UL_DCI.request structure.
 224  *
 225  *  @return     no return.
 226  *
 227  *  @description
 228  *  This function fills fields for UL_DCI.request structure that come from
 229  *  a vendor extension.
 230  *
 231 **/
 232 void nr5g_fapi_ul_dci_req_to_phy_translation_vendor_ext(
 233     p_nr5g_fapi_phy_instance_t p_phy_instance,
 234     fapi_vendor_msg_t * p_fapi_vendor_msg,
 235     PULDCIRequestStruct p_ia_ul_dci_req)
 236 {
 237     int idx = 0;
 238
 239     fapi_vendor_dci_pdu_t *p_vendor_dci_pdu;
 240     DCIPDUStruct *p_ia_dci_pdu;
 241     uint8_t *p_ia_curr = NULL;
 242
 243     p_ia_ul_dci_req->sSFN_Slot.nSym = p_fapi_vendor_msg->p7_req_vendor.ul_dci_req.sym;
 244
 245     p_ia_curr = (uint8_t *) p_ia_ul_dci_req->sULDCIPDU;
 246
 247     for (idx = 0; idx < p_ia_ul_dci_req->nDCI; idx++) {
 248         p_ia_dci_pdu = (DCIPDUStruct *) p_ia_curr;
 249         if (USE_VENDOR_EPREXSSB == p_phy_instance->phy_config.use_vendor_EpreXSSB)
 250         {
 251             p_vendor_dci_pdu = &p_fapi_vendor_msg->p7_req_vendor.ul_dci_req.pdus[idx];
 252             p_ia_dci_pdu->nEpreRatioOfPDCCHToSSB = p_vendor_dci_pdu->
 253                 pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb;
 254             p_ia_dci_pdu->nEpreRatioOfDmrsToSSB = p_vendor_dci_pdu->
 255                 pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb;
 256         }
 257         p_ia_curr += RUP32B(sizeof(DCIPDUStruct));
 258     }
 259 }