dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
- dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
+ dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
/* ssbOfPdufstA to be filled in ssbCfg */
- dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
+ dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
/* Bit manipulation for SFN */
setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
-
return ROK;
}
return RFAILED;
dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* Spec 38.214 Sec 5.1.2.2.2
*/
coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
- rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
- rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* Spec 38.214 Sec 5.1.2.2.2
*/
coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
- rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
- rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
uint8_t modNCodSchemeSize = 5;
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 16;
-
+
dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
/* TODO: Fill values of coreset0Size, rbStart and rbLen */
coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
- rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
- rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* Spec 38.214 Sec 5.1.2.2.2
*/
coresetSize = pdcchInfo->coresetCfg.coreSetSize;
- rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
- rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
{
dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
- dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
- dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
- dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
+ dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
+ dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
if(dlSlot->dlInfo.isBroadcastPres)
{
- if(dlSlot->dlInfo.brdcstAlloc.ssbTrans)
+ if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
{
for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
{
count++;
}
}
- if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
/* PDCCH and PDSCH PDU is filled */
count += 2;
{
uint8_t idx = 0, count = 0, ueIdx=0;
- if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
count++;
}
*
* ********************************************************************/
uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
- PdschCfg pdschCfg)
+ PdschCfg *pdschCfg)
{
uint32_t payloadSize = 0;
uint8_t *sib1Payload = NULLP;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- payloadSize = pdschCfg.codeword[0].tbSize;
+ payloadSize = pdschCfg->codeword[0].tbSize;
pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
LWR_MAC_ALLOC(sib1Payload, payloadSize);
{
if(currDlSlot->dlInfo.isBroadcastPres)
{
- if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
+ if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
{
if(dlTtiReq->pdus != NULLP)
{
DU_LOG("\033[0m");
}
- if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
+ if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
/* Filling SIB1 param */
if(numPduEncoded != nPdu)
{
- rntiType = SI_RNTI_TYPE;
+ if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
+ rntiType = SI_RNTI_TYPE;
/* PDCCH PDU */
fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
/* PDSCH PDU */
fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
+ currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg,
currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
pduIndex);
dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
txDataReq->sfn = currTimingInfo.sfn;
txDataReq->slot = currTimingInfo.slot;
- if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
- dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg);
+ dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg);
pduIndex++;
txDataReq->num_pdus++;
}
ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
- ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
+ ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
dlSlot[dlSchedInfo->schSlotValue.broadcastTime.slot];
currDlSlot->dlInfo.isBroadcastPres = true;
memcpy(&currDlSlot->dlInfo.brdcstAlloc, &dlSchedInfo->brdcstAlloc, sizeof(DlBrdcstAlloc));
- currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg = \
- &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg;
}
for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
* uint8_t offsetPointA : offset
* @return void
**/
-void fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg *sib1SchCfg, uint16_t pci, uint8_t offsetPointA)
+uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg *sib1SchCfg, uint16_t pci, uint8_t offsetPointA)
{
uint8_t coreset0Idx = 0;
uint8_t searchSpace0Idx = 0;
uint8_t FreqDomainResource[FREQ_DOM_RSRC_SIZE] = {0};
uint16_t tbSize = 0;
uint8_t ssbIdx = 0;
+ PdcchCfg *pdcch;
+ PdschCfg *pdsch;
+ BwpCfg *bwp;
- PdcchCfg *pdcch = &(sib1SchCfg->sib1PdcchCfg);
- PdschCfg *pdsch = &(sib1SchCfg->sib1PdschCfg);
- BwpCfg *bwp = &(sib1SchCfg->bwp);
+ pdcch = &(sib1SchCfg->sib1PdcchCfg);
+ bwp = &(sib1SchCfg->bwp);
coreset0Idx = sib1SchCfg->coresetZeroIndex;
searchSpace0Idx = sib1SchCfg->searchSpaceZeroIndex;
pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
- pdcch->dci.txPdcchPower.powerValue = 0;
+ pdcch->dci.txPdcchPower.beta_pdcch_1_0= 0;
pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
/* Storing pdschCfg pointer here. Required to access pdsch config while
fillig up pdcch pdu */
- pdcch->dci.pdschCfg = pdsch;
+ SCH_ALLOC(pdcch->dci.pdschCfg, sizeof(PdschCfg));
+ if(pdcch->dci.pdschCfg == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in %s ", __func__);
+ return RFAILED;
+ }
+ pdsch = pdcch->dci.pdschCfg;
/* fill the PDSCH PDU */
uint8_t cwCount = 0;
pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
/* the RB numbering starts from coreset0, and PDSCH is always above SSB */
- pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB;
- pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs, NUM_PDSCH_SYMBOL);
+ pdsch->pdschFreqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB;
+ pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs, NUM_PDSCH_SYMBOL);
pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
pdsch->pdschTimeAlloc.rowIndex = 1;
/* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
- pdsch->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
- pdsch->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
+ pdsch->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
+ pdsch->pdschTimeAlloc.numSymb = NUM_PDSCH_SYMBOL;
pdsch->beamPdschInfo.numPrgs = 1;
pdsch->beamPdschInfo.prgSize = 1;
pdsch->beamPdschInfo.digBfInterfaces = 0;
pdsch->txPdschPower.powerControlOffset = 0;
pdsch->txPdschPower.powerControlOffsetSS = 0;
+ return ROK;
}
/**
cellCb->macInst = pst->srcInst;
/* derive the SIB1 config parameters */
- fillSchSib1Cfg(schCellCfg->numerology, schCellCfg->bandwidth, cellCb->numSlots,
+ ret = fillSchSib1Cfg(schCellCfg->numerology, schCellCfg->bandwidth, cellCb->numSlots,
&(schCellCfg->sib1SchCfg), schCellCfg->phyCellId,
schCellCfg->ssbSchCfg.ssbOffsetPointA);
-
+ if(ret != ROK)
+ {
+ DU_LOG("\nERROR --> SCH : Failed to fill sib1 configuration");
+ return RFAILED;
+ }
memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg));
schProcPagingCfg(cellCb);
SCH_FREE(cellCb->cellCfg.plmnInfoList.snssai, cellCb->cellCfg.plmnInfoList.numSliceSupport*sizeof(Snssai*));
}
+ SCH_FREE(cellCb->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg, sizeof(PdschCfg));
+
for(uint16_t idx =0; idx<MAX_SFN; idx++)
{
list = &cellCb->pageCb.pageIndInfoRecord[idx];
if(ssbOccasion && sib1Occasion)
{
broadcastPrbStart = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
- broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB + cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.numPrb -1;
+ broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB + cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
}
else if(ssbOccasion)
{
}
else if(sib1Occasion)
{
- broadcastPrbStart = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.startPrb;
- broadcastPrbEnd = broadcastPrbStart + cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.numPrb -1;
+ broadcastPrbStart = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
+ broadcastPrbEnd = broadcastPrbStart + cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
}
/* Iterate through all free PRB blocks */
{
reservedPrbStart = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
reservedPrbEnd = reservedPrbStart + SCH_SSB_NUM_PRB + \
- cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.numPrb -1;
+ cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
}
else if(ssbOccasion)
{
}
else if(sib1Occasion)
{
- reservedPrbStart = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.startPrb;
- reservedPrbEnd = reservedPrbStart + cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.numPrb -1;
+ reservedPrbStart = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
+ reservedPrbEnd = reservedPrbStart + cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
}
else
{
{
uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
DmrsInfo dmrs;
- ResAllocType1 freqAlloc;
- TimeDomainAlloc timeAlloc;
+ PdschFreqAlloc freqAlloc;
+ PdschTimeAlloc timeAlloc;
SchDlSlotInfo *schDlSlotInfo = NULLP;
if(cell == NULL)
DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
return RFAILED;
}
-
- dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
- freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
- timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
+
+ dlBrdcstAlloc->crnti = SI_RNTI;
+ dmrs = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->dmrs;
+ freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc;
+ timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschTimeAlloc;
schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
/* Find total symbols used including DMRS */
memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
- memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
- dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
schDlSlotInfo->sib1Pres = true;
return ROK;
}
pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
- pdcch->dci.txPdcchPower.powerValue = 0;
+ pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0;
pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
pdcch->dci.pdschCfg = pdsch;
pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
- pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
- pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
+ pdsch->pdschTimeAlloc.startSymb = pdschStartSymbol;
+ pdsch->pdschTimeAlloc.numSymb = pdschNumSymbols;
pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
- pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
- pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
+ pdsch->pdschFreqAlloc.startPrb = MAX_NUM_RB;
+ pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
/* Find total symbols occupied including DMRS */
* in that case only PDSCH symbols are marked as occupied */
if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
{
- startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
- numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
+ startSymbol = pdsch->pdschTimeAlloc.startSymb;
+ numSymbol = pdsch->pdschTimeAlloc.numSymb;
}
/* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
else
{
startSymbol = dmrsStartSymbol;
- numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
+ numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
}
/* Allocate the number of PRBs required for RAR PDSCH */
if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
- &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
+ &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
{
DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
return RFAILED;
pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
- pdcch->dci.txPdcchPower.powerValue = 0;
+ pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0;
pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
/* fill the PDSCH PDU */
pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
- pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
- pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
+ pdsch->pdschTimeAlloc.startSymb = pdschStartSymbol;
+ pdsch->pdschTimeAlloc.numSymb = pdschNumSymbols;
pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
- pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
- pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
+ pdsch->pdschFreqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
+ pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
/* Find total symbols occupied including DMRS */
dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
* in that case only PDSCH symbols are marked as occupied */
if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
{
- startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
- numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
+ startSymbol = pdsch->pdschTimeAlloc.startSymb;
+ numSymbol = pdsch->pdschTimeAlloc.numSymb;
}
/* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
else
{
startSymbol = dmrsStartSymbol;
- numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
+ numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
}
/* Allocate the number of PRBs required for DL PDSCH */
if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
- &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
+ &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
{
DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
return RFAILED;
pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
/* the RB numbering starts from coreset0, and PDSCH is always above SSB */
- pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
- pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
+ pagePdschCfg->pdschFreqAlloc.startPrb = startPrb;
+ pagePdschCfg->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
/* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
- pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
- pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
+ pagePdschCfg->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
+ pagePdschCfg->pdschTimeAlloc.numSymb = NUM_PDSCH_SYMBOL;
/* Find total symbols occupied including DMRS */
dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
* in that case only PDSCH symbols are marked as occupied */
if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
{
- startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
- numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
+ startSymbol = pagePdschCfg->pdschTimeAlloc.startSymb;
+ numSymbol = pagePdschCfg->pdschTimeAlloc.numSymb;
}
/* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
else
{
startSymbol = dmrsStartSymbol;
- numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
+ numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.numSymb;
}
/* Allocate the number of PRBs required for DL PDSCH */
if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
- &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
+ &pagePdschCfg->pdschFreqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.numPrb)) != ROK)
{
DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
return RFAILED;
pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
- pdcch->dci.txPdcchPower.powerValue = 0;
+ pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0;
pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
pdcch->dci.pdschCfg = pdsch;
pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
pdsch->pdschTimeAlloc.rowIndex = k0Index;
- pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol;
- pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol;
+ pdsch->pdschTimeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol;
+ pdsch->pdschTimeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol;
pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
- pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
- pdsch->pdschFreqAlloc.freqAlloc.numPrb = \
+ pdsch->pdschFreqAlloc.startPrb = MAX_NUM_RB;
+ pdsch->pdschFreqAlloc.numPrb = \
schCalcNumPrb(tbSize, mcs, initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol);
/* Find total symbols occupied including DMRS */
* in that case only PDSCH symbols are marked as occupied */
if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
{
- startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
- numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
+ startSymbol = pdsch->pdschTimeAlloc.startSymb;
+ numSymbol = pdsch->pdschTimeAlloc.numSymb;
}
/* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
else
{
startSymbol = dmrsStartSymbol;
- numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
+ numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
}
/* Allocate the number of PRBs required for RAR PDSCH */
if((allocatePrbDl(cell, rarTime, startSymbol, numSymbol,\
- &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
+ &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
{
DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for RAR");
return RFAILED;
memset(&dlSchedInfo, 0, sizeof(DlSchedInfo));
schCalcSlotValues(*slotInd, &dlSchedInfo.schSlotValue, cell->numSlots);
dlBrdcstAlloc = &dlSchedInfo.brdcstAlloc;
- dlBrdcstAlloc->ssbTrans = NO_TRANSMISSION;
- dlBrdcstAlloc->sib1Trans = NO_TRANSMISSION;
+ dlBrdcstAlloc->ssbTransmissionMode = NO_TRANSMISSION;
+ dlBrdcstAlloc->sib1TransmissionMode = NO_TRANSMISSION;
memcpy(&cell->slotInfo, slotInd, sizeof(SlotTimingInfo));
dlBrdcstAlloc->ssbIdxSupported = SSB_IDX_SUPPORTED;
#endif
/* Check for SSB occassion */
- dlBrdcstAlloc->ssbTrans = schCheckSsbOcc(cell, dlSchedInfo.schSlotValue.broadcastTime);
- if(dlBrdcstAlloc->ssbTrans)
+ dlBrdcstAlloc->ssbTransmissionMode = schCheckSsbOcc(cell, dlSchedInfo.schSlotValue.broadcastTime);
+ if(dlBrdcstAlloc->ssbTransmissionMode)
{
if(schBroadcastSsbAlloc(cell, dlSchedInfo.schSlotValue.broadcastTime, dlBrdcstAlloc) != ROK)
{
DU_LOG("\nERROR --> SCH : schBroadcastSsbAlloc failed");
- dlBrdcstAlloc->ssbTrans = NO_TRANSMISSION;
+ dlBrdcstAlloc->ssbTransmissionMode = NO_TRANSMISSION;
}
else
{
dlSchedInfo.isBroadcastPres = true;
- if((dlBrdcstAlloc->ssbTrans == NEW_TRANSMISSION) && (!cell->firstSsbTransmitted))
+ if((dlBrdcstAlloc->ssbTransmissionMode == NEW_TRANSMISSION) && (!cell->firstSsbTransmitted))
cell->firstSsbTransmitted = true;
}
}
/* Check for SIB1 occassion */
- dlBrdcstAlloc->sib1Trans = schCheckSib1Occ(cell, dlSchedInfo.schSlotValue.broadcastTime);
- if(dlBrdcstAlloc->sib1Trans)
+ dlBrdcstAlloc->sib1TransmissionMode = schCheckSib1Occ(cell, dlSchedInfo.schSlotValue.broadcastTime);
+ if(dlBrdcstAlloc->sib1TransmissionMode)
{
if(schBroadcastSib1Alloc(cell, dlSchedInfo.schSlotValue.broadcastTime, dlBrdcstAlloc) != ROK)
{
DU_LOG("\nERROR --> SCH : schBroadcastSib1Alloc failed");
- dlBrdcstAlloc->sib1Trans = NO_TRANSMISSION;
+ dlBrdcstAlloc->sib1TransmissionMode = NO_TRANSMISSION;
}
else
{
dlSchedInfo.isBroadcastPres = true;
- if((dlBrdcstAlloc->sib1Trans == NEW_TRANSMISSION) && (!cell->firstSib1Transmitted))
+ if((dlBrdcstAlloc->sib1TransmissionMode == NEW_TRANSMISSION) && (!cell->firstSib1Transmitted))
cell->firstSib1Transmitted = true;
}
}
dciInfo->dciInfo.beamPdcchInfo.digBfInterfaces = 0;
dciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx = 0;
dciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0] = 0;
- dciInfo->dciInfo.txPdcchPower.powerValue = 0;
+ dciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0 = 0;
dciInfo->dciInfo.txPdcchPower.powerControlOffsetSS = 0;
dciInfo->dciInfo.pdschCfg = NULL; /* No DL data being sent */
msg3HqProc->tbInfo.txCntr++;
dciInfo->dciInfo.beamPdcchInfo.digBfInterfaces = 0;
dciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx = 0;
dciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0] = 0;
- dciInfo->dciInfo.txPdcchPower.powerValue = 0;
+ dciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0 = 0;
dciInfo->dciInfo.txPdcchPower.powerControlOffsetSS = 0;
dciInfo->dciInfo.pdschCfg = NULL; /* No DL data being sent */
uint16_t numPrb;
}ResAllocType1;
+typedef struct resAllocType1 FreqDomainRsrc;
+
typedef struct
{
uint32_t ssbPbchPwr; /* SSB block power */
{
uint8_t subcarrierSpacing;
uint8_t cyclicPrefix;
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
}BwpCfg;
typedef struct prg
{
uint8_t resourceAllocType;
/* since we are using type-1, rbBitmap excluded */
- ResAllocType1 freqAlloc;
+ uint8_t rbBitmap[36];
+ uint16_t startPrb;
+ uint16_t numPrb;
uint8_t vrbPrbMapping;
-} PdschFreqAlloc;
+}PdschFreqAlloc;
typedef struct pdschTimeAlloc
{
- uint8_t rowIndex;
- TimeDomainAlloc timeAlloc;
+ uint8_t rowIndex;
+ uint16_t startSymb;
+ uint16_t numSymb;
} PdschTimeAlloc;
typedef struct txPowerPdschInfo
uint8_t powerControlOffsetSS;
} TxPowerPdschInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
typedef struct pdschCfg
{
uint16_t pduBitmap;
/* SIB1 interface structure */
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
typedef struct coresetCfg
{
uint8_t coreSetSize;
uint8_t cceRegMappingType;
uint8_t regBundleSize;
uint8_t interleaverSize;
- uint8_t coreSetType;
uint16_t shiftIndex;
+ uint8_t coreSetType;
+ uint8_t coresetPoolIndex;
uint8_t precoderGranularity;
uint8_t cceIndex;
uint8_t aggregationLevel;
typedef struct txPowerPdcchInfo
{
- uint8_t powerValue;
+ uint8_t beta_pdcch_1_0;
uint8_t powerControlOffsetSS;
-} TxPowerPdcchInfo;
+}TxPowerPdcchInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
typedef struct dlDCI
{
uint16_t rnti;
BeamformingInfo beamPdcchInfo;
TxPowerPdcchInfo txPdcchPower;
PdschCfg *pdschCfg;
-} DlDCI;
+}DlDCI;
typedef struct pdcchCfg
{
/* coreset-0 configuration */
CoresetCfg coresetCfg;
-
- uint16_t numDlDci;
- DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
+ uint16_t numDlDci;
+ DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
} PdcchCfg;
/* end of SIB1 PDCCH structures */
uint8_t n0;
BwpCfg bwp;
PdcchCfg sib1PdcchCfg;
- PdschCfg sib1PdschCfg;
PageCfg pageCfg; /*Config of Paging*/
}SchSib1Cfg;
typedef struct schBwpParams
{
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
uint8_t scs;
uint8_t cyclicPrefix;
}SchBwpParams;
typedef struct ssbInfo
{
uint8_t ssbIdx; /* SSB Index */
- TimeDomainAlloc tdAlloc; /* Time domain allocation */
- ResAllocType1 fdAlloc; /* Freq domain allocation */
+ TimeDomainAlloc tdAlloc; /* Time domain allocation */
+ FreqDomainRsrc fdAlloc; /* Freq domain allocation */
}SsbInfo;
typedef struct sib1AllocInfo
{
BwpCfg bwp;
PdcchCfg sib1PdcchCfg;
- PdschCfg sib1PdschCfg;
-} Sib1AllocInfo;
+}Sib1AllocInfo;
typedef struct prachSchInfo
{
/* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
typedef struct dlBrdcstAlloc
{
+ uint16_t crnti; /* SI-RNTI */
/* Ssb transmission is determined as follows:
* 0 : No tranamission
* 1 : SSB Transmission
* 2 : SSB Repetition */
- uint8_t ssbTrans;
+ uint8_t ssbTransmissionMode;
uint8_t ssbIdxSupported;
SsbInfo ssbInfo[MAX_SSB_IDX];
+ bool systemInfoIndicator;
+ uint8_t *siContent;
/* Sib1 transmission is determined as follows:
* 0 : No tranamission
* 1 : SIB1 Transmission
* 2 : SIB1 Repetition */
- uint8_t sib1Trans;
+ uint8_t sib1TransmissionMode;
Sib1AllocInfo sib1Alloc;
}DlBrdcstAlloc;
{
uint8_t freqHopFlag;
uint16_t bwpSize;
- ResAllocType1 msg3FreqAlloc;
+ FreqDomainRsrc msg3FreqAlloc;
uint8_t k2Index;
uint8_t mcs;
uint8_t tpc;
{
uint8_t resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
TimeDomainAlloc timeAlloc;
uint16_t rowIndex;
uint8_t mcs;
}DciInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
typedef struct dlSchedInfo
{
- uint16_t cellId; /* Cell Id */
+ uint16_t cellId; /* Cell Id */
SchSlotValue schSlotValue;
/* Allocation for broadcast messages */
Code Review / o-du / l2.git / commitdiff