1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define EVENT_SCH_GEN_CFG 1
21 #define EVENT_SCH_CELL_CFG 2
22 #define EVENT_SCH_CELL_CFG_CFM 3
23 #define EVENT_DL_SCH_INFO 4
24 #define EVENT_UL_SCH_INFO 5
25 #define EVENT_RACH_IND_TO_SCH 6
26 #define EVENT_CRC_IND_TO_SCH 7
27 #define EVENT_DL_RLC_BO_INFO_TO_SCH 8
28 #define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 9
29 #define EVENT_UE_CONFIG_RSP_TO_MAC 10
30 #define EVENT_SLOT_IND_TO_SCH 11
31 #define EVENT_SHORT_BSR 12
32 #define EVENT_UCI_IND_TO_SCH 13
33 #define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 14
34 #define EVENT_UE_RECONFIG_RSP_TO_MAC 15
35 #define EVENT_UE_DELETE_REQ_TO_SCH 16
36 #define EVENT_UE_DELETE_RSP_TO_MAC 17
37 #define EVENT_CELL_DELETE_REQ_TO_SCH 18
38 #define EVENT_CELL_DELETE_RSP_TO_MAC 19
39 #define EVENT_LONG_BSR 20
40 #define EVENT_SLICE_CFG_REQ_TO_SCH 21
41 #define EVENT_SLICE_CFG_RSP_TO_MAC 22
42 #define EVENT_SLICE_RECFG_REQ_TO_SCH 23
43 #define EVENT_SLICE_RECFG_RSP_TO_MAC 24
44 #define EVENT_RACH_RESOURCE_REQUEST_TO_SCH 25
45 #define EVENT_RACH_RESOURCE_RESPONSE_TO_MAC 26
46 #define EVENT_RACH_RESOURCE_RELEASE_TO_SCH 27
47 #define EVENT_PAGING_IND_TO_SCH 28
48 #define EVENT_DL_PAGING_ALLOC 29
49 #define EVENT_DL_REL_HQ_PROC 30
50 #define EVENT_DL_HARQ_IND_TO_SCH 31
52 #define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */
53 #define SCH_SSB_MASK_SIZE 1
55 #define MAX_NUM_PRG 1 /* max value should be later 275 */
56 #define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
57 #define MAX_CODEWORDS 1 /* max should be 2 */
58 #define SCH_HARQ_PROC_ID 1 /* harq proc id */
59 #define SCH_ALLOC_TYPE_1 1 /*sch res alloc type */
61 /* Datatype in UL SCH Info */
62 #define SCH_DATATYPE_PUSCH 1
63 #define SCH_DATATYPE_PUSCH_UCI 2
64 #define SCH_DATATYPE_UCI 4
65 #define SCH_DATATYPE_SRS 8
66 #define SCH_DATATYPE_PRACH 16
68 #define MAX_NUMBER_OF_CRC_IND_BITS 1
69 #define MAX_NUMBER_OF_UCI_IND_BITS 1
70 #define MAX_SR_BITS_IN_BYTES 1
71 #define MAX_HARQ_BITS_IN_BYTES 1
72 #define MAX_NUM_LOGICAL_CHANNEL_GROUPS 8
73 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */
74 #define MAX_NUM_TAGS 4 /* Max number of timing advance groups */
75 #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */
76 #define MAX_NUM_CRSET 3 /* Max number of control resource set in add/modify/release list */
77 #define MAX_NUM_SEARCH_SPC 10 /* Max number of search space in add/modify/release list */
78 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
79 #define MONITORING_SYMB_WITHIN_SLOT_SIZE 2 /* i.e. 2 bytes because size of monitoring symbols within slot is 14 bits */
80 #define MAX_NUM_DL_ALLOC 16 /* Max number of pdsch time domain downlink allocation */
81 #define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
83 /* PUCCH Configuration Macro */
84 #define MAX_NUM_PUCCH_RESRC 128
85 #define MAX_NUM_PUCCH_RESRC_SET 4
86 #define MAX_NUM_PUCCH_PER_RESRC_SET 32
87 #define MAX_NUM_SPATIAL_RELATIONS 8
88 #define MAX_NUM_PUCCH_P0_PER_SET 8
89 #define MAX_NUM_PATH_LOSS_REF_RS 4
90 #define MAX_NUM_DL_DATA_TO_UL_ACK 15
91 #define QPSK_MODULATION 2
93 #define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
94 #define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
95 #define UL_TX_BUFFER_SIZE 5
97 #define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/
98 #define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
99 #define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */
100 #define MIN_NUM_K1_IDX 4 /* Min K1 values */
101 #define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */
102 #define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */
103 /* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */
104 #define DEFAULT_K2_VALUE_FOR_SCS15 1
105 #define DEFAULT_K2_VALUE_FOR_SCS30 1
106 #define DEFAULT_K2_VALUE_FOR_SCS60 2
107 #define DEFAULT_K2_VALUE_FOR_SCS120 3
109 #define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
111 if ((crntTime.slot + incr) > (numOfSlot - 1)) \
113 toFill.sfn = (crntTime.sfn + 1); \
117 toFill.sfn = crntTime.sfn; \
119 toFill.slot = (crntTime.slot + incr) % numOfSlot; \
120 if (toFill.sfn >= MAX_SFN) \
122 toFill.sfn%=MAX_SFN; \
130 RRC_CONNECTED_USERS_RSRC
150 RESOURCE_UNAVAILABLE,
187 TIME_ALIGNMENT_TIMER_MS500,
188 TIME_ALIGNMENT_TIMER_MS750,
189 TIME_ALIGNMENT_TIMER_MS1280,
190 TIME_ALIGNMENT_TIMER_MS1920,
191 TIME_ALIGNMENT_TIMER_MS2560,
192 TIME_ALIGNMENT_TIMER_MS5120,
193 TIME_ALIGNMENT_TIMER_MS10240,
194 TIME_ALIGNMENT_TIMER_INFINITE
195 }SchTimeAlignmentTimer;
199 PHR_PERIODIC_TIMER_SF10,
200 PHR_PERIODIC_TIMER_SF20,
201 PHR_PERIODIC_TIMER_SF50,
202 PHR_PERIODIC_TIMER_SF100,
203 PHR_PERIODIC_TIMER_SF200,
204 PHR_PERIODIC_TIMER_SF500,
205 PHR_PERIODIC_TIMER_SF1000,
206 PHR_PERIODIC_TIMER_INFINITE
207 }SchPhrPeriodicTimer;
211 PHR_PROHIBIT_TIMER_SF0,
212 PHR_PROHIBIT_TIMER_SF10,
213 PHR_PROHIBIT_TIMER_SF20,
214 PHR_PROHIBIT_TIMER_SF50,
215 PHR_PROHIBIT_TIMER_SF100,
216 PHR_PROHIBIT_TIMER_SF200,
217 PHR_PROHIBIT_TIMER_SF500,
218 PHR_PROHIBIT_TIMER_SF1000
219 }SchPhrProhibitTimer;
223 PHR_TX_PWR_FACTOR_CHANGE_DB1,
224 PHR_TX_PWR_FACTOR_CHANGE_DB3,
225 PHR_TX_PWR_FACTOR_CHANGE_DB6,
226 PHR_TX_PWR_FACTOR_CHANGE_INFINITE
227 }SchPhrTxPwrFactorChange;
237 HARQ_ACK_CODEBOOK_SEMISTATIC,
238 HARQ_ACK_CODEBOOK_DYNAMIC
239 }SchPdschHarqAckCodebook;
243 NUM_HARQ_PROC_FOR_PDSCH_N2,
244 NUM_HARQ_PROC_FOR_PDSCH_N4,
245 NUM_HARQ_PROC_FOR_PDSCH_N6,
246 NUM_HARQ_PROC_FOR_PDSCH_N10,
247 NUM_HARQ_PROC_FOR_PDSCH_N16
248 }SchNumHarqProcForPdsch;
252 MAX_CODE_BLOCK_GROUP_PER_TB_N2,
253 MAX_CODE_BLOCK_GROUP_PER_TB_N4,
254 MAX_CODE_BLOCK_GROUP_PER_TB_N6,
255 MAX_CODE_BLOCK_GROUP_PER_TB_N8
256 }SchMaxCodeBlkGrpPerTB;
260 PDSCH_X_OVERHEAD_XOH_6,
261 PDSCH_X_OVERHEAD_XOH_12,
262 PDSCH_X_OVERHEAD_XOH_18
267 DMRS_ADDITIONAL_POS0,
268 DMRS_ADDITIONAL_POS1,
270 }SchDmrsAdditionPosition;
274 RESOURCE_ALLOCTION_TYPE_0,
275 RESOURCE_ALLOCTION_TYPE_1,
276 RESOURCE_ALLOCTION_DYN_SWITCH
277 }SchResourceAllocType;
281 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_A,
282 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_B
283 }SchTimeDomRsrcAllocMappingType;
287 ENABLED_TRANSFORM_PRECODER,
288 DISABLED_TRANSFORM_PRECODER
289 }SchTransformPrecoder;
293 INTERLEAVED_CCE_REG_MAPPING = 1,
294 NONINTERLEAVED_CCE_REG_MAPPING
299 SLOT_PERIODICITY_AND_OFFSET_SL_1 = 1,
300 SLOT_PERIODICITY_AND_OFFSET_SL_2,
301 SLOT_PERIODICITY_AND_OFFSET_SL_4,
302 SLOT_PERIODICITY_AND_OFFSET_SL_5,
303 SLOT_PERIODICITY_AND_OFFSET_SL_8,
304 SLOT_PERIODICITY_AND_OFFSET_SL_10,
305 SLOT_PERIODICITY_AND_OFFSET_SL_16,
306 SLOT_PERIODICITY_AND_OFFSET_SL_20,
307 SLOT_PERIODICITY_AND_OFFSET_SL_40,
308 SLOT_PERIODICITY_AND_OFFSET_SL_80,
309 SLOT_PERIODICITY_AND_OFFSET_SL_160,
310 SLOT_PERIODICITY_AND_OFFSET_SL_320,
311 SLOT_PERIODICITY_AND_OFFSET_SL_640,
312 SLOT_PERIODICITY_AND_OFFSET_SL_1280,
313 SLOT_PERIODICITY_AND_OFFSET_SL_2560
314 }SchMSlotPeriodAndOffset;
324 SEARCH_SPACE_TYPE_COMMON = 1,
325 SEARCH_SPACE_TYPE_UE_SPECIFIC
330 SCH_QOS_NON_DYNAMIC = 1,
336 AGGREGATION_LEVEL_N0,
337 AGGREGATION_LEVEL_N1,
338 AGGREGATION_LEVEL_N2,
339 AGGREGATION_LEVEL_N3,
340 AGGREGATION_LEVEL_N4,
341 AGGREGATION_LEVEL_N5,
342 AGGREGATION_LEVEL_N6,
354 CODE_WORDS_SCHED_BY_DCI_N1,
355 CODE_WORDS_SCHED_BY_DCI_N2
356 }SchCodeWordsSchedByDci;
360 STATIC_BUNDLING_TYPE = 1,
361 DYNAMIC_BUNDLING_TYPE
367 SCH_SET1_SIZE_WIDEBAND,
368 SCH_SET1_SIZE_N2_WIDEBAND,
369 SCH_SET1_SIZE_N4_WIDEBAND
370 }SchBundlingSizeSet1;
375 SCH_SET2_SIZE_WIDEBAND
376 }SchBundlingSizeSet2;
418 SCH_MCS_TABLE_QAM_64,
419 SCH_MCS_TABLE_QAM_256,
420 SCH_MCS_TABLE_QAM_64_LOW_SE
433 DATA_TRANSMISSION_ALLOWED,
434 STOP_DATA_TRANSMISSION,
435 RESTART_DATA_TRANSMISSION
436 }SchDataTransmission;
439 typedef struct timeDomainAlloc
445 typedef struct resAllocType0
447 uint8_t rbBitmap[36];
450 typedef struct resAllocType1
456 typedef struct resAllocType1 FreqDomainRsrc;
460 uint32_t ssbPbchPwr; /* SSB block power */
461 uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
462 uint8_t ssbOffsetPointA; /* SSB sub carrier offset from point A */
463 SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
464 uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
465 uint32_t nSSBMask[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
467 /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
468 *value 1 => corresponding SS/PBCH block is transmitted*/
469 uint8_t totNumSsb; /*S = Total Number of Actual SSB transmitted*/
472 typedef struct bwpCfg
474 uint8_t subcarrierSpacing;
475 uint8_t cyclicPrefix;
476 FreqDomainRsrc freqAlloc;
482 uint16_t beamIdx[MAX_DIG_BF_INTERFACES];
485 typedef struct beamformingInfo
489 uint8_t digBfInterfaces;
490 Prg prg[MAX_NUM_PRG];
493 /* SIB1 PDSCH structures */
495 typedef struct codewordinfo
497 uint16_t targetCodeRate;
505 typedef struct dmrsInfo
507 uint16_t dlDmrsSymbPos;
508 uint8_t dmrsConfigType;
509 uint16_t dlDmrsScramblingId;
511 uint8_t numDmrsCdmGrpsNoData;
514 uint8_t nrOfDmrsSymbols;
518 typedef struct pdschFreqAlloc
520 uint8_t resourceAllocType;
521 /* since we are using type-1, rbBitmap excluded */
522 uint8_t rbBitmap[36];
525 uint8_t vrbPrbMapping;
528 typedef struct pdschTimeAlloc
535 typedef struct txPowerPdschInfo
537 uint8_t powerControlOffset;
538 uint8_t powerControlOffsetSS;
541 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
542 typedef struct pdschCfg
547 uint8_t numCodewords;
548 CodewordInfo codeword[MAX_CODEWORDS];
549 uint16_t dataScramblingId;
551 uint8_t transmissionScheme;
554 PdschFreqAlloc pdschFreqAlloc;
555 PdschTimeAlloc pdschTimeAlloc;
556 BeamformingInfo beamPdschInfo;
557 TxPowerPdschInfo txPdschPower;
559 /* SIB1 PDSCH structures end */
561 /* SIB1 interface structure */
563 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
564 typedef struct coresetCfg
567 uint8_t startSymbolIndex;
568 uint8_t durationSymbols;
569 uint8_t freqDomainResource[6];
570 uint8_t cceRegMappingType;
571 uint8_t regBundleSize;
572 uint8_t interleaverSize;
575 uint8_t coresetPoolIndex;
576 uint8_t precoderGranularity;
578 uint8_t aggregationLevel;
581 typedef struct txPowerPdcchInfo
583 uint8_t beta_pdcch_1_0;
584 uint8_t powerControlOffsetSS;
587 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
591 uint16_t scramblingId;
592 uint16_t scramblingRnti;
595 BeamformingInfo beamPdcchInfo;
596 TxPowerPdcchInfo txPdcchPower;
600 typedef struct pdcchCfg
602 /* coreset-0 configuration */
603 CoresetCfg coresetCfg;
605 DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
607 /* end of SIB1 PDCCH structures */
609 typedef struct pageCfg
611 uint8_t numPO; /*Derived from Ns*/
612 bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
613 uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
618 /* parameters recieved from DU-APP */
620 uint16_t sib1RepetitionPeriod;
621 uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
622 uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
625 /* parameters derived in scheduler */
628 PdcchCfg sib1PdcchCfg;
629 PageCfg pageCfg; /*Config of Paging*/
632 typedef struct schRachCfg
634 uint8_t prachCfgIdx; /* PRACH config idx */
635 uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
636 uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
637 uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
638 uint8_t rootSeqLen; /* root sequence length */
639 uint16_t rootSeqIdx; /* Root sequence index */
640 uint8_t numRootSeq; /* Number of root sequences required for FD */
641 uint16_t k1; /* Frequency Offset for each FD */
642 uint8_t totalNumRaPreamble; /* Total number of RA preambles */
643 uint8_t ssbPerRach; /* SSB per RACH occassion */
644 uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
645 uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */
646 uint8_t raContResTmr; /* RA Contention Resoultion Timer */
647 uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
648 uint8_t raRspWindow; /* RA Response Window */
649 uint8_t maxMsg3Tx; /* MAximum num of msg3 tx*/
652 typedef struct schBwpParams
654 FreqDomainRsrc freqAlloc;
656 uint8_t cyclicPrefix;
659 typedef struct schCandidatesInfo
668 typedef struct schSearchSpaceCfg
670 uint8_t searchSpaceId;
672 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
673 uint16_t monitoringSlot;
675 uint16_t monitoringSymbol;
676 SchCandidatesInfo candidate;
679 typedef struct schPdcchCfgCmn
681 SchSearchSpaceCfg commonSearchSpace;
682 uint8_t raSearchSpaceId;
685 typedef struct schPdschCfgCmnTimeDomRsrcAlloc
690 uint8_t lengthSymbol;
691 }SchPdschCfgCmnTimeDomRsrcAlloc;
693 typedef struct schPdschCfgCmn
695 uint8_t numTimeDomAlloc;
696 SchPdschCfgCmnTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
699 typedef struct schPucchCfgCmn
701 uint8_t pucchResourceCommon;
702 uint8_t pucchGroupHopping;
705 /* PUSCH Time Domain Resource Allocation */
706 typedef struct schPuschTimeDomRsrcAlloc
709 SchTimeDomRsrcAllocMappingType mappingType;
711 uint8_t symbolLength;
712 }SchPuschTimeDomRsrcAlloc;
714 typedef struct schPuschCfgCmn
716 uint8_t numTimeDomRsrcAlloc;
717 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
720 typedef struct schK1TimingInfo
723 uint8_t k1Indexes[MAX_NUM_K1_IDX];
726 typedef struct schK0TimingInfo
729 SchK1TimingInfo k1TimingInfo;
732 typedef struct schK0K1TimingInfo
735 SchK0TimingInfo k0Indexes[MAX_NUM_K0_IDX];
738 typedef struct schK0K1TimingInfoTbl
741 SchK0K1TimingInfo k0k1TimingInfo[MAX_NUM_CONFIG_SLOTS];
742 }SchK0K1TimingInfoTbl;
744 typedef struct schBwpDlCfg
747 SchPdcchCfgCmn pdcchCommon;
748 SchPdschCfgCmn pdschCommon;
749 SchK0K1TimingInfoTbl k0K1InfoTbl;
752 typedef struct schK2TimingInfo
755 uint8_t k2Indexes[MAX_NUM_K2_IDX];
758 typedef struct schK2TimingInfoTbl
761 SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS];
764 typedef struct schBwpUlCfg
767 SchPucchCfgCmn pucchCommon;
768 SchPuschCfgCmn puschCommon;
769 SchK2TimingInfoTbl msg3K2InfoTbl;
770 SchK2TimingInfoTbl k2InfoTbl;
773 typedef struct schPlmnInfoList
776 uint8_t numSliceSupport; /* Total slice supporting */
777 Snssai **snssai; /* List of supporting snssai*/
780 typedef struct schHqCfgParam
782 uint8_t maxDlDataHqTx;
784 uint8_t maxUlDataHqTx;
788 /* The following list of structures is taken from the DRX-Config section of specification 33.331. */
790 typedef struct schDrxOnDurationTimer
792 bool onDurationTimerValInMs;
795 uint8_t subMilliSeconds;
796 uint16_t milliSeconds;
797 }onDurationtimerValue;
798 }SchDrxOnDurationTimer;
800 typedef struct schDrxLongCycleStartOffset
802 uint16_t drxLongCycleStartOffsetChoice;
803 uint16_t drxLongCycleStartOffsetVal;
804 }SchDrxLongCycleStartOffset;
806 typedef struct schShortDrx
808 uint16_t drxShortCycle;
809 uint8_t drxShortCycleTimer;
812 typedef struct schDrxCfg
814 SchDrxOnDurationTimer drxOnDurationTimer;
815 uint16_t drxInactivityTimer;
816 uint8_t drxHarqRttTimerDl;
817 uint8_t drxHarqRttTimerUl;
818 uint16_t drxRetransmissionTimerDl;
819 uint16_t drxRetransmissionTimerUl;
820 SchDrxLongCycleStartOffset drxLongCycleStartOffset;
822 SchShortDrx shortDrx;
823 uint8_t drxSlotOffset;
827 typedef struct schCellCfg
829 uint16_t cellId; /* Cell Id */
830 uint16_t phyCellId; /* Physical cell id */
831 uint8_t numerology; /* Supported numerology */
832 SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
833 uint8_t bandwidth; /* Supported B/W */
834 uint32_t dlFreq; /* DL Frequency */
835 uint32_t ulFreq; /* UL Frequency */
836 SchSsbCfg ssbSchCfg; /* SSB config */
837 SchSib1Cfg sib1SchCfg; /* SIB1 config */
838 SchRachCfg schRachCfg; /* PRACH config */
839 SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
840 SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */
841 SchPlmnInfoList plmnInfoList; /* Consits of PlmnId and Snssai list */
844 TDDCfg tddCfg; /* TDD Cfg */
848 typedef struct schCellCfgCfm
850 uint16_t cellId; /* Cell Id */
852 SchFailureCause cause;
855 typedef struct ssbInfo
857 uint8_t ssbIdx; /* SSB Index */
858 TimeDomainAlloc tdAlloc; /* Time domain allocation */
859 FreqDomainRsrc fdAlloc; /* Freq domain allocation */
862 typedef struct sib1AllocInfo
865 PdcchCfg sib1PdcchCfg;
868 typedef struct prachSchInfo
870 uint8_t numPrachOcas; /* Num Prach Ocassions */
871 uint8_t prachFormat; /* PRACH Format */
872 uint8_t numRa; /* Freq domain ocassion */
873 uint8_t prachStartSymb; /* Freq domain ocassion */
876 /* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
877 typedef struct dlBrdcstAlloc
879 uint16_t crnti; /* SI-RNTI */
880 /* Ssb transmission is determined as follows:
881 * 0 : No tranamission
882 * 1 : SSB Transmission
883 * 2 : SSB Repetition */
884 uint8_t ssbTransmissionMode;
885 uint8_t ssbIdxSupported;
886 SsbInfo ssbInfo[MAX_SSB_IDX];
887 bool systemInfoIndicator;
889 /* Sib1 transmission is determined as follows:
890 * 0 : No tranamission
891 * 1 : SIB1 Transmission
892 * 2 : SIB1 Repetition */
893 uint8_t sib1TransmissionMode;
894 Sib1AllocInfo sib1Alloc;
897 typedef struct msg3UlGrant
901 FreqDomainRsrc msg3FreqAlloc;
908 typedef struct rarInfo
915 uint8_t rarPdu[RAR_PAYLOAD_SIZE];
919 typedef struct rarAlloc
925 PdcchCfg rarPdcchCfg;
926 PdschCfg rarPdschCfg;
929 typedef struct dlMsgInfo
937 uint8_t harqFeedbackInd;
940 uint16_t dlMsgPduLen;
944 typedef struct lcSchInfo
947 uint32_t schBytes; /* Number of scheduled bytes */
950 typedef struct dlMsgSchedInfo
954 LcSchInfo lcSchInfo[MAX_NUM_LC]; /* Scheduled LC info */
956 PdcchCfg dlMsgPdcchCfg;
957 PdschCfg dlMsgPdschCfg;
963 typedef struct dlMsgAlloc
966 uint8_t numSchedInfo;
967 DlMsgSchInfo dlMsgSchedInfo[2];
970 typedef struct schSlotValue
972 SlotTimingInfo currentTime;
973 SlotTimingInfo broadcastTime;
974 SlotTimingInfo rarTime;
975 SlotTimingInfo dlMsgTime;
976 SlotTimingInfo ulDciTime;
979 typedef struct format0_0
981 uint8_t resourceAllocType;
982 /* since we are using type-1, hence rbBitmap excluded */
983 FreqDomainRsrc freqAlloc;
984 TimeDomainAlloc timeAlloc;
987 uint8_t harqProcId; /* HARQ Process ID */
990 uint8_t ndi; /* NDI */
991 uint8_t rv; /* Redundancy Version */
996 typedef struct format0_1
1002 typedef struct format1_0
1008 typedef struct format1_1
1013 typedef struct dciInfo
1016 uint16_t crnti; /* CRNI */
1017 SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
1018 BwpCfg bwpCfg; /* BWP Cfg */
1019 CoresetCfg coresetCfg; /* Coreset1 Cfg */
1020 FormatType formatType; /* DCI Format */
1023 Format0_0 format0_0; /* Format 0_0 */
1024 Format0_1 format0_1; /* Format 0_1 */
1025 Format1_0 format1_0; /* Format 1_0 */
1026 Format1_1 format1_1; /* Format 1_1 */
1032 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
1033 typedef struct dlSchedInfo
1035 uint16_t cellId; /* Cell Id */
1036 SchSlotValue schSlotValue;
1038 /* Allocation for broadcast messages */
1039 bool isBroadcastPres;
1040 DlBrdcstAlloc brdcstAlloc;
1042 /* Allocation for RAR message */
1043 RarAlloc *rarAlloc[MAX_NUM_UE];
1045 /* UL grant in response to BSR */
1048 /* Allocation from dedicated DL msg */
1049 DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE];
1053 typedef struct dlPageAlloc
1056 SlotTimingInfo dlPageTime;
1061 PdcchCfg pagePdcchCfg;
1062 PdschCfg pagePdschCfg;
1063 uint16_t dlPagePduLen;
1067 typedef struct tbInfo
1069 uint8_t mcs; /* MCS */
1070 uint8_t ndi; /* NDI */
1071 uint8_t rv; /* Redundancy Version */
1072 uint16_t tbSize; /* TB Size */
1073 uint8_t qamOrder; /* Modulation Order */
1074 SchMcsTable mcsTable; /* MCS Table */
1077 typedef struct freqDomainAlloc
1079 uint8_t resAllocType; /* Resource allocation type */
1082 ResAllocType0 type0;
1083 ResAllocType1 type1;
1087 typedef struct schPuschInfo
1089 uint8_t harqProcId; /* HARQ Process ID */
1090 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1091 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1092 TbInfo tbInfo; /* TB info */
1094 uint8_t dmrsMappingType;
1095 uint8_t nrOfDmrsSymbols;
1100 typedef struct harqInfo
1102 uint16_t harqAckBitLength;
1103 uint8_t betaOffsetHarqAck;
1106 typedef struct csiInfo
1109 uint8_t betaOffsetCsi;
1112 typedef struct harqAckInfo
1114 uint16_t harqBitLength;
1117 typedef struct csiPartInfo
1122 typedef struct schPucchFormatCfg
1124 uint8_t interSlotFreqHop;
1126 uint8_t maxCodeRate;
1132 typedef struct schPucchInfo
1134 FreqDomainAlloc fdAlloc;
1135 TimeDomainAlloc tdAlloc;
1137 HarqFdbkInfo harqInfo;
1138 csiFdbkInfo csiInfo;
1139 BeamformingInfo beamPucchInfo;
1140 uint8_t pucchFormat;
1141 uint8_t intraFreqHop;
1142 uint16_t secondPrbHop;
1143 uint8_t initialCyclicShift;
1151 typedef struct schPuschUci
1153 uint8_t harqProcId; /* HARQ Process ID */
1154 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1155 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1156 TbInfo tbInfo; /* TB information */
1157 HarqInfo harqInfo; /* Harq Information */
1158 CsiInfo csiInfo; /* Csi information*/
1161 typedef struct ulSchedInfo
1163 uint16_t cellId; /* Cell Id */
1164 uint16_t crnti; /* CRNI */
1165 SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
1166 uint8_t dataType; /* Type of info being scheduled */
1167 SchPrachInfo prachSchInfo; /* Prach scheduling info */
1168 SchPuschInfo schPuschInfo; /* Pusch scheduling info */
1169 SchPuschUci schPuschUci; /* Pusch Uci */
1170 SchPucchInfo schPucchInfo; /* Pucch and Uci scheduling info */
1173 typedef struct rachIndInfo
1177 SlotTimingInfo timingInfo;
1181 uint8_t preambleIdx;
1186 typedef struct crcIndInfo
1190 SlotTimingInfo timingInfo;
1192 uint8_t crcInd[MAX_NUMBER_OF_CRC_IND_BITS];
1195 typedef struct boInfo
1198 uint32_t dataVolume;
1201 typedef struct dlRlcBOInfo
1206 uint32_t dataVolume;
1209 /* Info of Scheduling Request to Add/Modify */
1210 typedef struct schSchedReqInfo
1213 SchSrProhibitTimer srProhibitTmr;
1214 SchSrTransMax srTransMax;
1217 /* Scheduling Request Configuration */
1218 typedef struct schSchedReqCfg
1220 uint8_t addModListCount;
1221 SchSchedReqInfo addModList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* List of Scheduling req to be added/modified */
1222 uint8_t relListCount;
1223 uint8_t relList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* list of scheduling request Id to be deleted */
1226 /* Info of Tag to Add/Modify */
1227 typedef struct schTagInfo
1230 SchTimeAlignmentTimer timeAlignmentTmr;
1233 /* Timing Advance Group Configuration */
1234 typedef struct schTagCfg
1236 uint8_t addModListCount;
1237 SchTagInfo addModList[MAX_NUM_TAGS]; /* List of Tag to Add/Modify */
1238 uint8_t relListCount;
1239 uint8_t relList[MAX_NUM_TAGS]; /* list of Tag Id to release */
1242 /* Configuration for Power headroom reporting */
1243 typedef struct schPhrCfg
1245 SchPhrPeriodicTimer periodicTmr;
1246 SchPhrProhibitTimer prohibitTmr;
1247 SchPhrTxPwrFactorChange txpowerFactorChange;
1250 bool type2OtherCell;
1251 SchPhrModeOtherCG modeOtherCG;
1254 /* MAC cell Group configuration */
1255 typedef struct schMacCellGrpCfg
1257 SchSchedReqCfg schedReqCfg;
1259 SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */
1262 SchDrxCfg drxCfg; /* Drx configuration */
1266 /* Physical Cell Group Configuration */
1267 typedef struct schPhyCellGrpCfg
1269 SchPdschHarqAckCodebook pdschHarqAckCodebook;
1273 /* Control resource set info */
1274 typedef struct schControlRsrcSet
1276 uint8_t cRSetId; /* Control resource set id */
1277 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
1279 SchREGMappingType cceRegMappingType;
1280 SchPrecoderGranul precoderGranularity;
1281 uint16_t dmrsScramblingId;
1284 /* Search Space info */
1285 typedef struct schSearchSpace
1287 uint8_t searchSpaceId;
1289 SchMSlotPeriodAndOffset mSlotPeriodicityAndOffset;
1290 uint8_t mSymbolsWithinSlot[MONITORING_SYMB_WITHIN_SLOT_SIZE];
1291 SchAggrLevel numCandidatesAggLevel1; /* Number of candidates for aggregation level 1 */
1292 SchAggrLevel numCandidatesAggLevel2; /* Number of candidates for aggregation level 2 */
1293 SchAggrLevel numCandidatesAggLevel4; /* Number of candidates for aggregation level 4 */
1294 SchAggrLevel numCandidatesAggLevel8; /* Number of candidates for aggregation level 8 */
1295 SchAggrLevel numCandidatesAggLevel16; /* Number of candidates for aggregation level 16 */
1296 SchSearchSpaceType searchSpaceType;
1297 uint8_t ueSpecificDciFormat;
1300 /* PDCCH cofniguration */
1301 typedef struct schPdcchConfig
1303 uint8_t numCRsetToAddMod;
1304 SchControlRsrcSet cRSetToAddModList[MAX_NUM_CRSET]; /* List of control resource set to add/modify */
1305 uint8_t numCRsetToRel;
1306 uint8_t cRSetToRelList[MAX_NUM_CRSET]; /* List of control resource set to release */
1307 uint8_t numSearchSpcToAddMod;
1308 SchSearchSpace searchSpcToAddModList[MAX_NUM_SEARCH_SPC]; /* List of search space to add/modify */
1309 uint8_t numSearchSpcToRel;
1310 uint8_t searchSpcToRelList[MAX_NUM_SEARCH_SPC]; /* List of search space to release */
1313 /* PDSCH time domain resource allocation */
1314 typedef struct schPdschTimeDomRsrcAlloc
1317 SchTimeDomRsrcAllocMappingType mappingType;
1318 uint8_t startSymbol;
1319 uint8_t symbolLength;
1320 }SchPdschTimeDomRsrcAlloc;
1323 typedef struct schPdschBundling
1325 struct schStaticBundling
1327 SchBundlingSizeSet2 size;
1329 struct schDynamicBundling
1331 SchBundlingSizeSet1 sizeSet1;
1332 SchBundlingSizeSet2 sizeSet2;
1333 }SchDynamicBundling;
1336 /* DMRS downlink configuration */
1337 typedef struct schDmrsDlCfg
1339 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1342 /* PDSCH Configuration */
1343 typedef struct schPdschConfig
1345 SchDmrsDlCfg dmrsDlCfgForPdschMapTypeA;
1346 SchResourceAllocType resourceAllocType;
1347 uint8_t numTimeDomRsrcAlloc;
1348 SchPdschTimeDomRsrcAlloc timeDomRsrcAllociList[MAX_NUM_DL_ALLOC]; /* PDSCH time domain DL resource allocation list */
1350 SchCodeWordsSchedByDci numCodeWordsSchByDci; /* Number of code words scheduled by DCI */
1351 SchBundlingType bundlingType;
1352 SchPdschBundling bundlingInfo;
1355 /* Initial Downlink BWP */
1356 typedef struct schInitalDlBwp
1359 SchPdcchConfig pdcchCfg;
1361 SchPdschConfig pdschCfg;
1363 SchK0K1TimingInfoTbl k0K1InfoTbl;
1366 /* BWP Downlink common */
1367 typedef struct schBwpDlCommon
1371 /* Downlink BWP information */
1372 typedef struct schDlBwpInfo
1377 /* PDCCH Serving Cell configuration */
1378 typedef struct schPdschServCellCfg
1380 uint8_t *maxMimoLayers;
1381 SchNumHarqProcForPdsch numHarqProcForPdsch;
1382 SchMaxCodeBlkGrpPerTB *maxCodeBlkGrpPerTb;
1383 bool *codeBlkGrpFlushInd;
1384 SchPdschXOverhead *xOverhead;
1385 }SchPdschServCellCfg;
1387 /* PUCCH Configuration */
1388 typedef struct schPucchResrcSetInfo
1391 uint8_t resrcListCount;
1392 uint8_t resrcList[MAX_NUM_PUCCH_PER_RESRC_SET];
1393 uint8_t maxPayLoadSize;
1394 }SchPucchResrcSetInfo;
1396 typedef struct schPucchResrcSetCfg
1398 uint8_t resrcSetToAddModListCount;
1399 SchPucchResrcSetInfo resrcSetToAddModList[MAX_NUM_PUCCH_RESRC_SET];
1400 uint8_t resrcSetToRelListCount;
1401 uint8_t resrcSetToRelList[MAX_NUM_PUCCH_RESRC];
1402 }SchPucchResrcSetCfg;
1404 typedef struct schPucchFormat0
1406 uint8_t initialCyclicShift;
1408 uint8_t startSymbolIdx;
1411 typedef struct schPucchFormat1
1413 uint8_t initialCyclicShift;
1415 uint8_t startSymbolIdx;
1419 typedef struct schPucchFormat2_3
1423 uint8_t startSymbolIdx;
1426 typedef struct schPucchFormat4
1431 uint8_t startSymbolIdx;
1434 typedef struct schPucchResrcInfo
1438 uint8_t intraFreqHop;
1439 uint16_t secondPrbHop;
1440 uint8_t pucchFormat;
1442 SchPucchFormat0 *format0;
1443 SchPucchFormat1 *format1;
1444 SchPucchFormat2_3 *format2;
1445 SchPucchFormat2_3 *format3;
1446 SchPucchFormat4 *format4;
1450 typedef struct schPucchResrcCfg
1452 uint8_t resrcToAddModListCount;
1453 SchPucchResrcInfo resrcToAddModList[MAX_NUM_PUCCH_RESRC];
1454 uint8_t resrcToRelListCount;
1455 uint8_t resrcToRelList[MAX_NUM_PUCCH_RESRC];
1459 typedef struct schSchedReqResrcInfo
1463 uint8_t periodicity;
1466 }SchSchedReqResrcInfo;
1468 typedef struct schPucchSchedReqCfg
1470 uint8_t schedAddModListCount;
1471 SchSchedReqResrcInfo schedAddModList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1472 uint8_t schedRelListCount;
1473 uint8_t schedRelList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1474 }SchPucchSchedReqCfg;
1476 typedef struct schSpatialRelationInfo
1478 uint8_t spatialRelationId;
1479 uint8_t servCellIdx;
1480 uint8_t pathLossRefRSId;
1482 uint8_t closeLoopIdx;
1483 }SchSpatialRelationInfo;
1485 typedef struct schPucchSpatialCfg
1487 uint8_t spatialAddModListCount;
1488 SchSpatialRelationInfo spatialAddModList[MAX_NUM_SPATIAL_RELATIONS];
1489 uint8_t spatialRelListCount;
1490 uint8_t spatialRelList[MAX_NUM_SPATIAL_RELATIONS];
1491 }SchPucchSpatialCfg;
1493 typedef struct schP0PucchCfg
1499 typedef struct schPathLossRefRSCfg
1501 uint8_t pathLossRefRSId;
1502 }SchPathLossRefRSCfg;
1504 typedef struct schPucchMultiCsiCfg
1506 uint8_t multiCsiResrcListCount;
1507 uint8_t multiCsiResrcList[MAX_NUM_PUCCH_RESRC-1];
1508 }SchPucchMultiCsiCfg;
1510 typedef struct schPucchDlDataToUlAck
1512 uint8_t dlDataToUlAckListCount;
1513 uint8_t dlDataToUlAckList[MAX_NUM_DL_DATA_TO_UL_ACK];
1514 }SchPucchDlDataToUlAck;
1516 typedef struct schPucchPowerControl
1524 SchP0PucchCfg p0Set[MAX_NUM_PUCCH_P0_PER_SET];
1525 uint8_t pathLossRefRSListCount;
1526 SchPathLossRefRSCfg pathLossRefRSList[MAX_NUM_PATH_LOSS_REF_RS];
1527 }SchPucchPowerControl;
1529 typedef struct schPucchCfg
1531 SchPucchResrcSetCfg *resrcSet;
1532 SchPucchResrcCfg *resrc;
1533 SchPucchFormatCfg *format1;
1534 SchPucchFormatCfg *format2;
1535 SchPucchFormatCfg *format3;
1536 SchPucchFormatCfg *format4;
1537 SchPucchSchedReqCfg *schedReq;
1538 SchPucchMultiCsiCfg *multiCsiCfg;
1539 SchPucchSpatialCfg *spatialInfo;
1540 SchPucchDlDataToUlAck *dlDataToUlAck;
1541 SchPucchPowerControl *powerControl;
1544 /* Transform precoding disabled */
1545 typedef struct schTransPrecodDisabled
1547 uint16_t scramblingId0;
1548 }SchTransPrecodDisabled;
1550 /* DMRS Uplink configuration */
1551 typedef struct SchDmrsUlCfg
1553 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1554 SchTransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */
1557 /* PUSCH Configuration */
1558 typedef struct schPuschCfg
1560 uint8_t dataScramblingId;
1561 SchDmrsUlCfg dmrsUlCfgForPuschMapTypeA;
1562 SchResourceAllocType resourceAllocType;
1563 uint8_t numTimeDomRsrcAlloc;
1564 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
1565 SchTransformPrecoder transformPrecoder;
1568 /* Initial Uplink BWP */
1569 typedef struct schInitialUlBwp
1572 SchPucchCfg pucchCfg;
1574 SchPuschCfg puschCfg;
1576 SchK2TimingInfoTbl k2InfoTbl;
1579 /* Uplink BWP information */
1580 typedef struct schUlBwpInfo
1585 /* Serving cell configuration */
1586 typedef struct schServCellRecfgInfo
1588 SchInitalDlBwp initDlBwp;
1589 uint8_t numDlBwpToAddOrMod;
1590 SchDlBwpInfo dlBwpToAddOrModList[MAX_NUM_BWP];
1591 uint8_t numDlBwpToRel;
1592 SchDlBwpInfo dlBwpToRelList[MAX_NUM_BWP];
1593 uint8_t firstActvDlBwpId;
1594 uint8_t defaultDlBwpId;
1595 uint8_t *bwpInactivityTmr;
1596 SchPdschServCellCfg pdschServCellCfg;
1597 SchInitialUlBwp initUlBwp;
1598 uint8_t numUlBwpToAddOrMod;
1599 SchUlBwpInfo ulBwpToAddOrModList[MAX_NUM_BWP];
1600 uint8_t numUlBwpToRel;
1601 SchUlBwpInfo ulBwpToRelList[MAX_NUM_BWP];
1602 uint8_t firstActvUlBwpId;
1603 }SchServCellRecfgInfo;
1605 /* Serving cell configuration */
1606 typedef struct schServCellCfgInfo
1608 SchInitalDlBwp initDlBwp;
1609 uint8_t numDlBwpToAdd;
1610 SchDlBwpInfo dlBwpToAddList[MAX_NUM_BWP];
1611 uint8_t firstActvDlBwpId;
1612 uint8_t defaultDlBwpId;
1613 uint8_t *bwpInactivityTmr;
1614 SchPdschServCellCfg pdschServCellCfg;
1615 SchInitialUlBwp initUlBwp;
1616 uint8_t numUlBwpToAdd;
1617 SchUlBwpInfo ulBwpToAddList[MAX_NUM_BWP];
1618 uint8_t firstActvUlBwpId;
1619 }SchServCellCfgInfo;
1621 typedef struct schNonDynFiveQi
1626 uint16_t maxDataBurstVol;
1629 typedef struct schDynFiveQi
1632 uint16_t packetDelayBudget;
1633 uint8_t packetErrRateScalar;
1634 uint8_t packetErrRateExp;
1636 uint8_t delayCritical;
1638 uint16_t maxDataBurstVol;
1641 typedef struct schNgRanAllocAndRetPri
1643 uint8_t priorityLevel;
1644 uint8_t preEmptionCap;
1645 uint8_t preEmptionVul;
1646 }SchNgRanAllocAndRetPri;
1648 typedef struct schGrbQosFlowInfo
1650 uint32_t maxFlowBitRateDl;
1651 uint32_t maxFlowBitRateUl;
1652 uint32_t guarFlowBitRateDl;
1653 uint32_t guarFlowBitRateUl;
1657 typedef struct schDrbQos
1659 SchQosType fiveQiType; /* Dynamic or non-dynamic */
1662 SchNonDynFiveQi nonDyn5Qi;
1663 SchDynFiveQi dyn5Qi;
1665 SchNgRanAllocAndRetPri ngRanRetPri;
1666 SchGrbQosFlowInfo grbQosFlowInfo;
1667 uint16_t pduSessionId;
1668 uint32_t ulPduSessAggMaxBitRate; /* UL PDU Session Aggregate max bit rate */
1671 /* Special cell configuration */
1672 typedef struct schSpCellCfg
1674 uint8_t servCellIdx;
1675 SchServCellCfgInfo servCellCfg;
1678 /* Special cell Reconfiguration */
1679 typedef struct schSpCellRecfg
1681 uint8_t servCellIdx;
1682 SchServCellRecfgInfo servCellRecfg;
1685 /* Uplink logical channel configuration */
1686 typedef struct SchUlLcCfg
1691 uint8_t pbr; // prioritisedBitRate
1692 uint8_t bsd; // bucketSizeDuration
1695 /* Downlink logical channel configuration */
1696 typedef struct schDlLcCfg
1698 uint8_t lcp; // logical Channel Prioritization
1701 /* Logical Channel configuration */
1702 typedef struct schLcCfg
1706 SchDrbQosInfo *drbQos;
1711 /* Aggregate max bit rate */
1712 typedef struct schAmbrCfg
1714 uint32_t ulBr; /* Ul BitRate */
1717 typedef struct schModulationInfo
1721 SchMcsTable mcsTable;
1724 /* UE configuration */
1725 typedef struct schUeCfgReq
1731 bool macCellGrpCfgPres;
1732 SchMacCellGrpCfg macCellGrpCfg;
1733 bool phyCellGrpCfgPres;
1734 SchPhyCellGrpCfg phyCellGrpCfg;
1736 SchSpCellCfg spCellCfg;
1737 SchAmbrCfg *ambrCfg;
1738 SchModulationInfo dlModInfo;
1739 SchModulationInfo ulModInfo;
1740 uint8_t numLcsToAdd;
1741 SchLcCfg schLcCfg[MAX_NUM_LC];
1744 /* UE Re-configuration */
1745 typedef struct schUeRecfgReq
1751 bool macCellGrpRecfgPres;
1752 SchMacCellGrpCfg macCellGrpRecfg;
1753 bool phyCellGrpRecfgPres;
1754 SchPhyCellGrpCfg phyCellGrpRecfg;
1755 bool spCellRecfgPres;
1756 SchSpCellRecfg spCellRecfg;
1757 SchAmbrCfg *ambrRecfg;
1758 SchModulationInfo dlModInfo;
1759 SchModulationInfo ulModInfo;
1760 uint8_t numLcsToAdd;
1761 SchLcCfg schLcCfgAdd[MAX_NUM_LC];
1762 uint8_t numLcsToDel;
1763 uint8_t lcIdToDel[MAX_NUM_LC];
1764 uint8_t numLcsToMod;
1765 SchLcCfg schLcCfgMod[MAX_NUM_LC];
1766 SchDataTransmission dataTransmissionInfo;
1768 bool drxConfigIndicatorRelease;
1772 typedef struct schUeCfgRsp
1779 SchFailureCause cause;
1782 /*As per WG8, UE ReCFG and UECFG have same structure definition*/
1783 typedef struct schUeCfgRsp SchUeRecfgRsp;
1785 typedef struct schRachRsrcReq
1787 SlotTimingInfo slotInd;
1791 uint8_t ssbIdx[MAX_NUM_SSB];
1794 typedef struct schCfraSsbResource
1797 uint8_t raPreambleIdx;
1798 }SchCfraSsbResource;
1800 typedef struct schCfraRsrc
1803 SchCfraSsbResource ssbResource[MAX_NUM_SSB];
1806 typedef struct schRachRsrcRsp
1811 SchCfraResource cfraResource;
1814 typedef struct schRachRsrcRel
1816 SlotTimingInfo slotInd;
1819 SchCfraResource cfraResource;
1822 typedef struct schUeDelete
1828 typedef struct schUeDeleteRsp
1836 typedef struct schCellDeleteReq
1842 typedef struct schCellDeleteRsp
1846 SchFailureCause cause;
1849 typedef struct dataVolInfo
1855 typedef struct ulBufferStatusRptInd
1861 DataVolInfo dataVolInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
1862 }UlBufferStatusRptInd;
1864 typedef struct srUciIndInfo
1868 SlotTimingInfo slotInd;
1870 uint8_t srPayload[MAX_SR_BITS_IN_BYTES];
1873 typedef struct dlHarqInd
1877 SlotTimingInfo slotInd;
1879 uint8_t harqPayload[MAX_HARQ_BITS_IN_BYTES];
1882 typedef struct schRrmPolicyRatio
1886 uint8_t dedicatedRatio;
1889 typedef struct schRrmPolicyOfSlice
1892 SchRrmPolicyRatio rrmPolicyRatioInfo;
1893 }SchRrmPolicyOfSlice;
1895 typedef struct schSliceCfgReq
1897 uint8_t numOfConfiguredSlice;
1898 SchRrmPolicyOfSlice **listOfSlices;
1901 typedef struct sliceRsp
1908 typedef struct schSliceCfgRsp
1910 uint8_t numSliceCfgRsp;
1911 SliceRsp **listOfSliceCfgRsp;
1914 /*As per ORAN-WG8, Slice Cfg and Recfg are same structures*/
1915 typedef struct schSliceCfgReq SchSliceRecfgReq;
1916 typedef struct schSliceCfgRsp SchSliceRecfgRsp;
1918 typedef struct schPageInd
1927 typedef struct schUeHqInfo
1933 typedef struct schRlsHqInfo
1937 SchUeHqInfo *ueHqInfo;
1940 /* function declarations */
1941 uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason);
1942 uint8_t MacMessageRouter(Pst *pst, void *msg);
1943 uint8_t SchMessageRouter(Pst *pst, void *msg);
1945 /**********************************************************************
1947 **********************************************************************/