/******************************************************************************
*
-* Copyright (c) 2019 Intel.
+* Copyright (c) 2021 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
#include "nr5g_fapi_std.h"
#include "nr5g_fapi_common_types.h"
#include "wls_lib.h"
-#include "gnb_l1_l2_api.h"
typedef void *WLS_HANDLE;
#define MIN_UL_BUF_LOCATIONS (MAX_DL_BUF_LOCATIONS) /* Used for stats collection 0-10 */
#define MAX_UL_BUF_LOCATIONS (MIN_UL_BUF_LOCATIONS + MAX_NUM_LOCATIONS)
-#define TO_FREE_SIZE ( 10 )
-#define TOTAL_FREE_BLOCKS ( 50 * FAPI_MAX_PHY_INSTANCES) /* To hold both send and recv blocks on PHY side wls */
+#define TO_FREE_SIZE ( 5 )
+#define TO_FREE_SIZE_URLLC ( MAX_NUM_OF_SYMBOL_PER_SLOT * TO_FREE_SIZE ) // TR 38.912 8.1 mini-slot may be 1 symbol long
+#define TOTAL_FREE_BLOCKS ( 100 * FAPI_MAX_PHY_INSTANCES) /* To hold both send and recv blocks on PHY side wls */
#define ALLOC_TRACK_SIZE ( 16384 )
#define MSG_MAXSIZE (16*16384 )
extern nr5g_fapi_wls_context_t g_wls_ctx;
-inline p_nr5g_fapi_wls_context_t nr5g_fapi_wls_context(
+p_nr5g_fapi_wls_context_t nr5g_fapi_wls_context(
);
-inline uint8_t nr5g_fapi_fapi2phy_wls_ready(
+uint8_t nr5g_fapi_fapi2phy_wls_ready(
);
-inline uint8_t nr5g_fapi_fapi2mac_wls_ready(
+uint8_t nr5g_fapi_fapi2mac_wls_ready(
);
uint8_t nr5g_fapi_wls_init(
);
void *nr5g_fapi_wls_pa_to_va(
WLS_HANDLE h_wls,
uint64_t ptr);
-uint8_t wls_fapi_add_blocks_to_ul(
+uint32_t wls_fapi_add_blocks_to_ul(
void);
void nr5g_fapi_wls_show_data(
void *ptr,