Update to odulow per maintenance bronze
[o-du/phy.git] / fhi_lib / test / common / xran_lib_wrap.hpp
1 /*******************************************************************************
2  *
3  * <COPYRIGHT_TAG>
4  *
5  *******************************************************************************/
6
7 #ifndef XRAN_LIB_WRAP_HPP
8 #define XRAN_LIB_WRAP_HPP
9
10 #include <exception>
11 #include <random>
12 #include <string>
13 #include <utility>
14 #include <vector>
15
16 #include <malloc.h>
17 #include <stdint.h>
18
19 #include "common.hpp"
20 #include "xran_fh_o_du.h"
21 #include "xran_common.h"
22 #include "xran_frame_struct.h"
23
24
25 #define XRAN_UT_CFG_FILENAME            "conf.json"
26
27 #define XRAN_UT_KEY_GLOBALCFG           "GLOBAL"
28 #define XRAN_UT_KEY_GLOBALCFG_IO        "io_cfg"
29 #define XRAN_UT_KEY_GLOBALCFG_EAXCID    "eAxCId_cfg"
30 #define XRAN_UT_KEY_GLOBALCFG_PRACH     "prach_cfg"
31 #define XRAN_UT_KEY_GLOBALCFG_RU        "ru_cfg"
32 #define XRAN_UT_KEY_GLOBALCFG_SLOT      "slotcfg_"
33
34 #define MAX_NUM_OF_XRAN_CTX             (2)
35
36 #define SW_FPGA_TOTAL_BUFFER_LEN        (4*1024*1024*1024)
37 #define SW_FPGA_SEGMENT_BUFFER_LEN      (1*1024*1024*1024)
38 #define SW_FPGA_FH_TOTAL_BUFFER_LEN     (1*1024*1024*1024)
39 #define FPGA_TO_SW_PRACH_RX_BUFFER_LEN  (8192)
40
41 #define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)
42
43 extern "C"
44 {
45 extern uint32_t xran_lib_ota_tti;
46 extern uint32_t xran_lib_ota_sym;
47 extern uint32_t xran_lib_ota_sym_idx;
48
49 void sym_ota_cb(struct rte_timer *tim, void *arg);
50 void tti_ota_cb(struct rte_timer *tim, void *arg);
51 }
52
53 class xranLibWraper
54 {
55 public:
56     typedef enum
57     {
58         XRANFTHTX_OUT = 0,
59         XRANFTHTX_PRB_MAP_OUT,
60         XRANFTHTX_SEC_DESC_OUT,
61         XRANFTHRX_IN,
62         XRANFTHRX_PRB_MAP_IN,
63         XRANFTHTX_SEC_DESC_IN,
64         XRANFTHRACH_IN,
65         MAX_SW_XRAN_INTERFACE_NUM
66     } SWXRANInterfaceTypeEnum;
67
68     enum nChBw
69     {
70         PHY_BW_5MHZ   =   5, PHY_BW_10MHZ  =  10, PHY_BW_15MHZ  =  15,
71         PHY_BW_20MHZ  =  20, PHY_BW_25MHZ  =  25, PHY_BW_30MHZ  =  30,
72         PHY_BW_40MHZ  =  40, PHY_BW_50MHZ  =  50, PHY_BW_60MHZ  =  60,
73         PHY_BW_70MHZ  =  70, PHY_BW_80MHZ  =  80, PHY_BW_90MHZ  =  90,
74         PHY_BW_100MHZ = 100, PHY_BW_200MHZ = 200, PHY_BW_400MHZ = 400
75     };
76
77     // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
78     const uint16_t nNumRbsPerSymF1[3][13] =
79     {
80     //      5MHz   10MHz   15MHz   20MHz   25MHz   30MHz   40MHz   50MHz   60MHz   70MHz   80MHz   90MHz  100MHz
81         {    25,     52,     79,    106,    133,    160,    216,    270,      0,      0,      0,      0,      0 },  // Numerology 0 (15KHz)
82         {    11,     24,     38,     51,     65,     78,    106,    133,    162,      0,    217,    245,    273 },  // Numerology 1 (30KHz)
83         {     0,     11,     18,     24,     31,     38,     51,     65,     79,      0,    107,    121,    135 }   // Numerology 2 (60KHz)
84     };
85
86     // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
87     const uint16_t nNumRbsPerSymF2[2][4] =
88     {
89     //     50MHz  100MHz  200MHz  400MHz
90         {    66,    132,    264,      0 },  // Numerology 2 (60KHz)
91         {    32,     66,    132,    264 }   // Numerology 3 (120KHz)
92     };
93
94
95 protected:
96     char argv[25] = "unittest";
97
98     std::string m_dpdk_dev_up, m_dpdk_dev_cp, m_dpdk_bbdev;
99
100     void *m_xranhandle;
101
102     uint8_t m_du_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x66 };
103     uint8_t m_ru_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x55 };
104     bool m_bSub6;
105     uint32_t m_nSlots = 10;
106
107     struct xran_fh_config   m_xranConf;
108     struct xran_fh_init     m_xranInit;
109
110     struct xran_timer_ctx {
111         uint32_t    tti_to_process;
112         } m_timer_ctx[MAX_NUM_OF_XRAN_CTX];
113
114     /* io struct */
115     BbuIoBufCtrlStruct m_sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
116     BbuIoBufCtrlStruct m_sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
117     BbuIoBufCtrlStruct m_sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
118     BbuIoBufCtrlStruct m_sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
119     BbuIoBufCtrlStruct m_sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
120
121     /* Cat B */
122     BbuIoBufCtrlStruct m_sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
123
124     /* buffers lists */
125     struct xran_flat_buffer m_sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
126     struct xran_flat_buffer m_sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
127     struct xran_flat_buffer m_sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
128     struct xran_flat_buffer m_sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
129     struct xran_flat_buffer m_sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
130
131     /* Cat B SRS buffers */
132     struct xran_flat_buffer m_sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
133
134     void    *m_nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
135     uint32_t m_nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM];   // every api owns unique buffer pool
136
137     uint32_t m_nSW_ToFpga_FTH_TxBufferLen;
138     uint32_t m_nFpgaToSW_FTH_RxBufferLen;
139
140     int32_t m_nSectorIndex[XRAN_MAX_SECTOR_NR];
141
142     int iq_bfw_buffer_size_dl = 0;
143     int iq_bfw_buffer_size_ul = 0;
144
145     /* beamforming weights for UL (O-DU) */
146     int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
147     int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
148     int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
149
150     /* beamforming weights for UL (O-DU) */
151     int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
152     int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
153     int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
154
155
156 private:
157     json m_global_cfg;
158
159     template<typename T>
160     T get_globalcfg(const std::string &type, const std::string &parameter_name)
161     {
162         return m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name];
163     }
164
165     template<typename T>
166     std::vector<T> get_globalcfg_array(const std::string &type, const std::string &parameter_name)
167     {
168         auto array_size = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name].size();
169
170         std::vector<T> result(array_size);
171
172         for(unsigned number = 0; number < array_size; number++)
173             result.at(number) = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name][number];
174
175         return result;
176     }
177
178     uint16_t get_eaxcid_mask(int numbit, int shift)
179     {
180         uint16_t result = 0;
181
182         for(int i=0; i < numbit; i++) {
183             result = result << 1; result +=1;
184             }
185         return (result << shift);
186     }
187
188     int init_memory()
189     {
190         xran_status_t status;
191         int32_t i, j, k, z;
192         SWXRANInterfaceTypeEnum eInterfaceType;
193         void *ptr;
194         void *mb;
195         uint32_t *u32dptr;
196         uint16_t *u16dptr;
197         uint8_t  *u8dptr;
198
199         uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul());
200         uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
201
202
203         std::cout << "XRAN front haul xran_mm_init" << std::endl;
204         status = xran_mm_init(m_xranhandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
205         if(status != XRAN_STATUS_SUCCESS) {
206             std::cout << "Failed at XRAN front haul xran_mm_init" << std::endl;
207             return (-1);
208             }
209
210         /* initialize maximum instances to have flexibility for the tests */
211         int nInstanceNum = XRAN_MAX_SECTOR_NR;
212         /* initialize maximum supported CC to have flexibility on the test */
213         int32_t nSectorNum = 6;//XRAN_MAX_SECTOR_NR;
214
215         for(k = 0; k < XRAN_PORTS_NUM; k++) {
216             status = xran_sector_get_instances(m_xranhandle, nInstanceNum, &m_nInstanceHandle[k][0]);
217             if(status != XRAN_STATUS_SUCCESS) {
218                 std::cout  << "get sector instance failed " << k << " for XRAN nInstanceNum " << nInstanceNum << std::endl;
219                 return (-1);
220                 }
221             for (i = 0; i < nInstanceNum; i++)
222                 std::cout << __func__ << " [" << k << "]: CC " << i << " handle " << m_nInstanceHandle[0][i] << std::endl;
223             }
224         std::cout << "Sucess xran_mm_init" << std::endl;
225
226         /* Init Memory */
227         for(i = 0; i<nSectorNum; i++) {
228             eInterfaceType = XRANFTHTX_OUT;
229             status = xran_bm_init(m_nInstanceHandle[0][i],
230                             &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
231                             XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT,
232                             m_nSW_ToFpga_FTH_TxBufferLen);
233             if(status != XRAN_STATUS_SUCCESS) {
234                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
235                 return (-1);
236                 }
237             for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {
238                 for(z = 0; z < xran_max_antenna_nr; z++){
239                     m_sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;
240                     m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
241                     m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
242                     m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
243                     m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
244                     m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulTxBuffers[j][i][z][0];
245
246                     for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {
247                         m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = m_nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol
248                         m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
249                         m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
250                         status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
251                         if(status != XRAN_STATUS_SUCCESS) {
252                             std::cout << __LINE__ << " Failed at  xran_bm_allocate_buffer, status " << status << std::endl;
253                             return (-1);
254                             }
255                         m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
256                         m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
257
258                         if(ptr) {
259                             u32dptr = (uint32_t*)(ptr);
260                             uint8_t *ptr_temp = (uint8_t *)ptr;
261                             memset(u32dptr, 0x0, m_nSW_ToFpga_FTH_TxBufferLen);
262                             }
263                         }
264                     }
265                 }
266
267             /* C-plane DL */
268             eInterfaceType = XRANFTHTX_SEC_DESC_OUT;
269             status = xran_bm_init(m_nInstanceHandle[0][i],
270                             &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
271                             XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
272             if(XRAN_STATUS_SUCCESS != status) {
273                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
274                 return (-1);
275             }
276             eInterfaceType = XRANFTHTX_PRB_MAP_OUT;
277             status = xran_bm_init(m_nInstanceHandle[0][i],
278                             &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
279                             XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT,
280                             sizeof(struct xran_prb_map));
281             if(status != XRAN_STATUS_SUCCESS) {
282                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
283                 return (-1);
284             }
285             for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {
286                 for(z = 0; z < xran_max_antenna_nr; z++) {
287                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
288                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
289                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
290                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
291                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
292                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulTxPrbMapBuffers[j][i][z];
293
294                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
295                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
296                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
297                     status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
298                     if(status != XRAN_STATUS_SUCCESS) {
299                         std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;
300                         return (-1);
301                         }
302                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
303                     m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
304                     void *sd_ptr;
305                     void *sd_mb;
306                     int  elm_id;
307                     struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
308                     //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map));
309                     for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SYM; elm_id++){
310                         struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
311                         for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
312                             status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT], &sd_ptr, &sd_mb);
313                             if(XRAN_STATUS_SUCCESS != status){
314                                 std::cout << __LINE__ << "SD Failed at  xran_bm_allocate_buffer , status %d\n" << status << std::endl;
315                                 return (-1);
316                             }
317                             pPrbElem->p_sec_desc[k] = (struct xran_section_desc *)sd_ptr;
318                         }
319                     }
320                  }
321              }
322         }
323
324         for(i = 0; i<nSectorNum; i++) {
325             eInterfaceType = XRANFTHRX_IN;
326             status = xran_bm_init(m_nInstanceHandle[0][i],
327                             &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
328                             XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT,
329                             m_nSW_ToFpga_FTH_TxBufferLen);  /* ????, actual alloc size is m_nFpgaToSW_FTH_RxBUfferLen */
330             if(status != XRAN_STATUS_SUCCESS) {
331                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
332                 return (-1);
333                 }
334
335             for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
336                 for(z = 0; z < xran_max_antenna_nr; z++) {
337                     m_sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid                  = 0;
338                     m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated           = -1;
339                     m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen             = -1;
340                     m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred         = 0;
341                     m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
342                     m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers    = &m_sFrontHaulRxBuffers[j][i][z][0];
343                     for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {
344                         m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes  = m_nFpgaToSW_FTH_RxBufferLen;
345                         m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements   = 1;
346                         m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes      = 0;
347                         status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],&ptr, &mb);
348                         if(status != XRAN_STATUS_SUCCESS) {
349                             std::cout << __LINE__ << " Failed at  xran_bm_allocate_buffer, status " << status << std::endl;
350                             return (-1);
351                             }
352                         m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData   = (uint8_t *)ptr;
353                         m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl   = (void *) mb;
354                         if(ptr) {
355                             u32dptr = (uint32_t*)(ptr);
356                             uint8_t *ptr_temp = (uint8_t *)ptr;
357                             memset(u32dptr, 0x0, m_nFpgaToSW_FTH_RxBufferLen);
358                             }
359                         }
360                     }
361                 }
362
363             eInterfaceType = XRANFTHTX_SEC_DESC_IN;
364             status = xran_bm_init(m_nInstanceHandle[0][i],
365                             &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
366                             XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
367             if(XRAN_STATUS_SUCCESS != status) {
368                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
369                 return (-1);
370             }
371             eInterfaceType = XRANFTHRX_PRB_MAP_IN;
372             status = xran_bm_init(m_nInstanceHandle[0][i],
373                                 &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
374                                 XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT,
375                                 sizeof(struct xran_prb_map));
376             if(status != XRAN_STATUS_SUCCESS) {
377                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
378                 return (-1);
379             }
380
381             for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
382                 for(z = 0; z < xran_max_antenna_nr; z++) {
383                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid                    = 0;
384                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated             = -1;
385                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen               = -1;
386                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred           = 0;
387                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers   = XRAN_NUM_OF_SYMBOL_PER_SLOT;
388                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers      = &m_sFrontHaulRxPrbMapBuffers[j][i][z];
389
390                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes  = sizeof(struct xran_prb_map);
391                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements   = 1;
392                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes      = 0;
393                     status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i],m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
394                     if(status != XRAN_STATUS_SUCCESS) {
395                         std::cout << __LINE__ << " Failed at  xran_bm_allocate_buffer , status " << status << std::endl;
396                         return (-1);
397                         }
398                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData   = (uint8_t *)ptr;
399                     m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl   = (void *)mb;
400                     void *sd_ptr;
401                     void *sd_mb;
402                     int  elm_id;
403                     struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
404                     //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map));
405                     for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SYM; elm_id++){
406                         struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
407                         for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
408                             status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN], &sd_ptr, &sd_mb);
409                             if(XRAN_STATUS_SUCCESS != status){
410                                 std::cout << __LINE__ << "SD Failed at  xran_bm_allocate_buffer , status %d\n" << status << std::endl;
411                                 return (-1);
412                             }
413                             pPrbElem->p_sec_desc[k] = (struct xran_section_desc *)sd_ptr;
414                         }
415                     }
416                 }
417             }
418         }
419
420         for(i = 0; i<nSectorNum; i++) {
421             eInterfaceType = XRANFTHRACH_IN;
422             status = xran_bm_init(m_nInstanceHandle[0][i],
423                                 &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
424                                 XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT,
425                                 FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
426             if(status != XRAN_STATUS_SUCCESS) {
427                 std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
428                 return (-1);
429                 }
430             for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {
431                 for(z = 0; z < xran_max_antenna_nr; z++) {
432                     m_sFHPrachRxBbuIoBufCtrl[j][i][z].bValid                    = 0;
433                     m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated             = -1;
434                     m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen               = -1;
435                     m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred           = 0;
436                     m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers   = xran_max_antenna_nr;
437                     m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers      = &m_sFHPrachRxBuffers[j][i][z][0];
438                     for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {
439                         m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes    = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;
440                         m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements     = 1;
441                         m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes        = 0;
442                         status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
443                         if(status != XRAN_STATUS_SUCCESS) {
444                             std::cout << __LINE__ << " Failed at  xran_bm_allocate_buffer, status " << status << std::endl;
445                             return (-1);
446                             }
447                         m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
448                         m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
449                         if(ptr) {
450                             u32dptr = (uint32_t*)(ptr);
451                             memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
452                             }
453                         }
454                     }
455                 }
456             }
457
458         return (0);
459     }
460
461
462 public:
463     xranLibWraper()
464     {
465         int i, temp;
466         std::string tmpstr;
467         unsigned int tmp_mac[6];
468
469         m_global_cfg = read_json_from_file(XRAN_UT_CFG_FILENAME);
470
471         memset(&m_xranInit, 0, sizeof(xran_fh_init));
472
473         m_xranInit.io_cfg.id  = 0;
474
475         /* DPDK configuration */
476         m_dpdk_dev_up = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_up");
477         m_dpdk_dev_cp = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_cp");
478         m_xranInit.io_cfg.num_vfs = 2;
479         m_xranInit.io_cfg.dpdk_dev[XRAN_UP_VF]  = (m_dpdk_dev_up == "") ? NULL : (char *)&m_dpdk_dev_up;
480         m_xranInit.io_cfg.dpdk_dev[XRAN_CP_VF]  = (m_dpdk_dev_cp == "") ? NULL : (char *)&m_dpdk_dev_cp;
481
482         m_xranInit.io_cfg.core              = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "core");
483         m_xranInit.io_cfg.system_core       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "system_core");
484         m_xranInit.io_cfg.pkt_proc_core     = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "pkt_proc_core");
485         m_xranInit.io_cfg.pkt_aux_core      = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "pkt_aux_core");
486         m_xranInit.io_cfg.timing_core       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "timing_core");
487
488         std::string bbdev_mode = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "bbdev_mode");
489         if(bbdev_mode == "sw")
490             m_xranInit.io_cfg.bbdev_mode    = XRAN_BBDEV_MODE_HW_OFF;
491         else if(bbdev_mode == "hw")
492             m_xranInit.io_cfg.bbdev_mode    = XRAN_BBDEV_MODE_HW_ON;
493         else if(bbdev_mode == "none")
494             m_xranInit.io_cfg.bbdev_mode    = XRAN_BBDEV_NOT_USED;
495         else {
496             std::cout << "Invalid BBDev mode [" << bbdev_mode << "], bbdev won't be used." << std::endl;
497             m_xranInit.io_cfg.bbdev_mode    = XRAN_BBDEV_NOT_USED;
498             }
499
500         m_xranInit.dpdkBasebandFecMode      = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdkBasebandFecMode");
501
502         m_dpdk_bbdev = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdkBasebandDevice");
503         m_xranInit.dpdkBasebandDevice       = (m_dpdk_bbdev == "") ? NULL : (char *)&m_dpdk_bbdev;
504
505         /* Network configurations */
506         m_xranInit.mtu          = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "mtu");
507
508         std::string du_mac_str = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "o_du_macaddr");
509         std::string ru_mac_str = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "o_ru_macaddr");
510         /* using temp variables to resolve KW issue */
511         std::sscanf(du_mac_str.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",
512                                            &tmp_mac[0], &tmp_mac[1], &tmp_mac[2],
513                                            &tmp_mac[3], &tmp_mac[4], &tmp_mac[5]);
514         for(i=0; i<6; i++)
515             m_du_mac[i] = (uint8_t)tmp_mac[i];
516         std::sscanf(du_mac_str.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",
517                                            &tmp_mac[0], &tmp_mac[1], &tmp_mac[2],
518                                            &tmp_mac[3], &tmp_mac[4], &tmp_mac[5]);
519         for(i=0; i<6; i++)
520             m_ru_mac[i] = (uint8_t)tmp_mac[i];
521         m_xranInit.p_o_du_addr  = (int8_t *)m_du_mac;
522         m_xranInit.p_o_ru_addr  = (int8_t *)m_ru_mac;
523         m_xranInit.cp_vlan_tag  = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "cp_vlan_tag");
524         m_xranInit.up_vlan_tag  = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "up_vlan_tag");
525
526         /* eAxCID configurations */
527         int bitnum_cuport   = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_cuPortId");
528         int bitnum_bandsec  = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_bandSectorId");
529         int bitnum_ccid     = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ccId");
530         int bitnum_ruport   = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ruPortId");
531
532         m_xranInit.eAxCId_conf.bit_cuPortId       = bitnum_bandsec + bitnum_ccid + bitnum_ruport;
533         m_xranInit.eAxCId_conf.bit_bandSectorId   = bitnum_ccid + bitnum_ruport;
534         m_xranInit.eAxCId_conf.bit_ccId           = bitnum_ruport;
535         m_xranInit.eAxCId_conf.bit_ruPortId       = 0;
536         m_xranInit.eAxCId_conf.mask_cuPortId      = get_eaxcid_mask(bitnum_cuport, m_xranInit.eAxCId_conf.bit_cuPortId);
537         m_xranInit.eAxCId_conf.mask_bandSectorId  = get_eaxcid_mask(bitnum_bandsec, m_xranInit.eAxCId_conf.bit_bandSectorId);
538         m_xranInit.eAxCId_conf.mask_ccId          = get_eaxcid_mask(bitnum_ccid, m_xranInit.eAxCId_conf.bit_ccId);
539         m_xranInit.eAxCId_conf.mask_ruPortId      = get_eaxcid_mask(bitnum_ruport, m_xranInit.eAxCId_conf.bit_ruPortId);
540
541         m_xranInit.totalBfWeights   = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "totalBfWeights");
542
543         m_xranInit.Tadv_cp_dl       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Tadv_cp_dl");
544         m_xranInit.T2a_min_cp_dl    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_cp_dl");
545         m_xranInit.T2a_max_cp_dl    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_cp_dl");
546         m_xranInit.T2a_min_cp_ul    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_cp_ul");
547         m_xranInit.T2a_max_cp_ul    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_cp_ul");
548         m_xranInit.T2a_min_up       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_up");
549         m_xranInit.T2a_max_up       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_up");
550         m_xranInit.Ta3_min          = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta3_min");
551         m_xranInit.Ta3_max          = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta3_max");
552         m_xranInit.T1a_min_cp_dl    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_cp_dl");
553         m_xranInit.T1a_max_cp_dl    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_cp_dl");
554         m_xranInit.T1a_min_cp_ul    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_cp_ul");
555         m_xranInit.T1a_max_cp_ul    = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_cp_ul");
556         m_xranInit.T1a_min_up       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_up");
557         m_xranInit.T1a_max_up       = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_up");
558         m_xranInit.Ta4_min          = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_min");
559         m_xranInit.Ta4_max          = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_max");
560
561         m_xranInit.enableCP         = 1;
562         m_xranInit.prachEnable      = 1;
563         m_xranInit.debugStop        = 0;
564         m_xranInit.debugStopCount   = 0;
565         m_xranInit.DynamicSectionEna= 0;
566
567         m_xranInit.filePrefix   = "wls";
568
569         m_bSub6     = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");
570
571         memset(&m_xranConf, 0, sizeof(struct xran_fh_config));
572         tmpstr = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "duplex");
573         if(tmpstr == "FDD") {
574             m_xranConf.frame_conf.nFrameDuplexType  = 0;
575             }
576         else if(tmpstr == "TDD") {
577             m_xranConf.frame_conf.nFrameDuplexType  = 1;
578
579             std::string slotcfg_key = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "slot_config");
580
581             int numcfg = get_globalcfg<int>(slotcfg_key, "period");
582             m_xranConf.frame_conf.nTddPeriod = numcfg;
583
584             for(int i=0; i< numcfg; i++) {
585                 std::stringstream slotcfgname;
586                 slotcfgname << "slot" << i;
587                 std::vector<int> slotcfg = get_globalcfg_array<int>(slotcfg_key, slotcfgname.str());
588                 for(int j=0; j < slotcfg.size(); j++) {
589                     m_xranConf.frame_conf.sSlotConfig[i].nSymbolType[j] = slotcfg[j];
590                     }
591                 m_xranConf.frame_conf.sSlotConfig[i].reserved[0] = 0;
592                 m_xranConf.frame_conf.sSlotConfig[i].reserved[1] = 0;
593                 }
594             }
595         else {
596             std::cout << "*** Invalid Duplex type [" << tmpstr << "] !!!" << std::endl;
597             std::cout << "****** Set it to FDD... " << std::endl;
598             m_xranConf.frame_conf.nFrameDuplexType  = 0;
599             }
600
601         m_xranConf.frame_conf.nNumerology = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "mu");
602         if(m_xranConf.frame_conf.nNumerology > 3) {
603             std::cout << "*** Invalid Numerology [" << m_xranConf.frame_conf.nNumerology << "] !!!" << std::endl;
604             m_xranConf.frame_conf.nNumerology   = 0;
605             std::cout << "****** Set it to " << m_xranConf.frame_conf.nNumerology << "..." << std::endl;
606             }
607
608         m_xranConf.nCC = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "num_cc");
609         if(m_xranConf.nCC > XRAN_MAX_SECTOR_NR) {
610             std::cout << "*** Exceeds maximum number of carriers supported [" << m_xranConf.nCC << "] !!!" << std::endl;
611             m_xranConf.nCC = XRAN_MAX_SECTOR_NR;
612             std::cout << "****** Adjusted to " << m_xranConf.nCC << "..." << std::endl;
613             }
614         m_xranConf.neAxc = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "num_eaxc");
615         if(m_xranConf.neAxc > XRAN_MAX_ANTENNA_NR) {
616             std::cout << "*** Exceeds maximum number of antenna supported [" << m_xranConf.neAxc << "] !!!" << std::endl;
617             m_xranConf.neAxc = XRAN_MAX_ANTENNA_NR;
618             std::cout << "****** Adjusted to " << m_xranConf.neAxc << "..." << std::endl;
619             }
620
621         m_bSub6     = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");
622         temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "chbw_dl");
623         m_xranConf.nDLRBs = get_num_rbs(get_numerology(), temp, m_bSub6);
624         temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "chbw_ul");
625         m_xranConf.nULRBs = get_num_rbs(get_numerology(), temp, m_bSub6);
626
627         m_xranConf.nAntElmTRx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "ant_elm_trx");
628         m_xranConf.nDLFftSize = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");
629         m_xranConf.nULFftSize = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");
630
631         m_xranConf.prach_conf.nPrachConfIdx     = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "config_id");
632         m_xranConf.prach_conf.nPrachSubcSpacing = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "scs");
633         m_xranConf.prach_conf.nPrachFreqStart   = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "freq_start");
634         m_xranConf.prach_conf.nPrachFreqOffset  = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "freq_offset");
635         m_xranConf.prach_conf.nPrachFilterIdx   = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "filter_id");
636         m_xranConf.prach_conf.nPrachZeroCorrConf= 0;
637         m_xranConf.prach_conf.nPrachRestrictSet = 0;
638         m_xranConf.prach_conf.nPrachRootSeqIdx  = 0;
639
640         tmpstr = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "category");
641         if(tmpstr == "A")
642             m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;
643         else if(tmpstr == "B")
644             m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_B;
645         else {
646             std::cout << "*** Invalid RU Category [" << tmpstr << "] !!!" << std::endl;
647             std::cout << "****** Set it to Category A... " << std::endl;
648             m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;
649             }
650
651         m_xranConf.ru_conf.iqWidth  = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "iq_width");
652         m_xranConf.ru_conf.compMeth = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "comp_meth");
653
654         temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");
655         m_xranConf.ru_conf.fftSize  = 0;
656         while (temp >>= 1)
657             ++m_xranConf.ru_conf.fftSize;
658
659         m_xranConf.ru_conf.byteOrder    =  XRAN_NE_BE_BYTE_ORDER;
660         m_xranConf.ru_conf.iqOrder      =  XRAN_I_Q_ORDER;
661
662         m_xranConf.log_level    = 0;
663 /*
664         m_xranConf.bbdev_enc = nullptr;
665         m_xranConf.bbdev_dec = nullptr;
666         m_xranConf.ttiCb    = nullptr;
667         m_xranConf.ttiCbParam   = nullptr;
668 */
669     }
670
671     ~xranLibWraper()
672     {
673     }
674
675     int SetUp()
676     {
677         int i;
678
679         printf("O-DU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
680             m_xranInit.p_o_du_addr[0],
681             m_xranInit.p_o_du_addr[1],
682             m_xranInit.p_o_du_addr[2],
683             m_xranInit.p_o_du_addr[3],
684             m_xranInit.p_o_du_addr[4],
685             m_xranInit.p_o_du_addr[5]);
686
687         printf("O-RU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
688             m_xranInit.p_o_ru_addr[0],
689             m_xranInit.p_o_ru_addr[1],
690             m_xranInit.p_o_ru_addr[2],
691             m_xranInit.p_o_ru_addr[3],
692             m_xranInit.p_o_ru_addr[4],
693             m_xranInit.p_o_ru_addr[5]);
694
695         printf("eAxCID - %d:%d:%d:%d (%04x, %04x, %04x, %04x)\n",
696             m_xranInit.eAxCId_conf.bit_cuPortId,
697             m_xranInit.eAxCId_conf.bit_bandSectorId,
698             m_xranInit.eAxCId_conf.bit_ccId,
699             m_xranInit.eAxCId_conf.bit_ruPortId,
700             m_xranInit.eAxCId_conf.mask_cuPortId,
701             m_xranInit.eAxCId_conf.mask_bandSectorId,
702             m_xranInit.eAxCId_conf.mask_ccId,
703             m_xranInit.eAxCId_conf.mask_ruPortId);
704
705         printf("Total BF Weights : %d\n", m_xranInit.totalBfWeights);
706
707         xran_init(0, NULL, &m_xranInit, &argv[0], &m_xranhandle);
708
709         for(i = 0; i < XRAN_MAX_SECTOR_NR; i++)
710             m_nSectorIndex[i] = i;
711
712         /* set to maximum length to support multiple cases */
713         m_nFpgaToSW_FTH_RxBufferLen     = 13168; /* 273*12*4 + 64*/
714         m_nSW_ToFpga_FTH_TxBufferLen    = 13168; /* 273*12*4 + 64*/
715
716         if(init_memory() < 0) {
717             std::cout << "Fatal Error on Initialization !!!" << std::endl;
718             std::cout << "INIT FAILED" << std::endl;
719             return (-1);
720             }
721
722         std::cout << "INIT DONE" << std::endl;
723         return (0);
724     }
725
726     void TearDown()
727     {
728         if(m_xranhandle) {
729             xran_close(m_xranhandle);
730             m_xranhandle = nullptr;
731             std::cout << "CLOSE DONE" << std::endl;
732             }
733         else
734             std::cout << "ALREADY CLOSED" << std::endl;
735     }
736
737     int Init(struct xran_fh_config *pCfg = nullptr)
738     {
739         xran_status_t status;
740         int32_t nSectorNum;
741         int32_t i, j, k, z;
742         void *ptr;
743         void *mb;
744         uint32_t *u32dptr;
745         uint16_t *u16dptr;
746         uint8_t  *u8dptr;
747         SWXRANInterfaceTypeEnum eInterfaceType;
748         int32_t cc_id, ant_id, sym_id, tti;
749         int32_t flowId;
750         char    *pos        = NULL;
751         struct xran_prb_map *pRbMap = NULL;
752
753
754         uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul());
755         uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
756
757
758         /* Update member variables */
759         if(pCfg)
760             memcpy(&m_xranConf, pCfg, sizeof(struct xran_fh_config));
761
762         /* Init timer context */
763         xran_lib_ota_tti        = 0;
764         xran_lib_ota_sym        = 0;
765         xran_lib_ota_sym_idx    = 0;
766         for(i=0; i < MAX_NUM_OF_XRAN_CTX; i++)
767             m_timer_ctx[i].tti_to_process = i;
768
769         nSectorNum = get_num_cc();
770
771         /* Cat B RU support */
772         if(get_rucategory() == XRAN_CATEGORY_B) {
773             /* 10 * [14*32*273*2*2] = 4892160 bytes */
774             iq_bfw_buffer_size_dl = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_dlrbs() * 4L);
775             iq_bfw_buffer_size_ul = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_ulrbs() * 4L);
776
777             for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {
778                 p_tx_dl_bfw_buffer[i]   = (int16_t*)malloc(iq_bfw_buffer_size_dl);
779                 tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;
780                 if(p_tx_dl_bfw_buffer[i] == NULL)
781                     return(-1);
782
783                 memset(p_tx_dl_bfw_buffer[i], 'D', iq_bfw_buffer_size_dl);
784                 tx_dl_bfw_buffer_position[i] = 0;
785
786                 p_tx_ul_bfw_buffer[i]    = (int16_t*)malloc(iq_bfw_buffer_size_ul);
787                 tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;
788                 if(p_tx_ul_bfw_buffer[i] == NULL)
789                     return (-1);
790
791                 memset(p_tx_ul_bfw_buffer[i], 'U', iq_bfw_buffer_size_ul);
792                 tx_ul_bfw_buffer_position[i] = 0;
793             }
794         }
795
796         /* Init RB map */
797         for(cc_id = 0; cc_id <nSectorNum; cc_id++) {
798             for(tti  = 0; tti  < XRAN_N_FE_BUF_LEN; tti ++) {
799                 for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) {
800                     flowId = xran_max_antenna_nr*cc_id + ant_id;
801
802                     /* C-plane DL */
803                     pRbMap = (struct xran_prb_map *)m_sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
804                     if(pRbMap) {
805                         pRbMap->dir                     = XRAN_DIR_DL;
806                         pRbMap->xran_port               = 0;
807                         pRbMap->band_id                 = 0;
808                         pRbMap->cc_id                   = cc_id;
809                         pRbMap->ru_port_id              = ant_id;
810                         pRbMap->tti_id                  = tti;
811                         pRbMap->start_sym_id            = 0;
812
813                         pRbMap->nPrbElm                 = 1;
814                         pRbMap->prbMap[0].nRBStart      = 0;
815                         pRbMap->prbMap[0].nRBSize       = get_num_dlrbs();
816                         pRbMap->prbMap[0].nStartSymb    = 0;
817                         pRbMap->prbMap[0].numSymb       = 14;
818                         pRbMap->prbMap[0].nBeamIndex    = 0;
819                         pRbMap->prbMap[0].compMethod    = XRAN_COMPMETHOD_NONE;
820
821                         if(get_rucategory() == XRAN_CATEGORY_A) {
822                             pRbMap->prbMap[0].BeamFormingType   = XRAN_BEAM_ID_BASED;
823                             pRbMap->prbMap[0].bf_weight_update  = 0;
824                             //pRbMap->prbMap[0].bf_attribute.weight[];
825                             //pRbMap->prbMap[0].bf_precoding.weight[];
826                             }
827                         else if(get_rucategory() == XRAN_CATEGORY_B) {
828                             int idxElm;
829                             int iPrb;
830                             char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];
831                             struct xran_prb_elm* p_prbMap = NULL;
832                             int num_antelm;
833
834                             pRbMap->prbMap[0].BeamFormingType   = XRAN_BEAM_WEIGHT;
835                             pRbMap->prbMap[0].bf_weight_update  = 1;
836
837                             num_antelm = get_num_antelmtrx();
838 #if 0
839                             /* populate beam weights to C-plane for each elm */
840                             pRbMap->bf_weight.nAntElmTRx = num_antelm;
841                             for(idxElm = 0;  idxElm < pRbMap->nPrbElm; idxElm++){
842                                 p_prbMap = &pRbMap->prbMap[idxElm];
843                                 for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++) {
844                                     /* copy BF W IQs for 1 PRB of */
845                                     rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (dl_bfw_pos + (iPrb * num_antelm)*4), num_antelm*4);
846                                     }
847                                 }
848 #endif
849                             } /* else if(get_rucategory() == XRAN_CATEGORY_B) */
850                         } /* if(pRbMap) */
851                     else {
852                         std::cout << "DL pRbMap ==NULL" << std::endl;
853                         }
854
855                     /* C-plane UL */
856                     pRbMap = (struct xran_prb_map *)m_sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
857                     if(pRbMap) {
858                         pRbMap->dir                     = XRAN_DIR_UL;
859                         pRbMap->xran_port               = 0;
860                         pRbMap->band_id                 = 0;
861                         pRbMap->cc_id                   = cc_id;
862                         pRbMap->ru_port_id              = ant_id;
863                         pRbMap->tti_id                  = tti;
864                         pRbMap->start_sym_id            = 0;
865
866                         pRbMap->nPrbElm                 = 1;
867                         pRbMap->prbMap[0].nRBStart      = 0;
868                         pRbMap->prbMap[0].nRBSize       = get_num_ulrbs();
869                         pRbMap->prbMap[0].nStartSymb    = 0;
870                         pRbMap->prbMap[0].numSymb       = 14;
871                         pRbMap->prbMap[0].nBeamIndex    = 0;
872                         pRbMap->prbMap[0].compMethod    = XRAN_COMPMETHOD_NONE;
873
874                         if(get_rucategory() == XRAN_CATEGORY_A) {
875                             pRbMap->prbMap[0].BeamFormingType   = XRAN_BEAM_ID_BASED;
876                             pRbMap->prbMap[0].bf_weight_update  = 0;
877                             //pRbMap->prbMap[0].bf_attribute.weight[];
878                             //pRbMap->prbMap[0].bf_precoding.weight[];
879                             }
880                         else if(get_rucategory() == XRAN_CATEGORY_B) {
881                             int idxElm;
882                             int iPrb;
883                             char *ul_bfw_pos =  ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
884                             struct xran_prb_elm* p_prbMap = NULL;
885                             int num_antelm;
886
887                             pRbMap->prbMap[0].BeamFormingType   = XRAN_BEAM_WEIGHT;
888                             pRbMap->prbMap[0].bf_weight_update  = 1;
889
890                             num_antelm = get_num_antelmtrx();
891 #if 0
892                             /* populate beam weights to C-plane for each elm */
893                             pRbMap->bf_weight.nAntElmTRx = num_antelm;
894                             for (idxElm = 0;  idxElm < pRbMap->nPrbElm; idxElm++){
895                                 p_prbMap = &pRbMap->prbMap[idxElm];
896                                 for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++){
897                                     /* copy BF W IQs for 1 PRB of */
898                                     rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (ul_bfw_pos + (iPrb*num_antelm)*4), num_antelm*4);
899                                     }
900                                 }
901 #endif
902                             } /* else if(get_rucategory() == XRAN_CATEGORY_B) */
903
904                         } /* if(pRbMap) */
905                     else {
906                         std::cout << "UL: pRbMap ==NULL" << std::endl;
907                         }
908                     }
909                 }
910             }
911
912         return (0);
913     }
914
915     void Cleanup()
916     {
917         int i;
918
919         if(get_rucategory() == XRAN_CATEGORY_B) {
920             for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {
921                 if(p_tx_dl_bfw_buffer[i]) {
922                     free(p_tx_dl_bfw_buffer[i]);
923                     p_tx_dl_bfw_buffer[i] == NULL;
924                     }
925
926                 if(p_tx_ul_bfw_buffer[i]) {
927                     free(p_tx_ul_bfw_buffer[i]);
928                     p_tx_ul_bfw_buffer[i] == NULL;
929                     }
930                 }
931             }
932
933         return;
934     }
935
936
937     void Open(xran_ethdi_mbuf_send_fn send_cp, xran_ethdi_mbuf_send_fn send_up,
938             void *fh_rx_callback, void *fh_rx_prach_callback, void *fh_srs_callback)
939     {
940         struct xran_fh_config *pXranConf;
941         int32_t nSectorNum;
942         int i, j, k, z;
943
944         uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul());
945         uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
946
947         struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
948         struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
949         struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
950         struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
951         struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
952         struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];
953
954 #if 0
955         xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
956         xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
957         xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
958 #endif
959         nSectorNum = get_num_cc();
960
961         for(i=0; i<nSectorNum; i++)
962         {
963             for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
964             {
965                 for(z = 0; z < xran_max_antenna_nr; z++){
966                     pFthTxBuffer[i][z][j]       = NULL;
967                     pFthTxPrbMapBuffer[i][z][j] = NULL;
968                     pFthRxBuffer[i][z][j]       = NULL;
969                     pFthRxPrbMapBuffer[i][z][j] = NULL;
970                     pFthRxRachBuffer[i][z][j]   = NULL;
971                 }
972                 for(z = 0; z < xran_max_ant_array_elm_nr; z++){
973                     pFthRxSrsBuffer[i][z][j] = NULL;
974                 }
975             }
976         }
977
978         for(i=0; i<nSectorNum; i++) {
979             for(j=0; j<XRAN_N_FE_BUF_LEN; j++) {
980                 for(z = 0; z < xran_max_antenna_nr; z++) {
981                     pFthTxBuffer[i][z][j]       = &(m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
982                     pFthTxPrbMapBuffer[i][z][j] = &(m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
983                     pFthRxBuffer[i][z][j]       = &(m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
984                     pFthRxPrbMapBuffer[i][z][j] = &(m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
985                     pFthRxRachBuffer[i][z][j]   = &(m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
986                     }
987                     for(z = 0; z < xran_max_ant_array_elm_nr && xran_max_ant_array_elm_nr; z++){
988                         pFthRxSrsBuffer[i][z][j] = &(m_sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);
989             }
990                 }
991             }
992
993         if(m_nInstanceHandle[0] != NULL) {
994             for(i = 0; i<nSectorNum; i++) {
995                 xran_5g_fronthault_config(m_nInstanceHandle[0][i],
996                         pFthTxBuffer[i], pFthTxPrbMapBuffer[i],
997                         pFthRxBuffer[i], pFthRxPrbMapBuffer[i],
998                         (void (*)(void *, xran_status_t))fh_rx_callback, &pFthRxBuffer[i][0]);
999
1000                 xran_5g_prach_req(m_nInstanceHandle[0][i], pFthRxRachBuffer[i],
1001                         (void (*)(void *, xran_status_t))fh_rx_prach_callback, &pFthRxRachBuffer[i][0]);
1002                 }
1003
1004             /* add SRS callback here */
1005             for (i = 0; i<nSectorNum && xran_max_ant_array_elm_nr; i++) {
1006                 xran_5g_srs_req(m_nInstanceHandle[0][i], pFthRxSrsBuffer[i],
1007                     (void (*)(void *, xran_status_t))fh_srs_callback,&pFthRxSrsBuffer[i][0]);
1008                 }
1009
1010             }
1011
1012
1013
1014         xran_register_cb_mbuf2ring(send_cp, send_up);
1015
1016         xran_open(m_xranhandle, &m_xranConf);
1017     }
1018
1019     void Close()
1020     {
1021         if(m_xranhandle)
1022             xran_close(m_xranhandle);
1023     }
1024
1025     int Start()
1026     {
1027         if(m_xranhandle)
1028             return(xran_start(m_xranhandle));
1029         else
1030             return (-1);
1031     }
1032
1033     int Stop()
1034     {
1035         if(m_xranhandle)
1036             return(xran_stop(m_xranhandle));
1037         else
1038             return (-1);
1039     }
1040
1041     /* emulation of timer */
1042     void update_tti()
1043     {
1044         tti_ota_cb(nullptr, get_timer_ctx());
1045     }
1046
1047     void update_symbol_index()
1048     {
1049         xran_lib_ota_sym_idx++;
1050         if((xran_lib_ota_sym_idx % N_SYM_PER_SLOT) == 0) {
1051             update_tti();
1052             }
1053
1054         xran_lib_ota_sym++;
1055         if(xran_lib_ota_sym >= N_SYM_PER_SLOT)
1056             xran_lib_ota_sym = 0;
1057     }
1058
1059     int apply_cpenable(bool flag)
1060     {
1061         struct xran_device_ctx *pCtx = xran_dev_get_ctx();
1062
1063         if(is_running())
1064             return (-1);
1065
1066         if(pCtx == nullptr)
1067             return (-1);
1068
1069         if(flag == true) {
1070             m_xranInit.enableCP = 1;
1071             pCtx->enableCP = 1;
1072             }
1073         else {
1074             m_xranInit.enableCP = 0;
1075             pCtx->enableCP = 0;
1076             }
1077
1078         return (0);
1079     }
1080
1081
1082     int get_slot_config(const std::string &cfgname, struct xran_frame_config *pCfg)
1083     {
1084         int numcfg, i, j;
1085         std::vector<int> slotcfg;
1086
1087         numcfg = get_globalcfg<int>(cfgname, "period");
1088         pCfg->nTddPeriod = numcfg;
1089         for(i=0; i < numcfg; i++) {
1090             std::stringstream slotcfgname;
1091
1092             slotcfgname << "slot" << i;
1093             std::vector<int> slotcfg = get_globalcfg_array<int>(cfgname, slotcfgname.str());
1094
1095             for(j=0; j < slotcfg.size(); j++)
1096                 pCfg->sSlotConfig[i].nSymbolType[j] = slotcfg[j];
1097             pCfg->sSlotConfig[i].reserved[0] = 0; pCfg->sSlotConfig[i].reserved[1] = 0;
1098             }
1099
1100         return (numcfg);
1101     }
1102
1103     int get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, bool nSub6)
1104     {
1105         if(nNumerology > 3)
1106             return (-1);
1107
1108         if(nSub6) {
1109             if (nNumerology < 3) {
1110                 /* F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB */
1111                 switch(nBandwidth) {
1112                     case PHY_BW_5MHZ:   return(nNumRbsPerSymF1[nNumerology][0]);
1113                     case PHY_BW_10MHZ:  return(nNumRbsPerSymF1[nNumerology][1]);
1114                     case PHY_BW_15MHZ:  return(nNumRbsPerSymF1[nNumerology][2]);
1115                     case PHY_BW_20MHZ:  return(nNumRbsPerSymF1[nNumerology][3]);
1116                     case PHY_BW_25MHZ:  return(nNumRbsPerSymF1[nNumerology][4]);
1117                     case PHY_BW_30MHZ:  return(nNumRbsPerSymF1[nNumerology][5]);
1118                     case PHY_BW_40MHZ:  return(nNumRbsPerSymF1[nNumerology][6]);
1119                     case PHY_BW_50MHZ:  return(nNumRbsPerSymF1[nNumerology][7]);
1120                     case PHY_BW_60MHZ:  return(nNumRbsPerSymF1[nNumerology][8]);
1121                     case PHY_BW_70MHZ:  return(nNumRbsPerSymF1[nNumerology][9]);
1122                     case PHY_BW_80MHZ:  return(nNumRbsPerSymF1[nNumerology][10]);
1123                     case PHY_BW_90MHZ:  return(nNumRbsPerSymF1[nNumerology][11]);
1124                     case PHY_BW_100MHZ: return(nNumRbsPerSymF1[nNumerology][12]);
1125                 }
1126             }
1127         }
1128         else { /* if(nSub6) */
1129             if((nNumerology >= 2) && (nNumerology <= 3)) {
1130                 nNumerology -= 2;
1131                 /* F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB */
1132                 switch(nBandwidth) {
1133                     case PHY_BW_50MHZ:  return(nNumRbsPerSymF2[nNumerology][0]); break;
1134                     case PHY_BW_100MHZ: return(nNumRbsPerSymF2[nNumerology][1]); break;
1135                     case PHY_BW_200MHZ: return(nNumRbsPerSymF2[nNumerology][2]); break;
1136                     case PHY_BW_400MHZ: return(nNumRbsPerSymF2[nNumerology][3]); break;
1137                 }
1138             }
1139         }
1140
1141         return(-1);
1142     }
1143
1144     void *get_xranhandle()  { return(m_xranhandle); }
1145     void *get_timer_ctx()   { return((void *)&m_timer_ctx[0]); }
1146
1147     int get_symbol_index()  { return (xran_lib_ota_sym); }
1148
1149     bool is_running()       { return((xran_get_if_state() == XRAN_RUNNING)?true:false); }
1150
1151     enum xran_category get_rucategory()    { return(m_xranConf.ru_conf.xranCat); }
1152
1153     int get_numerology()    { return(m_xranConf.frame_conf.nNumerology); }
1154     int get_duplextype()    { return(m_xranConf.frame_conf.nFrameDuplexType); }
1155     int get_num_cc()        { return(m_xranConf.nCC); }
1156     int get_num_eaxc()      { return(m_xranConf.neAxc); }
1157     int get_num_eaxc_ul()   { return(m_xranConf.neAxcUl); }
1158     int get_num_dlrbs()     { return(m_xranConf.nDLRBs); }
1159     int get_num_ulrbs()     { return(m_xranConf.nULRBs); }
1160     int get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); }
1161
1162     bool is_cpenable()      { return(m_xranInit.enableCP); };
1163     bool is_prachenable()   { return(m_xranInit.prachEnable); };
1164     bool is_dynamicsection() { return(m_xranInit.DynamicSectionEna?true:false); }
1165
1166     void get_cfg_prach(struct xran_prach_config *pCfg)
1167     {
1168         if(pCfg)
1169             memcpy(pCfg, &m_xranConf.prach_conf, sizeof(struct xran_prach_config));
1170     }
1171
1172     void get_cfg_frame(struct xran_frame_config *pCfg)
1173     {
1174         if(pCfg)
1175             memcpy(pCfg, &m_xranConf.frame_conf, sizeof(struct xran_frame_config));
1176     }
1177
1178     void get_cfg_ru(struct xran_ru_config *pCfg)
1179     {
1180         if(pCfg)
1181             memcpy(pCfg, &m_xranConf.ru_conf, sizeof(struct xran_ru_config));
1182     }
1183
1184     void get_cfg_fh(struct xran_fh_config *pCfg)
1185     {
1186         if(pCfg)
1187             memcpy(pCfg, &m_xranConf, sizeof(struct xran_fh_config));
1188     }
1189
1190 };
1191
1192
1193 /* external declaration for the instance */
1194 extern xranLibWraper *xranlib;
1195
1196
1197 #endif //XRAN_LIB_WRAP_HPP