1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @brief XRAN layer O-DU|O-RU device context
22 * @ingroup group_source_xran
23 * @author Intel Corporation
35 #include <sys/param.h>
36 #include <sys/queue.h>
38 #include <rte_common.h>
40 #include <rte_timer.h>
42 #include "xran_fh_o_du.h"
43 #include "xran_prach_cfg.h"
44 #include "xran_up_api.h"
45 #include "xran_cp_api.h"
47 #define DIV_ROUND_OFFSET(X,Y) ( X/Y + ((X%Y)?1:0) )
49 #define MAX_NUM_OF_XRAN_CTX (2)
50 #define MAX_CB_TIMER_CTX (10*MAX_NUM_OF_XRAN_CTX)
51 #define MAX_TTI_TO_PHY_TIMER (10)
52 #define XranIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_XRAN_CTX-1)) ? 0 : (ctx+1))
53 #define XranDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_XRAN_CTX-1) : (ctx-1))
55 #define MAX_NUM_OF_DPDK_TIMERS (10)
56 #define DpdkTimerIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_DPDK_TIMERS-1)) ? 0 : (ctx+1))
57 #define DpdkTimerDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_DPDK_TIMERS-1) : (ctx-1))
59 enum xran_job_type_id {
60 XRAN_JOB_TYPE_OTA_CB = 0,
61 XRAN_JOB_TYPE_CP_DL = 1,
62 XRAN_JOB_TYPE_CP_UL = 2,
63 XRAN_JOB_TYPE_DEADLINE = 3,
64 XRAN_JOB_TYPE_SYM_CB = 4,
68 struct xran_timer_ctx {
69 uint32_t tti_to_process;
71 uint16_t xran_sfn_at_sec_start;
72 uint64_t current_second;
75 #define XRAN_MAX_POOLS_PER_SECTOR_NR 8 /**< 2x(TX_OUT, RX_IN, PRACH_IN, SRS_IN) with C-plane */
77 typedef struct sectorHandleInfo
79 /**< Structure that contains the information to describe the
80 * instance i.e service type, virtual function, package Id etc..*/
83 /* Unique ID of an handle shared between phy layer and library */
84 /**< number of antennas supported per link*/
85 uint32_t nBufferPoolIndex;
86 /**< Buffer poolIndex*/
87 struct rte_mempool * p_bufferPool[XRAN_MAX_POOLS_PER_SECTOR_NR];
88 uint32_t bufferPoolElmSz[XRAN_MAX_POOLS_PER_SECTOR_NR];
89 uint32_t bufferPoolNumElm[XRAN_MAX_POOLS_PER_SECTOR_NR];
91 }XranSectorHandleInfo, *PXranSectorHandleInfo;
93 typedef void (*XranSymCallbackFn)(struct rte_timer *tim, void* arg, void *p_dev_ctx);
94 typedef int32_t (*tx_sym_gen_fn)(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t num_cc, int32_t num_ant, uint32_t frame_id,
95 uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction,
96 uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db);
99 XranSymCallbackFn pSymCallback;
100 void *pSymCallbackTag;
102 LIST_ENTRY(cb_elem_entry) pointers;
105 /* Callback function to send mbuf to the ring */
106 typedef int (*xran_ethdi_mbuf_send_fn)(struct rte_mbuf *mb, uint16_t ethertype, uint16_t vf_id);
109 * manage one cell's all Ethernet frames for one DL or UL LTE subframe
112 /* -1-this subframe is not used in current frame format
113 0-this subframe can be transmitted, i.e., data is ready
114 1-this subframe is waiting transmission, i.e., data is not ready
115 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
118 int32_t bValid ; // when UL rx, it is subframe index.
120 int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
121 // -1 means that DL packet to be transmitted is not ready in BS
122 int32_t nSegTransferred; // number of data segments has been transmitted or received
123 struct rte_mbuf *pData[XRAN_N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
124 struct xran_buffer_list sBufferList;
125 } BbuIoBufCtrlStruct;
128 #define XranIncrementJob(i) ((i >= (XRAN_SYM_JOB_SIZE-1)) ? 0 : (i+1))
130 #define XRAN_MAX_PKT_BURST_PER_SYM 96 /**< 16 layers with 6 sections each */
131 #define XRAN_MAX_PACKET_FRAG 9
133 #define MBUF_TABLE_SIZE (2 * MAX(XRAN_MAX_PKT_BURST_PER_SYM, XRAN_MAX_PACKET_FRAG))
135 #define XRAN_IQ_FLOW_MAX 512 /**< Maximum flow IQ flows per XRAN port */
139 struct rte_mbuf *m_table[MBUF_TABLE_SIZE];
142 /** Symbols CB structure defining context of exection */
143 struct cb_user_per_sym_ctx {
144 int32_t status; /** status of CB - free, used */
145 int32_t symb_num_req; /**< requested Symb for CB */
146 int32_t sym_diff; /**< delay/advace as measured against OTA "-" - delay(later OTA) "+" - advace (earlier OTA) */
147 int32_t symb_num_ota; /**< coresponding "execution time" for Symb according to type of CB */
148 int32_t cb_type_id; /**< type of CB */
150 /** DPDK timer specific variables */
151 int32_t user_timer_put; /**< put index (producer)*/
152 int32_t user_timer_get; /**< get index (consumer)*/
153 struct xran_timer_ctx user_cb_timer_ctx[MAX_CB_TIMER_CTX]; /**< DPDK timer context */
155 xran_callback_sym_fn symCb; /**< call back for Symb event */
156 void *symCbParam; /**< parameters of call back function */
157 struct xran_sense_of_time *symCbTimeInfo; /**< Time related infomation to this CB */
158 void *p_dev; /**< poiter back to coresponding Device context */
161 /** Shared data at the end of an external buffer for C-plane and U-plane*/
162 struct xran_shared_data_ucp_t {
163 struct rte_mbuf_ext_shared_info sh_data[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_MAX_SECTIONS_PER_SLOT];
166 /** Shared data at the end of an external buffer for Beam forming weights */
167 struct xran_shared_data_bfw_t {
168 struct rte_mbuf_ext_shared_info sh_data[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_MAX_SECTIONS_PER_SLOT];
171 /** Shared data at the end of an external buffer for SRS */
172 struct xran_shared_data_srs_t {
173 struct rte_mbuf_ext_shared_info sh_data[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
176 struct __rte_cache_aligned xran_device_ctx
179 uint8_t xran_port_id;
180 struct xran_eaxcid_config eAxc_id_cfg;
181 struct xran_fh_init fh_init;
182 struct xran_fh_config fh_cfg;
183 struct xran_prach_cp_config PrachCPConfig;
185 uint32_t enablePrach;
188 int32_t DynamicSectionEna;
190 int64_t offset_nsec; //offset to GPS time calcuated based on alpha and beta
191 uint32_t interval_us_local;
194 uint8_t puschMaskEnable;
195 uint8_t puschMaskSlot;
196 struct xran_srs_config srs_cfg; /** configuration of SRS */
198 BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
199 BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
200 BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
201 BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
202 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
203 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrlDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
205 BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
206 BbuIoBufCtrlStruct sFHSrsRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
209 struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
210 struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
211 struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
212 struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
213 struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
214 struct xran_flat_buffer sFHPrachRxBuffersDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
216 struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
217 struct xran_flat_buffer sFHSrsRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
219 xran_transport_callback_fn pCallback[XRAN_MAX_SECTOR_NR];
220 void *pCallbackTag[XRAN_MAX_SECTOR_NR];
222 xran_transport_callback_fn pPrachCallback[XRAN_MAX_SECTOR_NR];
223 void *pPrachCallbackTag[XRAN_MAX_SECTOR_NR];
225 xran_transport_callback_fn pSrsCallback[XRAN_MAX_SECTOR_NR];
226 void *pSrsCallbackTag[XRAN_MAX_SECTOR_NR];
228 LIST_HEAD(sym_cb_elem_list, cb_elem_entry) sym_cb_list_head[XRAN_NUM_OF_SYMBOL_PER_SLOT];
230 int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */
233 xran_fh_tti_callback_fn ttiCb[XRAN_CB_MAX];
234 void *TtiCbParam[XRAN_CB_MAX];
235 uint32_t SkipTti[XRAN_CB_MAX];
237 int xran2phy_mem_ready;
239 int rx_packet_symb_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
240 int rx_packet_prach_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
241 int rx_packet_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
242 int rx_packet_prach_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
243 int prach_start_symbol[XRAN_MAX_SECTOR_NR];
244 int prach_last_symbol[XRAN_MAX_SECTOR_NR];
248 struct rte_mempool *direct_pool;
249 struct rte_mempool *indirect_pool;
251 struct xran_common_counters fh_counters;
253 xran_ethdi_mbuf_send_fn send_cpmbuf2ring; /**< callback to send mbufs of C-Plane packets to the ring */
254 xran_ethdi_mbuf_send_fn send_upmbuf2ring; /**< callback to send mbufs of U-Plane packets to the ring */
256 struct xran_timer_ctx timer_ctx[MAX_NUM_OF_XRAN_CTX];
257 struct xran_timer_ctx cb_timer_ctx[MAX_CB_TIMER_CTX];
259 struct rte_timer tti_to_phy_timer[MAX_TTI_TO_PHY_TIMER];
260 struct rte_timer sym_timer;
261 struct rte_timer dpdk_timer[MAX_NUM_OF_DPDK_TIMERS];
263 uint16_t map2vf[2][XRAN_COMPONENT_CARRIERS_MAX][XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_VF_MAX];
269 struct cb_user_per_sym_ctx symCbCtx[XRAN_NUM_OF_SYMBOL_PER_SLOT][XRAN_CB_SYM_MAX];
271 volatile int32_t timing_source_thread_running;
273 struct rte_mbuf *to_free_mbuf[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT][XRAN_MAX_SECTIONS_PER_SLOT];
275 tx_sym_gen_fn tx_sym_gen_func;
277 int32_t job2wrk_id[XRAN_JOB_TYPE_MAX]; /** mapping of HI prio Job to worker core */
279 struct xran_shared_data_ucp_t share_data;
280 struct xran_shared_data_ucp_t cp_share_data;
281 struct xran_shared_data_bfw_t bfw_share_data;
282 struct xran_shared_data_srs_t srs_share_data;
284 struct rte_flow *p_iq_flow[XRAN_IQ_FLOW_MAX];
285 uint32_t iq_flow_cnt; /**< number of IQ flows configured */
288 struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle);
289 uint8_t xran_get_conf_prach_scs(void *pHandle);
290 uint8_t xran_get_conf_fftsize(void *pHandle);
291 uint8_t xran_get_conf_numerology(void *pHandle);
292 uint8_t xran_get_conf_iqwidth_prach(void *pHandle);
293 uint8_t xran_get_conf_compmethod_prach(void *pHandle);
294 uint8_t xran_get_conf_num_bfweights(void *pHandle);
295 uint8_t xran_get_num_cc(void *pHandle);
296 uint8_t xran_get_num_eAxc(void *pHandle);
297 uint8_t xran_get_num_eAxcUl(void *pHandle);
298 uint8_t xran_get_num_ant_elm(void *pHandle);
299 enum xran_category xran_get_ru_category(void *pHandle);
300 uint16_t xran_get_beamid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
302 int32_t xran_dev_create_ctx(uint32_t xran_ports_num);
303 int32_t xran_dev_destroy_ctx();
304 struct xran_device_ctx *xran_dev_get_ctx(void);
305 struct xran_device_ctx *xran_dev_get_ctx_by_id(uint32_t xran_port_id);
306 struct xran_device_ctx **xran_dev_get_ctx_addr(void);
308 struct cb_elem_entry *xran_create_cb(XranSymCallbackFn cb_fn, void *cb_data, void* p_dev_ctx);
309 int32_t xran_destroy_cb(struct cb_elem_entry * cb_elm);
311 uint16_t xran_map_ecpriRtcid_to_vf(struct xran_device_ctx *p_dev_ctx, int32_t dir, int32_t cc_id, int32_t ru_port_id);
312 uint16_t xran_map_ecpriPcid_to_vf(struct xran_device_ctx *p_dev_ctx, int32_t dir, int32_t cc_id, int32_t ru_port_id);
314 uint16_t xran_set_map_ecpriRtcid_to_vf(struct xran_device_ctx *p_dev_ctx, int32_t dir, int32_t cc_id, int32_t ru_port_id, uint16_t vf_id);
315 uint16_t xran_set_map_ecpriPcid_to_vf(struct xran_device_ctx *p_dev_ctx, int32_t dir, int32_t cc_id, int32_t ru_port_id, uint16_t vf_id);
317 int32_t xran_init_vfs_mapping(void *pHandle);
318 int32_t xran_init_vf_rxq_to_pcid_mapping(void *pHandle);
320 static inline int8_t xran_dev_ctx_get_port_id(void * handle)
322 struct xran_device_ctx * p_dev_ctx = (struct xran_device_ctx *)handle;
324 return (int8_t)p_dev_ctx->xran_port_id;