1 /******************************************************************************
3 * Copyright (c) 2019 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and
23 * @ingroup group_source_xran
24 * @author Intel Corporation
27 #ifndef _XRAN_COMMON_H_
28 #define _XRAN_COMMON_H_
36 #include <sys/param.h>
39 #include <rte_common.h>
41 #include <rte_timer.h>
43 #include "xran_fh_o_du.h"
44 #include "xran_pkt_up.h"
45 #include "xran_cp_api.h"
50 #define N_SC_PER_PRB 12
51 #define MAX_N_FULLBAND_SC 273
52 #define N_SYM_PER_SLOT 14
53 #define SUBFRAME_DURATION_US 1000
54 #define SLOTNUM_PER_SUBFRAME (SUBFRAME_DURATION_US/interval_us)
55 #define SUBFRAMES_PER_SYSTEMFRAME 10
56 #define SLOTS_PER_SYSTEMFRAME (SLOTNUM_PER_SUBFRAME*SUBFRAMES_PER_SYSTEMFRAME)
58 /* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/
59 #define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)
61 #define XRAN_MAX_NUM_SECTIONS (N_SYM_PER_SLOT*2) /* just an example, no special meaning on this number */
62 /* and this is the configuration of M-plane */
64 #define XRAN_MAX_MBUF_LEN 9600 /**< jumbo frame */
65 #define NSEC_PER_SEC 1000000000L
66 #define TIMER_RESOLUTION_CYCLES 1596*1 /* 1us */
67 #define XRAN_RING_SIZE 512 /*4*14*8 pow of 2 */
68 #define XRAN_NAME_MAX_LEN (64)
69 #define XRAN_RING_NUM (3)
71 #define XranDiffSymIdx(prevSymIdx, currSymIdx, numTotalSymIdx) ((prevSymIdx > currSymIdx) ? ((currSymIdx + numTotalSymIdx) - prevSymIdx) : (currSymIdx - prevSymIdx))
73 #define XRAN_MLOG_VAR 0 /**< enable debug variables to mlog */
75 /* PRACH configuration table defines */
76 #define XRAN_PRACH_CANDIDATE_PREAMBLE (2)
77 #define XRAN_PRACH_CANDIDATE_Y (2)
78 #define XRAN_PRACH_CANDIDATE_SLOT (40)
79 #define XRAN_PRACH_CONFIG_TABLE_SIZE (256)
80 #define XRAN_PRACH_PREAMBLE_FORMAT_OF_ABC (9)
99 /* add PRACH used config table, same structure as used in refPHY */
102 uint8_t prachConfigIdx;
103 uint8_t preambleFmrt[XRAN_PRACH_CANDIDATE_PREAMBLE];
105 uint8_t y[XRAN_PRACH_CANDIDATE_Y];
106 uint8_t slotNr[XRAN_PRACH_CANDIDATE_SLOT];
109 uint8_t nrofPrachInSlot;
110 uint8_t occassionsInPrachSlot;
112 } xRANPrachConfigTableStruct;
116 uint8_t preambleFmrt;
121 }xRANPrachPreambleLRAStruct;
132 uint8_t nrofPrachInSlot;
133 uint8_t occassionsInPrachSlot;
135 uint8_t y[XRAN_PRACH_CANDIDATE_Y];
136 uint8_t isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];
137 }xRANPrachCPConfigStruct;
139 #define XRAN_MAX_POOLS_PER_SECTOR_NR 3 /**< TX_OUT, RX_IN, PRACH_IN */
141 typedef struct sectorHandleInfo
143 /**< Structure that contains the information to describe the
144 * instance i.e service type, virtual function, package Id etc..*/
147 /* Unique ID of an handle shared between phy layer and library */
148 /**< number of antennas supported per link*/
149 uint32_t nBufferPoolIndex;
150 /**< Buffer poolIndex*/
151 struct rte_mempool * p_bufferPool[XRAN_MAX_POOLS_PER_SECTOR_NR];
152 uint32_t bufferPoolElmSz[XRAN_MAX_POOLS_PER_SECTOR_NR];
153 uint32_t bufferPoolNumElm[XRAN_MAX_POOLS_PER_SECTOR_NR];
155 }XranSectorHandleInfo, *PXranSectorHandleInfo;
157 typedef void (*XranSymCallbackFn)(struct rte_timer *tim, void* arg);
160 * manage one cell's all Ethernet frames for one DL or UL LTE subframe
163 /* -1-this subframe is not used in current frame format
164 0-this subframe can be transmitted, i.e., data is ready
165 1-this subframe is waiting transmission, i.e., data is not ready
166 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
169 int32_t bValid ; // when UL rx, it is subframe index.
171 int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
172 // -1 means that DL packet to be transmitted is not ready in BS
173 int32_t nSegTransferred; // number of data segments has been transmitted or received
174 struct rte_mbuf *pData[XRAN_N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
175 struct xran_buffer_list sBufferList;
176 } BbuIoBufCtrlStruct;
178 struct xran_sym_job {
181 }__rte_cache_aligned;
183 #define XranIncrementJob(i) ((i >= (XRAN_SYM_JOB_SIZE-1)) ? 0 : (i+1))
185 #define XRAN_MAX_PKT_BURST_PER_SYM 32
186 #define XRAN_MAX_PACKET_FRAG 9
188 #define MBUF_TABLE_SIZE (2 * MAX(XRAN_MAX_PKT_BURST_PER_SYM, XRAN_MAX_PACKET_FRAG))
192 struct rte_mbuf *m_table[MBUF_TABLE_SIZE];
195 struct xran_device_ctx
198 uint8_t xran_port_id;
199 struct xran_eaxcid_config eAxc_id_cfg;
200 struct xran_fh_init fh_init;
201 struct xran_fh_config fh_cfg;
202 uint32_t enablePrach;
203 xRANPrachCPConfigStruct PrachCPConfig;
205 int32_t DynamicSectionEna;
207 BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
208 BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
209 BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
210 BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
211 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
214 struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
215 struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
216 struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
217 struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
218 struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
220 xran_transport_callback_fn pCallback[XRAN_MAX_SECTOR_NR];
221 void *pCallbackTag[XRAN_MAX_SECTOR_NR];
223 xran_transport_callback_fn pPrachCallback[XRAN_MAX_SECTOR_NR];
224 void *pPrachCallbackTag[XRAN_MAX_SECTOR_NR];
226 XranSymCallbackFn pSymCallback[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
227 void *pSymCallbackTag[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
229 int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */
232 xran_fh_tti_callback_fn ttiCb[XRAN_CB_MAX];
233 void *TtiCbParam[XRAN_CB_MAX];
234 uint32_t SkipTti[XRAN_CB_MAX];
236 int xran2phy_mem_ready;
238 int rx_packet_symb_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
239 int rx_packet_prach_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
240 int rx_packet_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
241 int rx_packet_prach_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
242 int prach_start_symbol[XRAN_MAX_SECTOR_NR];
243 int prach_last_symbol[XRAN_MAX_SECTOR_NR];
247 struct rte_mempool *direct_pool;
248 struct rte_mempool *indirect_pool;
249 struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
251 struct xran_common_counters fh_counters;
253 phy_encoder_poll_fn bbdev_enc; /**< call back to poll BBDev encoder */
254 phy_decoder_poll_fn bbdev_dec; /**< call back to poll BBDev decoder */
257 extern long rx_counter;
258 extern long tx_counter;
260 extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_fdd[XRAN_PRACH_CONFIG_TABLE_SIZE];
261 extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_tdd[XRAN_PRACH_CONFIG_TABLE_SIZE];
262 extern const xRANPrachConfigTableStruct gxranPrachDataTable_mmw[XRAN_PRACH_CONFIG_TABLE_SIZE];
263 extern const xRANPrachPreambleLRAStruct gxranPreambleforLRA[13];
265 int process_mbuf(struct rte_mbuf *pkt);
266 int process_ring(struct rte_ring *r);
267 int ring_processing_thread(void *args);
268 int packets_dump_thread(void *args);
270 int send_symbol_ex(enum xran_pkt_dir direction,
274 const enum xran_input_byte_order iq_buf_byte_order,
285 int32_t prepare_symbol_ex(enum xran_pkt_dir direction,
289 const enum xran_input_byte_order iq_buf_byte_order,
301 int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *params,
302 struct xran_section_gen_info *sect_geninfo, uint8_t cc_id, uint8_t ru_port_id, uint8_t seq_id);
304 int generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf,
305 enum xran_pkt_dir dir, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
306 uint8_t startsym, uint8_t numsym, uint16_t prb_start, uint16_t prb_num,
307 uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t seq_id, uint8_t symInc);
309 int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx,
310 uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
311 uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id);
313 struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle);
314 uint8_t xran_get_conf_prach_scs(void *pHandle);
315 uint8_t xran_get_conf_fftsize(void *pHandle);
316 uint8_t xran_get_conf_numerology(void *pHandle);
317 uint8_t xran_get_conf_iqwidth(void *pHandle);
318 uint8_t xran_get_conf_compmethod(void *pHandle);
320 uint8_t xran_get_num_cc(void *pHandle);
321 uint8_t xran_get_num_eAxc(void *pHandle);
322 struct xran_device_ctx *xran_dev_get_ctx(void);
324 uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
325 uint8_t xran_get_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
326 int32_t ring_processing_func(void);
327 int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx);