1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
21 #include <sys/syscall.h>
34 #include <getopt.h> // for getopt
39 #include "xran_mlog_lnx.h"
41 #include "xran_fh_o_du.h"
42 #include "xran_compression.h"
43 #include "xran_cp_api.h"
44 #include "xran_sync_api.h"
45 #include "xran_mlog_task_id.h"
47 #define MAX_BBU_POOL_CORE_MASK (4)
50 #define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024
51 #define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024
52 #define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024
53 #define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
55 #define NSEC_PER_SEC 1000000000
57 #define MAX_PKT_BURST (448+4) // 4x14x8
58 #define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST
60 #define MAIN_PRIORITY 98
61 #define NUM_OF_SUBFRAME_PER_FRAME (10)
65 uint64_t tick_per_usec;
66 static volatile uint64_t timer_last_irq_tick = 0;
67 static uint64_t tsc_resolution_hz = 0;
69 RuntimeConfig startupConfiguration = {0};
72 uint32_t nFpgaToSW_FTH_RxBufferLen;
73 uint32_t nFpgaToSW_PRACH_RxBufferLen;
74 uint32_t nSW_ToFpga_FTH_TxBufferLen;
76 static struct xran_fh_init xranInit;
77 void * xranHandle = NULL;
79 struct sample_app_params {
85 struct xran_fh_config xranConf;
86 struct xran_fh_config *pXranConf = NULL;
90 uint32_t phaseFlag :1;
92 uint32_t SULFreShift :1;
97 typedef struct XranLibConfig
99 uint32_t nDriverCoreId;
100 uint32_t nTimingAdvance;
102 uint32_t nFhBufIntFlag;
104 uint32_t nNrOfSlotInSf;
105 uint32_t nNrofSfInFrame;
106 void * pFthInstanceHandles;
107 }XranLibConfigStruct;
110 XRANFTHTX_PRB_MAP_OUT,
111 XRANFTHTX_SEC_DESC_OUT,
113 XRANFTHRX_PRB_MAP_IN,
114 XRANFTHTX_SEC_DESC_IN,
117 MAX_SW_XRAN_INTERFACE_NUM
118 }SWXRANInterfaceTypeEnum;
121 * manage one cell's all Ethernet frames for one DL or UL LTE subframe
124 /* -1-this subframe is not used in current frame format
125 0-this subframe can be transmitted, i.e., data is ready
126 1-this subframe is waiting transmission, i.e., data is not ready
127 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
130 int32_t bValid ; // when UL rx, it is subframe index.
132 int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
133 // -1 means that DL packet to be transmitted is not ready in BS
134 int32_t nSegTransferred; // number of data segments has been transmitted or received
135 struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
136 struct xran_buffer_list sBufferList;
137 } BbuIoBufCtrlStruct;
142 uint8_t nDriverCoreId;
145 struct rte_mempool *bbuio_buf_pool;
148 BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
149 BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
150 BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
151 BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
152 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
155 BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
158 struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
159 struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
160 struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
161 struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
162 struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
164 /* Cat B SRS buffers */
165 struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
167 void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
168 uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool
169 uint16_t nInstanceNum;
171 uint64_t nTscTiming[XRAN_N_FE_BUF_LEN]; // records the TSC when a timing packet is received.
174 static BbuXranIoIfStruct gsXranIoIf;
175 static XranLibConfigStruct *gpXranLibConfig = NULL;
177 long old_rx_counter = 0;
178 long old_tx_counter = 0;
181 #define CPU_HZ tick_per_usec //us
183 /* Application User space functions */
184 void xran_fh_rx_callback(void *pCallbackTag, int32_t status);
185 void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status);
187 static BbuXranIoIfStruct *xran_get_ctx(void)
192 static void print_menu()
194 puts("+---------------------------------------+");
195 puts("| Press 1 to start 5G NR XRAN traffic |");
196 puts("| Press 2 reserved for future use |");
197 puts("| Press 3 to quit |");
198 puts("+---------------------------------------+");
201 static int32_t get_xran_sfidx(uint8_t nNrOfSlotInSf)
205 uint32_t nSubframeIdx;
209 uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
210 nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
211 + nSubframeIdx*nNrOfSlotInSf
214 printf("\nxranTime is %d, return is %d, radio frame is %d, subframe is %d slot is %d tsc is %llu us",
226 void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
228 uint64_t t1 = MLogTick();
229 uint32_t mlogVar[10];
230 uint32_t mlogVarCnt = 0;
231 uint8_t Numerlogy = xranConf.frame_conf.nNumerology;
232 uint8_t nNrOfSlotInSf = 1<<Numerlogy;
233 int32_t sfIdx = get_xran_sfidx(nNrOfSlotInSf);
235 mlogVar[mlogVarCnt++] = 0xCCCCCCCC;
236 mlogVar[mlogVarCnt++] = status >> 16; /* tti */
237 mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
238 mlogVar[mlogVarCnt++] = (uint32_t)sfIdx;
239 MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
242 MLogTask(PID_GNB_SYM_CB, t1, MLogTick());
246 void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
248 uint64_t t1 = MLogTick();
249 uint32_t mlogVar[10];
250 uint32_t mlogVarCnt = 0;
252 mlogVar[mlogVarCnt++] = 0xDDDDDDDD;
253 mlogVar[mlogVarCnt++] = status >> 16; /* tti */
254 mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
255 MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
258 MLogTask(PID_GNB_PRACH_CB, t1, MLogTick());
261 void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)
263 uint64_t t1 = MLogTick();
264 uint32_t mlogVar[10];
265 uint32_t mlogVarCnt = 0;
267 mlogVar[mlogVarCnt++] = 0xCCCCCCCC;
268 mlogVar[mlogVarCnt++] = status >> 16; /* tti */
269 mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
270 MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
273 MLogTask(PID_GNB_SRS_CB, t1, MLogTick());
277 //-------------------------------------------------------------------------------------------
278 /** @ingroup group_nbiot_source_auxlib_timer
285 * This function reads the rtdsc clock and returns the current value in there.
288 //-------------------------------------------------------------------------------------------
289 unsigned long timer_get_ticks(void)
294 unsigned long tsc_64;
302 __asm volatile("rdtsc" :
306 ret = ((unsigned long)tsc.tsc_64);
310 //-------------------------------------------------------------------------------------------
311 /** @ingroup group_lte_source_auxlib_timer
315 * @return 0 if SUCCESS
318 * This function gets the clock speed of the core and figures out number of ticks per usec.
319 * It is used by l1app and testmac applications to initialize the mlog utility
322 //-------------------------------------------------------------------------------------------
323 int timer_set_tsc_freq_from_clock(void)
325 #define NS_PER_SEC 1E9
326 struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */
327 struct timespec t_start, t_end;
328 uint64_t tsc_resolution_hz = 0;
330 if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)
332 unsigned long ns, end, start = timer_get_ticks();
333 nanosleep(&sleeptime,NULL);
334 clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
335 end = timer_get_ticks();
336 ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
337 ns += (t_end.tv_nsec - t_start.tv_nsec);
339 double secs = (double)ns/NS_PER_SEC;
340 tsc_resolution_hz = (unsigned long)((end - start)/secs);
342 tick_per_usec = (tsc_resolution_hz / 1000000);
343 printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);
344 printf("Ticks per us %lu\n", tick_per_usec);
351 int physide_dl_tti_call_back(void * param)
353 uint64_t t1 = MLogTick();
355 MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
359 int physide_ul_half_slot_call_back(void * param)
361 uint64_t t1 = MLogTick();
363 MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
367 int physide_ul_full_slot_call_back(void * param)
369 uint64_t t1 = MLogTick();
371 MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
375 int32_t init_xran(void)
377 BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
378 xran_status_t status;
379 int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
388 uint32_t xran_max_antenna_nr = RTE_MAX(startupConfiguration.numAxc, startupConfiguration.numUlAxc);
389 uint32_t xran_max_ant_array_elm_nr = RTE_MAX(startupConfiguration.antElmTRx, xran_max_antenna_nr);
391 SWXRANInterfaceTypeEnum eInterfaceType;
393 XranLibConfigStruct *ptrLibConfig;
395 struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
396 struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
397 struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
398 struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
399 struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
400 struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];
402 for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
404 nSectorIndex[nSectorNum] = nSectorNum;
407 nSectorNum = numCCPorts;
408 printf ("XRAN front haul xran_mm_init \n");
409 status = xran_mm_init (xranHandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
410 if (status != XRAN_STATUS_SUCCESS)
412 printf ("Failed at XRAN front haul xran_mm_init \n");
416 psBbuIo->nInstanceNum = numCCPorts;
418 for (k = 0; k < XRAN_PORTS_NUM; k++) {
419 status = xran_sector_get_instances (xranHandle, psBbuIo->nInstanceNum,&psBbuIo->nInstanceHandle[k][0]);
420 if (status != XRAN_STATUS_SUCCESS)
422 printf ("get sector instance failed %d for XRAN nInstanceNum %d\n",k, psBbuIo->nInstanceNum);
425 for (i = 0; i < psBbuIo->nInstanceNum; i++){
426 printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[0][i]);
430 printf("Sucess xran_mm_init \n");
431 gpXranLibConfig = (XranLibConfigStruct*)malloc(sizeof(XranLibConfigStruct));
432 ptrLibConfig = gpXranLibConfig;
436 ptrLibConfig->nDriverCoreId = psBbuIo->nDriverCoreId;
437 ptrLibConfig->pFecInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FEC][0]);
438 ptrLibConfig->pFthInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FRONTHAUL][0]);
439 ptrLibConfig->nTimingAdvance = psFPGAInitPara->nTimeAdvance;
440 ptrLibConfig->nFhConfig = psFPGAInitPara->nEthPorts;
441 ptrLibConfig->nFhBufIntFlag = 0; //need init fronthaul buffer, then set to 1.
442 ptrLibConfig->nNrofSfInFrame = NUM_OF_SUBFRAME_PER_FRAME;
443 ptrLibConfig->nNrOfSlotInSf = pConfigParams->nNumOfSlotPerSubframe;
444 if (pConfigParams->nNumerology < 3)
446 ptrLibConfig->nSectorNum = psFPGAInitPara->nSecNum;
452 printf ("could not allocate ptrLibConfig in init_xran\n");
456 printf("nSectorNum %d\n", nSectorNum);
459 for(i = 0; i<nSectorNum; i++)
461 eInterfaceType = XRANFTHTX_OUT;
462 printf("nSectorIndex[%d] = %d\n",i, nSectorIndex[i]);
463 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
464 XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
465 if(XRAN_STATUS_SUCCESS != status) {
466 rte_panic("Failed at xran_bm_init , status %d\n", status);
468 for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
470 for(z = 0; z < xran_max_antenna_nr; z++){
471 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;
472 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
473 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
474 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
475 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
476 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxBuffers[j][i][z][0];
478 for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
480 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol
481 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
482 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
483 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
484 if(XRAN_STATUS_SUCCESS != status){
485 rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
487 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
488 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
491 u32dptr = (uint32_t*)(ptr);
492 memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);
493 // ptr_temp[0] = j; // TTI
494 // ptr_temp[1] = i; // Sec
495 // ptr_temp[2] = z; // Ant
496 // ptr_temp[3] = k; // sym
503 eInterfaceType = XRANFTHTX_SEC_DESC_OUT;
504 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
505 XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
506 if(XRAN_STATUS_SUCCESS != status) {
507 rte_panic("Failed at xran_bm_init , status %d\n", status);
510 eInterfaceType = XRANFTHTX_PRB_MAP_OUT;
511 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
512 XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));
513 if(XRAN_STATUS_SUCCESS != status) {
514 rte_panic("Failed at xran_bm_init , status %d\n", status);
517 for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
519 for(z = 0; z < xran_max_antenna_nr; z++){
520 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
521 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
522 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
523 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
524 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
525 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxPrbMapBuffers[j][i][z];
528 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
529 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
530 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
531 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
532 if(XRAN_STATUS_SUCCESS != status) {
533 rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
535 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
536 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
542 struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
543 if (startupConfiguration.appMode == APP_O_DU)
544 memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));
546 memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));
548 for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){
549 struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
550 for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
551 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb);
552 if(XRAN_STATUS_SUCCESS != status){
553 rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);
555 pPrbElem->p_sec_desc[k] = sd_ptr;
556 memset(sd_ptr,0,sizeof(struct xran_section_desc));
565 for(i = 0; i<nSectorNum; i++)
567 eInterfaceType = XRANFTHRX_IN;
568 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
569 if(XRAN_STATUS_SUCCESS != status)
571 printf("Failed at xran_bm_init, status %d\n", status);
572 iAssert(status == XRAN_STATUS_SUCCESS);
575 for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)
577 for(z = 0; z < xran_max_antenna_nr; z++){
578 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;
579 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
580 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
581 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
582 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
583 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxBuffers[j][i][z][0];
584 for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
586 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nFpgaToSW_FTH_RxBufferLen; // 1 symbols 3200bytes
587 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
588 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
589 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
590 if(XRAN_STATUS_SUCCESS != status) {
591 rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
593 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
594 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;
596 u32dptr = (uint32_t*)(ptr);
597 uint8_t *ptr_temp = (uint8_t *)ptr;
598 memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen);
599 // ptr_temp[0] = j; // TTI
600 // ptr_temp[1] = i; // Sec
601 // ptr_temp[2] = z; // Ant
602 // ptr_temp[3] = k; // sym
609 eInterfaceType = XRANFTHTX_SEC_DESC_IN;
610 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
611 XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
612 if(XRAN_STATUS_SUCCESS != status) {
613 rte_panic("Failed at xran_bm_init , status %d\n", status);
615 eInterfaceType = XRANFTHRX_PRB_MAP_IN;
616 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
617 XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));
618 if(XRAN_STATUS_SUCCESS != status) {
619 rte_panic("Failed at xran_bm_init, status %d\n", status);
622 for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
623 for(z = 0; z < xran_max_antenna_nr; z++){
624 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
625 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
626 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
627 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
628 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
629 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxPrbMapBuffers[j][i][z];
631 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
632 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
633 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
634 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
635 if(XRAN_STATUS_SUCCESS != status) {
636 rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
638 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
639 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
644 struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
646 if (startupConfiguration.appMode == APP_O_DU)
647 memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));
649 memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));
651 for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){
652 struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
653 for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
654 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb);
655 if(XRAN_STATUS_SUCCESS != status){
656 rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);
658 pPrbElem->p_sec_desc[k] = sd_ptr;
659 memset(sd_ptr,0,sizeof(struct xran_section_desc));
669 // add prach rx buffer
670 for(i = 0; i<nSectorNum; i++)
672 eInterfaceType = XRANFTHRACH_IN;
673 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
674 if(XRAN_STATUS_SUCCESS != status) {
675 rte_panic("Failed at xran_bm_init, status %d\n", status);
677 for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)
679 for(z = 0; z < xran_max_antenna_nr; z++){
680 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;
681 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
682 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
683 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
684 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = xran_max_antenna_nr; // ant number.
685 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHPrachRxBuffers[j][i][z][0];
686 for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
688 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;
689 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
690 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
691 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
692 if(XRAN_STATUS_SUCCESS != status) {
693 rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);
695 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
696 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
698 u32dptr = (uint32_t*)(ptr);
699 memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
706 /* add SRS rx buffer */
707 for(i = 0; i<nSectorNum && xran_max_ant_array_elm_nr; i++)
709 eInterfaceType = XRANSRS_IN;
710 status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
711 XRAN_N_FE_BUF_LEN*xran_max_ant_array_elm_nr*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
713 if(XRAN_STATUS_SUCCESS != status) {
714 rte_panic("Failed at xran_bm_init, status %d\n", status);
716 for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
718 for(z = 0; z < xran_max_ant_array_elm_nr; z++){
719 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;
720 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
721 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
722 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
723 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = xran_max_ant_array_elm_nr; /* ant number */
724 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHSrsRxBuffers[j][i][z][0];
725 for(k = 0; k < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; k++)
727 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen;
728 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
729 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
730 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
731 if(XRAN_STATUS_SUCCESS != status) {
732 rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);
734 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
735 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
737 u32dptr = (uint32_t*)(ptr);
738 memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);
745 for(i=0; i<nSectorNum; i++)
747 for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
749 for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
750 pFthTxBuffer[i][z][j] = NULL;
751 pFthTxPrbMapBuffer[i][z][j] = NULL;
752 pFthRxBuffer[i][z][j] = NULL;
753 pFthRxPrbMapBuffer[i][z][j] = NULL;
754 pFthRxRachBuffer[i][z][j] = NULL;
756 for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){
757 pFthRxSrsBuffer[i][z][j] = NULL;
762 for(i=0; i<nSectorNum; i++)
764 for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
766 for(z = 0; z < xran_max_antenna_nr; z++){
767 pFthTxBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
768 pFthTxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
769 pFthRxBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
770 pFthRxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
771 pFthRxRachBuffer[i][z][j] = &(psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
774 for(z = 0; z < xran_max_ant_array_elm_nr && xran_max_ant_array_elm_nr; z++){
775 pFthRxSrsBuffer[i][z][j] = &(psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);
780 if(NULL != psBbuIo->nInstanceHandle[0])
782 /* add pusch callback */
783 for (i = 0; i<nSectorNum; i++)
785 xran_5g_fronthault_config (psBbuIo->nInstanceHandle[0][i],
787 pFthTxPrbMapBuffer[i],
789 pFthRxPrbMapBuffer[i],
790 xran_fh_rx_callback, &pFthRxBuffer[i][0]);
793 /* add prach callback here */
794 for (i = 0; i<nSectorNum; i++)
796 xran_5g_prach_req(psBbuIo->nInstanceHandle[0][i], pFthRxRachBuffer[i],
797 xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
800 /* add SRS callback here */
801 for (i = 0; i<nSectorNum && xran_max_ant_array_elm_nr; i++) {
802 xran_5g_srs_req(psBbuIo->nInstanceHandle[0][i], pFthRxSrsBuffer[i],
803 xran_fh_rx_srs_callback,&pFthRxSrsBuffer[i][0]);
806 ptrLibConfig->nFhBufIntFlag = 1;
812 int init_xran_iq_content(void)
814 BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
815 xran_status_t status;
816 int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
818 int32_t cc_id, ant_id, sym_id, tti;
821 uint8_t frame_id = 0;
822 uint8_t subframe_id = 0;
831 uint32_t xran_max_antenna_nr = RTE_MAX(startupConfiguration.numAxc, startupConfiguration.numUlAxc);
832 uint32_t xran_max_ant_array_elm_nr = RTE_MAX(startupConfiguration.antElmTRx, xran_max_antenna_nr);
835 struct xran_prb_map *pRbMap = NULL;
837 for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
839 nSectorIndex[nSectorNum] = nSectorNum;
841 nSectorNum = numCCPorts;
842 printf ("init_xran_iq_content\n");
845 for(cc_id = 0; cc_id <nSectorNum; cc_id++)
847 for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {
848 for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++){
849 for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
851 if(startupConfiguration.appMode == APP_O_DU)
852 flowId = startupConfiguration.numAxc * cc_id + ant_id;
854 flowId = startupConfiguration.numUlAxc * cc_id + ant_id;
856 if(p_tx_play_buffer[flowId]){
858 pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
860 if (xranInit.DynamicSectionEna == 0){
861 pRbMap->dir = XRAN_DIR_DL;
862 pRbMap->xran_port = 0;
864 pRbMap->cc_id = cc_id;
865 pRbMap->ru_port_id = ant_id;
866 pRbMap->tti_id = tti;
867 pRbMap->start_sym_id = 0;
869 pRbMap->prbMap[0].nStartSymb = 0;
870 pRbMap->prbMap[0].numSymb = 14;
871 pRbMap->prbMap[0].nRBStart = 0;
872 pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;
873 pRbMap->prbMap[0].nBeamIndex = 0;
874 pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
875 pRbMap->prbMap[0].iqWidth = 16;
876 } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
877 && startupConfiguration.appMode == APP_O_DU
878 && sym_id == 0){ /* BF Ws are per slot */
880 char* dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];
881 struct xran_prb_elm* p_pRbMapElm = NULL;
882 for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
883 p_pRbMapElm = &pRbMap->prbMap[idxElm];
884 p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;
885 if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){
886 int16_t ext_len = 9600;
887 int16_t ext_sec_total = 0;
888 int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);
889 int8_t * ext_buf_start = ext_buf;
891 ext_buf += (RTE_PKTMBUF_HEADROOM +
892 sizeof (struct xran_ecpri_hdr) +
893 sizeof(struct xran_cp_radioapp_common_header) +
894 sizeof(struct xran_cp_radioapp_section1));
896 ext_len -= (RTE_PKTMBUF_HEADROOM +
897 sizeof(struct xran_ecpri_hdr) +
898 sizeof(struct xran_cp_radioapp_common_header) +
899 sizeof(struct xran_cp_radioapp_section1));
901 ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,
903 (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),
904 p_pRbMapElm->nRBSize,
905 pXranConf->nAntElmTRx,
906 p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);
907 if(ext_sec_total > 0){
908 p_pRbMapElm->bf_weight.p_ext_start = ext_buf_start;
909 p_pRbMapElm->bf_weight.p_ext_section = ext_buf;
910 p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;
912 rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);
915 rte_panic("xran_malloc return NULL\n");
921 printf("DL pRbMap ==NULL\n");
925 pos = ((char*)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];
926 ptr = psBbuIo->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
930 u8dptr = (uint8_t*)ptr;
931 int16_t payload_len = 0;
933 uint8_t *dst = (uint8_t *)u8dptr;
934 uint8_t *src = (uint8_t *)pos;
935 struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm];
936 dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
937 for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
938 struct xran_section_desc *p_sec_desc = NULL;
939 p_prbMapElm = &pRbMap->prbMap[idxElm];
940 p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];
942 if(p_sec_desc == NULL){
943 printf ("p_sec_desc == NULL\n");
946 src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L);
948 if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
949 payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
950 rte_memcpy(dst, src, payload_len);
952 } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
953 struct xranlib_compress_request bfp_com_req;
954 struct xranlib_compress_response bfp_com_rsp;
956 memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
957 memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
959 bfp_com_req.data_in = (int16_t*)src;
960 bfp_com_req.numRBs = p_prbMapElm->nRBSize;
961 bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
962 bfp_com_req.compMethod = p_prbMapElm->compMethod;
963 bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
965 bfp_com_rsp.data_out = (int8_t*)dst;
968 xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
969 payload_len = bfp_com_rsp.len;
972 printf ("p_prbMapElm->compMethod == %d is not supported\n",
973 p_prbMapElm->compMethod);
977 /* update RB map for given element */
978 p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
979 p_sec_desc->iq_buffer_len = payload_len;
981 /* add headroom for ORAN headers between IQs for chunk of RBs*/
983 dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
987 printf("ptr ==NULL\n");
992 pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
994 if (xranInit.DynamicSectionEna == 0){
995 pRbMap->dir = XRAN_DIR_UL;
996 pRbMap->xran_port = 0;
998 pRbMap->cc_id = cc_id;
999 pRbMap->ru_port_id = ant_id;
1000 pRbMap->tti_id = tti;
1001 pRbMap->start_sym_id = 0;
1002 pRbMap->nPrbElm = 1;
1003 pRbMap->prbMap[0].nRBStart = 0;
1004 pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;
1005 pRbMap->prbMap[0].nStartSymb = 0;
1006 pRbMap->prbMap[0].numSymb = 14;
1007 pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_offset = 0;
1008 pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_len = pXranConf->nULRBs *4L;
1009 pRbMap->prbMap[0].nBeamIndex = 0;
1010 pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
1011 } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
1012 && startupConfiguration.appMode == APP_O_DU
1015 char * ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
1016 struct xran_prb_elm* p_pRbMapElm = NULL;
1018 for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
1019 p_pRbMapElm = &pRbMap->prbMap[idxElm];
1020 p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;
1021 if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){
1022 int16_t ext_len = 9600;
1023 int16_t ext_sec_total = 0;
1024 int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);
1025 int8_t * ext_buf_start = ext_buf;
1027 int16_t *ptr = NULL;
1031 ext_buf += (RTE_PKTMBUF_HEADROOM +
1032 sizeof(struct xran_ecpri_hdr) +
1033 sizeof(struct xran_cp_radioapp_section1_header) +
1034 sizeof(struct xran_cp_radioapp_section1));
1036 ext_len -= (RTE_PKTMBUF_HEADROOM +
1037 sizeof(struct xran_ecpri_hdr) +
1038 sizeof(struct xran_cp_radioapp_section1_header) +
1039 sizeof(struct xran_cp_radioapp_section1));
1041 ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4);
1042 ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,
1044 (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),
1045 p_pRbMapElm->nRBSize,
1046 pXranConf->nAntElmTRx,
1047 p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);
1048 if(ext_sec_total > 0){
1049 p_pRbMapElm->bf_weight.p_ext_start = ext_buf_start;
1050 p_pRbMapElm->bf_weight.p_ext_section = ext_buf;
1051 p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;
1053 rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);
1056 rte_panic("xran_malloc return NULL\n");
1062 printf("DL pRbMap ==NULL\n");
1066 tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4;
1068 if(tx_play_buffer_position[flowId] >= tx_play_buffer_size[flowId])
1069 tx_play_buffer_position[flowId] = 0;
1071 if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
1072 && startupConfiguration.appMode == APP_O_DU
1074 tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4;
1075 if(tx_dl_bfw_buffer_position[flowId] >= tx_dl_bfw_buffer_size[flowId])
1076 tx_dl_bfw_buffer_position[flowId] = 0;
1078 tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4;
1079 if(tx_ul_bfw_buffer_position[flowId] >= tx_ul_bfw_buffer_size[flowId])
1080 tx_ul_bfw_buffer_position[flowId] = 0;
1083 //printf("flowId %d\n", flowId);
1088 /* prach TX for RU only */
1089 if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1090 for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++){
1091 for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
1092 flowId = startupConfiguration.numAxc*cc_id + ant_id;
1094 if(p_tx_prach_play_buffer[flowId]){
1095 pos = ((char*)p_tx_prach_play_buffer[flowId]);
1097 ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1100 u32dptr = (uint32_t*)(ptr);
1101 /* duplicate full PRACH (repetition * occassions ) in every symbol */
1102 memset(u32dptr,0 , PRACH_PLAYBACK_BUFFER_BYTES);
1103 rte_memcpy(u32dptr, pos, RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, tx_prach_play_buffer_size[flowId]));
1106 printf("ptr ==NULL\n");
1109 //printf("flowId %d\n", flowId);
1115 /* SRS TX for RU only */
1116 if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
1117 for(ant_id = 0; ant_id < xran_max_ant_array_elm_nr; ant_id++){
1118 for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) {
1119 flowId = startupConfiguration.antElmTRx*cc_id + ant_id;
1121 if(p_tx_srs_play_buffer[flowId]){
1122 pos = ((char*)p_tx_srs_play_buffer[flowId]) + tx_srs_play_buffer_position[flowId];
1123 ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1125 if(startupConfiguration.srsSymMask & (1 << sym_id) ){
1127 u32dptr = (uint32_t*)(ptr);
1128 memset(u32dptr,0 , pXranConf->nULRBs*N_SC_PER_PRB*4);
1129 rte_memcpy(u32dptr, pos, pXranConf->nULRBs*N_SC_PER_PRB*4);
1132 printf("ptr ==NULL\n");
1136 tx_srs_play_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
1138 if(tx_srs_play_buffer_position[flowId] >= tx_srs_play_buffer_size[flowId])
1139 tx_srs_play_buffer_position[flowId] = 0;
1141 //printf("flowId %d\n", flowId);
1152 void stop_xran(void)
1154 xran_status_t status = 0;
1155 SWXRANInterfaceTypeEnum eInterfaceType;
1157 free(gpXranLibConfig);
1158 gpXranLibConfig = NULL;
1160 status += xran_mm_destroy(xranHandle)*2;
1162 if(XRAN_STATUS_SUCCESS != status)
1164 printf("Failed at xran_mm_destroy, status %d\n",status);
1165 iAssert(status == XRAN_STATUS_SUCCESS);
1169 int get_xran_iq_content(void)
1171 BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
1172 xran_status_t status;
1173 int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
1175 int32_t cc_id, ant_id, sym_id, tti;
1178 uint8_t frame_id = 0;
1179 uint8_t subframe_id = 0;
1180 uint8_t slot_id = 0;
1188 uint32_t xran_max_antenna_nr = RTE_MAX(startupConfiguration.numAxc, startupConfiguration.numUlAxc);
1189 uint32_t xran_max_ant_array_elm_nr = RTE_MAX(startupConfiguration.antElmTRx, xran_max_antenna_nr);
1193 for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
1195 nSectorIndex[nSectorNum] = nSectorNum;
1197 nSectorNum = numCCPorts;
1198 printf ("get_xran_iq_content\n");
1201 for(cc_id = 0; cc_id <nSectorNum; cc_id++)
1203 for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++) {
1204 for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++){
1206 struct xran_prb_map *pRbMap = NULL;
1207 struct xran_prb_elm *pRbElm = NULL;
1208 struct xran_section_desc *p_sec_desc = NULL;
1209 pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
1213 if(startupConfiguration.appMode == APP_O_RU)
1214 flowId = startupConfiguration.numAxc * cc_id + ant_id;
1216 flowId = startupConfiguration.numUlAxc * cc_id + ant_id;
1218 for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
1219 pRbElm = &pRbMap->prbMap[0];
1220 if(pRbMap->nPrbElm == 1){
1221 if(p_rx_log_buffer[flowId]) {
1222 pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];
1223 ptr = psBbuIo->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1225 u32dptr = (uint32_t*)(ptr);
1226 rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L);
1228 printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id);
1232 for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) {
1233 pRbElm = &pRbMap->prbMap[idxElm];
1234 p_sec_desc = pRbElm->p_sec_desc[sym_id];
1235 if(p_rx_log_buffer[flowId] && p_sec_desc){
1236 if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){
1237 pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];
1238 ptr = p_sec_desc->pData;
1240 int32_t payload_len = 0;
1241 u32dptr = (uint32_t*)(ptr);
1242 if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){
1243 struct xranlib_decompress_request bfp_decom_req;
1244 struct xranlib_decompress_response bfp_decom_rsp;
1246 memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));
1247 memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));
1249 bfp_decom_req.data_in = (int8_t *)u32dptr;
1250 bfp_decom_req.numRBs = pRbElm->nRBSize;
1251 bfp_decom_req.len = (3* pRbElm->iqWidth + 1)*pRbElm->nRBSize;
1252 bfp_decom_req.compMethod = pRbElm->compMethod;
1253 bfp_decom_req.iqWidth = pRbElm->iqWidth;
1255 bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4);
1256 bfp_decom_rsp.len = 0;
1258 xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp);
1259 payload_len = bfp_decom_rsp.len;
1262 rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4);
1269 rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
1271 if(rx_log_buffer_position[flowId] >= rx_log_buffer_size[flowId])
1272 rx_log_buffer_position[flowId] = 0;
1275 /* prach RX for O-DU only */
1276 if(startupConfiguration.appMode == APP_O_DU) {
1277 flowId = startupConfiguration.numAxc * cc_id + ant_id;
1278 for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++){
1279 if(p_prach_log_buffer[flowId]){
1280 /* (0-79 slots) 10ms of IQs */
1281 pos = ((char*)p_prach_log_buffer[flowId]) + prach_log_buffer_position[flowId];
1282 ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; //8192 144
1284 u32dptr = (uint32_t*)(ptr);
1285 rte_memcpy(pos, u32dptr, PRACH_PLAYBACK_BUFFER_BYTES);
1287 printf("ptr ==NULL\n");
1289 prach_log_buffer_position[flowId] += PRACH_PLAYBACK_BUFFER_BYTES;
1291 if(prach_log_buffer_position[flowId] >= prach_log_buffer_size[flowId])
1292 prach_log_buffer_position[flowId] = 0;
1294 //printf("flowId %d\n", flowId);
1300 /* SRS RX for O-DU only */
1301 if(startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs) {
1302 for(ant_id = 0; ant_id < xran_max_ant_array_elm_nr; ant_id++){
1303 flowId = startupConfiguration.antElmTRx*cc_id + ant_id;
1304 for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++){
1305 if(p_srs_log_buffer[flowId]){
1306 pos = ((char*)p_srs_log_buffer[flowId]) + srs_log_buffer_position[flowId];
1307 ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1309 u32dptr = (uint32_t*)(ptr);
1310 rte_memcpy(pos, u32dptr, pXranConf->nULRBs*N_SC_PER_PRB*4);
1312 printf("ptr ==NULL\n");
1314 srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
1316 if(srs_log_buffer_position[flowId] >= srs_log_buffer_size[flowId])
1317 srs_log_buffer_position[flowId] = 0;
1319 //printf("flowId %d\n", flowId);
1330 void version_print(void)
1332 char sysversion[100];
1333 char *compilation_date = __DATE__;
1334 char *compilation_time = __TIME__;
1338 snprintf(sysversion, 99, "Version: %s", VERSIONX);
1339 nLen = strlen(sysversion);
1342 printf("===========================================================================================================\n");
1343 printf("SAMPLE-APP VERSION\n");
1344 printf("===========================================================================================================\n");
1346 printf("%s\n", sysversion);
1347 printf("build-date: %s\n", compilation_date);
1348 printf("build-time: %s\n", compilation_time);
1351 static void app_Help(void)
1353 char help_content[] = \
1354 "sample application\n\n"\
1355 "Usage: sample-app config_file_o_du.dat -p 2 0000:21:02.0 0000:21:02.1 0000:21:0a.0 0000:21:0a.1\n\n"\
1356 "supports the following parameters:\n\n"\
1357 "-p | --num_eth_pfs <number of ETH ports to connect to O-RU|O-DU> 1 - default sanity test\n"
1358 "-c | --cfgfile <name of cfg file>\n"\
1359 "-h | --help print usage\n";
1361 printf("%s", help_content);
1365 *******************************************************************************
1367 * @fn app_parse_args
1368 * @brief is used to parse incoming app args
1370 * @param[i] argc - app arg count
1371 * @param[i] argv - array of args
1372 * @param[o] params - app startup params filled basing on args parse
1373 * @return number of parsed args
1376 * The routine is parse input args and convert them into app startup params
1381 * @ingroup icc_service_unit_test
1383 ******************************************************************************/
1384 static int app_parse_args(int argc, char ** argv, struct sample_app_params* params)
1390 struct option long_options[] = {
1391 {"cfgfile", required_argument, 0, 'c'},
1392 {"num_eth_pfs", required_argument, 0, 'p'},
1393 {"help", no_argument, 0, 'h'},
1397 memset(params, 0, sizeof (*params));
1400 //int this_option_optind = optind ? optind : 1;
1401 int option_index = 0;
1403 c = getopt_long(argc, argv, "c:p:h", long_options, &option_index);
1412 case 'p': // test Case selection
1413 pInt = ¶ms->num_vfs;
1416 params->cfg_file = optarg;
1423 if (pInt && optarg) {
1425 if (optarg[0] == '0' && (optarg[1] == 'x' || optarg[1] == 'X')) {
1426 sscanf(optarg, "%x", (unsigned *) pInt);
1428 *pInt = atoi(optarg);
1435 int32_t app_init_set_eAxCId_conf(struct xran_eaxcid_config *p_eAxC_cfg, RuntimeConfig * p_s_cfg)
1440 if(p_s_cfg->DU_Port_ID_bitwidth && p_s_cfg->BandSector_ID_bitwidth && p_s_cfg->CC_ID_bitwidth
1441 && p_s_cfg->RU_Port_ID_bitwidth &&
1442 (p_s_cfg->DU_Port_ID_bitwidth + p_s_cfg->BandSector_ID_bitwidth + p_s_cfg->CC_ID_bitwidth
1443 + p_s_cfg->RU_Port_ID_bitwidth) == 16 /* eAxC ID subfields are 16 bits */
1444 ){ /* bit mask provided */
1447 p_eAxC_cfg->bit_ruPortId = 0;
1448 for (shift = 0; shift < p_s_cfg->RU_Port_ID_bitwidth; shift++){
1451 p_eAxC_cfg->mask_ruPortId = mask;
1453 p_eAxC_cfg->bit_ccId = p_s_cfg->RU_Port_ID_bitwidth;
1455 for (shift = p_s_cfg->RU_Port_ID_bitwidth; shift < p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth; shift++){
1458 p_eAxC_cfg->mask_ccId = mask;
1461 p_eAxC_cfg->bit_bandSectorId = p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth;
1463 for (shift = p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth; shift < p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth + p_s_cfg->BandSector_ID_bitwidth; shift++){
1466 p_eAxC_cfg->mask_bandSectorId = mask;
1468 p_eAxC_cfg->bit_cuPortId = p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth + p_s_cfg->BandSector_ID_bitwidth;
1470 for (shift = p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth + p_s_cfg->BandSector_ID_bitwidth;
1471 shift < p_s_cfg->RU_Port_ID_bitwidth + p_s_cfg->CC_ID_bitwidth + p_s_cfg->BandSector_ID_bitwidth + p_s_cfg->DU_Port_ID_bitwidth; shift++){
1474 p_eAxC_cfg->mask_cuPortId = mask;
1477 } else { /* bit mask config is not provided */
1478 switch (p_s_cfg->xranCat){
1479 case XRAN_CATEGORY_A: {
1480 p_eAxC_cfg->mask_cuPortId = 0xf000;
1481 p_eAxC_cfg->mask_bandSectorId = 0x0f00;
1482 p_eAxC_cfg->mask_ccId = 0x00f0;
1483 p_eAxC_cfg->mask_ruPortId = 0x000f;
1484 p_eAxC_cfg->bit_cuPortId = 12;
1485 p_eAxC_cfg->bit_bandSectorId = 8;
1486 p_eAxC_cfg->bit_ccId = 4;
1487 p_eAxC_cfg->bit_ruPortId = 0;
1490 case XRAN_CATEGORY_B: {
1491 p_eAxC_cfg->mask_cuPortId = 0xf000;
1492 p_eAxC_cfg->mask_bandSectorId = 0x0c00;
1493 p_eAxC_cfg->mask_ccId = 0x0300;
1494 p_eAxC_cfg->mask_ruPortId = 0x00ff; /* more than [0-127] eAxC */
1495 p_eAxC_cfg->bit_cuPortId = 12;
1496 p_eAxC_cfg->bit_bandSectorId = 10;
1497 p_eAxC_cfg->bit_ccId = 8;
1498 p_eAxC_cfg->bit_ruPortId = 0;
1502 rte_panic("Incorrect Category\n");
1506 if(p_s_cfg->xranCat == XRAN_CATEGORY_A)
1507 p_s_cfg->numUlAxc = p_s_cfg->numAxc;
1509 printf("bit_cuPortId %2d mask 0x%04x\n",p_eAxC_cfg->bit_cuPortId, p_eAxC_cfg->mask_cuPortId);
1510 printf("bit_bandSectorId %2d mask 0x%04x\n",p_eAxC_cfg->bit_bandSectorId, p_eAxC_cfg->mask_bandSectorId);
1511 printf("bit_ccId %2d mask 0x%04x\n",p_eAxC_cfg->bit_ccId, p_eAxC_cfg->mask_ccId);
1512 printf("ruPortId %2d mask 0x%04x\n",p_eAxC_cfg->bit_ruPortId, p_eAxC_cfg->mask_ruPortId);
1517 int main(int argc, char *argv[])
1523 char prefix_name[256];
1524 uint32_t nCenterFreq;
1526 struct stat st = {0};
1527 uint32_t filenameLength = strlen(argv[1]);
1528 enum xran_if_state xran_curr_if_state = XRAN_INIT;
1529 struct sample_app_params arg_params;
1532 uint64_t nTotalTime;
1537 app_parse_args(argc, argv, &arg_params);
1539 if( (arg_params.num_vfs % 2) != 0 || arg_params.num_vfs >= XRAN_VF_MAX){
1540 printf("warning: arg_params.num_vfs is not correct\n");
1544 if (argc == 3 + arg_params.num_vfs){
1545 printf("Need at least two argument - the PCI address of the network port");
1549 if (filenameLength >= 256)
1551 printf("Config file name input is too long, exiting!\n");
1558 printf("arg_params.cfg_file (%s)\n", arg_params.cfg_file);
1559 len = strlen(arg_params.cfg_file) + 1;
1560 if (len > (sizeof(filename) - 10))
1561 len = (sizeof(filename) - 10);
1562 strncpy(filename, arg_params.cfg_file, (sizeof(filename) - 10));
1563 filename[len] = '\0';
1565 if (xran_is_synchronized() != 0)
1566 printf("Machine is not synchronized using PTP!\n");
1568 printf("Machine is synchronized using PTP!\n");
1570 memset(&startupConfiguration, 0, sizeof(RuntimeConfig));
1572 if (parseConfigFile(filename, (RuntimeConfig*)&startupConfiguration) != 0) {
1573 printf("Configuration file error.\n");
1577 if(startupConfiguration.ant_file[0] == NULL){
1578 printf("it looks like test vector for antennas were not provided\n");
1582 if (startupConfiguration.numCC > XRAN_MAX_SECTOR_NR) {
1583 printf("Number of cells %d exceeds max number supported %d!\n", startupConfiguration.numCC, XRAN_MAX_SECTOR_NR);
1584 startupConfiguration.numCC = XRAN_MAX_SECTOR_NR;
1587 if (startupConfiguration.antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {
1588 printf("Number of Antenna elements %d exceeds max number supported %d!\n", startupConfiguration.antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);
1589 startupConfiguration.antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;
1592 numCCPorts = startupConfiguration.numCC;
1593 num_eAxc = startupConfiguration.numAxc;
1595 printf("numCCPorts %d num_eAxc%d\n", numCCPorts, num_eAxc);
1597 if (startupConfiguration.mu_number <= 1){
1598 nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/
1599 nFpgaToSW_PRACH_RxBufferLen = 8192;
1600 nSW_ToFpga_FTH_TxBufferLen = 13168 + /* 273*12*4 + 64* + ETH AND ORAN HDRs */
1601 XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct rte_ether_hdr) +
1602 sizeof(struct xran_ecpri_hdr) +
1603 sizeof(struct radio_app_common_hdr) +
1604 sizeof(struct data_section_hdr));
1605 } else if (startupConfiguration.mu_number == 3){
1606 nFpgaToSW_FTH_RxBufferLen = 3328;
1607 nFpgaToSW_PRACH_RxBufferLen = 8192;
1608 nSW_ToFpga_FTH_TxBufferLen = 3328 +
1609 XRAN_MAX_SECTIONS_PER_SYM * (RTE_PKTMBUF_HEADROOM + sizeof(struct rte_ether_hdr) +
1610 sizeof(struct xran_ecpri_hdr) +
1611 sizeof(struct radio_app_common_hdr) +
1612 sizeof(struct data_section_hdr));
1614 printf("given numerology is not supported %d\n", startupConfiguration.mu_number);
1617 printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen);
1619 memset(&xranInit, 0, sizeof(struct xran_fh_init));
1621 if(startupConfiguration.appMode == APP_O_DU) {
1622 printf("set O-DU\n");
1623 xranInit.io_cfg.id = 0;/* O-DU */
1624 xranInit.io_cfg.core = startupConfiguration.io_core;
1625 xranInit.io_cfg.system_core = startupConfiguration.system_core;
1626 xranInit.io_cfg.pkt_proc_core = startupConfiguration.io_worker; /* do not start */
1627 xranInit.io_cfg.pkt_aux_core = 0; /* do not start*/
1628 xranInit.io_cfg.timing_core = startupConfiguration.io_core;
1629 xranInit.io_cfg.dpdkIoVaMode = startupConfiguration.iova_mode;
1631 printf("set O-RU\n");
1632 xranInit.io_cfg.id = 1; /* O-RU*/
1633 xranInit.io_cfg.core = startupConfiguration.io_core;
1634 xranInit.io_cfg.system_core = startupConfiguration.system_core;
1635 xranInit.io_cfg.pkt_proc_core = startupConfiguration.io_worker; /* do not start */
1636 xranInit.io_cfg.pkt_aux_core = 0; /* do not start */
1637 xranInit.io_cfg.timing_core = startupConfiguration.io_core;
1638 xranInit.io_cfg.dpdkIoVaMode = startupConfiguration.iova_mode;
1641 xranInit.io_cfg.io_sleep = startupConfiguration.io_sleep;
1642 xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
1644 app_init_set_eAxCId_conf(&xranInit.eAxCId_conf, &startupConfiguration);
1646 printf("arg_params.num_vfs %d\n", arg_params.num_vfs);
1647 for(i = 0; i < arg_params.num_vfs/2; i++){
1648 xranInit.io_cfg.dpdk_dev[XRAN_UP_VF+2*i] = argv[5+2*i];
1649 printf("VF[%d] %s\n",XRAN_UP_VF+2*i, xranInit.io_cfg.dpdk_dev[XRAN_UP_VF+2*i]);
1650 xranInit.io_cfg.dpdk_dev[XRAN_UP_VF+2*i+1] = argv[5+2*i+1];
1651 printf("VF[%d] %s\n",XRAN_UP_VF+2*i+1, xranInit.io_cfg.dpdk_dev[XRAN_UP_VF+2*i+1]);
1654 xranInit.io_cfg.num_vfs = arg_params.num_vfs;
1655 xranInit.mtu = startupConfiguration.mtu;
1656 xranInit.p_o_du_addr = (int8_t *)startupConfiguration.o_du_addr;
1657 xranInit.p_o_ru_addr = (int8_t *)startupConfiguration.o_ru_addr;
1659 sprintf(prefix_name, "wls_%d",startupConfiguration.instance_id);
1660 xranInit.filePrefix = prefix_name;
1662 xranInit.totalBfWeights = startupConfiguration.totalBfWeights;
1664 xranInit.Tadv_cp_dl = startupConfiguration.Tadv_cp_dl;
1665 xranInit.T2a_min_cp_dl = startupConfiguration.T2a_min_cp_dl;
1666 xranInit.T2a_max_cp_dl = startupConfiguration.T2a_max_cp_dl;
1667 xranInit.T2a_min_cp_ul = startupConfiguration.T2a_min_cp_ul;
1668 xranInit.T2a_max_cp_ul = startupConfiguration.T2a_max_cp_ul;
1669 xranInit.T2a_min_up = startupConfiguration.T2a_min_up;
1670 xranInit.T2a_max_up = startupConfiguration.T2a_max_up;
1671 xranInit.Ta3_min = startupConfiguration.Ta3_min;
1672 xranInit.Ta3_max = startupConfiguration.Ta3_max;
1673 xranInit.T1a_min_cp_dl = startupConfiguration.T1a_min_cp_dl;
1674 xranInit.T1a_max_cp_dl = startupConfiguration.T1a_max_cp_dl;
1675 xranInit.T1a_min_cp_ul = startupConfiguration.T1a_min_cp_ul;
1676 xranInit.T1a_max_cp_ul = startupConfiguration.T1a_max_cp_ul;
1677 xranInit.T1a_min_up = startupConfiguration.T1a_min_up;
1678 xranInit.T1a_max_up = startupConfiguration.T1a_max_up;
1679 xranInit.Ta4_min = startupConfiguration.Ta4_min;
1680 xranInit.Ta4_max = startupConfiguration.Ta4_max;
1682 xranInit.enableCP = startupConfiguration.enableCP;
1683 xranInit.prachEnable = startupConfiguration.enablePrach;
1684 xranInit.srsEnable = startupConfiguration.enableSrs;
1685 xranInit.debugStop = startupConfiguration.debugStop;
1686 xranInit.debugStopCount = startupConfiguration.debugStopCount;
1687 xranInit.DynamicSectionEna = startupConfiguration.DynamicSectionEna;
1688 xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
1689 xranInit.GPS_Alpha = startupConfiguration.GPS_Alpha;
1690 xranInit.GPS_Beta = startupConfiguration.GPS_Beta;
1692 xranInit.cp_vlan_tag = startupConfiguration.cp_vlan_tag;
1693 xranInit.up_vlan_tag = startupConfiguration.up_vlan_tag;
1695 printf("IQ files size is %d slots\n", startupConfiguration.numSlots);
1697 iq_playback_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
1698 app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)
1701 iq_playback_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
1702 app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
1706 /* 10 * [14*32*273*2*2] = 4892160 bytes */
1707 iq_bfw_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * startupConfiguration.antElmTRx *
1708 app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)
1711 /* 10 * [14*32*273*2*2] = 4892160 bytes */
1712 iq_bfw_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT *
1713 app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
1716 /* 10 * [1*273*2*2] = 349440 bytes */
1717 iq_srs_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
1718 app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
1721 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1722 p_tx_play_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_dl);
1723 tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;
1725 if (p_tx_play_buffer[i] == NULL)
1728 tx_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ant_file[i],
1729 "DL IFFT IN IQ Samples in binary format",
1730 (uint8_t*) p_tx_play_buffer[i],
1731 tx_play_buffer_size[i],
1733 tx_play_buffer_position[i] = 0;
1736 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1737 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1739 p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);
1740 tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;
1742 if (p_tx_dl_bfw_buffer[i] == NULL)
1745 tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.dl_bfw_file[i],
1746 "DL BF weights IQ Samples in binary format",
1747 (uint8_t*) p_tx_dl_bfw_buffer[i],
1748 tx_dl_bfw_buffer_size[i],
1750 tx_dl_bfw_buffer_position[i] = 0;
1754 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1756 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1757 p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);
1758 tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;
1760 if (p_tx_ul_bfw_buffer[i] == NULL)
1763 tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_bfw_file[i],
1764 "UL BF weights IQ Samples in binary format",
1765 (uint8_t*) p_tx_ul_bfw_buffer[i],
1766 tx_ul_bfw_buffer_size[i],
1768 tx_ul_bfw_buffer_position[i] = 0;
1772 if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1773 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1774 p_tx_prach_play_buffer[i] = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);
1775 tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;
1777 if (p_tx_prach_play_buffer[i] == NULL)
1780 memset(p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);
1782 tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.prach_file[i],
1783 "PRACH IQ Samples in binary format",
1784 (uint8_t*) p_tx_prach_play_buffer[i],
1785 tx_prach_play_buffer_size[i],
1787 tx_prach_play_buffer_position[i] = 0;
1791 if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
1793 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1796 p_tx_srs_play_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);
1797 tx_srs_play_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;
1799 if (p_tx_srs_play_buffer[i] == NULL)
1802 memset(p_tx_srs_play_buffer[i], 0, iq_srs_buffer_size_ul);
1803 tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_srs_file[i],
1804 "SRS IQ Samples in binary format",
1805 (uint8_t*) p_tx_srs_play_buffer[i],
1806 tx_srs_play_buffer_size[i],
1809 tx_srs_play_buffer_position[i] = 0;
1814 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1816 p_rx_log_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_ul);
1817 rx_log_buffer_size[i] = (int32_t)iq_playback_buffer_size_ul;
1819 if (p_rx_log_buffer[i] == NULL)
1822 rx_log_buffer_position[i] = 0;
1824 memset(p_rx_log_buffer[i], 0, rx_log_buffer_size[i]);
1828 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1830 p_prach_log_buffer[i] = (int16_t*)malloc(startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);
1831 prach_log_buffer_size[i] = (int32_t)startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;
1833 if (p_prach_log_buffer[i] == NULL)
1836 memset(p_prach_log_buffer[i], 0, prach_log_buffer_size[i]);
1837 prach_log_buffer_position[i] = 0;
1841 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
1843 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1846 p_srs_log_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);
1847 srs_log_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;
1849 if (p_srs_log_buffer[i] == NULL)
1852 memset(p_srs_log_buffer[i], 0, iq_srs_buffer_size_ul);
1853 srs_log_buffer_position[i] = 0;
1857 if (stat("./logs", &st) == -1) {
1858 mkdir("./logs", 0777);
1861 for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1863 sprintf(filename, "./logs/%s-play_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1864 sys_save_buf_to_file_txt(filename,
1865 "DL IFFT IN IQ Samples in human readable format",
1866 (uint8_t*) p_tx_play_buffer[i],
1867 tx_play_buffer_size[i],
1870 sprintf(filename, "./logs/%s-play_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1871 sys_save_buf_to_file(filename,
1872 "DL IFFT IN IQ Samples in binary format",
1873 (uint8_t*) p_tx_play_buffer[i],
1874 tx_play_buffer_size[i]/sizeof(short),
1878 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1879 sprintf(filename, "./logs/%s-dl_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1880 sys_save_buf_to_file_txt(filename,
1881 "DL Beamformig weights IQ Samples in human readable format",
1882 (uint8_t*) p_tx_dl_bfw_buffer[i],
1883 tx_dl_bfw_buffer_size[i],
1886 sprintf(filename, "./logs/%s-dl_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1887 sys_save_buf_to_file(filename,
1888 "DL Beamformig weightsIQ Samples in binary format",
1889 (uint8_t*) p_tx_dl_bfw_buffer[i],
1890 tx_dl_bfw_buffer_size[i]/sizeof(short),
1894 sprintf(filename, "./logs/%s-ul_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1895 sys_save_buf_to_file_txt(filename,
1896 "UL Beamformig weights IQ Samples in human readable format",
1897 (uint8_t*) p_tx_ul_bfw_buffer[i],
1898 tx_ul_bfw_buffer_size[i],
1901 sprintf(filename, "./logs/%s-ul_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1902 sys_save_buf_to_file(filename,
1903 "UL Beamformig weightsIQ Samples in binary format",
1904 (uint8_t*) p_tx_ul_bfw_buffer[i],
1905 tx_ul_bfw_buffer_size[i]/sizeof(short),
1910 if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1911 sprintf(filename, "./logs/%s-play_prach_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1912 sys_save_buf_to_file_txt(filename,
1913 "PRACH IQ Samples in human readable format",
1914 (uint8_t*) p_tx_prach_play_buffer[i],
1915 tx_prach_play_buffer_size[i],
1918 sprintf(filename, "./logs/%s-play_prach_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1919 sys_save_buf_to_file(filename,
1920 "PRACH IQ Samples in binary format",
1921 (uint8_t*) p_tx_prach_play_buffer[i],
1922 tx_prach_play_buffer_size[i]/sizeof(short),
1927 if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1929 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1933 sprintf(filename, "./logs/%s-play_srs_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1934 sys_save_buf_to_file_txt(filename,
1935 "SRS IQ Samples in human readable format",
1936 (uint8_t*) p_tx_srs_play_buffer[i],
1937 tx_srs_play_buffer_size[i],
1940 sprintf(filename, "./logs/%s-play_srs_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1941 sys_save_buf_to_file(filename,
1942 "SRS IQ Samples in binary format",
1943 (uint8_t*) p_tx_srs_play_buffer[i],
1944 tx_srs_play_buffer_size[i]/sizeof(short),
1949 if (startupConfiguration.iqswap == 1){
1950 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1951 printf("TX: Swap I and Q to match RU format: [%d]\n",i);
1955 signed short *ptr = (signed short *) p_tx_play_buffer[i];
1958 for (j = 0; j < (int32_t)(tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
1960 ptr[j] = ptr[j + 1];
1964 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1965 printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);
1969 signed short *ptr = (signed short *) p_tx_dl_bfw_buffer[i];
1972 for (j = 0; j < (int32_t)(tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){
1974 ptr[j] = ptr[j + 1];
1978 printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);
1982 signed short *ptr = (signed short *) p_tx_ul_bfw_buffer[i];
1985 for (j = 0; j < (int32_t)(tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){
1987 ptr[j] = ptr[j + 1];
1994 if (startupConfiguration.appMode == APP_O_RU){
1995 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1996 printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);
2000 signed short *ptr = (signed short *) p_tx_prach_play_buffer[i];
2003 for (j = 0; j < (int32_t)(tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
2005 ptr[j] = ptr[j + 1];
2012 if (startupConfiguration.appMode == APP_O_RU){
2014 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2016 printf("SRS: Swap I and Q to match RU format: [%d]\n",i);
2020 signed short *ptr = (signed short *) p_tx_srs_play_buffer[i];
2023 for (j = 0; j < (int32_t)(tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
2025 ptr[j] = ptr[j + 1];
2034 for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2036 sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);
2037 sys_save_buf_to_file_txt(filename,
2038 "DL IFFT IN IQ Samples in human readable format",
2039 (uint8_t*) p_tx_play_buffer[i],
2040 tx_play_buffer_size[i],
2044 if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){
2045 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2046 printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
2047 for (j = 0; j < tx_play_buffer_size[i]/sizeof(short); j++){
2048 p_tx_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_play_buffer[i][j]);
2051 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
2052 printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
2053 for (j = 0; j < tx_dl_bfw_buffer_size[i]/sizeof(short); j++){
2054 p_tx_dl_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_dl_bfw_buffer[i][j]);
2056 printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
2057 for (j = 0; j < tx_ul_bfw_buffer_size[i]/sizeof(short); j++){
2058 p_tx_ul_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_ul_bfw_buffer[i][j]);
2063 if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
2064 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2065 printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
2066 for (j = 0; j < tx_prach_play_buffer_size[i]/sizeof(short); j++){
2067 p_tx_prach_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_prach_play_buffer[i][j]);
2072 if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
2074 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2076 printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
2077 for (j = 0; j < tx_srs_play_buffer_size[i]/sizeof(short); j++){
2078 p_tx_srs_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_srs_play_buffer[i][j]);
2086 for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2088 sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);
2089 sys_save_buf_to_file_txt(filename,
2090 "DL IFFT IN IQ Samples in human readable format",
2091 (uint8_t*) p_tx_play_buffer[i],
2092 tx_play_buffer_size[i],
2097 memset(&xranConf, 0, sizeof(struct xran_fh_config));
2098 pXranConf = &xranConf;
2100 pXranConf->nDLRBs = app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA);
2101 pXranConf->nULRBs = app_xran_get_num_rbs(startupConfiguration.xranTech, startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA);
2103 if(startupConfiguration.DynamicSectionEna == 0){
2104 struct xran_prb_map* pRbMap;
2106 pRbMap = &startupConfiguration.PrbMapDl;
2108 pRbMap->dir = XRAN_DIR_DL;
2109 pRbMap->xran_port = 0;
2110 pRbMap->band_id = 0;
2112 pRbMap->ru_port_id = 0;
2114 pRbMap->start_sym_id = 0;
2115 pRbMap->nPrbElm = 1;
2116 pRbMap->prbMap[0].nStartSymb = 0;
2117 pRbMap->prbMap[0].numSymb = 14;
2118 pRbMap->prbMap[0].nRBStart = 0;
2119 pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;
2120 pRbMap->prbMap[0].nBeamIndex = 0;
2121 pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
2122 pRbMap->prbMap[0].iqWidth = 16;
2124 pRbMap = &startupConfiguration.PrbMapUl;
2125 pRbMap->dir = XRAN_DIR_UL;
2126 pRbMap->xran_port = 0;
2127 pRbMap->band_id = 0;
2129 pRbMap->ru_port_id = 0;
2131 pRbMap->start_sym_id = 0;
2132 pRbMap->nPrbElm = 1;
2133 pRbMap->prbMap[0].nStartSymb = 0;
2134 pRbMap->prbMap[0].numSymb = 14;
2135 pRbMap->prbMap[0].nRBStart = 0;
2136 pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;
2137 pRbMap->prbMap[0].nBeamIndex = 0;
2138 pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
2139 pRbMap->prbMap[0].iqWidth = 16;
2141 struct xran_prb_map* pRbMap;
2142 pRbMap = &startupConfiguration.PrbMapDl;
2144 pRbMap->dir = XRAN_DIR_DL;
2145 pRbMap->xran_port = 0;
2146 pRbMap->band_id = 0;
2148 pRbMap->ru_port_id = 0;
2150 pRbMap->start_sym_id = 0;
2152 pRbMap = &startupConfiguration.PrbMapUl;
2153 pRbMap->dir = XRAN_DIR_UL;
2154 pRbMap->xran_port = 0;
2155 pRbMap->band_id = 0;
2157 pRbMap->ru_port_id = 0;
2159 pRbMap->start_sym_id = 0;
2162 timer_set_tsc_freq_from_clock();
2163 xret = xran_init(argc, argv, &xranInit, argv[0], &xranHandle);
2164 if(xret != XRAN_STATUS_SUCCESS){
2165 printf("xran_init failed %d\n", xret);
2169 if(xranHandle == NULL)
2173 pXranConf->sector_id = 0;
2174 pXranConf->nCC = numCCPorts;
2175 pXranConf->neAxc = num_eAxc;
2176 pXranConf->neAxcUl = startupConfiguration.numUlAxc;
2177 pXranConf->nAntElmTRx = startupConfiguration.antElmTRx;
2179 pXranConf->frame_conf.nFrameDuplexType = startupConfiguration.nFrameDuplexType;
2180 pXranConf->frame_conf.nNumerology = startupConfiguration.mu_number;
2181 pXranConf->frame_conf.nTddPeriod = startupConfiguration.nTddPeriod;
2183 for (i = 0; i < startupConfiguration.nTddPeriod; i++){
2184 pXranConf->frame_conf.sSlotConfig[i] = startupConfiguration.sSlotConfig[i];
2187 pXranConf->prach_conf.nPrachSubcSpacing = startupConfiguration.mu_number;
2188 pXranConf->prach_conf.nPrachFreqStart = 0;
2189 pXranConf->prach_conf.nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC;
2190 pXranConf->prach_conf.nPrachConfIdx = startupConfiguration.prachConfigIndex;
2191 pXranConf->prach_conf.nPrachFreqOffset = -792;
2193 pXranConf->srs_conf.symbMask = startupConfiguration.srsSymMask;
2194 pXranConf->srs_conf.eAxC_offset = 2 * startupConfiguration.numAxc; /* PUSCH, PRACH, SRS */
2196 pXranConf->ru_conf.xranTech = startupConfiguration.xranTech;
2197 pXranConf->ru_conf.xranCompHdrType = startupConfiguration.CompHdrType;
2198 pXranConf->ru_conf.xranCat = startupConfiguration.xranCat;
2199 pXranConf->ru_conf.iqWidth = startupConfiguration.PrbMapDl.prbMap[0].iqWidth;
2201 if (startupConfiguration.compression == 0)
2202 pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_NONE;
2204 pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_BLKFLOAT;
2206 pXranConf->ru_conf.fftSize = 0;
2207 while (startupConfiguration.nULFftSize >>= 1)
2208 ++pXranConf->ru_conf.fftSize;
2210 pXranConf->ru_conf.byteOrder = (startupConfiguration.nebyteorderswap == 1) ? XRAN_NE_BE_BYTE_ORDER : XRAN_CPU_LE_BYTE_ORDER ;
2211 pXranConf->ru_conf.iqOrder = (startupConfiguration.iqswap == 1) ? XRAN_Q_I_ORDER : XRAN_I_Q_ORDER;
2213 printf("FFT Order %d\n", pXranConf->ru_conf.fftSize);
2215 nCenterFreq = startupConfiguration.nDLAbsFrePointA + (((pXranConf->nDLRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));
2216 pXranConf->nDLCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);
2217 printf("DL center freq %d DL NR-ARFCN %d\n", nCenterFreq, pXranConf->nDLCenterFreqARFCN);
2219 nCenterFreq = startupConfiguration.nULAbsFrePointA + (((pXranConf->nULRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));
2220 pXranConf->nULCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);
2221 printf("UL center freq %d UL NR-ARFCN %d\n", nCenterFreq, pXranConf->nULCenterFreqARFCN);
2223 pXranConf->bbdev_dec = NULL;
2224 pXranConf->bbdev_enc = NULL;
2226 pXranConf->log_level = 1;
2228 if(startupConfiguration.maxFrameId)
2229 pXranConf->ru_conf.xran_max_frame = startupConfiguration.maxFrameId;
2231 if(init_xran() != 0)
2234 xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
2235 xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
2236 xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
2238 init_xran_iq_content();
2240 xret = xran_open(xranHandle, pXranConf);
2242 if(xret != XRAN_STATUS_SUCCESS){
2243 printf("xran_open failed %d\n", xret);
2247 sprintf(filename, "mlog-%s", startupConfiguration.appMode == 0 ? "o-du" : "o-ru");
2249 /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/
2251 MLogOpen(256, 3, 20000, 0, filename);
2254 puts("----------------------------------------");
2255 printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize());
2256 puts("----------------------------------------");
2259 uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};
2260 nActiveCoreMask[0] = (1 << xranInit.io_cfg.timing_core | xranInit.io_cfg.pkt_proc_core);
2262 MLogAddTestCase(nActiveCoreMask, startupConfiguration.numCC);
2264 fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);
2266 state = APP_RUNNING;
2267 printf("Start XRAN traffic\n");
2268 xran_start(xranHandle);
2272 struct xran_common_counters x_counters;
2275 xran_curr_if_state = xran_get_if_state();
2276 if(xran_get_common_counters(xranHandle, &x_counters) == XRAN_STATUS_SUCCESS) {
2278 xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);
2279 nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;
2281 printf("[%s][rx %7ld pps %7ld kbps %7ld][tx %7ld pps %7ld kbps %7ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",
2282 ((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),
2283 x_counters.rx_counter,
2284 x_counters.rx_counter-old_rx_counter,
2285 x_counters.rx_bytes_per_sec*8/1000L,
2286 x_counters.tx_counter,
2287 x_counters.tx_counter-old_tx_counter,
2288 x_counters.tx_bytes_per_sec*8/1000L,
2289 x_counters.Rx_on_time,
2290 x_counters.Rx_early,
2292 x_counters.Rx_corrupt,
2293 x_counters.Rx_pkt_dupl,
2294 x_counters.Total_msgs_rcvd,
2297 if(x_counters.rx_counter > old_rx_counter)
2298 old_rx_counter = x_counters.rx_counter;
2299 if(x_counters.tx_counter > old_tx_counter)
2300 old_tx_counter = x_counters.tx_counter;
2302 if(x_counters.rx_counter > 0 && x_counters.tx_counter > 0)
2303 MLogSetMask(0xFFFFFFFF);
2305 printf("error xran_get_common_counters\n");
2308 if (xran_curr_if_state == XRAN_STOPPED){
2311 if (NULL == fgets(input, 10, stdin)) {
2315 const int sel_opt = atoi(input);
2318 xran_start(xranHandle);
2319 printf("Start XRAN traffic\n");
2324 xran_stop(xranHandle);
2325 printf("Stop XRAN traffic\n");
2326 state = APP_STOPPED;
2329 puts("Wrong option passed!");
2332 if (APP_STOPPED == state)
2336 get_xran_iq_content();
2338 puts("Closing l1 app... Ending all threads...");
2339 xran_close(xranHandle);
2343 puts("Dump IQs...");
2345 if (startupConfiguration.iqswap == 1){
2346 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2347 printf("RX: Swap I and Q to match CPU format: [%d]\n",i);
2351 signed short *ptr = (signed short *) p_rx_log_buffer[i];
2354 for (j = 0; j < (int32_t)(rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
2356 ptr[j] = ptr[j + 1];
2362 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
2364 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2366 printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);
2370 signed short *ptr = (signed short *) p_srs_log_buffer[i];
2373 for (j = 0; j < (int32_t)(srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
2375 ptr[j] = ptr[j + 1];
2383 if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0) {
2385 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2386 printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
2387 for (j = 0; j < rx_log_buffer_size[i]/sizeof(short); j++){
2388 p_rx_log_buffer[i][j] = rte_be_to_cpu_16(p_rx_log_buffer[i][j]);
2392 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
2394 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2396 printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
2397 for (j = 0; j < srs_log_buffer_size[i]/sizeof(short); j++){
2398 p_srs_log_buffer[i][j] = rte_be_to_cpu_16(p_srs_log_buffer[i][j]);
2404 for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2406 sprintf(filename, "./logs/%s-rx_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2407 sys_save_buf_to_file_txt(filename,
2408 "UL FFT OUT IQ Samples in human readable format",
2409 (uint8_t*) p_rx_log_buffer[i],
2410 rx_log_buffer_size[i],
2413 sprintf(filename, "./logs/%s-rx_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2414 sys_save_buf_to_file(filename,
2415 "UL FFT OUT IQ Samples in binary format",
2416 (uint8_t*) p_rx_log_buffer[i],
2417 rx_log_buffer_size[i]/sizeof(short),
2421 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
2423 i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2425 sprintf(filename, "./logs/%s-srs_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2426 sys_save_buf_to_file_txt(filename,
2427 "SRS UL FFT OUT IQ Samples in human readable format",
2428 (uint8_t*) p_srs_log_buffer[i],
2429 srs_log_buffer_size[i],
2432 sprintf(filename, "./logs/%s-srs_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2433 sys_save_buf_to_file(filename,
2434 "SRS UL FFT OUT IQ Samples in binary format",
2435 (uint8_t*) p_srs_log_buffer[i],
2436 srs_log_buffer_size[i]/sizeof(short),
2441 if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enablePrach){
2442 if (startupConfiguration.iqswap == 1){
2443 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2444 printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);
2448 signed short *ptr = (signed short *) p_prach_log_buffer[i];
2451 for (j = 0; j < (int32_t)(prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
2453 ptr[j] = ptr[j + 1];
2461 if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){
2462 for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2463 printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
2464 for (j = 0; j < prach_log_buffer_size[i]/sizeof(short); j++){
2465 p_prach_log_buffer[i][j] = rte_be_to_cpu_16(p_prach_log_buffer[i][j]);
2471 for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2473 sprintf(filename, "./logs/%s-prach_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2474 sys_save_buf_to_file_txt(filename,
2475 "PRACH FFT OUT IQ Samples in human readable format",
2476 (uint8_t*) p_prach_log_buffer[i],
2477 prach_log_buffer_size[i],
2480 sprintf(filename, "./logs/%s-prach_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2481 sys_save_buf_to_file(filename,
2482 "PRACH FFT OUT IQ Samples in binary format",
2483 (uint8_t*) p_prach_log_buffer[i],
2484 prach_log_buffer_size[i]/sizeof(short),