fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c

   1 /******************************************************************************
   2 *
   3 *   Copyright (c) 2019 Intel.
   4 *
   5 *   Licensed under the Apache License, Version 2.0 (the "License");
   6 *   you may not use this file except in compliance with the License.
   7 *   You may obtain a copy of the License at
   8 *
   9 *       http://www.apache.org/licenses/LICENSE-2.0
  10 *
  11 *   Unless required by applicable law or agreed to in writing, software
  12 *   distributed under the License is distributed on an "AS IS" BASIS,
  13 *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  14 *   See the License for the specific language governing permissions and
  15 *   limitations under the License.
  16 *
  17 *******************************************************************************/
  18
  19 /**
  20  * @file
  21  * This file consist of implementation of FAPI UL_DCI.request message.
  22  *
  23  **/
  24
  25 #include "nr5g_fapi_framework.h"
  26 #include "gnb_l1_l2_api.h"
  27 #include "nr5g_fapi_fapi2mac_api.h"
  28 #include "nr5g_fapi_fapi2phy_api.h"
  29 #include "nr5g_fapi_fapi2phy_p7_proc.h"
  30 #include "nr5g_fapi_fapi2phy_p7_pvt_proc.h"
  31 #include "nr5g_fapi_memory.h"
  32
  33  /** @ingroup group_source_api_p7_fapi2phy_proc
  34  *
  35  *  @param[in]  p_phy_instance Pointer to PHY instance.
  36  *  @param[in]  p_fapi_req Pointer to FAPI UL_DCI.request message structure.
  37  *
  38  *  @return     Returns ::SUCCESS and ::FAILURE.
  39  *
  40  *  @description
  41  *  This message includes DCI content used for the scheduling of PUSCH.
  42  *
  43 **/
  44 uint8_t nr5g_fapi_ul_dci_request(
  45     bool is_urllc,
  46     p_nr5g_fapi_phy_instance_t p_phy_instance,
  47     fapi_ul_dci_req_t * p_fapi_req,
  48     fapi_vendor_msg_t * p_fapi_vendor_msg)
  49 {
  50     PULDCIRequestStruct p_ia_ul_dci_req;
  51     PMAC2PHY_QUEUE_EL p_list_elem;
  52     nr5g_fapi_stats_t *p_stats;
  53
  54     if (NULL == p_phy_instance) {
  55         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Invalid " "phy instance"));
  56         return FAILURE;
  57     }
  58     p_stats = &p_phy_instance->stats;
  59     p_stats->fapi_stats.fapi_ul_dci_req++;
  60
  61     if (NULL == p_fapi_req) {
  62         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Invalid fapi " "message"));
  63         return FAILURE;
  64     }
  65
  66     p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem((uint8_t)
  67         MSG_TYPE_PHY_UL_DCI_REQ, 1, (uint32_t) sizeof(ULDCIRequestStruct));
  68     if (!p_list_elem) {
  69         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Unable to create "
  70                 "list element. Out of memory!!!"));
  71         return FAILURE;
  72     }
  73
  74     p_ia_ul_dci_req = (PULDCIRequestStruct) (p_list_elem + 1);
  75     NR5G_FAPI_MEMSET(p_ia_ul_dci_req, sizeof(PULDCIRequestStruct), 0,
  76         sizeof(PULDCIRequestStruct));
  77     p_ia_ul_dci_req->sMsgHdr.nMessageType = MSG_TYPE_PHY_UL_DCI_REQ;
  78     p_ia_ul_dci_req->sMsgHdr.nMessageLen =
  79         (uint16_t) sizeof(ULDCIRequestStruct);
  80     p_ia_ul_dci_req->sSFN_Slot.nSFN = p_fapi_req->sfn;
  81     p_ia_ul_dci_req->sSFN_Slot.nSlot = p_fapi_req->slot;
  82     p_ia_ul_dci_req->sSFN_Slot.nCarrierIdx = p_phy_instance->phy_id;
  83
  84     if (FAILURE == nr5g_fapi_ul_dci_req_to_phy_translation(p_phy_instance,
  85             p_fapi_req, p_ia_ul_dci_req)) {
  86         nr5g_fapi_fapi2phy_destroy_api_list_elem(p_list_elem);
  87         NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_DCI.request][%d][%d,%d] Not Sent",
  88                 p_phy_instance->phy_id, p_ia_ul_dci_req->sSFN_Slot.nSFN,
  89                 p_ia_ul_dci_req->sSFN_Slot.nSlot));
  90         return FAILURE;
  91     }
  92     nr5g_fapi_fapi2phy_add_to_api_list(is_urllc, p_list_elem);
  93
  94     p_stats->iapi_stats.iapi_ul_dci_req++;
  95
  96
  97     if (NULL != p_fapi_vendor_msg) {
  98         nr5g_fapi_ul_dci_req_to_phy_translation_vendor_ext(p_phy_instance,
  99                                                         p_fapi_vendor_msg,
 100                                                         p_ia_ul_dci_req);
 101     }
 102
 103     NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_DCI.request][%u][%u,%u,%u] is_urllc %u",
 104             p_phy_instance->phy_id,
 105             p_ia_ul_dci_req->sSFN_Slot.nSFN, p_ia_ul_dci_req->sSFN_Slot.nSlot,
 106             p_ia_ul_dci_req->sSFN_Slot.nSym, is_urllc));
 107
 108     return SUCCESS;
 109 }
 110
 111  /** @ingroup group_source_api_p7_fapi2phy_proc
 112  *
 113  *  @param[in]   p_fapi_req Pointer to FAPI UL_DCI.request structure.
 114  *  @param[out]  p_ia_ul_dci_req Pointer to IAPI UL_DCI.request structure.
 115  *
 116  *  @return     Returns ::SUCCESS and ::FAILURE.
 117  *
 118  *  @description
 119  *  This function converts FAPI UL_DCI.request to IAPI UL_DCI.request
 120  *  structure.
 121  *
 122 **/
 123 uint8_t nr5g_fapi_ul_dci_req_to_phy_translation(
 124     p_nr5g_fapi_phy_instance_t p_phy_instance,
 125     fapi_ul_dci_req_t * p_fapi_req,
 126     PULDCIRequestStruct p_ia_ul_dci_req)
 127 {
 128     int idx;
 129     int ruidx;
 130     fapi_dci_pdu_t *p_fapi_dci_pdu;
 131     DCIPDUStruct *p_ia_dci_pdu;
 132     nr5g_fapi_stats_t *p_stats;
 133     uint8_t *p_ia_curr, *p_freq_dom_res = NULL;
 134
 135     p_stats = &p_phy_instance->stats;
 136
 137     p_ia_ul_dci_req->nDCI = p_fapi_req->numPdus;
 138
 139     p_ia_curr = (uint8_t *) p_ia_ul_dci_req->sULDCIPDU;
 140
 141     for (idx = 0; idx < p_ia_ul_dci_req->nDCI; idx++) {
 142         p_stats->fapi_stats.fapi_ul_dci_pdus++;
 143         p_fapi_dci_pdu = &p_fapi_req->pdus[idx];
 144         p_ia_dci_pdu = (DCIPDUStruct *) p_ia_curr;
 145         p_ia_dci_pdu->sPDUHdr.nPDUType = DL_PDU_TYPE_DCI;
 146         p_ia_dci_pdu->sPDUHdr.nPDUSize = RUP32B(sizeof(DCIPDUStruct));
 147         p_ia_dci_pdu->nRNTI = p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].rnti;
 148         p_ia_dci_pdu->nBWPSize = p_fapi_dci_pdu->pdcchPduConfig.bwpSize;
 149         p_ia_dci_pdu->nBWPStart = p_fapi_dci_pdu->pdcchPduConfig.bwpStart;
 150         p_ia_dci_pdu->nSubcSpacing =
 151             p_fapi_dci_pdu->pdcchPduConfig.subCarrierSpacing;
 152         p_ia_dci_pdu->nCpType = p_fapi_dci_pdu->pdcchPduConfig.cyclicPrefix;
 153         p_freq_dom_res = &p_fapi_dci_pdu->pdcchPduConfig.freqDomainResource[0];
 154         p_ia_dci_pdu->nFreqDomain[0] =
 155             ((uint32_t) (p_freq_dom_res[0])) |
 156             (((uint32_t) (p_freq_dom_res[1])) << 8) |
 157             (((uint32_t) (p_freq_dom_res[2])) << 16) |
 158             (((uint32_t) (p_freq_dom_res[3])) << 24);
 159         p_ia_dci_pdu->nFreqDomain[1] =
 160             ((uint32_t) (p_freq_dom_res[4])) |
 161             (((uint32_t) (p_freq_dom_res[5])) << 8);
 162         p_ia_dci_pdu->nStartSymbolIndex =
 163             p_fapi_dci_pdu->pdcchPduConfig.startSymbolIndex;
 164         p_ia_dci_pdu->nNrOfSymbols =
 165             p_fapi_dci_pdu->pdcchPduConfig.durationSymbols;
 166         p_ia_dci_pdu->nCCEToREGType =
 167             p_fapi_dci_pdu->pdcchPduConfig.cceRegMappingType;
 168         p_ia_dci_pdu->nREGBundleSize =
 169             p_fapi_dci_pdu->pdcchPduConfig.regBundleSize;
 170         p_ia_dci_pdu->nShift = p_fapi_dci_pdu->pdcchPduConfig.shiftIndex;
 171         p_ia_dci_pdu->nScid =
 172             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].scramblingId;
 173         p_ia_dci_pdu->nCCEStartIndex =
 174             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].cceIndex;
 175         p_ia_dci_pdu->nAggrLvl =
 176             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].aggregationLevel;
 177         p_ia_dci_pdu->nInterleaveSize =
 178             p_fapi_dci_pdu->pdcchPduConfig.interleaverSize;
 179         p_ia_dci_pdu->nCoreSetType = p_fapi_dci_pdu->pdcchPduConfig.coreSetType;
 180         p_ia_dci_pdu->nRNTIScramb =
 181             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].scramblingRnti;
 182         p_ia_dci_pdu->nTotalBits =
 183             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payloadSizeBits;
 184
 185
 186         if (USE_VENDOR_EPREXSSB != p_phy_instance->phy_config.use_vendor_EpreXSSB)
 187         {
 188         p_ia_dci_pdu->nEpreRatioOfPDCCHToSSB =
 189                 nr5g_fapi_calculate_nEpreRatioOfPDCCHToSSB(p_fapi_dci_pdu->
 190                     pdcchPduConfig.dlDci[0].beta_pdcch_1_0);
 191         p_ia_dci_pdu->nEpreRatioOfDmrsToSSB =
 192                 nr5g_fapi_calculate_nEpreRatioOfDmrsToSSB(p_fapi_dci_pdu->
 193                     pdcchPduConfig.dlDci[0].powerControlOffsetSS);
 194         }
 195
 196         p_ia_dci_pdu->nTotalBits =
 197             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payloadSizeBits;
 198         if (FAILURE == NR5G_FAPI_MEMCPY(p_ia_dci_pdu->nDciBits,
 199                 sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN,
 200                 p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payload,
 201                 sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN)) {
 202             NR5G_FAPI_LOG(ERROR_LOG,
 203                 ("UL_DCI Pdu: RNTI: %d -- DCI Bits copy" " failed.",
 204                     p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].rnti));
 205             return FAILURE;
 206         }
 207         p_ia_dci_pdu->nID = p_ia_dci_pdu->nScid;
 208         p_ia_dci_pdu->nNrofTxRU = 0x0;
 209         p_ia_dci_pdu->nBeamId = 0x0;
 210
 211         for (ruidx = 0; ruidx < MAX_TXRU_NUM; ruidx++) {
 212             p_ia_dci_pdu->nTxRUIdx[ruidx] = 0;
 213         }
 214         p_ia_curr += RUP32B(sizeof(DCIPDUStruct));
 215     }
 216
 217     p_stats->iapi_stats.iapi_ul_dci_pdus++;
 218     return SUCCESS;
 219 }
 220
 221  /** @ingroup group_source_api_p7_fapi2phy_proc
 222  *
 223  *  @param[in]   p_fapi_vendor_msg  Pointer to FAPI UL_DCI.request vendor message.
 224  *  @param[out]  p_ia_ul_dci_req    Pointer to IAPI UL_DCI.request structure.
 225  *
 226  *  @return     no return.
 227  *
 228  *  @description
 229  *  This function fills fields for UL_DCI.request structure that come from
 230  *  a vendor extension.
 231  *
 232 **/
 233 void nr5g_fapi_ul_dci_req_to_phy_translation_vendor_ext(
 234     p_nr5g_fapi_phy_instance_t p_phy_instance,
 235     fapi_vendor_msg_t * p_fapi_vendor_msg,
 236     PULDCIRequestStruct p_ia_ul_dci_req)
 237 {
 238     int idx = 0;
 239
 240     fapi_vendor_dci_pdu_t *p_vendor_dci_pdu;
 241     DCIPDUStruct *p_ia_dci_pdu;
 242     uint8_t *p_ia_curr = NULL;
 243
 244     p_ia_ul_dci_req->sSFN_Slot.nSym = p_fapi_vendor_msg->p7_req_vendor.ul_dci_req.sym;
 245
 246     p_ia_curr = (uint8_t *) p_ia_ul_dci_req->sULDCIPDU;
 247
 248     for (idx = 0; idx < p_ia_ul_dci_req->nDCI; idx++) {
 249         p_ia_dci_pdu = (DCIPDUStruct *) p_ia_curr;
 250         if (USE_VENDOR_EPREXSSB == p_phy_instance->phy_config.use_vendor_EpreXSSB)
 251         {
 252             p_vendor_dci_pdu = &p_fapi_vendor_msg->p7_req_vendor.ul_dci_req.pdus[idx];
 253             p_ia_dci_pdu->nEpreRatioOfPDCCHToSSB = p_vendor_dci_pdu->
 254                 pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb;
 255             p_ia_dci_pdu->nEpreRatioOfDmrsToSSB = p_vendor_dci_pdu->
 256                 pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb;
 257         }
 258         p_ia_curr += RUP32B(sizeof(DCIPDUStruct));
 259     }
 260 }