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[o-du/phy.git] / fapi_5g / source / api / fapi2phy / p7 / nr5g_fapi_proc_ul_dci_req.c
1 /******************************************************************************
2 *
3 *   Copyright (c) 2019 Intel.
4 *
5 *   Licensed under the Apache License, Version 2.0 (the "License");
6 *   you may not use this file except in compliance with the License.
7 *   You may obtain a copy of the License at
8 *
9 *       http://www.apache.org/licenses/LICENSE-2.0
10 *
11 *   Unless required by applicable law or agreed to in writing, software
12 *   distributed under the License is distributed on an "AS IS" BASIS,
13 *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 *   See the License for the specific language governing permissions and
15 *   limitations under the License.
16 *
17 *******************************************************************************/
18
19 /**
20  * @file
21  * This file consist of implementation of FAPI UL_DCI.request message.
22  *
23  **/
24
25 #include "nr5g_fapi_framework.h"
26 #include "gnb_l1_l2_api.h"
27 #include "nr5g_fapi_fapi2mac_api.h"
28 #include "nr5g_fapi_fapi2phy_api.h"
29 #include "nr5g_fapi_fapi2phy_p7_proc.h"
30 #include "nr5g_fapi_fapi2phy_p7_pvt_proc.h"
31 #include "nr5g_fapi_memory.h"
32
33  /** @ingroup group_source_api_p7_fapi2phy_proc
34  *
35  *  @param[in]  p_phy_instance Pointer to PHY instance.
36  *  @param[in]  p_fapi_req Pointer to FAPI UL_DCI.request message structure.
37  *  
38  *  @return     Returns ::SUCCESS and ::FAILURE.
39  *
40  *  @description
41  *  This message includes DCI content used for the scheduling of PUSCH.
42  *
43 **/
44 uint8_t nr5g_fapi_ul_dci_request(
45     p_nr5g_fapi_phy_instance_t p_phy_instance,
46     fapi_ul_dci_req_t * p_fapi_req,
47     fapi_vendor_msg_t * p_fapi_vendor_msg)
48 {
49     PULDCIRequestStruct p_ia_ul_dci_req;
50     PMAC2PHY_QUEUE_EL p_list_elem;
51     nr5g_fapi_stats_t *p_stats;
52     UNUSED(p_fapi_vendor_msg);
53
54     if (NULL == p_phy_instance) {
55         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Invalid " "phy instance"));
56         return FAILURE;
57     }
58     p_stats = &p_phy_instance->stats;
59     p_stats->fapi_stats.fapi_ul_dci_req++;
60
61     if (NULL == p_fapi_req) {
62         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Invalid fapi " "message"));
63         return FAILURE;
64     }
65
66     p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem((uint8_t)
67         MSG_TYPE_PHY_UL_DCI_REQ, 1, (uint32_t) sizeof(ULDCIRequestStruct));
68     if (!p_list_elem) {
69         NR5G_FAPI_LOG(ERROR_LOG, ("[UL_DCI.request] Unable to create "
70                 "list element. Out of memory!!!"));
71         return FAILURE;
72     }
73
74     p_ia_ul_dci_req = (PULDCIRequestStruct) (p_list_elem + 1);
75     p_ia_ul_dci_req->sMsgHdr.nMessageType = MSG_TYPE_PHY_UL_DCI_REQ;
76     p_ia_ul_dci_req->sMsgHdr.nMessageLen =
77         (uint16_t) sizeof(ULDCIRequestStruct);
78     p_ia_ul_dci_req->sSFN_Slot.nSFN = p_fapi_req->sfn;
79     p_ia_ul_dci_req->sSFN_Slot.nSlot = p_fapi_req->slot;
80     p_ia_ul_dci_req->sSFN_Slot.nCarrierIdx = p_phy_instance->phy_id;
81
82     if (FAILURE == nr5g_fapi_ul_dci_req_to_phy_translation(p_phy_instance,
83             p_fapi_req, p_ia_ul_dci_req)) {
84         nr5g_fapi_fapi2phy_destroy_api_list_elem(p_list_elem);
85         NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_DCI.request][%d][%d,%d] Not Sent",
86                 p_phy_instance->phy_id, p_ia_ul_dci_req->sSFN_Slot.nSFN,
87                 p_ia_ul_dci_req->sSFN_Slot.nSlot));
88         return FAILURE;
89     }
90     nr5g_fapi_fapi2phy_add_to_api_list(p_list_elem);
91
92     p_stats->iapi_stats.iapi_ul_dci_req++;
93     NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_DCI.request][%d][%d,%d]",
94             p_phy_instance->phy_id,
95             p_ia_ul_dci_req->sSFN_Slot.nSFN, p_ia_ul_dci_req->sSFN_Slot.nSlot));
96
97     return SUCCESS;
98 }
99
100  /** @ingroup group_source_api_p7_fapi2phy_proc
101  *
102  *  @param[in]   p_fapi_req Pointer to FAPI UL_DCI.request structure.
103  *  @param[out]  p_ia_ul_dci_req Pointer to IAPI UL_DCI.request structure.
104  *  
105  *  @return     Returns ::SUCCESS and ::FAILURE.
106  *
107  *  @description
108  *  This function converts FAPI UL_DCI.request to IAPI UL_DCI.request
109  *  structure.
110  *
111 **/
112 uint8_t nr5g_fapi_ul_dci_req_to_phy_translation(
113     p_nr5g_fapi_phy_instance_t p_phy_instance,
114     fapi_ul_dci_req_t * p_fapi_req,
115     PULDCIRequestStruct p_ia_ul_dci_req)
116 {
117     int idx;
118     fapi_dci_pdu_t *p_fapi_dci_pdu;
119     DCIPDUStruct *p_ia_dci_pdu;
120     nr5g_fapi_stats_t *p_stats;
121     uint8_t *p_ia_curr, *p_freq_dom_res = NULL;
122
123     p_stats = &p_phy_instance->stats;
124
125     p_ia_ul_dci_req->nDCI = p_fapi_req->numPdus;
126
127     p_ia_curr = (uint8_t *) p_ia_ul_dci_req->sULDCIPDU;
128
129     for (idx = 0; idx < p_ia_ul_dci_req->nDCI; idx++) {
130         p_stats->fapi_stats.fapi_ul_dci_pdus++;
131         p_fapi_dci_pdu = &p_fapi_req->pdus[idx];
132         p_ia_dci_pdu = (DCIPDUStruct *) p_ia_curr;
133         p_ia_dci_pdu->sPDUHdr.nPDUType = DL_PDU_TYPE_DCI;
134         p_ia_dci_pdu->sPDUHdr.nPDUSize = RUP32B(sizeof(DCIPDUStruct));
135         p_ia_dci_pdu->nRNTI = p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].rnti;
136         p_ia_dci_pdu->nBWPSize = p_fapi_dci_pdu->pdcchPduConfig.bwpSize;
137         p_ia_dci_pdu->nBWPStart = p_fapi_dci_pdu->pdcchPduConfig.bwpStart;
138         p_ia_dci_pdu->nSubcSpacing =
139             p_fapi_dci_pdu->pdcchPduConfig.subCarrierSpacing;
140         p_ia_dci_pdu->nCpType = p_fapi_dci_pdu->pdcchPduConfig.cyclicPrefix;
141         p_freq_dom_res = &p_fapi_dci_pdu->pdcchPduConfig.freqDomainResource[0];
142         p_ia_dci_pdu->nFreqDomain[0] =
143             ((uint32_t) (p_freq_dom_res[0])) |
144             (((uint32_t) (p_freq_dom_res[1])) << 8) |
145             (((uint32_t) (p_freq_dom_res[2])) << 16) |
146             (((uint32_t) (p_freq_dom_res[3])) << 24);
147         p_ia_dci_pdu->nFreqDomain[1] =
148             ((uint32_t) (p_freq_dom_res[4])) |
149             (((uint32_t) (p_freq_dom_res[5])) << 8);
150         p_ia_dci_pdu->nStartSymbolIndex =
151             p_fapi_dci_pdu->pdcchPduConfig.startSymbolIndex;
152         p_ia_dci_pdu->nNrOfSymbols =
153             p_fapi_dci_pdu->pdcchPduConfig.durationSymbols;
154         p_ia_dci_pdu->nCCEToREGType =
155             p_fapi_dci_pdu->pdcchPduConfig.cceRegMappingType;
156         p_ia_dci_pdu->nREGBundleSize =
157             p_fapi_dci_pdu->pdcchPduConfig.regBundleSize;
158         p_ia_dci_pdu->nShift = p_fapi_dci_pdu->pdcchPduConfig.shiftIndex;
159         p_ia_dci_pdu->nScid =
160             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].scramblingId;
161         p_ia_dci_pdu->nCCEStartIndex =
162             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].cceIndex;
163         p_ia_dci_pdu->nAggrLvl =
164             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].aggregationLevel;
165         p_ia_dci_pdu->nInterleaveSize =
166             p_fapi_dci_pdu->pdcchPduConfig.interleaverSize;
167         p_ia_dci_pdu->nCoreSetType = p_fapi_dci_pdu->pdcchPduConfig.coreSetType;
168         p_ia_dci_pdu->nRNTIScramb =
169             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].scramblingRnti;
170         p_ia_dci_pdu->nTotalBits =
171             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payloadSizeBits;
172         p_ia_dci_pdu->nEpreRatioOfPDCCHToSSB =
173             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].powerControlOffsetSS;
174         p_ia_dci_pdu->nEpreRatioOfDmrsToSSB =
175             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].beta_pdcch_1_0;
176         p_ia_dci_pdu->nTotalBits =
177             p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payloadSizeBits;
178         if (FAILURE == NR5G_FAPI_MEMCPY(p_ia_dci_pdu->nDciBits,
179                 sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN,
180                 p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].payload,
181                 sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN)) {
182             NR5G_FAPI_LOG(ERROR_LOG,
183                 ("UL_DCI Pdu: RNTI: %d -- DCI Bits copy" " failed.",
184                     p_fapi_dci_pdu->pdcchPduConfig.dlDci[0].rnti));
185             return FAILURE;
186         }
187         p_ia_dci_pdu->nID = p_ia_dci_pdu->nScid;
188         p_ia_dci_pdu->nNrofTxRU = 0x0;
189         p_ia_dci_pdu->nBeamId = 0x0;
190         p_ia_curr += RUP32B(sizeof(DCIPDUStruct));
191     }
192
193     p_stats->iapi_stats.iapi_ul_dci_pdus++;
194     return SUCCESS;
195 }