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[o-du/phy.git] / fapi_5g / source / api / fapi2phy / p7 / nr5g_fapi_proc_dl_tti_req.c
1 /******************************************************************************
2 *
3 *   Copyright (c) 2019 Intel.
4 *
5 *   Licensed under the Apache License, Version 2.0 (the "License");
6 *   you may not use this file except in compliance with the License.
7 *   You may obtain a copy of the License at
8 *
9 *       http://www.apache.org/licenses/LICENSE-2.0
10 *
11 *   Unless required by applicable law or agreed to in writing, software
12 *   distributed under the License is distributed on an "AS IS" BASIS,
13 *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 *   See the License for the specific language governing permissions and
15 *   limitations under the License.
16 *
17 *******************************************************************************/
18
19 /**
20  * @file
21  * This file consist of implementation of FAPI DL_TTI.request message.
22  *
23  **/
24 #include <rte_memcpy.h>
25 #include "nr5g_fapi_framework.h"
26 #include "gnb_l1_l2_api.h"
27 #include "nr5g_fapi_dpdk.h"
28 #include "nr5g_fapi_fapi2mac_api.h"
29 #include "nr5g_fapi_fapi2phy_api.h"
30 #include "nr5g_fapi_fapi2phy_p7_proc.h"
31 #include "nr5g_fapi_fapi2phy_p7_pvt_proc.h"
32 #include "nr5g_fapi_memory.h"
33
34 /** @ingroup group_source_api_p5_fapi2phy_proc
35  *
36  *  @param[in]  p_phy_instance Pointer to PHY instance.
37  *  @param[in]  p_fapi_req Pointer to FAPI DL_TTI.request message structure.
38  *  
39  *  @return     Returns ::SUCCESS and ::FAILURE.
40  *
41  *  @description
42  *  This message indicates the control information for a downlink slot. 
43  *
44 **/
45 uint8_t nr5g_fapi_dl_tti_request(
46     p_nr5g_fapi_phy_instance_t p_phy_instance,
47     fapi_dl_tti_req_t * p_fapi_req,
48     fapi_vendor_msg_t * p_fapi_vendor_msg)
49 {
50     PDLConfigRequestStruct p_ia_dl_config_req;
51     PMAC2PHY_QUEUE_EL p_list_elem;
52     nr5g_fapi_stats_t *p_stats;
53     UNUSED(p_fapi_vendor_msg);
54
55     if (NULL == p_phy_instance) {
56         NR5G_FAPI_LOG(ERROR_LOG, ("[DL_TTI.request] Invalid " "Phy Instance"));
57         return FAILURE;
58     }
59     p_stats = &p_phy_instance->stats;
60     p_stats->fapi_stats.fapi_dl_tti_req++;
61
62     if (NULL == p_fapi_req) {
63         NR5G_FAPI_LOG(ERROR_LOG, ("[DL_TTI.request] Invalid fapi " "message"));
64         return FAILURE;
65     }
66
67     p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem((uint8_t)
68         MSG_TYPE_PHY_DL_CONFIG_REQ, 1,
69         (uint32_t) sizeof(DLConfigRequestStruct));
70     if (!p_list_elem) {
71         NR5G_FAPI_LOG(ERROR_LOG, ("[DL_TTI.request] Unable to create "
72                 "list element. Out of memory!!!"));
73         return FAILURE;
74     }
75
76     p_ia_dl_config_req = (PDLConfigRequestStruct) (p_list_elem + 1);
77     if (FAILURE == nr5g_fapi_dl_tti_req_to_phy_translation(p_phy_instance,
78             p_fapi_req, p_ia_dl_config_req)) {
79         nr5g_fapi_fapi2phy_destroy_api_list_elem(p_list_elem);
80         NR5G_FAPI_LOG(DEBUG_LOG, ("[DL_TTI.request][%d][%d,%d] Not Sent",
81                 p_phy_instance->phy_id, p_ia_dl_config_req->sSFN_Slot.nSFN,
82                 p_ia_dl_config_req->sSFN_Slot.nSlot));
83         return FAILURE;
84     }
85     /* Add element to send list */
86     nr5g_fapi_fapi2phy_add_to_api_list(p_list_elem);
87
88     p_stats->iapi_stats.iapi_dl_config_req++;
89     NR5G_FAPI_LOG(DEBUG_LOG, ("[DL_TTI.request][%d][%d,%d]",
90             p_phy_instance->phy_id, p_ia_dl_config_req->sSFN_Slot.nSFN,
91             p_ia_dl_config_req->sSFN_Slot.nSlot));
92
93     return SUCCESS;
94 }
95
96  /** @ingroup group_source_api_p5_fapi2phy_proc
97  *
98  *  @param[in]   p_fapi_req Pointer to FAPI DL_TTI.request structure.
99  *  @param[out]  p_ia_dl_config_req Pointer to IAPI DL_TTI.request structure.
100  *  
101  *  @return     Returns ::SUCCESS and ::FAILURE.
102  *
103  *  @description
104  *  This function converts FAPI DL_TTI.request to IAPI DL_Config.request
105  *  structure.
106  *
107 **/
108 uint8_t nr5g_fapi_dl_tti_req_to_phy_translation(
109     p_nr5g_fapi_phy_instance_t p_phy_instance,
110     fapi_dl_tti_req_t * p_fapi_req,
111     PDLConfigRequestStruct p_phy_req)
112 {
113     int idx = 0, nDCI = 0, jdx = 0;
114     uint32_t pdsch_size, pdcch_size, pbch_size, csirs_size, total_size;
115     nr5g_fapi_stats_t *p_stats;
116
117     fapi_dl_tti_req_pdu_t *p_fapi_dl_tti_req_pdu = NULL;
118     fapi_dl_pdcch_pdu_t *p_pdcch_pdu = NULL;
119     fapi_dl_pdsch_pdu_t *p_pdsch_pdu = NULL;
120     fapi_dl_csi_rs_pdu_t *p_csi_rs_pdu = NULL;
121     fapi_dl_ssb_pdu_t *p_ssb_pdu = NULL;
122     fapi_ue_info_t *p_ueGrpInfo = NULL;
123
124     PPDUStruct pPduStruct = NULL;
125     PDLSCHPDUStruct p_dlsch_pdu = NULL;
126     PDCIPDUStruct p_dci_pdu = NULL;
127     PBCHPDUStruct p_bch_pdu = NULL;
128     PCSIRSPDUStruct pCSIRSPdu = NULL;
129     PPDSCHGroupInfoStruct pPDSCHGroupInfoStruct = NULL;
130
131     total_size = sizeof(DLConfigRequestStruct);
132     pdsch_size = RUP32B(sizeof(DLSCHPDUStruct));
133     pdcch_size = RUP32B(sizeof(DCIPDUStruct));
134     pbch_size = RUP32B(sizeof(BCHPDUStruct));
135     csirs_size = RUP32B(sizeof(CSIRSPDUStruct));
136
137     p_stats = &p_phy_instance->stats;
138     NR5G_FAPI_MEMSET(p_phy_req, sizeof(DLConfigRequestStruct), 0, total_size);
139     p_phy_req->sMsgHdr.nMessageType = MSG_TYPE_PHY_DL_CONFIG_REQ;
140     p_phy_req->sSFN_Slot.nCarrierIdx = p_phy_instance->phy_id;
141     p_phy_req->nGroup = p_fapi_req->nGroup;
142     p_phy_req->nPDU = p_fapi_req->nPdus;
143     p_phy_req->sSFN_Slot.nSFN = p_fapi_req->sfn;
144     p_phy_req->sSFN_Slot.nSlot = p_fapi_req->slot;
145
146     // setting to defaults
147     p_phy_req->nLte_CRS_carrierBandwidthDL = 100;
148     p_phy_req->nLte_CRS_nrofCRS_Ports = 2;
149
150     for (idx = 0; idx < p_phy_req->nGroup; ++idx) {
151         p_ueGrpInfo = &p_fapi_req->ue_grp_info[idx];
152         pPDSCHGroupInfoStruct = &p_phy_req->sPDSCHGroupInfoStruct[idx];
153         pPDSCHGroupInfoStruct->nUE = p_ueGrpInfo->nUe;
154         pPDSCHGroupInfoStruct->rsv1[0] = 0;
155         pPDSCHGroupInfoStruct->rsv1[1] = 0;
156         pPDSCHGroupInfoStruct->rsv1[2] = 0;
157         for (jdx = 0; jdx < p_ueGrpInfo->nUe; ++jdx) {
158             pPDSCHGroupInfoStruct->nPduIdx[jdx] = p_ueGrpInfo->pduIdx[jdx];
159         }
160     }
161
162     pPduStruct = p_phy_req->sDLPDU;
163     for (idx = 0; idx < p_phy_req->nPDU; ++idx) {
164         p_stats->fapi_stats.fapi_dl_tti_pdus++;
165         p_fapi_dl_tti_req_pdu = &p_fapi_req->pdus[idx];
166         switch (p_fapi_dl_tti_req_pdu->pduType) {
167             case FAPI_PDCCH_PDU_TYPE:
168                 nDCI++;
169                 p_dci_pdu = (PDCIPDUStruct) pPduStruct;
170                 NR5G_FAPI_MEMSET(p_dci_pdu, RUP32B(sizeof(DCIPDUStruct)), 0,
171                     pdcch_size);
172                 p_pdcch_pdu = &p_fapi_dl_tti_req_pdu->pdu.pdcch_pdu;
173                 p_dci_pdu->sPDUHdr.nPDUType = DL_PDU_TYPE_DCI;
174                 p_dci_pdu->sPDUHdr.nPDUSize = pdcch_size;
175                 total_size += pdcch_size;
176                 nr5g_fapi_fill_dci_pdu(p_phy_instance, p_pdcch_pdu, p_dci_pdu);
177                 break;
178
179             case FAPI_PDSCH_PDU_TYPE:
180                 p_dlsch_pdu = (PDLSCHPDUStruct) pPduStruct;
181                 p_pdsch_pdu = &p_fapi_dl_tti_req_pdu->pdu.pdsch_pdu;
182                 NR5G_FAPI_MEMSET(p_dlsch_pdu, RUP32B(sizeof(DLSCHPDUStruct)), 0,
183                     pdsch_size);
184                 p_dlsch_pdu->sPDUHdr.nPDUType = DL_PDU_TYPE_DLSCH;
185                 p_dlsch_pdu->sPDUHdr.nPDUSize = pdsch_size;
186                 total_size += pdsch_size;
187                 nr5g_fapi_fill_pdsch_pdu(p_phy_instance, p_pdsch_pdu,
188                     p_dlsch_pdu);
189                 break;
190
191             case FAPI_PBCH_PDU_TYPE:
192                 p_bch_pdu = (PBCHPDUStruct) pPduStruct;
193                 p_ssb_pdu = &p_fapi_dl_tti_req_pdu->pdu.ssb_pdu;
194                 NR5G_FAPI_MEMSET(p_bch_pdu, RUP32B(sizeof(BCHPDUStruct)), 0,
195                     pbch_size);
196                 p_bch_pdu->sPDUHdr.nPDUType = DL_PDU_TYPE_PBCH;
197                 p_bch_pdu->sPDUHdr.nPDUSize = pbch_size;
198                 total_size += pbch_size;
199                 nr5g_fapi_fill_ssb_pdu(p_phy_instance, p_bch_pdu, p_ssb_pdu);
200                 break;
201
202             case FAPI_CSIRS_PDU_TYPE:
203                 pCSIRSPdu = (PCSIRSPDUStruct) pPduStruct;
204                 p_csi_rs_pdu = &p_fapi_dl_tti_req_pdu->pdu.csi_rs_pdu;
205                 NR5G_FAPI_MEMSET(pCSIRSPdu, RUP32B(sizeof(CSIRSPDUStruct)), 0,
206                     csirs_size);
207                 pCSIRSPdu->sPDUHdr.nPDUType = DL_PDU_TYPE_CSIRS;
208                 pCSIRSPdu->sPDUHdr.nPDUSize = csirs_size;
209                 total_size += csirs_size;
210                 nr5g_fapi_fill_csi_rs_pdu(p_phy_instance, pCSIRSPdu,
211                     p_csi_rs_pdu);
212                 break;
213
214             default:
215                 NR5G_FAPI_LOG(ERROR_LOG, ("[DL_TTI] Invalid Pdu Type: %d",
216                         pPduStruct->nPDUType));
217                 return FAILURE;
218         }
219         pPduStruct =
220             (PDUStruct *) ((uint8_t *) pPduStruct + pPduStruct->nPDUSize);
221         p_stats->iapi_stats.iapi_dl_tti_pdus++;
222     }
223
224     p_phy_req->nDCI = nDCI;
225     p_phy_req->sMsgHdr.nMessageLen = total_size;
226     return SUCCESS;
227 }
228
229 /** @ingroup group_nr5g_test_config
230  *
231  *  @param[in]   p_pdcch_pdu
232  *  @param[out]  p_dci_pdu
233  *
234  *  @return      void
235  *
236  *  @description
237  *  This function fills FAPI PDCCH Pdu from IAPI DCIPdu
238  *
239 **/
240 void nr5g_fapi_fill_dci_pdu(
241     p_nr5g_fapi_phy_instance_t p_phy_instance,
242     fapi_dl_pdcch_pdu_t * p_pdcch_pdu,
243     PDCIPDUStruct p_dci_pdu)
244 {
245     nr5g_fapi_stats_t *p_stats = NULL;
246
247     p_stats = &p_phy_instance->stats;
248     p_stats->fapi_stats.fapi_dl_tti_pdcch_pdus++;
249
250     p_dci_pdu->nBWPSize = p_pdcch_pdu->bwpSize;
251     p_dci_pdu->nBWPStart = p_pdcch_pdu->bwpStart;
252     p_dci_pdu->nSubcSpacing = p_pdcch_pdu->subCarrierSpacing;
253     p_dci_pdu->nCpType = p_pdcch_pdu->cyclicPrefix;
254     p_dci_pdu->nCCEStartIndex = p_pdcch_pdu->startSymbolIndex;
255     p_dci_pdu->nNrOfSymbols = p_pdcch_pdu->durationSymbols;
256     p_dci_pdu->nStartSymbolIndex = p_pdcch_pdu->startSymbolIndex;
257     p_dci_pdu->nFreqDomain[0] = ((uint32_t) p_pdcch_pdu->freqDomainResource[0] |
258         (((uint32_t) p_pdcch_pdu->freqDomainResource[1]) << 8) |
259         (((uint32_t) p_pdcch_pdu->freqDomainResource[2]) << 16) |
260         (((uint32_t) p_pdcch_pdu->freqDomainResource[3]) << 24));
261     p_dci_pdu->nFreqDomain[1] = ((uint32_t) p_pdcch_pdu->freqDomainResource[4] |
262         (((uint32_t) p_pdcch_pdu->freqDomainResource[5]) << 8));
263     p_dci_pdu->nCCEToREGType = p_pdcch_pdu->cceRegMappingType;
264     p_dci_pdu->nREGBundleSize = p_pdcch_pdu->regBundleSize;
265     p_dci_pdu->nInterleaveSize = p_pdcch_pdu->interleaverSize;
266     p_dci_pdu->nShift = p_pdcch_pdu->shiftIndex;
267     p_dci_pdu->nCoreSetType = p_pdcch_pdu->coreSetType;
268     p_dci_pdu->nCCEStartIndex = p_pdcch_pdu->dlDci[0].cceIndex;
269     p_dci_pdu->nAggrLvl = p_pdcch_pdu->dlDci[0].aggregationLevel;
270     p_dci_pdu->nScid = p_pdcch_pdu->dlDci[0].scramblingId;
271     p_dci_pdu->nID = p_pdcch_pdu->dlDci[0].scramblingId;
272     p_dci_pdu->nRNTIScramb = p_pdcch_pdu->dlDci[0].scramblingRnti;
273     p_dci_pdu->nRNTI = p_pdcch_pdu->dlDci[0].rnti;
274     p_dci_pdu->nTotalBits = p_pdcch_pdu->dlDci[0].payloadSizeBits;
275
276     p_dci_pdu->nEpreRatioOfPDCCHToSSB =
277         nr5g_fapi_calculate_nEpreRatioOfPDCCHToSSB(p_pdcch_pdu->
278         dlDci[0].beta_pdcch_1_0);
279     p_dci_pdu->nEpreRatioOfDmrsToSSB =
280         p_pdcch_pdu->dlDci[0].powerControlOffsetSS;
281     if (FAILURE == NR5G_FAPI_MEMCPY(p_dci_pdu->nDciBits,
282             sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN,
283             p_pdcch_pdu->dlDci[0].payload,
284             sizeof(uint8_t) * MAX_DCI_BIT_BYTE_LEN)) {
285         NR5G_FAPI_LOG(ERROR_LOG, ("PDCCH: RNTI: %d -- DCI Bits copy error.",
286                 p_pdcch_pdu->dlDci[0].rnti));
287     }
288     p_stats->iapi_stats.iapi_dl_tti_pdcch_pdus++;
289 }
290
291 /** @ingroup group_nr5g_test_config
292  *
293  *  @param[in]    p_pdsch_pdu
294  *  @param[out]   p_dlsch_pdu
295  *
296  *  @return      void
297  *
298  *  @description
299  *  This function fills FAPI PDSCH Pdu from IAPI DLSCHPDU
300  *
301 **/
302 void nr5g_fapi_fill_pdsch_pdu(
303     p_nr5g_fapi_phy_instance_t p_phy_instance,
304     fapi_dl_pdsch_pdu_t * p_pdsch_pdu,
305     PDLSCHPDUStruct p_dlsch_pdu)
306 {
307     uint8_t idx, port_index = 0;
308     nr5g_fapi_stats_t *p_stats;
309
310     p_stats = &p_phy_instance->stats;
311     p_stats->fapi_stats.fapi_dl_tti_pdsch_pdus++;
312
313     p_dlsch_pdu->nBWPSize = p_pdsch_pdu->bwpSize;
314     p_dlsch_pdu->nBWPStart = p_pdsch_pdu->bwpStart;
315     p_dlsch_pdu->nSubcSpacing = p_pdsch_pdu->subCarrierSpacing;
316     p_dlsch_pdu->nCpType = p_pdsch_pdu->cyclicPrefix;
317     p_dlsch_pdu->nRNTI = p_pdsch_pdu->rnti;
318     p_dlsch_pdu->nUEId = p_pdsch_pdu->pdu_index;
319
320     // Codeword Information
321     p_dlsch_pdu->nNrOfCodeWords = p_pdsch_pdu->nrOfCodeWords;
322     p_dlsch_pdu->nMCS[0] = p_pdsch_pdu->cwInfo[0].mcsIndex;
323     p_dlsch_pdu->nMcsTable = p_pdsch_pdu->cwInfo[0].mcsTable;
324     p_dlsch_pdu->nRV[0] = p_pdsch_pdu->cwInfo[0].rvIndex;
325     p_dlsch_pdu->nTBSize[0] = p_pdsch_pdu->cwInfo[0].tbSize;
326     if (p_pdsch_pdu->nrOfCodeWords == 2) {
327         p_dlsch_pdu->nMCS[1] = p_pdsch_pdu->cwInfo[1].mcsIndex;
328         p_dlsch_pdu->nRV[1] = p_pdsch_pdu->cwInfo[1].rvIndex;
329         p_dlsch_pdu->nTBSize[1] = p_pdsch_pdu->cwInfo[1].tbSize;
330     }
331     //p_dlsch_pdu->nNrOfAntennaPorts = p_phy_instance->phy_config.n_nr_of_rx_ant;
332     p_dlsch_pdu->nNrOfLayers = p_pdsch_pdu->nrOfLayers;
333     p_dlsch_pdu->nNrOfAntennaPorts = p_pdsch_pdu->nrOfLayers;
334     p_dlsch_pdu->nTransmissionScheme = p_pdsch_pdu->transmissionScheme;
335     p_dlsch_pdu->nDMRSConfigType = p_pdsch_pdu->dmrsConfigType;
336     p_dlsch_pdu->nNIDnSCID = p_pdsch_pdu->dlDmrsScramblingId;
337     p_dlsch_pdu->nNid = p_pdsch_pdu->dataScramblingId;
338     p_dlsch_pdu->nSCID = p_pdsch_pdu->scid;
339
340     for (idx = 0;
341         (idx < FAPI_MAX_DMRS_PORTS && port_index < p_dlsch_pdu->nNrOfLayers);
342         idx++) {
343         if ((p_pdsch_pdu->dmrsPorts >> idx) && 0x0001) {
344             p_dlsch_pdu->nPortIndex[port_index++] = idx;
345         }
346     }
347
348     // Resource Allocation Information
349     if (FAILURE == NR5G_FAPI_MEMCPY(p_dlsch_pdu->nRBGIndex,
350             sizeof(uint32_t) * MAX_DL_RBG_BIT_NUM,
351             p_pdsch_pdu->rbBitmap, sizeof(uint32_t) * MAX_DL_RBG_BIT_NUM)) {
352         NR5G_FAPI_LOG(ERROR_LOG, ("PDSCH: RNTI: %d Pdu Index: %d -- RB Bitmap"
353                 "cpy error.", p_pdsch_pdu->rnti, p_pdsch_pdu->pdu_index));
354     }
355     p_dlsch_pdu->nResourceAllocType = p_pdsch_pdu->resourceAlloc;
356     p_dlsch_pdu->nRBStart = p_pdsch_pdu->rbStart;
357     p_dlsch_pdu->nRBSize = p_pdsch_pdu->rbSize;
358     p_dlsch_pdu->nVRBtoPRB = p_pdsch_pdu->vrbToPrbMapping;
359     p_dlsch_pdu->nStartSymbolIndex = p_pdsch_pdu->startSymbIndex;
360     p_dlsch_pdu->nNrOfSymbols = p_pdsch_pdu->nrOfSymbols;
361     p_dlsch_pdu->nNrOfCDMs = p_pdsch_pdu->numDmrsCdmGrpsNoData;
362     p_dlsch_pdu->nMappingType = p_pdsch_pdu->mappingType;
363     p_dlsch_pdu->nNrOfDMRSSymbols = p_pdsch_pdu->nrOfDmrsSymbols;
364     p_dlsch_pdu->nDMRSAddPos = p_pdsch_pdu->dmrsAddPos;
365
366     // PTRS Information
367     p_dlsch_pdu->nPTRSTimeDensity = p_pdsch_pdu->ptrsTimeDensity;
368     p_dlsch_pdu->nPTRSFreqDensity = p_pdsch_pdu->ptrsFreqDensity;
369     p_dlsch_pdu->nPTRSReOffset = p_pdsch_pdu->ptrsReOffset;
370     p_dlsch_pdu->nEpreRatioOfPDSCHToPTRS = p_pdsch_pdu->nEpreRatioOfPdschToPtrs;
371     // Currently no mapping info available.
372     //p_dlsch_pdu->nEpreRatioOfPDSCHToSSB = 0x1170;
373     // PTRS Information
374     p_dlsch_pdu->nPTRSPresent = p_pdsch_pdu->pduBitMap & 0x0001;
375     p_dlsch_pdu->nNrOfPTRSPorts =
376         __builtin_popcount(p_pdsch_pdu->ptrsPortIndex);
377     for (idx = 0; idx < p_dlsch_pdu->nNrOfPTRSPorts &&
378         idx < MAX_DL_PER_UE_PTRS_PORT_NUM; idx++) {
379         p_dlsch_pdu->nPTRSPortIndex[idx] = idx;
380     }
381
382     // Don't Cares
383     p_dlsch_pdu->nNrOfDMRSAssPTRS[0] = 0x1;
384     p_dlsch_pdu->nNrOfDMRSAssPTRS[1] = 0x1;
385     p_dlsch_pdu->n1n2 = 0x201;
386
387     for (idx = 0; (idx < MAX_TXRU_NUM && idx < port_index); idx++) {
388         p_dlsch_pdu->nTxRUIdx[idx] = p_dlsch_pdu->nPortIndex[idx];
389     }
390     p_dlsch_pdu->nNrofTxRU = port_index;
391     p_stats->iapi_stats.iapi_dl_tti_pdsch_pdus++;
392 }
393
394 /** @ingroup group_nr5g_test_config
395  *
396  *  @param[in]  nEpreRatioOfPDCCHToSSB
397  *
398  *  @return     uint8_t mapping
399  *
400  *  @description
401  *  This function maps IAPI to FAPI value range.
402  *
403  *
404  * Please refer 5G FAPI-IAPI Translator Module SW Design Document for details on
405  * the mapping.
406  *
407  * |-----------------------------------------|
408  * | nEpreRatioOfPDCCHToSSb | beta_PDCCH_1_0 |
409  * |-----------------------------------------|
410  * |             1          |      0 - 2     |
411  * |          1000          |        3       |
412  * |          2000          |        4       |
413  * |          3000          |        5       |
414  * |          4000          |        6       |
415  * |          5000          |        7       |
416  * |          6000          |        8       |
417  * |          7000          |        9       |
418  * |          8000          |       10       |
419  * |          9000          |       11       |
420  * |         10000          |       12       |
421  * |         11000          |       13       |
422  * |         12000          |       14       |
423  * |         13000          |       15       |
424  * |         14000          |       16       |
425  * |         14000          |       17       |
426  * |-----------------------------------------|
427  *
428 **/
429 uint16_t nr5g_fapi_calculate_nEpreRatioOfPDCCHToSSB(
430     uint8_t beta_pdcch_1_0)
431 {
432     if (beta_pdcch_1_0 > 0 && beta_pdcch_1_0 <= 2) {
433         return 1;
434     } else if (beta_pdcch_1_0 > 1 && beta_pdcch_1_0 < 17) {
435         return ((beta_pdcch_1_0 - 2) * 1000);
436     } else if (beta_pdcch_1_0 == 17) {
437         return ((beta_pdcch_1_0 - 3) * 1000);
438     } else {
439         return 0;
440     }
441 }
442
443 /** @ingroup group_nr5g_test_config
444  *
445  *  @param[in]   p_dlsch_pdu
446  *  @param[out]  p_pdsch_pdu
447  *
448  *  @return      void
449  *
450  *  @description
451  *  This function fills FAPI PDSCH Pdu from IAPI DLSCHPDU
452  *
453 **/
454 void nr5g_fapi_fill_ssb_pdu(
455     p_nr5g_fapi_phy_instance_t p_phy_instance,
456     PBCHPDUStruct p_bch_pdu,
457     fapi_dl_ssb_pdu_t * p_ssb_pdu)
458 {
459     uint8_t *p_mib = (uint8_t *) & p_bch_pdu->nMIB[0];
460     uint8_t *payload = (uint8_t *) & p_ssb_pdu->bchPayload.bchPayload;
461     nr5g_fapi_stats_t *p_stats;
462
463     p_mib[0] = payload[0];
464     p_mib[1] = payload[1];
465     p_mib[2] = payload[2];
466     p_stats = &p_phy_instance->stats;
467     p_stats->fapi_stats.fapi_dl_tti_ssb_pdus++;
468     p_bch_pdu->nSSBSubcOffset = p_ssb_pdu->ssbSubCarrierOffset;
469     p_bch_pdu->nSSBPrbOffset = p_phy_instance->phy_config.nSSBPrbOffset;
470     p_stats->iapi_stats.iapi_dl_tti_ssb_pdus++;
471 }
472
473 /** @ingroup group_nr5g_test_config
474  *
475  *  @param[in]   p_dlsch_pdu
476  *  @param[out]  p_pdsch_pdu
477  *
478  *  @return      void
479  *
480  *  @description
481  *  This function fills FAPI PDSCH Pdu from IAPI DLSCHPDU
482  *
483 **/
484 void nr5g_fapi_fill_csi_rs_pdu(
485     p_nr5g_fapi_phy_instance_t p_phy_instance,
486     PCSIRSPDUStruct pCSIRSPdu,
487     fapi_dl_csi_rs_pdu_t * p_csi_rs_pdu)
488 {
489     nr5g_fapi_stats_t *p_stats;
490
491     p_stats = &p_phy_instance->stats;
492     p_stats->fapi_stats.fapi_dl_tti_csi_rs_pdus++;
493
494     pCSIRSPdu->nBWPSize = p_csi_rs_pdu->bwpSize;
495     pCSIRSPdu->nBWPStart = p_csi_rs_pdu->bwpStart;
496     pCSIRSPdu->nCDMType = p_csi_rs_pdu->cdmType;
497     pCSIRSPdu->nCSIType = p_csi_rs_pdu->csiType;
498     pCSIRSPdu->nCpType = p_csi_rs_pdu->cyclicPrefix;
499     pCSIRSPdu->nFreqDensity = p_csi_rs_pdu->freqDensity;
500     pCSIRSPdu->nFreqDomain = p_csi_rs_pdu->freqDomain;
501     pCSIRSPdu->nNrOfRBs = p_csi_rs_pdu->nrOfRbs;
502     pCSIRSPdu->nScrambId = p_csi_rs_pdu->scramId;
503     pCSIRSPdu->nStartRB = p_csi_rs_pdu->startRb;
504     pCSIRSPdu->nSubcSpacing = p_csi_rs_pdu->subCarrierSpacing;
505     pCSIRSPdu->nSymbL0 = p_csi_rs_pdu->symbL0;
506     pCSIRSPdu->nSymbL1 = p_csi_rs_pdu->symbL1;
507     pCSIRSPdu->nRow = p_csi_rs_pdu->row;
508     // Not mapping the beamforming parameters
509     // pCSIRSPdu->powerControlOffset = p_csi_rs_pdu->powerControlOffset;
510     // pCSIRSPdu->nEpreRatioToSSB = p_csi_rs_pdu->powerControlOffsetSs;
511     p_stats->iapi_stats.iapi_dl_tti_csi_rs_pdus++;
512 }