O-RAN E Maintenance Release contribution for ODULOW
[o-du/phy.git] / fapi_5g / include / fapi_vendor_extension.h
1 /******************************************************************************
2 *
3 *   Copyright (c) 2019 Intel.
4 *
5 *   Licensed under the Apache License, Version 2.0 (the "License");
6 *   you may not use this file except in compliance with the License.
7 *   You may obtain a copy of the License at
8 *
9 *       http://www.apache.org/licenses/LICENSE-2.0
10 *
11 *   Unless required by applicable law or agreed to in writing, software
12 *   distributed under the License is distributed on an "AS IS" BASIS,
13 *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 *   See the License for the specific language governing permissions and
15 *   limitations under the License.
16 *
17 *******************************************************************************/
18
19 #ifndef _FAPI_VENDOR_EXTENSION_H_
20 #define _FAPI_VENDOR_EXTENSION_H_
21
22 #if defined(__cplusplus)
23 extern "C" {
24 #endif
25
26 #include <stdint.h>
27
28 #include "fapi_interface.h"
29
30 #define FAPI_VENDOR_MESSAGE                                 0x10
31 #define FAPI_VENDOR_EXT_SHUTDOWN_REQUEST                    0x11
32 #define FAPI_VENDOR_EXT_SHUTDOWN_RESPONSE                   0x12
33
34 #ifdef DEBUG_MODE
35 #define FAPI_VENDOR_EXT_DL_IQ_SAMPLES                       0x13
36 #define FAPI_VENDOR_EXT_UL_IQ_SAMPLES                       0x14
37 #define FAPI_VENDOR_EXT_START_RESPONSE                      0x15
38 #define FAPI_VENDOR_EXT_ADD_REMOVE_CORE                     0x16
39 #endif
40
41 #define FAPI_VENDOR_EXT_P7_IND                              0x17
42
43 /* ----- WLS Operation --- */
44 #define FAPI_VENDOR_MSG_HEADER_IND                          0x1A
45
46 // PDSCH Payload
47 #define FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ                   0x1B
48
49 #define MAX_SNR_COUNT                                       (255)
50 #define FAPI_VENDOR_MAX_RXRU_NUM                            16
51 #define FAPI_VENDOR_MAX_TXRU_NUM                            4
52 #define FAPI_VENDOR_MAX_SRS_PORT_PER_UE                     2
53 #define FAPI_VENDOR_MAX_NUM_ANT                             64
54
55 enum {
56     USE_VENDOR_EPREXSSB = 1
57 };
58
59 // Linked list header present at the top of all messages
60     typedef struct _fapi_api_queue_elem {
61         struct _fapi_api_queue_elem *p_next;
62         // p_tx_data_elm_list used for TX_DATA.request processing
63         struct _fapi_api_queue_elem *p_tx_data_elm_list;
64         uint8_t msg_type;
65         uint8_t num_message_in_block;
66         uint32_t msg_len;
67         uint32_t align_offset;
68         uint64_t time_stamp;
69     } fapi_api_queue_elem_t,
70     *p_fapi_api_queue_elem_t;
71 /* ----------------------- */
72
73 #ifdef DEBUG_MODE
74 #define FAPI_MAX_IQ_SAMPLE_FILE_SIZE                        576
75 #define FAPI_MAX_IQ_SAMPLE_DL_PORTS                          16
76 #define FAPI_MAX_IQ_SAMPLE_UL_PORTS                           2
77 #define FAPI_MAX_IQ_SAMPLE_UL_VIRTUAL_PORTS                  16
78 #define FAPI_MAX_IQ_SAMPLE_UL_ANTENNA                        64
79 #define FAPI_MAX_IQ_SAMPLE_BUFFER_SIZE                     4096
80
81 #define FAPI_MAX_NUM_SET_CORE_MASK ( 4 )
82 #define FAPI_MAX_MASK_OPTIONS      ( 4 )
83 #define FAPI_NUM_SPLIT_OPTIONS     ( 22 )
84 #endif
85
86     typedef struct {
87         uint16_t hopping_id;
88         uint8_t carrier_aggregation_level;
89         uint8_t group_hop_flag;
90         uint8_t sequence_hop_flag;
91         // uint8_t                     nDMRS_type_A_pos;
92         uint8_t prach_nr_of_rx_ru;
93         uint8_t nr_of_dl_ports;
94         uint8_t nr_of_ul_ports;
95         uint16_t urllc_capable;
96         uint16_t urllc_mini_slot_mask;
97         uint8_t ssb_subc_spacing;
98         uint8_t use_vendor_EpreXSSB;  // values: USE_VENDOR_EPREXSSB - use; else don't use
99         uint8_t pad[2];
100     } fapi_config_req_vendor_msg_t;
101
102     typedef struct {
103         uint16_t sfn;
104         uint16_t slot;
105         uint32_t mode;
106 #ifdef DEBUG_MODE
107         uint32_t count;
108         uint32_t period;
109 #endif
110     } fapi_start_req_vendor_msg_t;
111
112     typedef struct {
113         uint16_t sfn;
114         uint16_t slot;
115     } fapi_stop_req_vendor_msg_t;
116
117 // P7 vendor extensions
118     typedef struct {
119         uint8_t nr_of_antenna_ports;
120         uint8_t nr_of_rx_ru;
121         uint8_t pad[2];
122         uint8_t rx_ru_idx[FAPI_VENDOR_MAX_RXRU_NUM];
123         // open for extension for new fields from ULSCHPDUStruct
124     } fapi_vendor_ul_pusch_pdu_t;
125
126     typedef struct {
127         uint8_t nr_of_rx_ru;
128         uint8_t pad[1];
129         uint16_t group_id;
130         uint8_t rx_ru_idx[FAPI_VENDOR_MAX_RXRU_NUM];
131         // open for extension for new fields from ULCCHUCIPDUStruct
132     } fapi_vendor_ul_pucch_pdu_t;
133
134     typedef struct {
135         uint8_t nr_of_rx_ru;
136         uint8_t pad[3];
137         uint8_t rx_ru_idx[FAPI_VENDOR_MAX_RXRU_NUM];
138         // open for extension for new fields from SRSPDUStruct
139     } fapi_vendor_ul_srs_pdu_t;
140
141     typedef struct {
142         uint16_t pdu_type;
143         uint16_t pad;
144         union {
145             fapi_vendor_ul_pusch_pdu_t pusch_pdu;
146             fapi_vendor_ul_pucch_pdu_t pucch_pdu;
147             fapi_vendor_ul_srs_pdu_t srs_pdu;
148             // open for extension for prach vendor type (as in fapi_ul_tti_req_pdu_t)
149         } pdu;
150     } fapi_vendor_ul_tti_req_pdu_t;
151
152     typedef struct {
153         fapi_vendor_ul_tti_req_pdu_t ul_pdus[FAPI_MAX_NUMBER_UL_PDUS_PER_TTI];
154         uint8_t num_ul_pdu;
155         uint8_t pad[3];
156         uint32_t sym;
157         // open for extension for new fields from PULConfigRequestStruct
158     } fapi_vendor_ul_tti_req_t;
159
160     typedef struct {
161         uint16_t epre_ratio_of_pdcch_to_ssb;
162         uint16_t epre_ratio_of_dmrs_to_ssb;
163         // open for extension for new fields from DCIPDUStruct
164     } fapi_vendor_dl_dci_t;
165
166     typedef struct {
167         uint16_t num_dl_dci;
168         uint8_t pad[2];
169         fapi_vendor_dl_dci_t dl_dci[FAPI_MAX_NUMBER_DL_DCI];
170     } fapi_vendor_dl_pdcch_pdu_t;
171
172    typedef struct {
173         uint16_t epre_ratio_of_pdsch_to_ssb;
174         uint16_t epre_ratio_of_dmrs_to_ssb;
175         uint8_t nr_of_antenna_ports;
176         uint8_t pad[3];
177         uint8_t tx_ru_idx[FAPI_VENDOR_MAX_TXRU_NUM];
178         // open for extension for new fields from DLSCHPDUStruct
179     } fapi_vendor_dl_pdsch_pdu_t;
180
181     typedef struct {
182         uint16_t epre_ratio_to_ssb;
183         uint8_t pad[2];
184     } fapi_vendor_csi_rs_pdu_t;
185
186     typedef struct {
187         uint16_t pdu_type;
188         uint16_t pdu_size;
189         union {
190             fapi_vendor_dl_pdcch_pdu_t pdcch_pdu;
191             fapi_vendor_dl_pdsch_pdu_t pdsch_pdu;
192             fapi_vendor_csi_rs_pdu_t csi_rs_pdu;
193             // open for extension for ssb vendor types (as in fapi_dl_tti_req_pdu_t)
194         } pdu;
195     } fapi_vendor_dl_tti_req_pdu_t;
196
197     typedef struct {
198         uint32_t sym;
199         uint16_t lte_crs_carrier_freq_dl;
200         uint8_t lte_crs_present;
201         uint8_t lte_crs_carrier_bandwidth_dl;
202         uint8_t lte_crs_nr_of_crs_ports;
203         uint8_t lte_crs_v_shift;
204         uint8_t pdcch_precoder_en;
205         uint8_t ssb_precoder_en;
206         uint8_t num_pdus;
207         uint8_t pad[3];
208         fapi_vendor_dl_tti_req_pdu_t pdus[FAPI_MAX_PDUS_PER_SLOT];
209         // open for extension for new fields from DLConfigRequestStruct
210     } fapi_vendor_dl_tti_req_t;
211
212     typedef struct {
213         uint16_t pdu_type;
214         uint16_t pdu_size;
215         fapi_vendor_dl_pdcch_pdu_t pdcch_pdu_config;
216     } fapi_vendor_dci_pdu_t;
217
218     typedef struct {
219         uint32_t sym;
220         uint8_t num_pdus;
221         uint8_t pad[3];
222         fapi_vendor_dci_pdu_t pdus[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT];
223         // open for extension for new fields from ULDCIRequestStruct
224     } fapi_vendor_ul_dci_req_t;
225
226     typedef struct {
227         uint32_t sym;
228         // open for extension for new fields from TXRequestStruct
229     } fapi_vendor_tx_data_req_t;
230
231     typedef struct {
232         fapi_vendor_dl_tti_req_t dl_tti_req;
233         fapi_vendor_ul_tti_req_t ul_tti_req;
234         fapi_vendor_ul_dci_req_t ul_dci_req;
235         fapi_vendor_tx_data_req_t tx_data_req;
236     } fapi_vendor_p7_msg_t;
237
238 // P7 vendor extensions end
239
240     typedef struct {
241         fapi_msg_t header;
242         fapi_config_req_vendor_msg_t config_req_vendor;
243         fapi_start_req_vendor_msg_t start_req_vendor;
244         fapi_stop_req_vendor_msg_t stop_req_vendor;
245         fapi_vendor_p7_msg_t p7_req_vendor;
246     } fapi_vendor_msg_t;
247
248     typedef struct {
249         fapi_msg_t header;
250         uint16_t sfn;
251         uint16_t slot;
252         uint32_t test_type;
253     } fapi_vendor_ext_shutdown_req_t;
254
255     typedef struct {
256         fapi_msg_t header;
257         uint16_t sfn;
258         uint16_t slot;
259         uint32_t nStatus;
260     } fapi_vendor_ext_shutdown_res_t;
261
262     typedef struct {
263         int16_t nSNR[MAX_SNR_COUNT];
264         int16_t pad;
265     } fapi_vendor_ext_snr_t;
266
267     typedef struct {
268         uint8_t nr_of_port;
269         uint8_t nr_of_rx_ant;
270         uint16_t nr_of_rbs;
271         uint8_t is_chan_est_pres;
272         uint8_t pad[3];
273         int16_t *p_srs_chan_est[FAPI_VENDOR_MAX_SRS_PORT_PER_UE]
274             [FAPI_VENDOR_MAX_NUM_ANT];
275     } fapi_vendor_ext_srs_pdu_t;
276
277     typedef struct {
278         uint8_t num_pdus;
279         uint8_t pad[3];
280         fapi_vendor_ext_srs_pdu_t srs_pdus[FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT];
281     } fapi_vendor_ext_srs_ind_t;
282
283     typedef struct {
284         uint32_t carrier_idx;
285         uint32_t sym;
286     } fapi_vendor_ext_slot_ind_t;
287
288     typedef struct {
289         uint32_t carrier_idx;
290         uint32_t sym;
291     } fapi_vendor_ext_rx_data_ind_t;
292
293     typedef struct {
294         uint32_t carrier_idx;
295         uint32_t sym;
296     } fapi_vendor_ext_crc_ind_t;
297
298     typedef struct {
299         uint32_t carrier_idx;
300         uint32_t sym;
301     } fapi_vendor_ext_uci_ind_t;
302
303     typedef struct {
304         fapi_msg_t header;
305         fapi_vendor_ext_snr_t crc_snr;
306         fapi_vendor_ext_snr_t uci_snr;
307         fapi_vendor_ext_srs_ind_t srs_ind;
308         fapi_vendor_ext_slot_ind_t slot_ind;
309         fapi_vendor_ext_rx_data_ind_t rx_data_ind;        
310         fapi_vendor_ext_crc_ind_t crc_ind;
311         fapi_vendor_ext_uci_ind_t uci_ind;
312     } fapi_vendor_p7_ind_msg_t;
313
314 #ifdef DEBUG_MODE
315     typedef struct {
316         uint32_t carrNum;
317         uint32_t numSubframes;
318         uint32_t nIsRadioMode;
319         uint32_t timerModeFreqDomain;
320         uint32_t phaseCompensationEnable;
321         uint32_t startFrameNum;
322         uint32_t startSlotNum;
323         uint32_t startSymNum;
324         char filename_in_ul_iq[FAPI_MAX_IQ_SAMPLE_UL_VIRTUAL_PORTS]
325             [FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
326         char filename_in_ul_iq_compressed[FAPI_MAX_IQ_SAMPLE_UL_VIRTUAL_PORTS]
327             [FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
328         char filename_in_prach_iq[FAPI_MAX_IQ_SAMPLE_UL_VIRTUAL_PORTS]
329             [FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
330         char filename_in_srs_iq[FAPI_MAX_IQ_SAMPLE_UL_ANTENNA]
331             [FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
332         char filename_out_dl_iq[FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
333         char filename_out_dl_beam[FAPI_MAX_IQ_SAMPLE_DL_PORTS]
334             [FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
335         char filename_out_ul_beam[FAPI_MAX_IQ_SAMPLE_UL_VIRTUAL_PORTS]
336             [FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
337         char filename_out_dl_iq_compressed[FAPI_MAX_IQ_SAMPLE_FILE_SIZE];
338
339         /* DL Compression add */
340         uint16_t nDLCompressionIdx;
341         uint16_t nDLCompiqWidth;
342         uint16_t nDLCompScaleFactor;
343         uint16_t nDLCompreMask;
344
345         /*nULDecompressionIdx, determine the UL Decompression method, Value:0->4*/
346         /*0:NONE,  1:BLKFLOAT,  2:BLKSCALE,  3:ULAW,  4:MODULATION*/
347         uint16_t nULDecompressionIdx;
348         uint16_t nULDecompiqWidth;
349
350         uint8_t buffer[FAPI_MAX_IQ_SAMPLE_BUFFER_SIZE];
351     } fapi_vendor_ext_iq_samples_info_t;
352
353     typedef struct {
354         fapi_msg_t header;
355         fapi_vendor_ext_iq_samples_info_t iq_samples_info;
356     } fapi_vendor_ext_iq_samples_req_t;
357
358     typedef struct {
359         fapi_msg_t header;
360     } fapi_vendor_ext_dl_iq_samples_res_t;
361
362     typedef struct {
363         fapi_msg_t header;
364     } fapi_vendor_ext_ul_iq_samples_res_t;
365
366     typedef struct {
367         fapi_msg_t header;
368     } fapi_vendor_ext_start_response_t;
369
370     typedef struct {
371         uint32_t eOption;
372         uint64_t nCoreMask[FAPI_MAX_MASK_OPTIONS][FAPI_MAX_NUM_SET_CORE_MASK];
373         uint32_t nMacOptions[FAPI_NUM_SPLIT_OPTIONS];
374     } fapi_vendor_ext_add_remove_core_info_t;
375
376     typedef struct {
377         fapi_msg_t header;
378         fapi_vendor_ext_add_remove_core_info_t add_remove_core_info;
379     } fapi_vendor_ext_add_remove_core_msg_t;
380 #endif
381
382 #if defined(__cplusplus)
383 }
384 #endif
385 #endif                          // FAPI_VENDOR_EXTENSION_H_