}
}
}
-#ifdef NR_DRX
- /* Drx configuration */
-
- schCellCfg.drxInfo.drxOnDurationTimer.onDurationTimerValInMs = macCellCfg->drxInfo.drxOnDurationTimer.onDurationTimerValInMs;
- if(!macCellCfg->drxInfo.drxOnDurationTimer.onDurationTimerValInMs)
- schCellCfg.drxInfo.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = \
- macCellCfg->drxInfo.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds;
- else
- schCellCfg.drxInfo.drxOnDurationTimer.onDurationtimerValue.milliSeconds = \
- macCellCfg->drxInfo.drxOnDurationTimer.onDurationtimerValue.milliSeconds;
- schCellCfg.drxInfo.drxInactivityTimer = macCellCfg->drxInfo.drxInactivityTimer;
- schCellCfg.drxInfo.drxHarqRttTimerDl = macCellCfg->drxInfo.drxHarqRttTimerDl;
- schCellCfg.drxInfo.drxHarqRttTimerUl = macCellCfg->drxInfo.drxHarqRttTimerUl;
- schCellCfg.drxInfo.drxRetransmissionTimerDl = macCellCfg->drxInfo.drxRetransmissionTimerDl;
- schCellCfg.drxInfo.drxRetransmissionTimerUl = macCellCfg->drxInfo.drxRetransmissionTimerUl;
- schCellCfg.drxInfo.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = macCellCfg->drxInfo.drxLongCycleStartOffset.\
- drxLongCycleStartOffsetChoice;
- schCellCfg.drxInfo.drxLongCycleStartOffset.drxLongCycleStartOffsetVal = macCellCfg->drxInfo.drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
- schCellCfg.drxInfo.shortDrx.drxShortCycle = macCellCfg->drxInfo.shortDrx.drxShortCycle;
- schCellCfg.drxInfo.shortDrx.drxShortCycleTimer = macCellCfg->drxInfo.shortDrx.drxShortCycleTimer;
- schCellCfg.drxInfo.drxSlotOffset = macCellCfg->drxInfo.drxSlotOffset;
-#endif
#ifdef NR_TDD
memcpy(&schCellCfg.tddCfg, &macCellCfg->tddCfg, sizeof(TDDCfg));
macCellGrpCfg->phrCfg.modeOtherCG = macCellGrp.phrCfg.phrOtherCG;
}
+#ifdef NR_DRX
+ /* Copy Drx configuration */
+
+ macCellGrpCfg->drxCfg.drxOnDurationTimer.onDurationTimerValInMs = macCellGrp.drxCfg.drxOnDurationTimer.onDurationTimerValInMs;
+ if(!macCellGrp.drxCfg.drxOnDurationTimer.onDurationTimerValInMs)
+ macCellGrpCfg->drxCfg.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = \
+ macCellGrp.drxCfg.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds;
+ else
+ macCellGrpCfg->drxCfg.drxOnDurationTimer.onDurationtimerValue.milliSeconds = \
+ macCellGrp.drxCfg.drxOnDurationTimer.onDurationtimerValue.milliSeconds;
+ macCellGrpCfg->drxCfg.drxInactivityTimer = macCellGrp.drxCfg.drxInactivityTimer;
+ macCellGrpCfg->drxCfg.drxHarqRttTimerDl = macCellGrp.drxCfg.drxHarqRttTimerDl;
+ macCellGrpCfg->drxCfg.drxHarqRttTimerUl = macCellGrp.drxCfg.drxHarqRttTimerUl;
+ macCellGrpCfg->drxCfg.drxRetransmissionTimerDl = macCellGrp.drxCfg.drxRetransmissionTimerDl;
+ macCellGrpCfg->drxCfg.drxRetransmissionTimerUl = macCellGrp.drxCfg.drxRetransmissionTimerUl;
+ macCellGrpCfg->drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = macCellGrp.drxCfg.drxLongCycleStartOffset.\
+ drxLongCycleStartOffsetChoice;
+ macCellGrpCfg->drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetVal = macCellGrp.drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ macCellGrpCfg->drxCfg.shortDrxPres = macCellGrp.drxCfg.shortDrxPres;
+ if(macCellGrpCfg->drxCfg.shortDrxPres)
+ {
+ macCellGrpCfg->drxCfg.shortDrx.drxShortCycle = macCellGrp.drxCfg.shortDrx.drxShortCycle;
+ macCellGrpCfg->drxCfg.shortDrx.drxShortCycleTimer = macCellGrp.drxCfg.shortDrx.drxShortCycleTimer;
+ }
+ macCellGrpCfg->drxCfg.drxSlotOffset = macCellGrp.drxCfg.drxSlotOffset;
+#endif
return ROK;
}
**/
void schDlReleaseHqProcess(SchDlHqProcCb *hqP)
{
- cmLListDeleteLList(&hqP->dlLcPrbEst.dedLcList);
- cmLListDeleteLList(&hqP->dlLcPrbEst.defLcList);
- schDlHqDeleteFromInUseList(hqP);
- schDlHqAddToFreeList(hqP);
+ if(hqP)
+ {
+ cmLListDeleteLList(&hqP->dlLcPrbEst.dedLcList);
+ cmLListDeleteLList(&hqP->dlLcPrbEst.defLcList);
+ schDlHqDeleteFromInUseList(hqP);
+ schDlHqAddToFreeList(hqP);
+ }
}
/*******************************************************************
#define PAGING_SCHED_DELTA 4
-#ifdef NR_DRX
-/* Macros for Drx configuration */
-#define DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS true
-#define DRX_ONDURATION_TIMER_VALUE_IN_SUBMS 32
-#define DRX_ONDURATION_TIMER_VALUE_IN_MS 1
-#define DRX_INACTIVITY_TIMER 2
-#define DRX_HARQ_RTT_TIMER_DL 56
-#define DRX_HARQ_RTT_TIMER_UL 56
-#define DRX_RETRANSMISSION_TIMER_DL 4
-#define DRX_RETRANSMISSION_TIMER_UL 4
-#define DRX_LONG_CYCLE_START_OFFSET_CHOICE 20
-#define DRX_LONG_CYCLE_START_OFFSET_VAL 8
-#define DRX_SHORT_CYCLE 2
-#define DRX_SHORT_CYCLE_TIMER 2
-#define DRX_SLOT_OFFSET 0
-#endif
-
typedef enum
{
MAC_DU_APP_RSP_NOK,
uint8_t drxShortCycleTimer;
}ShortDrx;
-typedef struct drxInfo
+typedef struct drxCfg
{
DrxOnDurationTimer drxOnDurationTimer;
uint16_t drxInactivityTimer;
uint16_t drxRetransmissionTimerDl;
uint16_t drxRetransmissionTimerUl;
DrxLongCycleStartOffset drxLongCycleStartOffset;
+ bool shortDrxPres;
ShortDrx shortDrx;
- uint8_t drxSlotOffset;
-}DrxInfo;
+ uint8_t drxSlotOffset;
+}DrxCfg;
#endif
typedef struct macCellCfg
uint8_t dmrsTypeAPos; /* DMRS Type A position */
PlmnInfoList plmnInfoList; /* Consits of PlmnId and Snssai list */
//RrmPolicy *rrmPolicy; /* RRM policy details */
-#ifdef NR_DRX
- DrxInfo drxInfo; /* Drx info */
-#endif
}MacCellCfg;
typedef struct macCellCfgCfm
BsrTmrCfg bsrTmrCfg;
bool phrCfgSetupPres; /* true/false: phrCfgSetup/phrCfgRelease */
PhrCfg phrCfg;
+#ifdef NR_DRX
+ DrxCfg drxCfg;
+#endif
}MacCellGrpCfg;
typedef struct phyCellGrpCfg
uint8_t drxShortCycleTimer;
}SchShortDrx;
-typedef struct schDrxInfo
+typedef struct schDrxCfg
{
SchDrxOnDurationTimer drxOnDurationTimer;
uint16_t drxInactivityTimer;
uint16_t drxRetransmissionTimerDl;
uint16_t drxRetransmissionTimerUl;
SchDrxLongCycleStartOffset drxLongCycleStartOffset;
+ bool shortDrxPres;
SchShortDrx shortDrx;
- uint8_t drxSlotOffset;
-}SchDrxInfo;
+ uint8_t drxSlotOffset;
+}SchDrxCfg;
#endif
typedef struct schCellCfg
#ifdef NR_TDD
TDDCfg tddCfg; /* TDD Cfg */
#endif
-#ifdef NR_DRX
- SchDrxInfo drxInfo; /* Drx configuration */
-#endif
}SchCellCfg;
typedef struct schCellCfgCfm
SchSchedReqCfg schedReqCfg;
SchTagCfg tagCfg;
SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */
+#ifdef NR_DRX
+ SchDrxCfg drxCfg; /* Drx configuration */
+#endif
}SchMacCellGrpCfg;
/* Physical Cell Group Configuration */
#include "CNUEPagingIdentity.h"
#include "PagingCell-Item.h"
#include "UL-DCCH-Message.h"
+#include "DRX-ConfigRrc.h"
#include "cu_stub_sctp.h"
#include "cu_stub_egtp.h"
return rrcMsgType;
}
+#ifdef NR_DRX
+/*******************************************************************
+ *
+ * @brief fill long cycle offset value of drx
+ *
+ * @details
+ *
+ * Function : fillLongCycleOffsetValue
+ *
+ * Functionality: fill long cycle offset value of drx
+ *
+ * @params[in] DrxLongCycleStartOffset drxLongCycleStartOffset,
+ * struct DRX_ConfigRrc__drx_LongCycleStartOffset recvedLongCycleOffsetVal
+ *
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+void fillLongCycleOffsetValue(DrxLongCycleStartOffset *drxLongCycleStartOffset, struct DRX_ConfigRrc__recvedLongCycleOffsetVal *recvedLongCycleOffsetVal)
+{
+
+ drxLongCycleStartOffset->drxLongCycleStartOffsetChoice = recvedLongCycleOffsetVal->present;
+ switch(recvedLongCycleOffsetVal->present)
+ {
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms10:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms10;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms20:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms20;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms32:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms32;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms40:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms40;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms60:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms60;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms64:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms64;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms70:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms70;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms80:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms80;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms128:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms128;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms160:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms160;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms256:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms256;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms320:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms320;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms512:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms512;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms640:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms640;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms1024:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms1024;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms1280:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms1280;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms2048:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms2048;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms2560:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms2560;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms5120:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms5120;
+ break;
+ }
+ case DRX_ConfigRrc__recvedLongCycleOffsetVal_PR_ms10240:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = recvedLongCycleOffsetVal->choice.ms10240;
+ break;
+ }
+ default :
+ break;
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Extract configuration from DRX_ConfigRrc
+ * and store the drx configuration in UeCb
+ *
+ * @details
+ *
+ * Function : storeDrxCfgInUeCb
+ *
+ * Functionality: Store drx configuration in UeCb
+ *
+ * @params[in] (struct DRX_ConfigRrc *setup, DrxCfg *drxCfg)
+ *
+ * @return void
+ * ****************************************************************/
+void storeDrxCfgInUeCb(struct DRX_ConfigRrc *drxSetup, DrxCfg *drxCfg)
+{
+ if(drxSetup)
+ {
+ switch(drxSetup->drx_onDurationTimer.present)
+ {
+ case DRX_ConfigRrc__drx_onDurationTimer_PR_NOTHING:
+ break;
+ case DRX_ConfigRrc__drx_onDurationTimer_PR_milliSeconds:
+ {
+ drxCfg->drxOnDurationTimer.onDurationTimerValInMs = true;
+ drxCfg->drxOnDurationTimer.onDurationtimerValue.milliSeconds=drxSetup->drx_onDurationTimer.choice.milliSeconds;
+ break;
+ }
+ case DRX_ConfigRrc__drx_onDurationTimer_PR_subMilliSeconds:
+ {
+ drxCfg->drxOnDurationTimer.onDurationTimerValInMs = false;
+ drxCfg->drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = drxSetup->drx_onDurationTimer.choice.subMilliSeconds;
+ break;
+ }
+ }
+ }
+ fillLongCycleOffsetValue(&drxCfg->drxLongCycleStartOffset, &drxSetup->drx_LongCycleStartOffset);
+ drxCfg->drxInactivityTimer = drxSetup->drx_InactivityTimer;
+ drxCfg->drxHarqRttTimerDl = drxSetup->drx_HARQ_RTT_TimerDL;
+ drxCfg->drxHarqRttTimerUl = drxSetup->drx_HARQ_RTT_TimerUL;
+ drxCfg->drxRetransmissionTimerDl = drxSetup->drx_RetransmissionTimerDL;
+ drxCfg->drxRetransmissionTimerUl = drxSetup->drx_RetransmissionTimerUL;
+ drxCfg->drxSlotOffset = drxSetup->drx_SlotOffset;
+ if(drxSetup->shortDRX)
+ {
+ drxCfg->shortDrxPres=true;
+ drxCfg->shortDrx.drxShortCycle = drxSetup->shortDRX->drx_ShortCycle;
+ drxCfg->shortDrx.drxShortCycleTimer = drxSetup->shortDRX->drx_ShortCycleTimer;
+ }
+ else
+ drxCfg->shortDrxPres=false;
+}
+#endif
+
/*******************************************************************
*
* @brief Extract configuration from CellGroupConfig
RLC_BearerConfig_t *rlcCfg = NULLP;
RLC_Config_t *rlcLcCfg = NULLP;
LogicalChannelConfig_t *macLcCfg = NULLP;
+#ifdef NR_DRX
+ DrxCfg drxCfg;
+#endif
if(ueCb == NULLP)
{
return RFAILED;
}
+#ifdef NR_DRX
+ if(cellGrpCfg->mac_CellGroupConfig)
+ {
+ if(cellGrpCfg->mac_CellGroupConfig->drx_ConfigRrc)
+ {
+ switch(cellGrpCfg->mac_CellGroupConfig->drx_ConfigRrc->present)
+ {
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_NOTHING:
+ break;
+
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_setup:
+ {
+ storeDrxCfgInUeCb(cellGrpCfg->mac_CellGroupConfig->drx_ConfigRrc->choice.setup, &ueCb->drxCfg);
+ break;
+ }
+
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_release:
+ break;
+ }
+ }
+ }
+#endif
+
for(rbIdx = 0; rbIdx < cellGrpCfg->rlc_BearerToAddModList->list.count; rbIdx++)
{
srbFound = false;
if(rval.code == RC_FAIL || rval.code == RC_WMORE)
{
- DU_LOG("\nERROR --> F1AP : ASN decode failed");
+ DU_LOG("\nERROR --> F1AP : ASN decode failed in extractDuToCuRrcCont");
return RFAILED;
}
printf("\n");
}
return ret;
}
-
+/*******************************************************************
+ *
+ * @brief Build the drx cycle
+ *
+ * @details
+ *
+ * Function : BuildDrxCycle
+ *
+ * Functionality: Build drx cycle IE
+ *
+ * @params[in] pointer to DRXCycle_t
+ *
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ ******************************************************************/
+uint8_t BuildDrxCycle(DRXCycle_t *drxCycle)
+{
+ drxCycle->longDRXCycleLength = LongDRXCycleLength_ms40;
+ CU_ALLOC(drxCycle->shortDRXCycleLength, sizeof(ShortDRXCycleLength_t));
+ if(!drxCycle->shortDRXCycleLength)
+ {
+ DU_LOG("\nERROR --> F1AP : Memory allocation failed for shortDRXCycleLength");
+ return RFAILED;
+ }
+ *(drxCycle->shortDRXCycleLength) = ShortDRXCycleLength_ms4;
+
+ CU_ALLOC(drxCycle->shortDRXCycleTimer, sizeof(ShortDRXCycleTimer_t));
+ if(!drxCycle->shortDRXCycleTimer)
+ {
+ DU_LOG("\nERROR --> F1AP : Memory allocation failed for shortDRXCycleTimer");
+ return RFAILED;
+ }
+ *(drxCycle->shortDRXCycleTimer) = 4;
+ return ROK;
+}
/*******************************************************************
*
* @brief Free CuToDuContainer
if(ueCb->state == UE_HANDOVER_IN_PROGRESS)
elementCnt = 7;
else
+ {
+#ifdef NR_DRX
+ elementCnt = 12;
+#else
elementCnt = 11;
+#endif
+ }
ueSetReq->protocolIEs.list.count = elementCnt;
ueSetReq->protocolIEs.list.size = elementCnt * sizeof(UEContextSetupRequestIEs_t *);
if(ueCb->state != UE_HANDOVER_IN_PROGRESS)
{
+ /*Drx cycle*/
+#ifdef NR_DRX
+ idx++;
+ ueSetReq->protocolIEs.list.array[idx]->id = ProtocolIE_ID_id_DRXCycle;
+ ueSetReq->protocolIEs.list.array[idx]->criticality = Criticality_ignore;
+ ueSetReq->protocolIEs.list.array[idx]->value.present = UEContextSetupRequestIEs__value_PR_DRXCycle;
+ if(BuildDrxCycle(&ueSetReq->protocolIEs.list.array[idx]->value.choice.DRXCycle) != ROK)
+ {
+ DU_LOG("\nERROR --> F1AP : Failed to build drx cycle");
+ break;
+ }
+#endif
/*Special Cells to be SetupList*/
idx++;
ueSetReq->protocolIEs.list.array[idx]->id = ProtocolIE_ID_id_SCell_ToBeSetup_List;
typedef struct cuCellCb CuCellCb;
+#ifdef NR_DRX
+/* The following list of structures is taken from the DRX-Config section of specification 33.331. */
+typedef struct drxOnDurationTimer
+{
+ bool onDurationTimerValInMs;
+ union
+ {
+ uint8_t subMilliSeconds;
+ uint16_t milliSeconds;
+ }onDurationtimerValue;
+}DrxOnDurationTimer;
+
+typedef struct drxLongCycleStartOffset
+{
+ uint16_t drxLongCycleStartOffsetChoice;
+ uint16_t drxLongCycleStartOffsetVal;
+}DrxLongCycleStartOffset;
+
+typedef struct shortDrx
+{
+ uint16_t drxShortCycle;
+ uint8_t drxShortCycleTimer;
+}ShortDrx;
+
+typedef struct drxCfg
+{
+ DrxOnDurationTimer drxOnDurationTimer;
+ uint16_t drxInactivityTimer;
+ uint8_t drxHarqRttTimerDl;
+ uint8_t drxHarqRttTimerUl;
+ uint16_t drxRetransmissionTimerDl;
+ uint16_t drxRetransmissionTimerUl;
+ DrxLongCycleStartOffset drxLongCycleStartOffset;
+ bool shortDrxPres;
+ ShortDrx shortDrx;
+ uint8_t drxSlotOffset;
+}DrxCfg;
+#endif
+
typedef struct cuUeCb
{
CuCellCb *cellCb;
DrbInfo drbList[MAX_NUM_DRB];
F1apMsgDb f1apMsgDb;
UeState state;
+#ifdef NR_DRX
+ DrxCfg drxCfg;
+#endif
HandoverInfo hoInfo;
}CuUeCb;
#endif
-#ifdef NR_DRX
- /* Storing the DRX configuration */
- memset(&duCfgParam.macCellCfg.drxInfo, 0, sizeof(DrxInfo));
- duCfgParam.macCellCfg.drxInfo.drxOnDurationTimer.onDurationTimerValInMs = DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS;
- if(!duCfgParam.macCellCfg.drxInfo.drxOnDurationTimer.onDurationTimerValInMs)
- duCfgParam.macCellCfg.drxInfo.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = \
- DRX_ONDURATION_TIMER_VALUE_IN_SUBMS;
- else
- duCfgParam.macCellCfg.drxInfo.drxOnDurationTimer.onDurationtimerValue.milliSeconds = \
- DRX_ONDURATION_TIMER_VALUE_IN_MS;
- duCfgParam.macCellCfg.drxInfo.drxInactivityTimer = DRX_INACTIVITY_TIMER;
- duCfgParam.macCellCfg.drxInfo.drxHarqRttTimerDl = DRX_HARQ_RTT_TIMER_DL;
- duCfgParam.macCellCfg.drxInfo.drxHarqRttTimerUl = DRX_HARQ_RTT_TIMER_UL;
- duCfgParam.macCellCfg.drxInfo.drxRetransmissionTimerDl = DRX_RETRANSMISSION_TIMER_DL;
- duCfgParam.macCellCfg.drxInfo.drxRetransmissionTimerUl = DRX_RETRANSMISSION_TIMER_UL;
- duCfgParam.macCellCfg.drxInfo.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = DRX_LONG_CYCLE_START_OFFSET_CHOICE;
- duCfgParam.macCellCfg.drxInfo.drxLongCycleStartOffset.drxLongCycleStartOffsetVal = DRX_LONG_CYCLE_START_OFFSET_VAL;
- duCfgParam.macCellCfg.drxInfo.shortDrx.drxShortCycle = DRX_SHORT_CYCLE;
- duCfgParam.macCellCfg.drxInfo.shortDrx.drxShortCycleTimer = DRX_SHORT_CYCLE_TIMER;
- duCfgParam.macCellCfg.drxInfo.drxSlotOffset = DRX_SLOT_OFFSET;
-#endif
return ROK;
}
#define DEDICATED_RATIO 10
#define NUM_OF_SUPPORTED_SLICE 2
+#ifdef NR_DRX
+/* Macros for Drx configuration */
+#define DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS true
+#define DRX_ONDURATION_TIMER_VALUE_IN_SUBMS 32
+#define DRX_ONDURATION_TIMER_VALUE_IN_MS 1
+#define DRX_INACTIVITY_TIMER 2
+#define DRX_HARQ_RTT_TIMER_DL 56
+#define DRX_HARQ_RTT_TIMER_UL 56
+#define DRX_RETRANSMISSION_TIMER_DL 4
+#define DRX_RETRANSMISSION_TIMER_UL 4
+#define DRX_LONG_CYCLE_START_OFFSET_CHOICE 20
+#define DRX_LONG_CYCLE_START_OFFSET_VAL 8
+#define DRX_SHORT_CYCLE_PRESENT true
+#define DRX_SHORT_CYCLE 2
+#define DRX_SHORT_CYCLE_TIMER 2
+#define DRX_SLOT_OFFSET 0
+#endif
+
typedef enum
{
GNBDU,
}
}
+/************************************************************************
+ *
+ * @brief Converts enum values into actual value of Long drx Cycle length
+ *
+ * @details
+ *
+ * Function : convertLongDrxCycleLengthEnumToValue
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts enum values into actual value of Long drx Cycle length
+ *
+ *
+ * @params[in] Enum value of e_LongDRXCycleLength
+ * @return Actual value of long Drx cycle length
+ *
+ * **********************************************************************/
+uint16_t convertLongDrxCycleLengthEnumToValue(e_LongDRXCycleLength longDrxCycleLength)
+{
+ switch(longDrxCycleLength)
+ {
+ case LongDRXCycleLength_ms10:
+ return 10;
+ case LongDRXCycleLength_ms20:
+ return 20;
+ case LongDRXCycleLength_ms32:
+ return 32;
+ case LongDRXCycleLength_ms40:
+ return 40;
+ case LongDRXCycleLength_ms60:
+ return 60;
+ case LongDRXCycleLength_ms64:
+ return 64;
+ case LongDRXCycleLength_ms70:
+ return 70;
+ case LongDRXCycleLength_ms80:
+ return 80;
+ case LongDRXCycleLength_ms128:
+ return 128;
+ case LongDRXCycleLength_ms160:
+ return 160;
+ case LongDRXCycleLength_ms256:
+ return 256;
+ case LongDRXCycleLength_ms320:
+ return 320;
+ case LongDRXCycleLength_ms512:
+ return 512;
+ case LongDRXCycleLength_ms640:
+ return 640;
+ case LongDRXCycleLength_ms1024:
+ return 1024;
+ case LongDRXCycleLength_ms1280:
+ return 1280;
+ case LongDRXCycleLength_ms2048:
+ return 2048;
+ case LongDRXCycleLength_ms2560:
+ return 2560;
+ case LongDRXCycleLength_ms5120:
+ return 5120;
+ case LongDRXCycleLength_ms10240:
+ return 10240;
+ default:
+ return 20;
+ }
+}
+/************************************************************************
+ *
+ * @brief Converts enum values into actual value of Short drx Cycle length
+ *
+ * @details
+ *
+ * Function : convertShortDrxCycleLengthEnumToValue
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts enum values into actual value of Short drx Cycle length
+ *
+ *
+ * @params[in] Enum value of e_ShortDRXCycleLength
+ * @return Actual value of short Drx cycle length
+ *
+ * **********************************************************************/
+uint16_t convertShortDrxCycleLengthEnumToValue(e_ShortDRXCycleLength shortDrxCycleLength)
+{
+ switch(shortDrxCycleLength)
+ {
+ case ShortDRXCycleLength_ms2:
+ return 2;
+ case ShortDRXCycleLength_ms3:
+ return 3;
+ case ShortDRXCycleLength_ms4:
+ return 4;
+ case ShortDRXCycleLength_ms5:
+ return 5;
+ case ShortDRXCycleLength_ms6:
+ return 6;
+ case ShortDRXCycleLength_ms7:
+ return 7;
+ case ShortDRXCycleLength_ms8:
+ return 8;
+ case ShortDRXCycleLength_ms10:
+ return 10;
+ case ShortDRXCycleLength_ms14:
+ return 14;
+ case ShortDRXCycleLength_ms16:
+ return 16;
+ case ShortDRXCycleLength_ms20:
+ return 20;
+ case ShortDRXCycleLength_ms30:
+ return 30;
+ case ShortDRXCycleLength_ms32:
+ return 32;
+ case ShortDRXCycleLength_ms35:
+ return 35;
+ case ShortDRXCycleLength_ms40:
+ return 40;
+ case ShortDRXCycleLength_ms64:
+ return 64;
+ case ShortDRXCycleLength_ms80:
+ return 80;
+ case ShortDRXCycleLength_ms128:
+ return 128;
+ case ShortDRXCycleLength_ms160:
+ return 160;
+ case ShortDRXCycleLength_ms256:
+ return 256;
+ case ShortDRXCycleLength_ms320:
+ return 320;
+ case ShortDRXCycleLength_ms512:
+ return 512;
+ case ShortDRXCycleLength_ms640:
+ return 640;
+ default:
+ return 2;
+ }
+}
+/************************************************************************
+ *
+ * @brief Converts actual value of long drx Cycle length to enum value
+ *
+ * @details
+ *
+ * Function : convertLongDrxCycleLengthValueToEnum
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts actual value of long drx Cycle length to enum value
+ *
+ * @params[in] uint16_t longDRXCycleLength
+ * @return enum value of long drx cycle
+ *
+ * **********************************************************************/
+enum DRX_ConfigRrc__drx_LongCycleStartOffset_PR convertLongDrxCycleLengthValueToEnum(uint16_t longDrxCycleLength)
+{
+ switch(longDrxCycleLength)
+ {
+ case 10:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms10;
+ case 20:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms20;
+ case 32:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms32;
+ case 40:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms40;
+ case 60:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms60;
+ case 64:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms64;
+ case 70:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms70;
+ case 80:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms80;
+ case 128:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms128;
+ case 160:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms160;
+ case 256:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms256;
+ case 320:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms320;
+ case 512:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms512;
+ case 640:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms640;
+ case 1024:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms1024;
+ case 1280:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms1280;
+ case 2048:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms2048;
+ case 2560:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms2560;
+ case 5120:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms5120;
+ case 10240:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms10240;
+ default:
+ return DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms20;
+ }
+}
+/************************************************************************
+ *
+ * @brief Converts actual value of Short drx Cycle length to enum value
+ *
+ * @details
+ *
+ * Function : convertShortDrxCycleLengthValueToEnum
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts actual value of Short drx Cycle length to enum value
+ *
+ * @params[in] uint16_t shortDRXCycleLength
+ * @return enum value of short drx cycle
+ *
+ * **********************************************************************/
+e_DRX_ConfigRrc__shortDRX__drx_ShortCycle convertShortDrxCycleLengthValueToEnum(uint16_t shortDrxCycleLength)
+{
+ switch(shortDrxCycleLength)
+ {
+ case 2:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms2;
+ case 3:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms3;
+ case 4:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms4;
+ case 5:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms5;
+ case 6:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms6;
+ case 7:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms7;
+ case 8:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms8;
+ case 10:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms10;
+ case 14:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms14;
+ case 16:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms16;
+ case 20:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms20;
+ case 30:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms30;
+ case 32:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms32;
+ case 35:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms35;
+ case 40:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms40;
+ case 64:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms64;
+ case 80:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms80;
+ case 128:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms128;
+ case 160:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms160;
+ case 256:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms256;
+ case 320:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms320;
+ case 512:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms512;
+ case 640:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms640;
+ default:
+ return DRX_ConfigRrc__shortDRX__drx_ShortCycle_ms2;
+ }
+}
+/************************************************************************
+ *
+ * @brief Converts actual value of ondurationTime length to enum value
+ *
+ * @details
+ *
+ * Function : convertOnDurationTimerMilliSecondsValueToEnum
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts actual value of ondurationTime to enum value
+ *
+ * @params[in] uint16_t ondurationTime
+ * @return enum value of onDurationTimer in milliSeconds
+ *
+ * **********************************************************************/
+e_DRX_ConfigRrc__drx_onDurationTimer__milliSeconds convertOnDurationTimerMilliSecondsValueToEnum(uint16_t ondurationTime)
+{
+ switch(ondurationTime)
+ {
+ case 1:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1;
+ case 2:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms2;
+ case 3:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms3;
+ case 4:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms4;
+ case 5:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms5;
+ case 6:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms6;
+ case 8:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms8;
+ case 10:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms10;
+ case 20:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms20;
+ case 30:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms30;
+ case 40:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms40;
+ case 50:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms50;
+ case 60:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms60;
+ case 80:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms80;
+ case 100:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms100;
+ case 200:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms200;
+ case 300:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms300;
+ case 400:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms400;
+ case 500:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms500;
+ case 600:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms600;
+ case 800:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms800;
+ case 1000:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1000;
+ case 1200:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1200;
+ case 1600:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1600;
+ default:
+ return DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1;
+ }
+}
+
+/************************************************************************
+ *
+ * @brief Converts enum value of ondurationTime length to actual value
+ *
+ * @details
+ *
+ * Function : convertOnDurationTimerMilliSecondsEnumToValue
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts enum value of ondurationTime to actual value
+ *
+ * @params[in] e_DRX_ConfigRrc__drx_onDurationTimer__milliSeconds ondurationTime
+ * @return actual value of onDurationTimer in milliSeconds
+ *
+ * **********************************************************************/
+uint16_t convertOnDurationTimerMilliSecondsEnumToValue(e_DRX_ConfigRrc__drx_onDurationTimer__milliSeconds ondurationTime)
+{
+ switch(ondurationTime)
+ {
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1:
+ return 1;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms2:
+ return 2;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms3:
+ return 3;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms4:
+ return 4;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms5:
+ return 5;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms6:
+ return 6;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms8:
+ return 8;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms10:
+ return 10;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms20:
+ return 20;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms30:
+ return 30;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms40:
+ return 40;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms50:
+ return 50;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms60:
+ return 60;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms80:
+ return 80;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms100:
+ return 100;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms200:
+ return 200;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms300:
+ return 300;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms400:
+ return 400;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms500:
+ return 500;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms600:
+ return 600;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms800:
+ return 800;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1000:
+ return 1000;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1200:
+ return 1200;
+ case DRX_ConfigRrc__drx_onDurationTimer__milliSeconds_ms1600:
+ return 1600;
+ default:
+ return 1;
+ }
+}
+
+/************************************************************************
+ *
+ * @brief Converts actual value of drx RetransmissionTimerUL to enum value
+ *
+ * @details
+ *
+ * Function : convertDrxRetransmissionTimerUlValueToEnum
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts actual value drx RetransmissionTimerUL to enum value
+ *
+ * @params[in] uint16_t retransmissionTimerUL
+ * @return enum value of drx RetransmissionTimerUL
+ *
+ * **********************************************************************/
+e_DRX_ConfigRrc__drx_RetransmissionTimerUL convertDrxRetransmissionTimerUlValueToEnum(uint16_t retransmissionTimerUL)
+{
+ switch(retransmissionTimerUL)
+ {
+ case 0:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl0;
+ case 1:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl1;
+ case 2:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl2;
+ case 4:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl4;
+ case 6:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl6;
+ case 8:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl8;
+ case 16:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl16;
+ case 24:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl24;
+ case 33:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl33;
+ case 40:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl40;
+ case 64:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl64;
+ case 80:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl80;
+ case 96:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl96;
+ case 112:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl112;
+ case 128:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl128;
+ case 160:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl160;
+ case 320:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl320;
+ default:
+ return DRX_ConfigRrc__drx_RetransmissionTimerUL_sl4;
+ }
+}
+
+/************************************************************************
+ *
+ * @brief Converts enum value of drx RetransmissionTimerUL to actual value
+ *
+ * @details
+ *
+ * Function : convertDrxRetransmissionTimerUlEnumToValue
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts enum value drx RetransmissionTimerUL to actual value
+ *
+ * @params[in] e_DRX_ConfigRrc__drx_RetransmissionTimerUL retransmissionTimerUL
+ * @return actual value of drx RetransmissionTimerUL
+ *
+ * **********************************************************************/
+uint16_t convertDrxRetransmissionTimerUlEnumToValue(e_DRX_ConfigRrc__drx_RetransmissionTimerUL retransmissionTimerUL)
+{
+ switch(retransmissionTimerUL)
+ {
+
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl0:
+ return 0;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl1:
+ return 1;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl2:
+ return 2;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl4:
+ return 4;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl6:
+ return 6;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl8:
+ return 8;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl16:
+ return 16;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl24:
+ return 24;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl33:
+ return 33;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl40:
+ return 40;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl64:
+ return 64;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl80:
+ return 80;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl96:
+ return 96;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl112:
+ return 112;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl128:
+ return 128;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl160:
+ return 160;
+ case DRX_ConfigRrc__drx_RetransmissionTimerUL_sl320:
+ return 320;
+ default:
+ return 4;
+ }
+}
+
+/************************************************************************
+ *
+ * @brief Converts actual value of drx RetransmissionTimerDL to enum value
+ *
+ * @details
+ *
+ * Function : convertDrxRetransmissionTimerDlValueToEnum
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts actual value drx RetransmissionTimerDL to enum value
+ *
+ * @params[in] uint16_t retransmissionTimerDL
+ * @return enum value of drx RetransmissionTimerDL
+ *
+ * **********************************************************************/
+e_DRX_ConfigRrc__drx_RetransmissionTimerDL convertDrxRetransmissionTimerDlValueToEnum(uint16_t retransmissionTimerDL)
+{
+ switch(retransmissionTimerDL)
+ {
+ case 0:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl0;
+ case 1:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl1;
+ case 2:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl2;
+ case 4:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl4;
+ case 6:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl6;
+ case 8:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl8;
+ case 16:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl16;
+ case 24:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl24;
+ case 33:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl33;
+ case 40:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl40;
+ case 64:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl64;
+ case 80:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl80;
+ case 96:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl96;
+ case 112:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl112;
+ case 128:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl128;
+ case 160:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl160;
+ case 320:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl320;
+ default:
+ return DRX_ConfigRrc__drx_RetransmissionTimerDL_sl4;
+ }
+}
+/************************************************************************
+ *
+ * @brief Converts enum value of drx RetransmissionTimerDL to actual value
+ *
+ * @details
+ *
+ * Function : convertDrxRetransmissionTimerDlEnumToValue
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts enum value drx RetransmissionTimerDL to actual value
+ *
+ * @params[in] e_DRX_ConfigRrc__drx_RetransmissionTimerDL retransmissionTimerDL
+ * @return actual value of drx RetransmissionTimerDL
+ *
+ * **********************************************************************/
+uint16_t convertDrxRetransmissionTimerDlEnumToValue(e_DRX_ConfigRrc__drx_RetransmissionTimerDL retransmissionTimerDL)
+{
+ switch(retransmissionTimerDL)
+ {
+
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl0:
+ return 0;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl1:
+ return 1;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl2:
+ return 2;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl4:
+ return 4;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl6:
+ return 6;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl8:
+ return 8;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl16:
+ return 16;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl24:
+ return 24;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl33:
+ return 33;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl40:
+ return 40;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl64:
+ return 64;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl80:
+ return 80;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl96:
+ return 96;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl112:
+ return 112;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl128:
+ return 128;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl160:
+ return 160;
+ case DRX_ConfigRrc__drx_RetransmissionTimerDL_sl320:
+ return 320;
+ default:
+ return 4;
+ }
+}
+
+/************************************************************************
+ *
+ * @brief Converts actual value of drx inactivityTimer to enum value
+ *
+ * @details
+ *
+ * Function : convertDrxInactivityTimerValueToEnum
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts actual value drx inactivityTimer to enum value
+ *
+ * @params[in] uint16_tinactivityTimer
+ * @return enum value of drxinactivityTimer
+ *
+ * **********************************************************************/
+e_DRX_ConfigRrc__drx_InactivityTimer convertDrxInactivityTimerValueToEnum(uint16_t inactivityTimer)
+{
+ switch(inactivityTimer)
+ {
+ case 0:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms0;
+ case 1:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms1;
+ case 2:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms2;
+ case 3:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms3;
+ case 4:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms4;
+ case 5:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms5;
+ case 6:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms6;
+ case 8:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms8;
+ case 10:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms10;
+ case 20:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms20;
+ case 30:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms30;
+ case 40:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms40;
+ case 50:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms50;
+ case 60:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms60;
+ case 80:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms80;
+ case 100:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms100;
+ case 200:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms200;
+ case 300:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms300;
+ case 500:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms500;
+ case 750:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms750;
+ case 1280:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms1280;
+ case 1920:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms1920;
+ case 2560:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms2560;
+ default:
+ return DRX_ConfigRrc__drx_InactivityTimer_ms1;
+ }
+}
+/************************************************************************
+ *
+ * @brief Converts enum value of drx inactivityTimer to actual value
+ *
+ * @details
+ *
+ * Function : convertDrxInactivityTimerEnumToValue
+ *
+ * Functionality: As per Spec 38.331,
+ * Converts enum value drx inactivityTimer to actual value
+ *
+ * @params[in] e_DRX_ConfigRrc__drx_InactivityTimer inactivityTimer
+ * @return value of drxinactivityTimer
+ *
+ * **********************************************************************/
+uint16_t convertDrxInactivityTimerEnumToValue(e_DRX_ConfigRrc__drx_InactivityTimer inactivityTimer)
+{
+ switch(inactivityTimer)
+ {
+ case DRX_ConfigRrc__drx_InactivityTimer_ms0:
+ return 0;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms1:
+ return 1;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms2:
+ return 2;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms3:
+ return 3;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms4:
+ return 4;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms5:
+ return 5;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms6:
+ return 6;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms8:
+ return 8;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms10:
+ return 10;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms20:
+ return 20;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms30:
+ return 30;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms40:
+ return 40;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms50:
+ return 50;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms60:
+ return 60;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms80:
+ return 80;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms100:
+ return 100;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms200:
+ return 200;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms300:
+ return 300;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms500:
+ return 500;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms750:
+ return 750;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms1280:
+ return 1280;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms1920:
+ return 1920;
+ case DRX_ConfigRrc__drx_InactivityTimer_ms2560:
+ return 2560;
+ default:
+ return 1;
+ }
+}
+
/**********************************************************************
End of file
**********************************************************************/
#include "CFRA.h"
#include "RACH-ConfigCommon.h"
#include "du_app_rlc_inf.h"
+#include "LongDRXCycleLength.h"
+#include "ShortDRXCycleLength.h"
+#include "DRX-ConfigRrc.h"
RLC_BearerConfig__servedRadioBearer_PR covertRbTypeFromIntEnumToRrcEnum(RlcRbType rbType);
RLC_Config_PR covertRlcModeFromIntEnumToRrcEnum(RlcMode mode);
e_ServingCellConfigCommon__dmrs_TypeA_Position convertDmrsTypeAPosValueToEnum(uint8_t dmrsTypeAPos);
e_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one convertCbPreamblePerSsbValueToEnum(uint8_t numCbPreamblePerSsb);
+enum DRX_ConfigRrc__drx_LongCycleStartOffset_PR convertLongDrxCycleLengthValueToEnum(uint16_t longDrxCycleLength);
+e_DRX_ConfigRrc__shortDRX__drx_ShortCycle convertShortDrxCycleLengthValueToEnum(uint16_t shortDrxCycleLength);
+e_DRX_ConfigRrc__drx_onDurationTimer__milliSeconds convertOnDurationTimerMilliSecondsValueToEnum(uint16_t ondurationTime);
+e_DRX_ConfigRrc__drx_RetransmissionTimerUL convertDrxRetransmissionTimerUlValueToEnum(uint16_t retransmissionTimerUL);
+e_DRX_ConfigRrc__drx_RetransmissionTimerDL convertDrxRetransmissionTimerDlValueToEnum(uint16_t retransmissionTimerDL);
+e_DRX_ConfigRrc__drx_InactivityTimer convertDrxInactivityTimerValueToEnum(uint16_t inactivityTimer);
+uint16_t convertShortDrxCycleLengthEnumToValue(e_ShortDRXCycleLength shortDrxCycleLength);
+uint16_t convertLongDrxCycleLengthEnumToValue(e_LongDRXCycleLength longDrxCycleLength);
+uint16_t convertDrxInactivityTimerEnumToValue(e_DRX_ConfigRrc__drx_InactivityTimer inactivityTimer);
+uint16_t convertDrxRetransmissionTimerDlEnumToValue(e_DRX_ConfigRrc__drx_RetransmissionTimerDL retransmissionTimerDL);
+uint16_t convertDrxRetransmissionTimerUlEnumToValue(e_DRX_ConfigRrc__drx_RetransmissionTimerUL retransmissionTimerUL);
+uint16_t convertOnDurationTimerMilliSecondsEnumToValue(e_DRX_ConfigRrc__drx_onDurationTimer__milliSeconds ondurationTime);
/**********************************************************************
End of file
**********************************************************************/
#include "BWP-UplinkCommon.h"
#include "ReconfigurationWithSync.h"
#include "du_sys_info_hdl.h"
+#include "DRX-ConfigRrc.h"
#ifdef O1_ENABLE
#include "CmInterface.h"
return ROK;
}
-
+#ifdef NR_DRX
+/*******************************************************************
+ *
+ * @brief fill long cycle offset value of drx
+ *
+ * @details
+ *
+ * Function : fillLongCycleOffsetValFromDuCb
+ *
+ * Functionality: fill long cycle offset value of drx
+ *
+ * @params[in] DrxLongCycleStartOffset drxLongCycleStartOffset,
+ * struct DRX_ConfigRrc__drx_LongCycleStartOffset drx_LongCycleStartOffset
+ *
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+void fillLongCycleOffsetValFromDuCb(DrxLongCycleStartOffset drxLongCycleStartOffset,\
+struct DRX_ConfigRrc__drx_LongCycleStartOffset *drx_LongCycleStartOffset)
+{
+
+ drx_LongCycleStartOffset->present = convertLongDrxCycleLengthValueToEnum(drxLongCycleStartOffset.drxLongCycleStartOffsetChoice);
+ switch(drx_LongCycleStartOffset->present)
+ {
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms10:
+ {
+ drx_LongCycleStartOffset->choice.ms10 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms20:
+ {
+ drx_LongCycleStartOffset->choice.ms20 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms32:
+ {
+ drx_LongCycleStartOffset->choice.ms32 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms40:
+ {
+ drx_LongCycleStartOffset->choice.ms40 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms60:
+ {
+ drx_LongCycleStartOffset->choice.ms60 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms64:
+ {
+ drx_LongCycleStartOffset->choice.ms64 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms70:
+ {
+ drx_LongCycleStartOffset->choice.ms70 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms80:
+ {
+ drx_LongCycleStartOffset->choice.ms80 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms128:
+ {
+ drx_LongCycleStartOffset->choice.ms128 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms160:
+ {
+ drx_LongCycleStartOffset->choice.ms160 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms256:
+ {
+ drx_LongCycleStartOffset->choice.ms256 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms320:
+ {
+ drx_LongCycleStartOffset->choice.ms320 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms512:
+ {
+ drx_LongCycleStartOffset->choice.ms512 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms640:
+ {
+ drx_LongCycleStartOffset->choice.ms640 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms1024:
+ {
+ drx_LongCycleStartOffset->choice.ms1024 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms1280:
+ {
+ drx_LongCycleStartOffset->choice.ms1280 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms2048:
+ {
+ drx_LongCycleStartOffset->choice.ms2048 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms2560:
+ {
+ drx_LongCycleStartOffset->choice.ms2560 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms5120:
+ {
+ drx_LongCycleStartOffset->choice.ms5120 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms10240:
+ {
+ drx_LongCycleStartOffset->choice.ms10240 = drxLongCycleStartOffset.drxLongCycleStartOffsetVal;
+ break;
+ }
+ default :
+ break;
+ }
+}
+/*******************************************************************
+ *
+ * @brief Builds drx config IE
+ *
+ * @details
+ *
+ * Function : BuildDrxConfigRrc
+ *
+ * Functionality: Build drx config in MacCellGrpCfg
+ *
+ * @params[in] struct MAC_CellGroupConfig__drx_ConfigRrc
+ *
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t BuildDrxConfigRrc(DuUeCb *ueCb, struct MAC_CellGroupConfig__drx_ConfigRrc *drxCfg)
+{
+ drxCfg->present = MAC_CellGroupConfig__drx_ConfigRrc_PR_setup;
+ DU_ALLOC(drxCfg->choice.setup, sizeof(struct DRX_ConfigRrc));
+ if(!drxCfg->choice.setup)
+ {
+ DU_LOG("\nERROR --> F1AP : Memory allocation failure in BuildDrxConfigRrc");
+ return RFAILED;
+ }
+ if(ueCb->macUeCfg.macCellGrpCfg.drxCfg.drxOnDurationTimer.onDurationTimerValInMs)
+ {
+ drxCfg->choice.setup->drx_onDurationTimer.present = DRX_ConfigRrc__drx_onDurationTimer_PR_milliSeconds;
+ drxCfg->choice.setup->drx_onDurationTimer.choice.milliSeconds = convertOnDurationTimerMilliSecondsValueToEnum(ueCb->macUeCfg.\
+ macCellGrpCfg.drxCfg.drxOnDurationTimer.onDurationtimerValue.milliSeconds);
+ }
+ else
+ {
+ drxCfg->choice.setup->drx_onDurationTimer.present = DRX_ConfigRrc__drx_onDurationTimer_PR_subMilliSeconds;
+ drxCfg->choice.setup->drx_onDurationTimer.choice.subMilliSeconds = ueCb->macUeCfg.macCellGrpCfg.drxCfg.\
+ drxOnDurationTimer.onDurationtimerValue.subMilliSeconds;
+ }
+ drxCfg->choice.setup->drx_InactivityTimer = convertDrxInactivityTimerValueToEnum(ueCb->macUeCfg.macCellGrpCfg.drxCfg.drxInactivityTimer);
+ drxCfg->choice.setup->drx_HARQ_RTT_TimerDL = ueCb->macUeCfg.macCellGrpCfg.drxCfg.drxHarqRttTimerDl;
+ drxCfg->choice.setup->drx_HARQ_RTT_TimerUL = ueCb->macUeCfg.macCellGrpCfg.drxCfg.drxHarqRttTimerUl;
+ drxCfg->choice.setup->drx_RetransmissionTimerDL = convertDrxRetransmissionTimerDlValueToEnum(ueCb->macUeCfg.macCellGrpCfg.drxCfg.\
+ drxRetransmissionTimerDl);
+ drxCfg->choice.setup->drx_RetransmissionTimerUL = convertDrxRetransmissionTimerUlValueToEnum(ueCb->macUeCfg.macCellGrpCfg.drxCfg.\
+ drxRetransmissionTimerUl);
+ drxCfg->choice.setup->drx_SlotOffset = ueCb->macUeCfg.macCellGrpCfg.drxCfg.drxSlotOffset;
+ fillLongCycleOffsetValFromDuCb(ueCb->macUeCfg.macCellGrpCfg.drxCfg.drxLongCycleStartOffset, &drxCfg->choice.setup->drx_LongCycleStartOffset);
+
+ if(ueCb->macUeCfg.macCellGrpCfg.drxCfg.shortDrxPres)
+ {
+ DU_ALLOC(drxCfg->choice.setup->shortDRX, sizeof(struct DRX_ConfigRrc__shortDRX));
+ if(drxCfg->choice.setup->shortDRX)
+ {
+ drxCfg->choice.setup->shortDRX->drx_ShortCycle = convertShortDrxCycleLengthValueToEnum(ueCb->macUeCfg.macCellGrpCfg.drxCfg.\
+ shortDrx.drxShortCycle);
+ drxCfg->choice.setup->shortDRX->drx_ShortCycleTimer = ueCb->macUeCfg.macCellGrpCfg.drxCfg.shortDrx.drxShortCycleTimer;
+ }
+ else
+ {
+ DU_LOG("\nERROR --> F1AP : Memory allocation failure in BuildDrxConfigRrc");
+ return RFAILED;
+ }
+ }
+ return ROK;
+}
+#endif
/*******************************************************************
*
* @brief Builds Mac cell group config
uint8_t BuildMacCellGrpCfg(DuUeCb *ueCb, MAC_CellGroupConfig_t *macCellGrpCfg)
{
macCellGrpCfg->drx_ConfigRrc = NULLP;
+#ifdef NR_DRX
+ if(ueCb)
+ {
+ DU_ALLOC(macCellGrpCfg->drx_ConfigRrc, sizeof(struct MAC_CellGroupConfig__drx_ConfigRrc));
+ if(!macCellGrpCfg->drx_ConfigRrc)
+ {
+ DU_LOG("\nERROR --> F1AP : Memory allocation failure in BuildMacCellGrpCfg");
+ return RFAILED;
+ }
+ if(BuildDrxConfigRrc(ueCb, macCellGrpCfg->drx_ConfigRrc) != ROK)
+ {
+ DU_LOG("\nERROR --> F1AP : failed to build drx config");
+ return RFAILED;
+ }
+ }
+#endif
macCellGrpCfg->schedulingRequestConfig = NULLP;
DU_ALLOC(macCellGrpCfg->schedulingRequestConfig, sizeof(struct SchedulingRequestConfig));
if(!macCellGrpCfg->schedulingRequestConfig)
struct CellGroupConfigRrc__rlc_BearerToAddModList *rlcBearerList=NULLP;
struct RLC_Config *rlcConfig=NULLP;
struct LogicalChannelConfig *macLcConfig=NULLP;
+ struct MAC_CellGroupConfig__drx_ConfigRrc *drxCfg=NULLP;
struct SchedulingRequestConfig *schedulingRequestConfig=NULLP;
struct SchedulingRequestConfig__schedulingRequestToAddModList *schReqList=NULLP;
struct TAG_Config *tagConfig=NULLP;
{
switch(rlcConfig->present)
{
+ case RLC_Config_PR_NOTHING:
+ break;
+
case RLC_Config_PR_am:
{
if(rlcConfig->choice.am)
macCellGrpCfg = cellGrpCfg->mac_CellGroupConfig;
if(macCellGrpCfg)
{
+ drxCfg = macCellGrpCfg->drx_ConfigRrc;
+
+ if(drxCfg)
+ {
+ switch(drxCfg->present)
+ {
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_NOTHING:
+ break;
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_setup:
+ {
+ if(drxCfg->choice.setup)
+ {
+ DU_FREE(drxCfg->choice.setup->shortDRX, sizeof(struct DRX_ConfigRrc__shortDRX));
+ DU_FREE(drxCfg->choice.setup, sizeof(struct DRX_ConfigRrc));
+ }
+ }
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_release:
+ break;
+ }
+ DU_FREE(drxCfg, sizeof(struct MAC_CellGroupConfig__drx_ConfigRrc));
+ }
schedulingRequestConfig = macCellGrpCfg->schedulingRequestConfig;
if(schedulingRequestConfig)
{
}
return ret;
}
+
+#ifdef NR_DRX
+
+/*******************************************************************
+ *
+ * @brief fill long cycle offset value of drx in UE structure
+ *
+ * @details
+ *
+ * Function : fillLongCycleOffsetValueInUeDb
+ *
+ * Functionality: fill long cycle offset value of drx in UE structure
+ *
+ * @params[in] DrxLongCycleStartOffset drxLongCycleStartOffset,
+ * struct DRX_ConfigRrc__drx_LongCycleStartOffset drx_LongCycleStartOffset
+ *
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+void fillLongCycleOffsetValueInUeDb(DrxLongCycleStartOffset *drxLongCycleStartOffset, struct DRX_ConfigRrc__drx_LongCycleStartOffset *drx_LongCycleStartOffset)
+{
+
+ drxLongCycleStartOffset->drxLongCycleStartOffsetChoice = convertLongDrxCycleLengthEnumToValue(drx_LongCycleStartOffset->present);
+ switch(drx_LongCycleStartOffset->present)
+ {
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms10:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms10;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms20:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms20;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms32:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms32;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms40:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms40;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms60:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms60;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms64:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms64;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms70:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms70;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms80:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms80;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms128:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms128;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms160:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms160;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms256:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms256;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms320:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms320;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms512:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms512;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms640:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms640;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms1024:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms1024;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms1280:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms1280;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms2048:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms2048;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms2560:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms2560;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms5120:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms5120;
+ break;
+ }
+ case DRX_ConfigRrc__drx_LongCycleStartOffset_PR_ms10240:
+ {
+ drxLongCycleStartOffset->drxLongCycleStartOffsetVal = drx_LongCycleStartOffset->choice.ms10240;
+ break;
+ }
+ default :
+ break;
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Fills drx configuration structure with the help of drx_ConfigRrc
+ *which recive from CU or storedDrxCfg which is already stored
+ *
+ * @details
+ *
+ * Function : extractDrxConfiguration
+ *
+ * Functionality: Fills Reconfig Cell group Info received by CU
+ *
+ * @params[in] cuMacCellGrpDrxConfig = MAC_CellGroupConfig__drx_ConfigRrc information which
+ * is send by CU, which we have stored in F1UeContextSetupDb
+ * DrxCfg * drxCfg = Used to Store the information,
+ * which needs to send in other layer, as well as this can be
+ * the variable which stores the information in DuCb,
+ * DrxCfg *storedDrxCfg = Null in case of sending the
+ * information to other layer else it will have the drx information
+ * stored in the copyOfmacUeCfg which we have stored in F1UeContextSetupDb.
+ *
+ * @return void
+ *
+ * ****************************************************************/
+void extractDrxConfiguration(struct MAC_CellGroupConfig__drx_ConfigRrc *cuMacCellGrpDrxConfig, DrxCfg * drxCfg, DrxCfg *storedDrxCfg)
+{
+ struct DRX_ConfigRrc *cuDrxConfig;
+
+ if(storedDrxCfg)
+ {
+ memcpy(drxCfg, storedDrxCfg, sizeof(DrxCfg));
+ }
+ else
+ {
+ if(cuMacCellGrpDrxConfig)
+ {
+ switch(cuMacCellGrpDrxConfig->present)
+ {
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_NOTHING:
+ break;
+
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_setup:
+ {
+ cuDrxConfig = cuMacCellGrpDrxConfig->choice.setup;
+ if(cuDrxConfig)
+ {
+ switch(cuDrxConfig->drx_onDurationTimer.present)
+ {
+ case DRX_ConfigRrc__drx_onDurationTimer_PR_NOTHING:
+ break;
+ case DRX_ConfigRrc__drx_onDurationTimer_PR_milliSeconds:
+ {
+ drxCfg->drxOnDurationTimer.onDurationTimerValInMs = true;
+ drxCfg->drxOnDurationTimer.onDurationtimerValue.milliSeconds=convertOnDurationTimerMilliSecondsEnumToValue(cuDrxConfig->\
+ drx_onDurationTimer.choice.milliSeconds);
+ break;
+ }
+ case DRX_ConfigRrc__drx_onDurationTimer_PR_subMilliSeconds:
+ {
+ drxCfg->drxOnDurationTimer.onDurationTimerValInMs = false;
+ drxCfg->drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = cuDrxConfig->drx_onDurationTimer.choice.subMilliSeconds;
+ break;
+ }
+ }
+ }
+ fillLongCycleOffsetValueInUeDb(&drxCfg->drxLongCycleStartOffset, &cuDrxConfig->drx_LongCycleStartOffset);
+ drxCfg->drxInactivityTimer = convertDrxInactivityTimerEnumToValue(cuDrxConfig->drx_InactivityTimer);
+ drxCfg->drxHarqRttTimerDl = cuDrxConfig->drx_HARQ_RTT_TimerDL;
+ drxCfg->drxHarqRttTimerUl = cuDrxConfig->drx_HARQ_RTT_TimerUL;
+ drxCfg->drxRetransmissionTimerDl = convertDrxRetransmissionTimerDlEnumToValue(cuDrxConfig->drx_RetransmissionTimerDL);
+ drxCfg->drxRetransmissionTimerUl = convertDrxRetransmissionTimerUlEnumToValue(cuDrxConfig->drx_RetransmissionTimerUL);
+ drxCfg->drxSlotOffset = cuDrxConfig->drx_SlotOffset;
+ if(cuDrxConfig->shortDRX)
+ {
+ drxCfg->shortDrxPres=true;
+ drxCfg->shortDrx.drxShortCycle = convertShortDrxCycleLengthEnumToValue(cuDrxConfig->shortDRX->drx_ShortCycle);
+ drxCfg->shortDrx.drxShortCycleTimer = cuDrxConfig->shortDRX->drx_ShortCycleTimer;
+ }
+ else
+ drxCfg->shortDrxPres=false;
+
+ break;
+ }
+
+ case MAC_CellGroupConfig__drx_ConfigRrc_PR_release:
+ break;
+ }
+ }
+ }
+}
+#endif
+
/*******************************************************************
*
* @brief Fills Reconfig Cell group Info received by CU
{
macUeCfg->macCellGrpCfgPres = true;
macCellGroup = ((MAC_CellGroupConfig_t *)(cellGrp->mac_CellGroupConfig));
+
+#ifdef NR_DRX
+ if(macCellGroup->drx_ConfigRrc)
+ {
+ if(storedMacUeCfg)
+ {
+ if(!storedMacUeCfg->macCellGrpCfgPres)
+ {
+ extractDrxConfiguration(macCellGroup->drx_ConfigRrc, &macUeCfg->macCellGrpCfg.drxCfg,NULL);
+ }
+ else
+ {
+ extractDrxConfiguration(macCellGroup->drx_ConfigRrc, &macUeCfg->macCellGrpCfg.drxCfg, &storedMacUeCfg->macCellGrpCfg.drxCfg);
+ }
+ }
+ else
+ {
+ extractDrxConfiguration(macCellGroup->drx_ConfigRrc, &macUeCfg->macCellGrpCfg.drxCfg,NULL);
+ }
+ }
+#endif
+
if(macCellGroup->schedulingRequestConfig)
{
extractSchReqReConfig(macCellGroup->schedulingRequestConfig, &macUeCfg->macCellGrpCfg.schReqCfg);
UEContextSetupRequest_t *ueSetReq = NULL;
DRBs_ToBeSetup_List_t *drbCfg = NULL;
CUtoDURRCInformation_t *rrcInfo = NULL;
+ DRXCycle_t *drxCycle;
ret = ROK;
break;
}
- case ProtocolIE_ID_id_SCell_ToBeSetup_List:
+#ifdef NR_DRX
+ case ProtocolIE_ID_id_DRXCycle:
{
- DU_LOG("\nINFO --> DU_APP: Received SCell_ToBeSetup_List but Not processing the list");
+ duUeCb->f1UeDb->duUeCfg.drxCyclePres = true;
+ drxCycle = &ueSetReq->protocolIEs.list.array[ieIdx]->value.choice.DRXCycle;
+ duUeCb->f1UeDb->duUeCfg.drxCycle.drxLongCycleLength = convertLongDrxCycleLengthEnumToValue(drxCycle->longDRXCycleLength);
+ if(drxCycle->shortDRXCycleLength)
+ {
+ duUeCb->f1UeDb->duUeCfg.drxCycle.shortDrxCyclePres = true;
+ duUeCb->f1UeDb->duUeCfg.drxCycle.shortDrxCycle.drxShortCycle = \
+ convertShortDrxCycleLengthEnumToValue(*(drxCycle->shortDRXCycleLength));
+ }
+ if(drxCycle->shortDRXCycleTimer)
+ duUeCb->f1UeDb->duUeCfg.drxCycle.shortDrxCycle.drxShortCycleTimer = *(drxCycle->shortDRXCycleTimer);
+
break;
}
+#endif
case ProtocolIE_ID_id_SRBs_ToBeSetup_List:
{
if(extractSrbListToSetup(&ueSetReq->protocolIEs.list.array[ieIdx]->value.choice.SRBs_ToBeSetup_List,\
}
break;
}
-
case ProtocolIE_ID_id_RRCContainer:
{
/* Filling Dl RRC Msg Info */
GtpTnlCfg *tnlCfg2; /* Tunnel 2 */
}UpTnlCfg;
+#ifdef NR_DRX
+/* This structures is taken from the DRX Cycle section of
+ * specification 33.473. */
+typedef struct drxCycle
+{
+ uint16_t drxLongCycleLength;
+ bool shortDrxCyclePres;
+ ShortDrx shortDrxCycle;
+}DrxCycle;
+#endif
+
typedef struct duUeCfg
{
void *cellGrpCfg;
UpTnlCfg upTnlInfo[MAX_NUM_DRB]; /* User plane TNL Info*/
uint8_t numDrbSetupMod; /*No. of DRB Added during Modification*/
MacUeCfg copyOfmacUeCfg;
- DataTransmissionAction dataTransmissionAction;
+ DataTransmissionAction dataTransmissionAction;
+#ifdef NR_DRX
+ bool drxCyclePres;
+ DrxCycle drxCycle;
+#endif
}DuUeCfg;
typedef struct f1UeContextSetup
{
uint8_t idx;
MacCellGrpCfg *cellGrp = NULL;
-
+
if(macUeCfg)
cellGrp = &macUeCfg->macCellGrpCfg;
cellGrp->schReqCfg.addModListCount = 1;
if(cellGrp->schReqCfg.addModListCount <= MAX_NUM_SR_CFG_PER_CELL_GRP)
{
- for(idx = 0; idx < cellGrp->schReqCfg.addModListCount; idx++)
- {
- cellGrp->schReqCfg.addModList[idx].schedReqId = SCH_REQ_ID;
- cellGrp->schReqCfg.addModList[idx].srProhibitTmr = SR_PROHIBIT_MS_32;
- cellGrp->schReqCfg.addModList[idx].srTransMax = SR_TRANS_MAX_N_16;
- }
+ for(idx = 0; idx < cellGrp->schReqCfg.addModListCount; idx++)
+ {
+ cellGrp->schReqCfg.addModList[idx].schedReqId = SCH_REQ_ID;
+ cellGrp->schReqCfg.addModList[idx].srProhibitTmr = SR_PROHIBIT_MS_32;
+ cellGrp->schReqCfg.addModList[idx].srTransMax = SR_TRANS_MAX_N_16;
+ }
}
cellGrp->schReqCfg.relListCount = 0;
cellGrp->tagCfg.addModListCount = 1;
if(cellGrp->tagCfg.addModListCount <= MAC_NUM_TAGS)
{
- for(idx = 0; idx < cellGrp->tagCfg.addModListCount; idx++)
- {
- cellGrp->tagCfg.addModList[idx].tagId = TAG_ID;
- cellGrp->tagCfg.addModList[idx].timeAlignTimer = TIME_ALIGNMENT_TIMER_INFINITY;
- }
+ for(idx = 0; idx < cellGrp->tagCfg.addModListCount; idx++)
+ {
+ cellGrp->tagCfg.addModList[idx].tagId = TAG_ID;
+ cellGrp->tagCfg.addModList[idx].timeAlignTimer = TIME_ALIGNMENT_TIMER_INFINITY;
+ }
}
cellGrp->tagCfg.relListCount = 0;
cellGrp->phrCfg.phrType2OtherCell = false;
cellGrp->phrCfg.phrOtherCG = PHR_MODE_OTHER_CG_REAL;
+ /* Filling Drx Config */
+#ifdef NR_DRX
+ cellGrp->drxCfg.drxOnDurationTimer.onDurationTimerValInMs = DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS;
+ if(!cellGrp->drxCfg.drxOnDurationTimer.onDurationTimerValInMs)
+ cellGrp->drxCfg.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = \
+ DRX_ONDURATION_TIMER_VALUE_IN_SUBMS;
+ else
+ cellGrp->drxCfg.drxOnDurationTimer.onDurationtimerValue.milliSeconds = \
+ DRX_ONDURATION_TIMER_VALUE_IN_MS;
+ cellGrp->drxCfg.drxInactivityTimer = DRX_INACTIVITY_TIMER;
+ cellGrp->drxCfg.drxHarqRttTimerDl = DRX_HARQ_RTT_TIMER_DL;
+ cellGrp->drxCfg.drxHarqRttTimerUl = DRX_HARQ_RTT_TIMER_UL;
+ cellGrp->drxCfg.drxRetransmissionTimerDl = DRX_RETRANSMISSION_TIMER_DL;
+ cellGrp->drxCfg.drxRetransmissionTimerUl = DRX_RETRANSMISSION_TIMER_UL;
+ cellGrp->drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetVal = DRX_LONG_CYCLE_START_OFFSET_VAL;
+ cellGrp->drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = DRX_LONG_CYCLE_START_OFFSET_CHOICE;
+ cellGrp->drxCfg.shortDrxPres = DRX_SHORT_CYCLE_PRESENT;
+ if(cellGrp->drxCfg.shortDrxPres)
+ {
+ cellGrp->drxCfg.shortDrx.drxShortCycle = DRX_SHORT_CYCLE;
+ cellGrp->drxCfg.shortDrx.drxShortCycleTimer = DRX_SHORT_CYCLE_TIMER;
+ }
+ cellGrp->drxCfg.drxSlotOffset = DRX_SLOT_OFFSET;
+#endif
+
}
else
{
fillDefaultModulation(macUeCfg);
}
+#ifdef NR_DRX
+ if(ueCfgDb->drxCyclePres)
+ {
+ macUeCfg->macCellGrpCfg.drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = ueCfgDb->drxCycle.drxLongCycleLength;
+ if(ueCfgDb->drxCycle.shortDrxCyclePres)
+ {
+ macUeCfg->macCellGrpCfg.drxCfg.shortDrxPres = true;
+ macUeCfg->macCellGrpCfg.drxCfg.shortDrx.drxShortCycle = ueCfgDb->drxCycle.shortDrxCycle.drxShortCycle;
+ macUeCfg->macCellGrpCfg.drxCfg.shortDrx.drxShortCycleTimer = ueCfgDb->drxCycle.shortDrxCycle.drxShortCycleTimer;
+ }
+ else
+ {
+ macUeCfg->macCellGrpCfg.drxCfg.shortDrxPres = false;
+ }
+ }
+#endif
+
/* Filling LC Context */
for(dbIdx = 0; (dbIdx < ueCfgDb->numMacLcs && ret == ROK); dbIdx++)
{
/*Filling Cell Group Cfg*/
ret = procUeReCfgCellInfo(macUeCfg, &f1UeDb->duUeCfg.copyOfmacUeCfg, f1UeDb->duUeCfg.cellGrpCfg);
+#ifdef NR_DRX
+ memcpy(&macUeCfg->macCellGrpCfg.drxCfg, &f1UeDb->duUeCfg.copyOfmacUeCfg.macCellGrpCfg.drxCfg, sizeof(DrxCfg));
+#endif
if(ret == ROK)
{
if(macUeCfg->spCellCfg.servCellCfg.initDlBwp.pdschPresent)
Code Review / o-du / l2.git / commitdiff