1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /* Defines APIs exchanged between du_app and cl module of MAC */
23 #define NUM_NUMEROLOGY 5 /* Number of numerology */
25 #define NUM_SSB 1 /* max value is 64 */
26 #define SSB_MASK_SIZE 1 /* SSB mask size is 32bit for sub6 */
27 #define SIB1_REPETITION_PERIOD 20
28 #define CORESET_0_INDEX 0
29 #define CORESET_1_INDEX 1
30 #define CORESET_2_INDEX 2
31 #define CORESET_3_INDEX 3
32 #define CORESET_4_INDEX 4
33 #define SEARCHSPACE_0_INDEX 0
34 #define SEARCHSPACE_1_INDEX 1
35 #define SEARCHSPACE_2_INDEX 2
36 #define SEARCHSPACE_3_INDEX 3
37 #define SEARCHSPACE_4_INDEX 4
38 #define SS_MONITORING_SLOT_SL1 0 /* all slots */
39 #define SS_MONITORING_SYMBOL 0x2000; /* symbol-0, set 14th bit */
41 /* Macro for Ue Context */
42 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */
43 #define MAC_NUM_TAGS 4 /* Max number of timing advance groups */
44 #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */
45 #define MAX_NUM_CRSET 3 /* Max number of control resource set in add/modify/release list */
46 #define MAX_NUM_SEARCH_SPC 10 /* Max number of search space in add/modify/release list */
47 #define MONITORING_SYMB_WITHIN_SLOT_SIZE 2 /* i.e. 2 bytes because size of monitoring symbols within slot is 14 bits */
48 #define MAX_NUM_DL_ALLOC 16 /* Max number of pdsch time domain downlink allocation */
49 #define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
50 #define MAX_NUM_SCELL 32
52 /* PUCCH Configuration Macro */
53 #define MAX_NUM_PUCCH_RESRC 128
54 #define MAX_NUM_PUCCH_RESRC_SET 4
55 #define MAX_NUM_PUCCH_PER_RESRC_SET 32
56 #define MAX_NUM_SPATIAL_RELATIONS 8
57 #define MAX_NUM_PUCCH_P0_PER_SET 8
58 #define MAX_NUM_PATH_LOSS_REF_RS 4
59 #define MAX_NUM_DL_DATA_TO_UL_ACK 15
62 #define EVENT_MAC_CELL_CONFIG_REQ 200
63 #define EVENT_MAC_CELL_CONFIG_CFM 201
64 #define EVENT_MAC_CELL_START 202
65 #define EVENT_MAC_CELL_STOP 203
66 #define EVENT_MAC_CELL_UP_IND 204
67 #define EVENT_MAC_STOP_IND 205
68 #define EVENT_MAC_UL_CCCH_IND 206
69 #define EVENT_MAC_DL_CCCH_IND 207
70 #define EVENT_MAC_UE_CREATE_REQ 208
71 #define EVENT_MAC_UE_CREATE_RSP 209
72 #define EVENT_MAC_UE_RECONFIG_REQ 210
73 #define EVENT_MAC_UE_RECONFIG_RSP 211
74 #define EVENT_MAC_UE_DELETE_REQ 212
75 #define EVENT_MAC_UE_DELETE_RSP 213
76 #define EVENT_MAC_CELL_DELETE_REQ 214
77 #define EVENT_MAC_CELL_DELETE_RSP 215
78 #define EVENT_MAC_SLICE_CFG_REQ 216
79 #define EVENT_MAC_SLICE_CFG_RSP 217
80 #define EVENT_MAC_SLICE_RECFG_REQ 218
81 #define EVENT_MAC_SLICE_RECFG_RSP 219
82 #define EVENT_MAC_SLOT_IND 220
83 #define EVENT_MAC_RACH_RESOURCE_REQ 221
84 #define EVENT_MAC_RACH_RESOURCE_RSP 222
85 #define EVENT_MAC_RACH_RESOURCE_REL 223
86 #define EVENT_MAC_DL_PCCH_IND 224
88 #define BSR_PERIODIC_TIMER_SF_10 10
89 #define BSR_RETX_TIMER_SF_320 320
90 #define BSR_SR_DELAY_TMR_2560 2560
92 #define PAGING_SCHED_DELTA 4
95 /* Macros for Drx configuration */
96 #define DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS true
97 #define DRX_ONDURATION_TIMER_VALUE_IN_SUBMS 32
98 #define DRX_ONDURATION_TIMER_VALUE_IN_MS 1
99 #define DRX_INACTIVITY_TIMER 2
100 #define DRX_HARQ_RTT_TIMER_DL 56
101 #define DRX_HARQ_RTT_TIMER_UL 56
102 #define DRX_RETRANSMISSION_TIMER_DL 4
103 #define DRX_RETRANSMISSION_TIMER_UL 4
104 #define DRX_LONG_CYCLE_START_OFFSET_CHOICE 20
105 #define DRX_LONG_CYCLE_START_OFFSET_VAL 8
106 #define DRX_SHORT_CYCLE 2
107 #define DRX_SHORT_CYCLE_TIMER 2
108 #define DRX_SLOT_OFFSET 0
144 MAC_GEN_FULL_PBCH_PAYLD, /* MAC generated the full PBCH Payload */
145 PHY_GEN_TIMING_PBCH_BIT, /* PHY generates the timing PBCH bits */
146 PHY_GEN_FULL_PBCH_PAYLD /* PHY generates full PBCH payload */
158 RESTRICTED_SET_TYPE_A,
159 RESTRICTED_SET_TYPE_B
191 /* Enums for Ue Create Request */
193 /* SR PROHIBIT TIMER */
220 TIME_ALIGNMENT_TIMER_MS_500,
221 TIME_ALIGNMENT_TIMER_MS_750,
222 TIME_ALIGNMENT_TIMER_MS_1280,
223 TIME_ALIGNMENT_TIMER_MS_1920,
224 TIME_ALIGNMENT_TIMER_MS_2560,
225 TIME_ALIGNMENT_TIMER_MS_5120,
226 TIME_ALIGNMENT_TIMER_MS_10240,
227 TIME_ALIGNMENT_TIMER_INFINITY
232 PHR_PERIODIC_TIMER_SF_10,
233 PHR_PERIODIC_TIMER_SF_20,
234 PHR_PERIODIC_TIMER_SF_50,
235 PHR_PERIODIC_TIMER_SF_100,
236 PHR_PERIODIC_TIMER_SF_200,
237 PHR_PERIODIC_TIMER_SF_500,
238 PHR_PERIODIC_TIMER_SF_1000,
239 PHR_PERIODIC_TIMER_INFINITY
244 PHR_PROHIBIT_TIMER_SF_0,
245 PHR_PROHIBIT_TIMER_SF_10,
246 PHR_PROHIBIT_TIMER_SF_20,
247 PHR_PROHIBIT_TIMER_SF_50,
248 PHR_PROHIBIT_TIMER_SF_100,
249 PHR_PROHIBIT_TIMER_SF_200,
250 PHR_PROHIBIT_TIMER_SF_500,
251 PHR_PROHIBIT_TIMER_SF_1000
256 PHR_TX_PWR_FACTOR_CHANGE_DB_1,
257 PHR_TX_PWR_FACTOR_CHANGE_DB_3,
258 PHR_TX_PWR_FACTOR_CHANGE_DB_6,
259 PHR_TX_PWR_FACTOR_CHANGE_INFINITY
260 }PhrTxPwrFactorChange;
264 PHR_MODE_OTHER_CG_REAL,
265 PHR_MODE_OTHER_CG_VIRTUAL
270 PDSCH_HARQ_ACK_CODEBOOK_SEMISTATIC,
271 PDSCH_HARQ_ACK_CODEBOOK_DYNAMIC
272 }PdschHarqAckCodebook;
276 NUM_HARQ_PROC_FOR_PDSCH_N_2,
277 NUM_HARQ_PROC_FOR_PDSCH_N_4,
278 NUM_HARQ_PROC_FOR_PDSCH_N_6,
279 NUM_HARQ_PROC_FOR_PDSCH_N_10,
280 NUM_HARQ_PROC_FOR_PDSCH_N_16
281 }NumHarqProcForPdsch;
285 MAX_CODE_BLOCK_GROUP_PER_TB_N_2,
286 MAX_CODE_BLOCK_GROUP_PER_TB_N_4,
287 MAX_CODE_BLOCK_GROUP_PER_TB_N_6,
288 MAX_CODE_BLOCK_GROUP_PER_TB_N_8
300 TRANSFORM_PRECODER_ENABLED,
301 TRANSFORM_PRECODER_DISABLED
306 CCE_REG_MAPPINGTYPE_PR_INTERLEAVED = 1,
307 CCE_REG_MAPPINGTYPE_PR_NONINTERLEAVED
312 SLOTPERIODICITYANDOFFSET_PR_SL1 = 1,
313 SLOTPERIODICITYANDOFFSET_PR_SL2,
314 SLOTPERIODICITYANDOFFSET_PR_SL4,
315 SLOTPERIODICITYANDOFFSET_PR_SL5,
316 SLOTPERIODICITYANDOFFSET_PR_SL8,
317 SLOTPERIODICITYANDOFFSET_PR_SL10,
318 SLOTPERIODICITYANDOFFSET_PR_SL16,
319 SLOTPERIODICITYANDOFFSET_PR_SL20,
320 SLOTPERIODICITYANDOFFSET_PR_SL40,
321 SLOTPERIODICITYANDOFFSET_PR_SL80,
322 SLOTPERIODICITYANDOFFSET_PR_SL160,
323 SLOTPERIODICITYANDOFFSET_PR_SL320,
324 SLOTPERIODICITYANDOFFSET_PR_SL640,
325 SLOTPERIODICITYANDOFFSET_PR_SL1280,
326 SLOTPERIODICITYANDOFFSET_PR_SL2560
327 }MSlotPeriodAndOffset;
337 SEARCHSPACETYPE_PR_COMMON = 1,
338 SEARCHSPACETYPE_PR_UE_SPECIFIC
349 AGGREGATIONLEVEL_N0 = 0,
350 AGGREGATIONLEVEL_N1 = 1,
351 AGGREGATIONLEVEL_N2 = 2,
352 AGGREGATIONLEVEL_N3 = 3,
353 AGGREGATIONLEVEL_N4 = 4,
354 AGGREGATIONLEVEL_N5 = 5,
355 AGGREGATIONLEVEL_N6 = 6,
356 AGGREGATIONLEVEL_N8 = 7
361 ADDITIONALPOSITION_POS0,
362 ADDITIONALPOSITION_POS1,
363 ADDITIONALPOSITION_POS3
374 RESOURCEALLOCATION_TYPE0,
375 RESOURCEALLOCATION_TYPE1,
376 RESOURCEALLOCATION_DYNAMICSWITCH
387 CODEWORDS_SCHED_BY_DCI_N1,
388 CODEWORDS_SCHED_BY_DCI_N2
393 TYPE_STATIC_BUNDLING = 1,
394 TYPE_DYNAMIC_BUNDLING
407 SET1_SIZE_N2_WIDEBAND,
408 SET1_SIZE_N4_WIDEBAND
462 TRANSPORT_LAYER_FAIL,
469 UNSPECIFIED_RADIO_NW_CAUSE,
471 UNKNOWN_GNB_CU_UE_F1AP_ID,
472 ALREADY_ALLOCATED_GNB_CU_UE_F1AP_ID,
473 UNKNOWN_GNB_DU_UE_F1AP_ID,
474 ALREADY_ALLOCATED_GNB_DU_UE_F1AP_ID,
475 UNKNOWN_UE_F1AP_ID_PAIR,
476 INCONSISTENT_UE_F1AP_ID_PAIR,
477 INTERACTION_WITH_OTHER_PROCEDURE,
479 ACTION_REQUIRED_FOR_RADIO_REASONS,
480 RADIO_RESOURCES_UNAVAILABLE,
486 RESOURCES_UNAVAILABLE_FOR_SLICE
491 UNSPECIFIED_TRANSPORT_LAYER_CAUSE,
492 TRANSPORT_RESOURCE_UNAVAILABLE
497 TRANSFER_SYNTAX_ERROR,
498 ABSTRACT_SYNTAX_ERROR_REJECT,
499 ABSTRACT_SYNTAX_ERROR_IGNORE_AND_REJECT,
500 INCOMPATIBLE_MESSAGE_FOR_RECEIVER_STATE,
502 ABSTRAXCT_SYNTAX_ERROR_FALSELY_CONSTRUCTED_MSG,
503 UNSPECIFIED_PROTOCOL_CAUSE
508 CONTROL_PROCESSING_OVERLOAD,
510 PLANE_PROCESSING_RESOURCES,
512 INTERVENTION_BY_O_AND_M,
513 UNSPECIFIED_MISC_CAUSE
520 MCS_TABLE_QAM64_LOW_SE
527 RSRC_RRC_CONNECTED_USERS
532 TRANSMISSION_ALLOWED,
535 }DataTransmissionAction;
537 typedef struct failureCause
542 RadioNwLyrCause radioNwCause;
543 TransLyrCause transportCause;
544 ProtCause protcolCause;
545 MiscFailCause miscCause;
549 typedef struct carrierCfg
552 uint32_t bw; /* DL/UL bandwidth */
553 uint32_t freq; /* Absolute frequency of DL/UL point A in KHz */
554 uint16_t k0[NUM_NUMEROLOGY]; /* K0 for DL/UL */
555 uint16_t gridSize[NUM_NUMEROLOGY]; /* DL/UL Grid size for each numerologies */
556 uint16_t numAnt; /* Number of Tx/Rx antennas */
559 typedef struct ssbCfg
561 uint32_t ssbPbchPwr; /* SSB block power */
562 BchPduOpt bchPayloadFlag; /* Options for generation of payload */
563 uint8_t scsCmn; /* subcarrier spacing for common */
564 uint16_t ssbOffsetPointA; /* SSB subcarrier offset from point A */
566 SSBPeriod ssbPeriod; /* SSB Periodicity in msec */
567 uint8_t ssbScOffset; /* Subcarrier Offset */
568 uint8_t mibPdu[3]; /* MIB payload */
569 uint32_t ssbMask[SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
570 uint8_t beamId[NUM_SSB];
571 bool multCarrBand; /* Multiple carriers in a band */
572 bool multCellCarr; /* Multiple cells in single carrier */
575 typedef struct fdmInfo
577 uint16_t rootSeqIdx; /* Root sequence index */
578 uint8_t numRootSeq; /* Number of root sequences required for FD */
579 uint16_t k1; /* Frequency Offset for each FD */
580 uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
581 uint8_t numUnusedRootSeq; /* Number of unused root sequence */
582 uint8_t *unsuedRootSeq; /* Unused root sequence per FD */
585 typedef struct prachCfg
588 uint8_t prachCfgIdx; /* PRACH Cfg Index */
589 PrachSeqLen prachSeqLen; /* RACH Sequence length: Long/short */
590 uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */
591 RstSetCfg prachRstSetCfg; /* PRACH restricted set config */
592 uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
593 uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
594 uint8_t rootSeqLen; /* Root sequence length */
595 PrachFdmInfo fdm[8]; /* FDM info */
596 uint8_t totalNumRaPreamble; /* Total number of RA preambles */
597 uint8_t ssbPerRach; /* SSB per RACH occassion */
598 uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
599 bool prachMultCarrBand; /* Multiple carriers in Band */
600 uint8_t prachRestrictedSet; /* Support for PRACH restricted set */
601 uint8_t raContResTmr; /* RA Contention Resoultion Timer */
602 uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
603 uint8_t raRspWindow; /* RA Response Window */
606 typedef struct schPageCfg
608 uint8_t numPO; /*Derived from Ns*/
609 bool poPresent; /*Whether FirstPDCCH-MonitoringPO is present or not*/
610 uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
613 typedef struct sib1CellCfg
617 uint16_t sib1RepetitionPeriod;
618 uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
619 uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
621 SchPageCfg pagingCfg;
624 typedef struct bwpParams
629 uint8_t cyclicPrefix;
632 typedef struct candidatesInfo
641 typedef struct searchSpaceCfg
643 uint8_t searchSpaceId;
645 uint16_t monitoringSlot;
647 uint16_t monitoringSymbol;
648 CandidatesInfo candidate;
651 typedef struct pdcchConfigCommon
653 /* only one search space is configured during SIB1 */
654 SearchSpaceCfg commonSearchSpace;
655 uint8_t raSearchSpaceId;
658 typedef struct pdschCfgCommTimeDomRsrcAlloc
663 uint8_t lengthSymbol;
664 }PdschCfgCommTimeDomRsrcAlloc;
666 typedef struct pdschConfigCommon
668 uint8_t numTimeDomAlloc;
669 /* PDSCH time domain DL resource allocation list */
670 PdschCfgCommTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
673 typedef struct pucchConfigCommon
675 uint8_t pucchResourceCommon;
676 uint8_t pucchGroupHopping;
679 /* PUSCH Time Domain Resource Allocation */
680 typedef struct puschTimeDomRsrcAlloc
683 CommonMappingType mappingType;
685 uint8_t symbolLength;
686 uint8_t startSymbolAndLength;
687 }PuschTimeDomRsrcAlloc;
690 typedef struct puschConfigCommon
692 /* PUSCH-TimeDomainResourceAllocation info */
693 uint8_t numTimeDomRsrcAlloc;
694 PuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
697 typedef struct bwpDlConfig
700 PdcchConfigCommon pdcchCommon;
701 PdschConfigCommon pdschCommon;
704 typedef struct bwpUlConfig
707 // rach config common sent in PrachCfg
708 PucchConfigCommon pucchCommon;
709 PuschConfigCommon puschCommon;
712 typedef struct plmnInfoList
715 uint8_t numSupportedSlice; /* Total slice supporting */
716 Snssai **snssai; /* List of supporting snssai*/
720 /* The following list of structures is taken from the DRX-Config section of specification 33.331. */
721 typedef struct drxOnDurationTimer
723 bool onDurationTimerValInMs;
726 uint8_t subMilliSeconds;
727 uint16_t milliSeconds;
728 }onDurationtimerValue;
731 typedef struct drxLongCycleStartOffset
733 uint16_t drxLongCycleStartOffsetChoice;
734 uint16_t drxLongCycleStartOffsetVal;
735 }DrxLongCycleStartOffset;
737 typedef struct shortDrx
739 uint16_t drxShortCycle;
740 uint8_t drxShortCycleTimer;
743 typedef struct drxInfo
745 DrxOnDurationTimer drxOnDurationTimer;
746 uint16_t drxInactivityTimer;
747 uint8_t drxHarqRttTimerDl;
748 uint8_t drxHarqRttTimerUl;
749 uint16_t drxRetransmissionTimerDl;
750 uint16_t drxRetransmissionTimerUl;
751 DrxLongCycleStartOffset drxLongCycleStartOffset;
753 uint8_t drxSlotOffset;
757 typedef struct macCellCfg
759 uint16_t cellId; /* Cell Id */
760 uint8_t carrierId; /* Carrired Index */
761 uint16_t phyCellId; /* Physical cell id */
762 uint8_t numerology; /* Supported numerology */
763 DuplexMode dupType; /* Duplex type: TDD/FDD */
764 CarrierCfg dlCarrCfg; /* DL Carrier configuration */
765 CarrierCfg ulCarrCfg; /* UL Carrier configuration */
766 bool freqShft; /* Indicates presence of 7.5kHz frequency shift */
767 SsbCfg ssbCfg; /* SSB configuration */
768 PrachCfg prachCfg; /* PRACH Configuration */
770 TDDCfg tddCfg; /* TDD periodicity and slot configuration */
772 RSSIMeasUnit rssiUnit; /* RSSI measurement unit */
773 Sib1CellCfg sib1Cfg; /* SIB1 config */
774 BwpDlConfig initialDlBwp; /* Initial DL BWP */
775 BwpUlConfig initialUlBwp; /* Initial UL BWP */
776 uint8_t dmrsTypeAPos; /* DMRS Type A position */
777 PlmnInfoList plmnInfoList; /* Consits of PlmnId and Snssai list */
778 //RrmPolicy *rrmPolicy; /* RRM policy details */
780 DrxInfo drxInfo; /* Drx info */
784 typedef struct macCellCfgCfm
790 typedef struct ulCcchInd
794 uint16_t ulCcchMsgLen;
798 typedef struct dlCcchInd
802 DlCcchMsgType msgType;
803 uint16_t dlCcchMsgLen;
807 typedef struct bsrTmrCfg
809 uint16_t periodicTimer;
811 uint16_t srDelayTimer;
815 /* Info of Scheduling Request to Add/Modify */
816 typedef struct schedReqInfo
819 SrProhibitTimer srProhibitTmr;
820 SrTransMax srTransMax;
823 /* Scheduling Request Configuration */
824 typedef struct schedReqCfg
826 uint8_t addModListCount;
827 SchedReqInfo addModList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* List of Scheduling req to be added/modified */
828 uint8_t relListCount;
829 uint8_t relList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* list of scheduling request Id to be deleted */
832 typedef struct tagInfo
835 TimeAlignmentTimer timeAlignTimer;
838 typedef struct tagCfg
840 uint8_t addModListCount;
841 TagInfo addModList[MAC_NUM_TAGS]; /* List of Tag to Add/Modify */
842 uint8_t relListCount;
843 uint8_t relList[MAC_NUM_TAGS]; /* list of Tag Id to release */
846 typedef struct phrCfg
848 PhrPeriodicTimer periodicTimer;
849 PhrProhibitTimer prohibitTimer;
850 PhrTxPwrFactorChange txPowerFactor;
853 bool phrType2OtherCell;
854 PhrModeOtherCG phrOtherCG;
857 typedef struct macCellGrpCfg
859 SchedReqCfg schReqCfg;
862 bool phrCfgSetupPres; /* true/false: phrCfgSetup/phrCfgRelease */
866 typedef struct phyCellGrpCfg
868 PdschHarqAckCodebook pdschHarqAckCodebook;
872 /* Control resource set info */
873 typedef struct controlRsrcSet
875 uint8_t cRSetId; /* Control resource set id */
876 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
878 REGMappingType cceRegMappingType;
879 PrecoderGranul precoderGranularity;
880 uint16_t dmrsScramblingId;
883 /* Search Space info */
884 typedef struct searchSpace
886 uint8_t searchSpaceId;
888 MSlotPeriodAndOffset mSlotPeriodicityAndOffset;
889 uint8_t mSymbolsWithinSlot[MONITORING_SYMB_WITHIN_SLOT_SIZE];
890 AggrLevel numCandidatesAggLevel1; /* Number of candidates for aggregation level 1 */
891 AggrLevel numCandidatesAggLevel2; /* Number of candidates for aggregation level 2 */
892 AggrLevel numCandidatesAggLevel4; /* Number of candidates for aggregation level 4 */
893 AggrLevel numCandidatesAggLevel8; /* Number of candidates for aggregation level 8 */
894 AggrLevel numCandidatesAggLevel16; /* Number of candidates for aggregation level 16 */
895 SearchSpaceType searchSpaceType;
896 uint8_t ueSpecificDciFormat;
899 /* PDCCH cofniguration */
900 typedef struct pdcchConfig
902 uint8_t numCRsetToAddMod;
903 ControlRsrcSet cRSetToAddModList[MAX_NUM_CRSET]; /* List of control resource set to add/modify */
904 uint8_t numCRsetToRel;
905 uint8_t cRSetToRelList[MAX_NUM_CRSET]; /* List of control resource set to release */
906 uint8_t numSearchSpcToAddMod;
907 SearchSpace searchSpcToAddModList[MAX_NUM_SEARCH_SPC]; /* List of search space to add/modify */
908 uint8_t numSearchSpcToRel;
909 uint8_t searchSpcToRelList[MAX_NUM_SEARCH_SPC]; /* List of search space to release */
912 /* PDSCH time domain resource allocation */
913 typedef struct pdschTimeDomRsrcAlloc
916 CommonMappingType mappingType;
918 uint8_t symbolLength;
919 uint8_t startSymbolAndLength;
920 }PdschTimeDomRsrcAlloc;
923 typedef struct pdschBundling
925 struct staticBundling
927 BundlingSizeSet2 size;
929 struct dynamicBundling
931 BundlingSizeSet1 sizeSet1;
932 BundlingSizeSet2 sizeSet2;
936 /* DMRS downlink configuration */
937 typedef struct dmrsDlCfg
939 AddPosType addPos; /* DMRS additional position */
942 /* PDSCH Configuration */
943 typedef struct pdschConfig
945 DmrsDlCfg dmrsDlCfgForPdschMapTypeA;
946 ResAllocType resourceAllocType;
947 uint8_t numTimeDomRsrcAlloc;
948 PdschTimeDomRsrcAlloc timeDomRsrcAllociList[MAX_NUM_DL_ALLOC]; /* PDSCH time domain DL resource allocation list */
950 CodeWordsSchedDci numCodeWordsSchByDci; /* Number of code words scheduled by DCI */
951 BundlingType bundlingType;
952 PdschBundling bundlingInfo;
955 /* Initial Downlink BWP */
956 typedef struct initialDlBwp
959 PdcchConfig pdcchCfg;
961 PdschConfig pdschCfg;
964 /* BWP Downlink common */
965 typedef struct bwpDlCommon
969 /* Downlink BWP information */
970 typedef struct dlBwpInfo
975 /* PDCCH Serving Cell configuration */
976 typedef struct pdschServCellCfg
978 uint8_t *maxMimoLayers;
979 NumHarqProcForPdsch numHarqProcForPdsch;
980 MaxCodeBlkGrpPerTB *maxCodeBlkGrpPerTb;
981 bool *codeBlkGrpFlushInd;
982 PdschXOverhead *xOverhead;
985 /* PUCCH Configuration */
987 typedef struct pucchResrcSetInfo
990 uint8_t resrcListCount;
991 uint8_t resrcList[MAX_NUM_PUCCH_PER_RESRC_SET];
992 uint8_t maxPayLoadSize;
995 typedef struct pucchResrcSetCfg
997 uint8_t resrcSetToAddModListCount;
998 PucchResrcSetInfo resrcSetToAddModList[MAX_NUM_PUCCH_RESRC_SET];
999 uint8_t resrcSetToRelListCount;
1000 uint8_t resrcSetToRelList[MAX_NUM_PUCCH_RESRC];
1003 typedef struct pucchFormat0
1005 uint8_t initialCyclicShift;
1007 uint8_t startSymbolIdx;
1010 typedef struct pucchFormat1
1012 uint8_t initialCyclicShift;
1014 uint8_t startSymbolIdx;
1018 typedef struct pucchFormat2_3
1022 uint8_t startSymbolIdx;
1025 typedef struct pucchFormat4
1030 uint8_t startSymbolIdx;
1033 typedef struct pucchResrcInfo
1037 uint8_t intraFreqHop;
1038 uint16_t secondPrbHop;
1039 uint8_t pucchFormat;
1042 PucchFormat0 *format0;
1043 PucchFormat1 *format1;
1044 PucchFormat2_3 *format2;
1045 PucchFormat2_3 *format3;
1046 PucchFormat4 *format4;
1050 typedef struct pucchResrcCfg
1052 uint8_t resrcToAddModListCount;
1053 PucchResrcInfo resrcToAddModList[MAX_NUM_PUCCH_RESRC];
1054 uint8_t resrcToRelListCount;
1055 uint8_t resrcToRelList[MAX_NUM_PUCCH_RESRC];
1058 typedef struct pucchFormatCfg
1060 bool interSlotFreqHop;
1062 uint8_t maxCodeRate;
1068 typedef struct schedReqResrcInfo
1072 uint8_t periodicity;
1077 typedef struct pucchSchedReqCfg
1079 uint8_t schedAddModListCount;
1080 SchedReqResrcInfo schedAddModList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1081 uint8_t schedRelListCount;
1082 uint8_t schedRelList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1085 typedef struct spatialRelationInfo
1087 uint8_t spatialRelationId;
1088 uint8_t servCellIdx;
1089 uint8_t pathLossRefRSId;
1091 uint8_t closeLoopIdx;
1092 }SpatialRelationInfo;
1094 typedef struct pucchSpatialCfg
1096 uint8_t spatialAddModListCount;
1097 SpatialRelationInfo spatialAddModList[MAX_NUM_SPATIAL_RELATIONS];
1098 uint8_t spatialRelListCount;
1099 uint8_t spatialRelList[MAX_NUM_SPATIAL_RELATIONS];
1102 typedef struct p0PucchCfg
1108 typedef struct pathLossRefRSCfg
1110 uint8_t pathLossRefRSId;
1113 typedef struct pucchMultiCsiCfg
1115 uint8_t multiCsiResrcListCount;
1116 uint8_t multiCsiResrcList[MAX_NUM_PUCCH_RESRC-1];
1119 typedef struct pucchDlDataToUlAck
1121 uint8_t dlDataToUlAckListCount;
1122 uint8_t dlDataToUlAckList[MAX_NUM_DL_DATA_TO_UL_ACK];
1123 }PucchDlDataToUlAck;
1125 typedef struct pucchPowerControl
1133 P0PucchCfg p0Set[MAX_NUM_PUCCH_P0_PER_SET];
1134 uint8_t pathLossRefRSListCount;
1135 PathLossRefRSCfg pathLossRefRSList[MAX_NUM_PATH_LOSS_REF_RS];
1138 typedef struct pucchCfg
1140 PucchResrcSetCfg *resrcSet;
1141 PucchResrcCfg *resrc;
1142 PucchFormatCfg *format1;
1143 PucchFormatCfg *format2;
1144 PucchFormatCfg *format3;
1145 PucchFormatCfg *format4;
1146 PucchSchedReqCfg *schedReq;
1147 PucchMultiCsiCfg *multiCsiCfg;
1148 PucchSpatialCfg *spatialInfo;
1149 PucchDlDataToUlAck *dlDataToUlAck;
1150 PucchPowerControl *powerControl;
1153 /* Transform precoding disabled */
1154 typedef struct transPrecodDisabled
1156 uint16_t scramblingId0;
1157 }TransPrecodDisabled;
1159 /* DMRS Uplink configuration */
1160 typedef struct dmrsUlCfg
1162 AddPosType addPos; /* DMRS additional position */
1163 TransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */
1166 /* PUSCH Configuration */
1167 typedef struct puschCfg
1169 uint8_t dataScramblingId;
1170 DmrsUlCfg dmrsUlCfgForPuschMapTypeA;
1171 ResAllocType resourceAllocType;
1172 uint8_t numTimeDomRsrcAlloc;
1173 PuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
1174 TransformPrecoder transformPrecoder;
1177 /* Initial Uplink BWP */
1178 typedef struct initialUlBwp
1186 /* Uplink BWP information */
1187 typedef struct ulBwpInfo
1192 /* Serving cell configuration */
1193 typedef struct servCellCfgInfo
1195 InitialDlBwp initDlBwp;
1196 uint8_t numDlBwpToAdd;
1197 DlBwpInfo DlBwpToAddList[MAX_NUM_BWP];
1198 uint8_t firstActvDlBwpId;
1199 uint8_t defaultDlBwpId;
1200 uint8_t *bwpInactivityTmr;
1201 PdschServCellCfg pdschServCellCfg;
1202 InitialUlBwp initUlBwp;
1203 uint8_t numUlBwpToAdd;
1204 UlBwpInfo UlBwpToAddList[MAX_NUM_BWP];
1205 uint8_t firstActvUlBwpId;
1208 /* Special cell configuration */
1209 typedef struct spCellCfg
1211 uint8_t servCellIdx;
1212 ServCellCfgInfo servCellCfg;
1215 typedef struct ambrCfg
1217 uint32_t ulBr; /* UL Bit rate */
1220 typedef struct nonDynFiveQi
1225 uint16_t maxDataBurstVol;
1228 typedef struct dynFiveQi
1231 uint16_t packetDelayBudget;
1232 uint8_t packetErrRateScalar;
1233 uint8_t packetErrRateExp;
1235 uint8_t delayCritical;
1237 uint16_t maxDataBurstVol;
1240 typedef struct ngRanAllocAndRetPri
1242 uint8_t priorityLevel;
1243 uint8_t preEmptionCap;
1244 uint8_t preEmptionVul;
1245 }NgRanAllocAndRetPri;
1247 typedef struct grbQosInfo
1249 uint32_t maxFlowBitRateDl;
1250 uint32_t maxFlowBitRateUl;
1251 uint32_t guarFlowBitRateDl;
1252 uint32_t guarFlowBitRateUl;
1255 typedef struct drbQos
1257 QosType fiveQiType; /* Dynamic or non-dynamic */
1260 NonDynFiveQi nonDyn5Qi;
1263 NgRanAllocAndRetPri ngRanRetPri;
1264 GrbQosInfo grbQosInfo;
1265 uint16_t pduSessionId;
1266 uint32_t ulPduSessAggMaxBitRate;
1269 typedef struct ulLcCfg
1274 PBitRate pbr; // prioritisedBitRate
1275 BucketSizeDur bsd; // bucketSizeDuration
1278 typedef struct duLcCfg
1280 LcPriority lcp; // logical Channel Prioritization
1283 typedef struct lcCfg
1285 ConfigType configType;
1294 typedef struct modulationInfo
1296 uint8_t modOrder; /* Modulation order */
1297 uint8_t mcsIndex; /* MCS Index */
1298 McsTable mcsTable; /* MCS table */
1301 typedef struct macUeCfg
1306 bool macCellGrpCfgPres;
1307 MacCellGrpCfg macCellGrpCfg;
1308 bool phyCellGrpCfgPres;
1309 PhyCellGrpCfg phyCellGrpCfg;
1311 SpCellCfg spCellCfg;
1313 ModulationInfo dlModInfo; /* DL modulation info */
1314 ModulationInfo ulModInfo; /* UL modulation info */
1316 LcCfg lcCfgList[MAX_NUM_LC];
1317 UeCfgState macUeCfgState; /* InActive / Completed */
1318 DataTransmissionAction transmissionAction;
1321 typedef struct nrcgi
1327 typedef struct srbFailInfo
1333 typedef struct drbFailInfo
1339 typedef struct sCellFailInfo
1345 typedef struct ueCfgRsp
1350 uint8_t numSRBFailed; /* valid values : 0 to MAX_NUM_SRB */
1351 SRBFailInfo *failedSRBlisti;
1352 uint8_t numDRBFailed; /* valid values : 0 to MAX_NUM_DRB */
1353 DRBFailInfo *failedDRBlist;
1354 uint8_t numSCellFailed; /* valid values : 0 to MAX_NUM_SCELL */
1355 SCellFailInfo *failedSCellList;
1358 typedef struct rachRsrcReq
1363 uint8_t ssbIdx[MAX_NUM_SSB];
1366 typedef struct macCfraSsbResource
1369 uint8_t raPreambleIdx;
1370 }MacCfraSsbResource;
1372 typedef struct macCfraResource
1375 MacCfraSsbResource ssbResource[MAX_NUM_SSB];
1378 typedef struct macRachRsrcRsp
1383 uint16_t newCrnti; /* This parameter maps to 3GPP TS 38.331 newUE-Identity */
1384 MacCfraResource cfraResource;
1387 typedef struct macRachRsrcRel
1394 typedef struct ueDelete
1401 typedef struct ueDeleteRsp
1405 UeDeleteStatus result;
1408 typedef struct macCellDelete
1413 typedef struct macCellDeleteRsp
1416 CellDeleteStatus result;
1419 typedef struct macSliceRsp
1426 typedef struct rrmPolicyRatio
1428 uint8_t policyMaxRatio;
1429 uint8_t policyMinRatio;
1430 uint8_t policyDedicatedRatio;
1433 typedef struct macSliceRrmPolicy
1436 RrmPolicyRatio *rrmPolicyRatio;
1439 typedef struct macSliceCfgReq
1441 uint8_t numOfConfiguredSlice;
1442 MacSliceRrmPolicy **listOfSliceCfg;
1445 typedef struct macSliceCfgRsp
1447 uint8_t numSliceCfgRsp;
1448 MacSliceRsp **listOfSliceCfgRsp;
1451 typedef struct macPcchInd
1460 /* Functions for CellUp Ind from MAC to DU APP*/
1461 typedef uint8_t (*DuMacCellUpInd) ARGS((
1463 OduCellId *cellId ));
1465 /* Functions for slot Ind from MAC to DU APP*/
1466 typedef uint8_t (*DuMacSlotInd) ARGS((
1468 SlotTimingInfo *slotIndInfo));
1470 /* Functions for stop Ind from MAC to DU APP*/
1471 typedef uint8_t (*DuMacStopInd) ARGS((
1473 OduCellId *cellId ));
1475 /* Functions for mac cell start req */
1476 typedef uint8_t (*DuMacCellStart) ARGS((
1478 OduCellId *cellId));
1480 /* Functions for mac cell stop request */
1481 typedef uint8_t (*DuMacCellStop) ARGS((
1483 OduCellId *cellId ));
1485 /* Function pointers for packing macCellCfg Request and Confirm */
1486 typedef uint8_t (*packMacCellCfgReq) ARGS((
1488 MacCellCfg *macCellCfg ));
1490 typedef uint8_t (*packMacCellCfgConfirm) ARGS((
1492 MacCellCfgCfm *macCellCfgCfm ));
1494 typedef uint8_t (*DuMacCellCfgReq) ARGS((
1496 MacCellCfg *macCellCfg));
1498 typedef uint8_t (*DuMacCellCfgCfm) ARGS((
1500 MacCellCfgCfm *macCellCfgCfm ));
1502 /* Functions for UL CCCH Ind from MAC to DU APP*/
1503 typedef uint8_t (*DuMacUlCcchInd) ARGS((
1505 UlCcchIndInfo *ulCcchIndInfo ));
1507 /* Functions for DL CCCH Ind from DU APP to MAC*/
1508 typedef uint8_t (*DuMacDlCcchInd) ARGS((
1510 DlCcchIndInfo *dlCcchIndInfo ));
1512 /* UE create Request from DU APP to MAC*/
1513 typedef uint8_t (*DuMacUeCreateReq) ARGS((
1517 /* UE create Response from MAC to DU APP */
1518 typedef uint8_t (*MacDuUeCfgRspFunc) ARGS((
1520 MacUeCfgRsp *cfgRsp));
1522 /* UE Reconfig Request from DU APP to MAC */
1523 typedef uint8_t (*DuMacUeReconfigReq) ARGS((
1527 /* RACH Resource Request from DU APP to MAC */
1528 typedef uint8_t (*DuMacRachRsrcReq) ARGS((
1530 MacRachRsrcReq *rachRsrcReq));
1532 /* RACH Resource Response from MAC to DU APP */
1533 typedef uint8_t (*MacDuRachRsrcRspFunc) ARGS((
1535 MacRachRsrcRsp *rachRsrcRsp));
1537 /* RACH Resource Release from DU APP to MAC */
1538 typedef uint8_t (*DuMacRachRsrcRel) ARGS((
1540 MacRachRsrcRel *rachRsrcRel));
1542 /* UE Delete Request from DU APP to MAC*/
1543 typedef uint8_t (*DuMacUeDeleteReq) ARGS((
1545 MacUeDelete *ueDel ));
1547 /* UE Delete Response from MAC to DU APP*/
1548 typedef uint8_t (*MacDuUeDeleteRspFunc) ARGS((
1550 MacUeDeleteRsp *deleteRsp));
1552 /* Cell Delete Request from DU APP to MAC*/
1553 typedef uint8_t (*DuMacCellDeleteReq) ARGS((
1555 MacCellDelete *cellDelete ));
1557 /* Cell Delete Response from MAC to DU APP*/
1558 typedef uint8_t (*MacDuCellDeleteRspFunc) ARGS((
1560 MacCellDeleteRsp *cellDeleteRsp));
1562 /* Slice Cfg Request from DU APP to MAC*/
1563 typedef uint8_t (*DuMacSliceCfgReq) ARGS((
1565 MacSliceCfgReq *CfgReq));
1567 /* Slice Cfg Response from MAC to DU APP */
1568 typedef uint8_t (*MacDuSliceCfgRspFunc) ARGS((
1570 MacSliceCfgRsp *cfgRsp));
1572 /* Slice ReReCfg Request from DU APP to MAC*/
1573 typedef uint8_t (*DuMacSliceRecfgReq) ARGS((
1575 MacSliceCfgReq *CfgReq));
1577 /* Slice ReReCfg Response from MAC to DU APP */
1578 typedef uint8_t (*MacDuSliceReCfgRspFunc) ARGS((
1580 MacSliceCfgRsp *cfgRsp));
1582 /* Pcch indication from DU APP to MAC*/
1583 typedef uint8_t (*DuMacDlPcchInd) ARGS((
1585 MacPcchInd *pcchInd));
1587 uint64_t ueBitMapPerCell[MAX_NUM_CELL]; /* Bit Map to store used/free UE-IDX per Cell */
1589 uint8_t packMacCellUpInd(Pst *pst, OduCellId *cellId);
1590 uint8_t unpackMacCellUpInd(DuMacCellUpInd func, Pst *pst, Buffer *mBuf);
1591 uint8_t duHandleCellUpInd(Pst *pst, OduCellId *cellId);
1592 uint8_t packMacCellStart(Pst *pst, OduCellId *cellId);
1593 uint8_t unpackMacCellStart(DuMacCellStart func, Pst *pst, Buffer *mBuf);
1594 uint8_t MacProcCellStart(Pst *pst, OduCellId *cellId);
1595 uint8_t packMacCellStop(Pst *pst, OduCellId *cellId);
1596 uint8_t unpackMacCellStop(DuMacCellStop func, Pst *pst, Buffer *mBuf);
1597 uint8_t MacProcCellStop(Pst *pst, OduCellId *cellId);
1598 uint8_t packMacCellCfg(Pst *pst, MacCellCfg *macCellCfg);
1599 uint8_t unpackDuMacCellCfg(DuMacCellCfgReq func, Pst *pst, Buffer *mBuf);
1600 uint8_t MacProcCellCfgReq(Pst *pst, MacCellCfg *macCellCfg);
1601 uint8_t packMacCellCfgCfm(Pst *pst, MacCellCfgCfm *macCellCfgCfm);
1602 uint8_t unpackMacCellCfgCfm(DuMacCellCfgCfm func, Pst *pst, Buffer *mBuf);
1603 uint8_t duHandleMacCellCfgCfm(Pst *pst, MacCellCfgCfm *macCellCfgCfm);
1604 uint8_t packMacStopInd(Pst *pst, OduCellId *cellId);
1605 uint8_t unpackMacStopInd(DuMacStopInd func, Pst *pst, Buffer *mBuf);
1606 uint8_t duHandleStopInd(Pst *pst, OduCellId *cellId);
1607 uint8_t packMacUlCcchInd(Pst *pst, UlCcchIndInfo *ulCcchIndInfo);
1608 uint8_t unpackMacUlCcchInd(DuMacUlCcchInd func, Pst *pst, Buffer *mBuf);
1609 uint8_t duHandleUlCcchInd(Pst *pst, UlCcchIndInfo *ulCcchIndInfo);
1610 uint8_t packMacDlCcchInd(Pst *pst, DlCcchIndInfo *dlCcchIndInfo);
1611 uint8_t unpackMacDlCcchInd(DuMacDlCcchInd func, Pst *pst, Buffer *mBuf);
1612 uint8_t MacProcDlCcchInd(Pst *pst, DlCcchIndInfo *dlCcchIndInfo);
1613 uint8_t packDuMacUeCreateReq(Pst *pst, MacUeCfg *ueCfg);
1614 uint8_t unpackMacUeCreateReq(DuMacUeCreateReq func, Pst *pst, Buffer *mBuf);
1615 uint8_t MacProcUeCreateReq(Pst *pst, MacUeCfg *ueCfg);
1616 uint8_t sendStopIndMacToDuApp(uint16_t cellId);
1617 uint8_t packDuMacUeCfgRsp(Pst *pst, MacUeCfgRsp *cfgRsp);
1618 uint8_t unpackDuMacUeCfgRsp(MacDuUeCfgRspFunc func, Pst *pst, Buffer *mBuf);
1619 uint8_t DuProcMacUeCfgRsp(Pst *pst, MacUeCfgRsp *cfgRsp);
1620 uint8_t packDuMacUeReconfigReq(Pst *pst, MacUeCfg *ueCfg);
1621 uint8_t unpackMacUeReconfigReq(DuMacUeReconfigReq func, Pst *pst, Buffer *mBuf);
1622 uint8_t MacProcUeReconfigReq(Pst *pst, MacUeCfg *ueCfg);
1623 uint8_t packDuMacRachRsrcReq(Pst *pst, MacRachRsrcReq *rachRsrcReq);
1624 uint8_t unpackMacRachRsrcReq(DuMacRachRsrcReq func, Pst *pst, Buffer *mBuf);
1625 uint8_t MacProcRachRsrcReq(Pst *pst, MacRachRsrcReq *rachRsrcReq);
1626 uint8_t packDuMacRachRsrcRsp(Pst *pst, MacRachRsrcRsp *rachRsrcRsp);
1627 uint8_t unpackDuMacRachRsrcRsp(MacDuRachRsrcRspFunc func, Pst *pst, Buffer *mBuf);
1628 uint8_t DuProcMacRachRsrcRsp(Pst *pst, MacRachRsrcRsp *rachRsrcRsp);
1629 uint8_t packDuMacRachRsrcRel(Pst *pst, MacRachRsrcRel *rachRsrcRel);
1630 uint8_t unpackMacRachRsrcRel(DuMacRachRsrcRel func, Pst *pst, Buffer *mBuf);
1631 uint8_t MacProcRachRsrcRel(Pst *pst, MacRachRsrcRel *rachRsrcRel);
1632 uint8_t packDuMacUeDeleteReq(Pst *pst, MacUeDelete *ueDelete);
1633 uint8_t MacProcUeDeleteReq(Pst *pst, MacUeDelete *ueDelete);
1634 uint8_t unpackMacUeDeleteReq(DuMacUeDeleteReq func, Pst *pst, Buffer *mBuf);
1635 uint8_t packDuMacUeDeleteRsp(Pst *pst, MacUeDeleteRsp *deleteRsp);
1636 uint8_t DuProcMacUeDeleteRsp(Pst *pst, MacUeDeleteRsp *deleteRsp);
1637 uint8_t unpackDuMacUeDeleteRsp(MacDuUeDeleteRspFunc func, Pst *pst, Buffer *mBuf);
1638 uint8_t packDuMacCellDeleteReq(Pst *pst, MacCellDelete *cellDelete);
1639 uint8_t MacProcCellDeleteReq(Pst *pst, MacCellDelete *cellDelete);
1640 uint8_t unpackMacCellDeleteReq(DuMacCellDeleteReq func, Pst *pst, Buffer *mBuf);
1641 uint8_t packDuMacCellDeleteRsp(Pst *pst, MacCellDeleteRsp *cellDeleteRsp);
1642 uint8_t DuProcMacCellDeleteRsp(Pst *pst, MacCellDeleteRsp *cellDeleteRsp);
1643 uint8_t unpackDuMacCellDeleteRsp(MacDuCellDeleteRspFunc func, Pst *pst, Buffer *mBuf);
1644 uint8_t packDuMacSliceCfgReq(Pst *pst, MacSliceCfgReq *sliceCfgReq);
1645 uint8_t MacProcSliceCfgReq(Pst *pst, MacSliceCfgReq *sliceCfgReq);
1646 uint8_t unpackMacSliceCfgReq(DuMacSliceCfgReq func, Pst *pst, Buffer *mBuf);
1647 uint8_t DuProcMacSliceCfgRsp(Pst *pst, MacSliceCfgRsp *cfgRsp);
1648 uint8_t packDuMacSliceCfgRsp(Pst *pst, MacSliceCfgRsp *cfgRsp);
1649 uint8_t unpackDuMacSliceCfgRsp(MacDuSliceCfgRspFunc func, Pst *pst, Buffer *mBuf);
1650 uint8_t packDuMacSliceRecfgReq(Pst *pst, MacSliceCfgReq *sliceReCfgReq);
1651 uint8_t MacProcSliceReCfgReq(Pst *pst, MacSliceCfgReq *sliceReCfgReq);
1652 uint8_t unpackMacSliceReCfgReq(DuMacSliceRecfgReq func, Pst *pst, Buffer *mBuf);
1653 uint8_t DuProcMacSliceReCfgRsp(Pst *pst, MacSliceCfgRsp *cfgRsp);
1654 uint8_t packDuMacSliceReCfgRsp(Pst *pst, MacSliceCfgRsp *cfgRsp);
1655 uint8_t unpackDuMacSliceReCfgRsp(MacDuSliceReCfgRspFunc func, Pst *pst, Buffer *mBuf);
1656 uint8_t duHandleSlotInd(Pst *pst, SlotTimingInfo *slotIndInfo);
1657 uint8_t packMacSlotInd(Pst *pst, SlotTimingInfo *slotIndInfo);
1658 uint8_t unpackDuMacSlotInd(DuMacSlotInd func, Pst *pst, Buffer *mBuf);
1659 uint8_t packDuMacDlPcchInd(Pst *pst, MacPcchInd *pcchInd);
1660 uint8_t MacProcDlPcchInd(Pst *pst, MacPcchInd *pcchInd);
1661 uint8_t unpackMacDlPcchInd(DuMacDlPcchInd func, Pst *pst, Buffer *mBuf);
1662 int8_t getFreeBitFromUeBitMap(uint16_t cellId);
1663 void unsetBitInUeBitMap(uint16_t cellId, uint8_t bitPos);
1667 /**********************************************************************
1669 **********************************************************************/