-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#define _GNU_SOURCE\r
-#include <unistd.h>\r
-#include <sys/syscall.h>\r
-#include <sched.h>\r
-#include <assert.h>\r
-#include <err.h>\r
-#include <libgen.h>\r
-#include <sys/time.h>\r
-#include <time.h>\r
-#include <unistd.h>\r
-#include <stdio.h>\r
-#include <fcntl.h>\r
-#include <pthread.h>\r
-#include <sys/stat.h>\r
-#include <unistd.h>\r
-\r
-\r
-#include "common.h"\r
-#include "config.h"\r
-#include "xran_mlog_lnx.h"\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_compression.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_sync_api.h"\r
-#include "xran_mlog_task_id.h"\r
-\r
-#define MAX_BBU_POOL_CORE_MASK (4)\r
-\r
-\r
-#define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024\r
-#define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024\r
-#define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024\r
-#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)\r
-\r
-#define NSEC_PER_SEC 1000000000\r
-\r
-#define MAX_PKT_BURST (448+4) // 4x14x8\r
-#define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST\r
-\r
-#define MAIN_PRIORITY 98\r
-#define NUM_OF_SUBFRAME_PER_FRAME (10)\r
-\r
-enum app_state state;\r
-\r
-uint64_t tick_per_usec;\r
-static volatile uint64_t timer_last_irq_tick = 0;\r
-static uint64_t tsc_resolution_hz = 0;\r
-\r
-RuntimeConfig startupConfiguration = {0};\r
-\r
-/* buffers size */\r
-uint32_t nFpgaToSW_FTH_RxBufferLen;\r
-uint32_t nFpgaToSW_PRACH_RxBufferLen;\r
-uint32_t nSW_ToFpga_FTH_TxBufferLen;\r
-\r
-static struct xran_fh_init xranInit;\r
-void * xranHandle = NULL;\r
-\r
-struct xran_fh_config xranConf;\r
-struct xran_fh_config *pXranConf = NULL;\r
-\r
-typedef struct\r
-{\r
- uint32_t phaseFlag :1;\r
- uint32_t NRARFCN :22;\r
- uint32_t SULFreShift :1;\r
- uint32_t SULFlag :1;\r
- uint32_t rsv :7;\r
-}FPGAPhaseCompCfg;\r
-\r
-typedef struct XranLibConfig\r
-{\r
- uint32_t nDriverCoreId;\r
- uint32_t nTimingAdvance;\r
- uint32_t nFhConfig;\r
- uint32_t nFhBufIntFlag;\r
- uint32_t nSectorNum;\r
- uint32_t nNrOfSlotInSf;\r
- uint32_t nNrofSfInFrame;\r
- void * pFthInstanceHandles;\r
-}XranLibConfigStruct;\r
-typedef enum {\r
- XRANFTHTX_OUT = 0,\r
- XRANFTHTX_PRB_MAP_OUT,\r
- XRANFTHTX_SEC_DESC_OUT,\r
- XRANFTHRX_IN,\r
- XRANFTHRX_PRB_MAP_IN,\r
- XRANFTHTX_SEC_DESC_IN,\r
- XRANFTHRACH_IN,\r
- XRANSRS_IN,\r
- MAX_SW_XRAN_INTERFACE_NUM\r
-}SWXRANInterfaceTypeEnum;\r
-\r
-/*\r
- * manage one cell's all Ethernet frames for one DL or UL LTE subframe\r
- */\r
-typedef struct {\r
- /* -1-this subframe is not used in current frame format\r
- 0-this subframe can be transmitted, i.e., data is ready\r
- 1-this subframe is waiting transmission, i.e., data is not ready\r
- 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,\r
- set bValid to 10.\r
- */\r
- int32_t bValid ; // when UL rx, it is subframe index.\r
- int32_t nSegToBeGen;\r
- int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE\r
- // -1 means that DL packet to be transmitted is not ready in BS\r
- int32_t nSegTransferred; // number of data segments has been transmitted or received\r
- struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool\r
- struct xran_buffer_list sBufferList;\r
-} BbuIoBufCtrlStruct;\r
-\r
-typedef struct {\r
- uint64_t nCoreMask;\r
- int16_t cpuSocketId;\r
- uint8_t nDriverCoreId;\r
- uint8_t nFHCoreId;\r
-\r
- struct rte_mempool *bbuio_buf_pool;\r
-\r
- /* io struct */\r
- BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
-\r
- /* Cat B */\r
- BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
- /* buffers lists */\r
- struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-\r
- /* Cat B SRS buffers */\r
- struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];\r
-\r
- void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector\r
- uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool\r
- uint16_t nInstanceNum;\r
-\r
- uint64_t nTscTiming[XRAN_N_FE_BUF_LEN]; // records the TSC when a timing packet is received.\r
-} BbuXranIoIfStruct;\r
-\r
-static BbuXranIoIfStruct gsXranIoIf;\r
-static XranLibConfigStruct *gpXranLibConfig = NULL;\r
-\r
-extern long rx_counter;\r
-extern long tx_counter;\r
-extern long tx_bytes_counter;\r
-extern long rx_bytes_counter;\r
-extern long tx_bytes_per_sec;\r
-extern long rx_bytes_per_sec;\r
-long old_rx_counter = 0;\r
-long old_tx_counter = 0;\r
-\r
-\r
-\r
-#define CPU_HZ tick_per_usec //us\r
-\r
-/* Application User space functions */\r
-void xran_fh_rx_callback(void *pCallbackTag, int32_t status);\r
-void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status);\r
-\r
-static BbuXranIoIfStruct *xran_get_ctx(void)\r
-{\r
- return &gsXranIoIf;\r
-}\r
-\r
-static void print_menu()\r
-{\r
- puts("+---------------------------------------+");\r
- puts("| Press 1 to start 5G NR XRAN traffic |");\r
- puts("| Press 2 reserved for future use |");\r
- puts("| Press 3 to quit |");\r
- puts("+---------------------------------------+");\r
-}\r
-\r
-static int32_t get_xran_sfidx(uint8_t nNrOfSlotInSf)\r
-{\r
- int32_t nSfIdx = -1;\r
- uint32_t nFrameIdx;\r
- uint32_t nSubframeIdx;\r
- uint32_t nSlotIdx;\r
- uint64_t nSecond;\r
-\r
- uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);\r
- nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf\r
- + nSubframeIdx*nNrOfSlotInSf\r
- + nSlotIdx;\r
-#if 0\r
- printf("\nxranTime is %d, return is %d, radio frame is %d, subframe is %d slot is %d tsc is %llu us",\r
- nXranTime,\r
- nSfIdx,\r
- nFrameIdx,\r
- nSubframeIdx,\r
- nSlotIdx,\r
- __rdtsc()/CPU_HZ);\r
-#endif\r
-\r
- return nSfIdx;\r
-}\r
-\r
-void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- uint64_t t1 = MLogTick();\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
- uint8_t Numerlogy = xranConf.frame_conf.nNumerology;\r
- uint8_t nNrOfSlotInSf = 1<<Numerlogy;\r
- int32_t sfIdx = get_xran_sfidx(nNrOfSlotInSf);\r
-\r
- mlogVar[mlogVarCnt++] = 0xCCCCCCCC;\r
- mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
- mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
- mlogVar[mlogVarCnt++] = (uint32_t)sfIdx;\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
- rte_pause();\r
-\r
- MLogTask(PID_GNB_SYM_CB, t1, MLogTick());\r
- return;\r
-}\r
-\r
-void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- uint64_t t1 = MLogTick();\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
-\r
- mlogVar[mlogVarCnt++] = 0xDDDDDDDD;\r
- mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
- mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
- rte_pause();\r
-\r
- MLogTask(PID_GNB_PRACH_CB, t1, MLogTick());\r
-}\r
-\r
-void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- uint64_t t1 = MLogTick();\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
-\r
- mlogVar[mlogVarCnt++] = 0xCCCCCCCC;\r
- mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
- mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
- rte_pause();\r
-\r
- MLogTask(PID_GNB_SRS_CB, t1, MLogTick());\r
-}\r
-\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_nbiot_source_auxlib_timer\r
- *\r
- * @param void\r
- *\r
- * @return Ticks\r
- *\r
- * @description\r
- * This function reads the rtdsc clock and returns the current value in there.\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-unsigned long timer_get_ticks(void)\r
-{\r
- unsigned long ret;\r
- union\r
- {\r
- unsigned long tsc_64;\r
- struct\r
- {\r
- uint32_t lo_32;\r
- uint32_t hi_32;\r
- };\r
- } tsc;\r
-\r
- __asm volatile("rdtsc" :\r
- "=a" (tsc.lo_32),\r
- "=d" (tsc.hi_32));\r
-\r
- ret = ((unsigned long)tsc.tsc_64);\r
- return ret;\r
-}\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_lte_source_auxlib_timer\r
- *\r
- * @param void\r
- *\r
- * @return 0 if SUCCESS\r
- *\r
- * @description\r
- * This function gets the clock speed of the core and figures out number of ticks per usec.\r
- * It is used by l1app and testmac applications to initialize the mlog utility\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-int timer_set_tsc_freq_from_clock(void)\r
-{\r
-#define NS_PER_SEC 1E9\r
- struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */\r
- struct timespec t_start, t_end;\r
- uint64_t tsc_resolution_hz = 0;\r
-\r
- if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)\r
- {\r
- unsigned long ns, end, start = timer_get_ticks();\r
- nanosleep(&sleeptime,NULL);\r
- clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);\r
- end = timer_get_ticks();\r
- ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);\r
- ns += (t_end.tv_nsec - t_start.tv_nsec);\r
-\r
- double secs = (double)ns/NS_PER_SEC;\r
- tsc_resolution_hz = (unsigned long)((end - start)/secs);\r
-\r
- tick_per_usec = (tsc_resolution_hz / 1000000);\r
- printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);\r
- printf("Ticks per us %lu\n", tick_per_usec);\r
- return 0;\r
- }\r
-\r
- return -1;\r
-}\r
-\r
-int physide_dl_tti_call_back(void * param)\r
-{\r
- uint64_t t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
- return 0;\r
-}\r
-\r
-int physide_ul_half_slot_call_back(void * param)\r
-{\r
- uint64_t t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
- return 0;\r
-}\r
-\r
-int physide_ul_full_slot_call_back(void * param)\r
-{\r
- uint64_t t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
- return 0;\r
-}\r
-\r
-int32_t init_xran(void)\r
-{\r
- BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
- xran_status_t status;\r
- int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
- int32_t nSectorNum;\r
- int32_t i, j, k, z;\r
-\r
- void *ptr;\r
- void *mb;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
- SWXRANInterfaceTypeEnum eInterfaceType;\r
-\r
- XranLibConfigStruct *ptrLibConfig;\r
-\r
- struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];\r
-\r
- for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
- {\r
- nSectorIndex[nSectorNum] = nSectorNum;\r
- }\r
-\r
- nSectorNum = numCCPorts;\r
- printf ("XRAN front haul xran_mm_init \n");\r
- status = xran_mm_init (xranHandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);\r
- if (status != XRAN_STATUS_SUCCESS)\r
- {\r
- printf ("Failed at XRAN front haul xran_mm_init \n");\r
- exit(-1);\r
- }\r
-\r
- psBbuIo->nInstanceNum = numCCPorts;\r
-\r
- for (k = 0; k < XRAN_PORTS_NUM; k++) {\r
- status = xran_sector_get_instances (xranHandle, psBbuIo->nInstanceNum,&psBbuIo->nInstanceHandle[k][0]);\r
- if (status != XRAN_STATUS_SUCCESS)\r
- {\r
- printf ("get sector instance failed %d for XRAN nInstanceNum %d\n",k, psBbuIo->nInstanceNum);\r
- exit(-1);\r
- }\r
- for (i = 0; i < psBbuIo->nInstanceNum; i++){\r
- printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[0][i]);\r
- }\r
- }\r
-\r
- printf("Sucess xran_mm_init \n");\r
- gpXranLibConfig = (XranLibConfigStruct*)malloc(sizeof(XranLibConfigStruct));\r
- ptrLibConfig = gpXranLibConfig;\r
- if (ptrLibConfig)\r
- {\r
- #if 0\r
- ptrLibConfig->nDriverCoreId = psBbuIo->nDriverCoreId;\r
- ptrLibConfig->pFecInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FEC][0]);\r
- ptrLibConfig->pFthInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FRONTHAUL][0]);\r
- ptrLibConfig->nTimingAdvance = psFPGAInitPara->nTimeAdvance;\r
- ptrLibConfig->nFhConfig = psFPGAInitPara->nEthPorts;\r
- ptrLibConfig->nFhBufIntFlag = 0; //need init fronthaul buffer, then set to 1.\r
- ptrLibConfig->nNrofSfInFrame = NUM_OF_SUBFRAME_PER_FRAME;\r
- ptrLibConfig->nNrOfSlotInSf = pConfigParams->nNumOfSlotPerSubframe;\r
- if (pConfigParams->nNumerology < 3)\r
- {\r
- ptrLibConfig->nSectorNum = psFPGAInitPara->nSecNum;\r
- }\r
- #endif\r
- }\r
- else\r
- {\r
- printf ("could not allocate ptrLibConfig in init_xran\n");\r
- exit(-1);\r
- }\r
-\r
- printf("nSectorNum %d\n", nSectorNum);\r
-\r
- /* Init Memory */\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANFTHTX_OUT;\r
- printf("nSectorIndex[%d] = %d\n",i, nSectorIndex[i]);\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxBuffers[j][i][z][0];\r
-\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
-\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- uint8_t *ptr_temp = (uint8_t *)ptr;\r
- memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);\r
- // ptr_temp[0] = j; // TTI\r
- // ptr_temp[1] = i; // Sec\r
- // ptr_temp[2] = z; // Ant\r
- // ptr_temp[3] = k; // sym\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* C-plane DL */\r
- eInterfaceType = XRANFTHTX_SEC_DESC_OUT;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
-\r
- eInterfaceType = XRANFTHTX_PRB_MAP_OUT;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
-\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxPrbMapBuffers[j][i][z];\r
-\r
- {\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
-\r
- if(ptr){\r
- void *sd_ptr;\r
- void *sd_mb;\r
- int elm_id;\r
- struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
- if (startupConfiguration.appMode == APP_O_DU)\r
- memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));\r
- else\r
- memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));\r
-\r
- for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){\r
- struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- pPrbElem->p_sec_desc[k] = sd_ptr;\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANFTHRX_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
- if(XRAN_STATUS_SUCCESS != status)\r
- {\r
- printf("Failed at xran_bm_init, status %d\n", status);\r
- iAssert(status == XRAN_STATUS_SUCCESS);\r
- }\r
-\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxBuffers[j][i][z][0];\r
- for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nFpgaToSW_FTH_RxBufferLen; // 1 symbols 3200bytes\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- uint8_t *ptr_temp = (uint8_t *)ptr;\r
- memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen);\r
- // ptr_temp[0] = j; // TTI\r
- // ptr_temp[1] = i; // Sec\r
- // ptr_temp[2] = z; // Ant\r
- // ptr_temp[3] = k; // sym\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* C-plane */\r
- eInterfaceType = XRANFTHTX_SEC_DESC_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
- eInterfaceType = XRANFTHRX_PRB_MAP_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init, status %d\n", status);\r
- }\r
-\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxPrbMapBuffers[j][i][z];\r
- {\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
- if(ptr){\r
- void *sd_ptr;\r
- void *sd_mb;\r
- int elm_id;\r
- struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
-\r
- if (startupConfiguration.appMode == APP_O_DU)\r
- memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));\r
- else\r
- memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));\r
-\r
- for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){\r
- struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- pPrbElem->p_sec_desc[k] = sd_ptr;\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-\r
- // add prach rx buffer\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANFTHRACH_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init, status %d\n", status);\r
- }\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHPrachRxBuffers[j][i][z][0];\r
- for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);\r
- }\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* add SRS rx buffer */\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANSRS_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANT_ARRAY_ELM_NR*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
-\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init, status %d\n", status);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; /* ant number */\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHSrsRxBuffers[j][i][z][0];\r
- for(k = 0; k < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);\r
- }\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-\r
- for(i=0; i<nSectorNum; i++)\r
- {\r
- for(j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- pFthTxBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthTxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxRachBuffer[i][z][j] = &(psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- }\r
-\r
- for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
- pFthRxSrsBuffer[i][z][j] = &(psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- }\r
- }\r
- }\r
-\r
- if(NULL != psBbuIo->nInstanceHandle[0])\r
- {\r
- /* add pusch callback */\r
- for (i = 0; i<nSectorNum; i++)\r
- {\r
- xran_5g_fronthault_config (psBbuIo->nInstanceHandle[0][i],\r
- pFthTxBuffer[i],\r
- pFthTxPrbMapBuffer[i],\r
- pFthRxBuffer[i],\r
- pFthRxPrbMapBuffer[i],\r
- xran_fh_rx_callback, &pFthRxBuffer[i][0]);\r
- }\r
-\r
- /* add prach callback here */\r
- for (i = 0; i<nSectorNum; i++)\r
- {\r
- xran_5g_prach_req(psBbuIo->nInstanceHandle[0][i], pFthRxRachBuffer[i],\r
- xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);\r
- }\r
-\r
- /* add SRS callback here */\r
- for (i = 0; i<nSectorNum; i++) {\r
- xran_5g_srs_req(psBbuIo->nInstanceHandle[0][i], pFthRxSrsBuffer[i],\r
- xran_fh_rx_srs_callback,&pFthRxSrsBuffer[i][0]);\r
- }\r
-\r
- ptrLibConfig->nFhBufIntFlag = 1;\r
- }\r
-\r
- return status;\r
-}\r
-\r
-int init_xran_iq_content(void)\r
-{\r
- BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
- xran_status_t status;\r
- int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
- int32_t nSectorNum;\r
- int32_t cc_id, ant_id, sym_id, tti;\r
- int32_t flowId;\r
-\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t sym = 0;\r
-\r
- void *ptr;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
- char *pos = NULL;\r
- struct xran_prb_map *pRbMap = NULL;\r
-\r
- for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
- {\r
- nSectorIndex[nSectorNum] = nSectorNum;\r
- }\r
- nSectorNum = numCCPorts;\r
- printf ("init_xran_iq_content\n");\r
-\r
- /* Init Memory */\r
- for(cc_id = 0; cc_id <nSectorNum; cc_id++)\r
- {\r
- for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
-\r
- flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
- if(p_tx_play_buffer[flowId]){\r
- /* c-plane DL */\r
- pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap){\r
- if (xranInit.DynamicSectionEna == 0){\r
- pRbMap->dir = XRAN_DIR_DL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = cc_id;\r
- pRbMap->ru_port_id = ant_id;\r
- pRbMap->tti_id = tti;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- pRbMap->prbMap[0].iqWidth = 16;\r
- } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
- && startupConfiguration.appMode == APP_O_DU\r
- && sym_id == 0){ /* BF Ws are per slot */\r
- int idxElm = 0;\r
- char* dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];\r
- struct xran_prb_elm* p_pRbMapElm = NULL;\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){\r
- p_pRbMapElm = &pRbMap->prbMap[idxElm];\r
- p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;\r
- if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){\r
- int16_t ext_len = 9600;\r
- int16_t ext_sec_total = 0;\r
- int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);\r
- int idRb = 0;\r
- int16_t *ptr = NULL;\r
- int i;\r
- if (ext_buf){\r
- ext_buf += (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
-\r
- ext_len -= (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
- ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,\r
- ext_len,\r
- (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),\r
- p_pRbMapElm->nRBSize,\r
- pXranConf->nAntElmTRx,\r
- p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);\r
- if(ext_sec_total > 0){\r
- p_pRbMapElm->bf_weight.p_ext_section = ext_buf;\r
- p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;\r
- }else {\r
- rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);\r
- }\r
- } else {\r
- rte_panic("xran_malloc return NULL\n");\r
- }\r
- }\r
- }\r
- }\r
- } else {\r
- printf("DL pRbMap ==NULL\n");\r
- exit(-1);\r
- }\r
-\r
- pos = ((char*)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];\r
- ptr = psBbuIo->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
-\r
- if(ptr && pos){\r
- int idxElm = 0;\r
- u8dptr = (uint8_t*)ptr;\r
- int16_t payload_len = 0;\r
-\r
- uint8_t *dst = (uint8_t *)u8dptr;\r
- uint8_t *src = (uint8_t *)pos;\r
- struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm];\r
- dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {\r
- struct xran_section_desc *p_sec_desc = NULL;\r
- p_prbMapElm = &pRbMap->prbMap[idxElm];\r
- p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];\r
-\r
- if(p_sec_desc == NULL){\r
- printf ("p_sec_desc == NULL\n");\r
- exit(-1);\r
- }\r
- src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L);\r
-\r
- if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {\r
- payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;\r
- rte_memcpy(dst, src, payload_len);\r
-\r
- } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {\r
- struct xranlib_compress_request bfp_com_req;\r
- struct xranlib_compress_response bfp_com_rsp;\r
-\r
- memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));\r
- memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));\r
-\r
- bfp_com_req.data_in = (int16_t*)src;\r
- bfp_com_req.numRBs = p_prbMapElm->nRBSize;\r
- bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;\r
- bfp_com_req.compMethod = p_prbMapElm->compMethod;\r
- bfp_com_req.iqWidth = p_prbMapElm->iqWidth;\r
-\r
- bfp_com_rsp.data_out = (int8_t*)dst;\r
- bfp_com_rsp.len = 0;\r
-\r
- if(xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp) < 0){\r
- printf ("compression failed [%d]\n",\r
- p_prbMapElm->compMethod);\r
- exit(-1);\r
- } else {\r
- payload_len = bfp_com_rsp.len;\r
- }\r
- }else {\r
- printf ("p_prbMapElm->compMethod == %d is not supported\n",\r
- p_prbMapElm->compMethod);\r
- exit(-1);\r
- }\r
-\r
- /* update RB map for given element */\r
- p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);\r
- p_sec_desc->iq_buffer_len = payload_len;\r
-\r
- /* add headroom for ORAN headers between IQs for chunk of RBs*/\r
- dst += payload_len;\r
- dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);\r
- }\r
- } else {\r
- exit(-1);\r
- printf("ptr ==NULL\n");\r
- }\r
-\r
-\r
- /* c-plane UL */\r
- pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap){\r
- if (xranInit.DynamicSectionEna == 0){\r
- pRbMap->dir = XRAN_DIR_UL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = cc_id;\r
- pRbMap->ru_port_id = ant_id;\r
- pRbMap->tti_id = tti;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_offset = 0;\r
- pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_len = pXranConf->nULRBs *4L;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
- && startupConfiguration.appMode == APP_O_DU\r
- && sym_id == 0){\r
- int idxElm = 0;\r
- char * ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];\r
- struct xran_prb_elm* p_pRbMapElm = NULL;\r
-\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){\r
- p_pRbMapElm = &pRbMap->prbMap[idxElm];\r
- p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;\r
- if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){\r
- int16_t ext_len = 9600;\r
- int16_t ext_sec_total = 0;\r
- int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);\r
- int idRb = 0;\r
- int16_t *ptr = NULL;\r
- int i;\r
- if (ext_buf){\r
- ext_buf += (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
-\r
- ext_len -= (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
- ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4);\r
- ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,\r
- ext_len,\r
- (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),\r
- p_pRbMapElm->nRBSize,\r
- pXranConf->nAntElmTRx,\r
- p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);\r
- if(ext_sec_total > 0){\r
- p_pRbMapElm->bf_weight.p_ext_section = ext_buf;\r
- p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;\r
- }else {\r
- rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);\r
- }\r
- } else {\r
- rte_panic("xran_malloc return NULL\n");\r
- }\r
- }\r
- }\r
- }\r
- } else {\r
- printf("DL pRbMap ==NULL\n");\r
- exit(-1);\r
- }\r
-\r
- tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4;\r
-\r
- if(tx_play_buffer_position[flowId] >= tx_play_buffer_size[flowId])\r
- tx_play_buffer_position[flowId] = 0;\r
-\r
- if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
- && startupConfiguration.appMode == APP_O_DU\r
- && sym_id == 0) {\r
- tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4;\r
- if(tx_dl_bfw_buffer_position[flowId] >= tx_dl_bfw_buffer_size[flowId])\r
- tx_dl_bfw_buffer_position[flowId] = 0;\r
-\r
- tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4;\r
- if(tx_ul_bfw_buffer_position[flowId] >= tx_ul_bfw_buffer_size[flowId])\r
- tx_ul_bfw_buffer_position[flowId] = 0;\r
- }\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
-\r
- /* prach TX for RU only */\r
- if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
- flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
-\r
- if(p_tx_prach_play_buffer[flowId]){\r
- pos = ((char*)p_tx_prach_play_buffer[flowId]);\r
-\r
- ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
-\r
- if(ptr && pos){\r
- u32dptr = (uint32_t*)(ptr);\r
- /* duplicate full PRACH (repetition * occassions ) in every symbol */\r
- memset(u32dptr,0 , PRACH_PLAYBACK_BUFFER_BYTES);\r
- rte_memcpy(u32dptr, pos, RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, tx_prach_play_buffer_size[flowId]));\r
- } else {\r
- exit(-1);\r
- printf("ptr ==NULL\n");\r
- }\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* SRS TX for RU only */\r
- if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){\r
- for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) {\r
- flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;\r
-\r
- if(p_tx_srs_play_buffer[flowId]){\r
- pos = ((char*)p_tx_srs_play_buffer[flowId]) + tx_srs_play_buffer_position[flowId];\r
- ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
-\r
- if(startupConfiguration.srsSymMask & (1 << sym_id) ){\r
- if(ptr && pos){\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr,0 , pXranConf->nULRBs*N_SC_PER_PRB*4);\r
- rte_memcpy(u32dptr, pos, pXranConf->nULRBs*N_SC_PER_PRB*4);\r
- } else {\r
- exit(-1);\r
- printf("ptr ==NULL\n");\r
- }\r
- }\r
-\r
- tx_srs_play_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
-\r
- if(tx_srs_play_buffer_position[flowId] >= tx_srs_play_buffer_size[flowId])\r
- tx_srs_play_buffer_position[flowId] = 0;\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-void stop_xran(void)\r
-{\r
- xran_status_t status = 0;\r
- SWXRANInterfaceTypeEnum eInterfaceType;\r
-\r
- free(gpXranLibConfig);\r
- gpXranLibConfig = NULL;\r
-\r
- status += xran_mm_destroy(xranHandle)*2;\r
-\r
- if(XRAN_STATUS_SUCCESS != status)\r
- {\r
- printf("Failed at xran_mm_destroy, status %d\n",status);\r
- iAssert(status == XRAN_STATUS_SUCCESS);\r
- }\r
-}\r
-\r
-int get_xran_iq_content(void)\r
-{\r
- BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
- xran_status_t status;\r
- int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
- int32_t nSectorNum;\r
- int32_t cc_id, ant_id, sym_id, tti;\r
- int32_t flowId;\r
-\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t sym = 0;\r
-\r
- void *ptr;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
- char *pos = NULL;\r
-\r
- for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
- {\r
- nSectorIndex[nSectorNum] = nSectorNum;\r
- }\r
- nSectorNum = numCCPorts;\r
- printf ("get_xran_iq_content\n");\r
-\r
- /* Init Memory */\r
- for(cc_id = 0; cc_id <nSectorNum; cc_id++)\r
- {\r
- for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
- int32_t idxElm = 0;\r
- struct xran_prb_map *pRbMap = NULL;\r
- struct xran_prb_elm *pRbElm = NULL;\r
- struct xran_section_desc *p_sec_desc = NULL;\r
- pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap == NULL)\r
- exit(-1);\r
- flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
- pRbElm = &pRbMap->prbMap[0];\r
- if(pRbMap->nPrbElm == 1){\r
- if(p_rx_log_buffer[flowId]) {\r
- pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];\r
- ptr = psBbuIo->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- char* my_ptr =(char *)ptr;\r
- rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L);\r
- }else {\r
- printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id);\r
- }\r
- }\r
- } else {\r
- for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) {\r
- pRbElm = &pRbMap->prbMap[idxElm];\r
- p_sec_desc = pRbElm->p_sec_desc[sym_id];\r
- if(p_rx_log_buffer[flowId] && p_sec_desc){\r
- if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){\r
- pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];\r
- ptr = p_sec_desc->pData;\r
- if(ptr){\r
- int32_t payload_len = 0;\r
- u32dptr = (uint32_t*)(ptr);\r
- if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){\r
- struct xranlib_decompress_request bfp_decom_req;\r
- struct xranlib_decompress_response bfp_decom_rsp;\r
-\r
- memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));\r
- memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));\r
-\r
- bfp_decom_req.data_in = (int8_t *)u32dptr;\r
- bfp_decom_req.numRBs = pRbElm->nRBSize;\r
- bfp_decom_req.len = (3* pRbElm->iqWidth + 1)*pRbElm->nRBSize;\r
- bfp_decom_req.compMethod = pRbElm->compMethod;\r
- bfp_decom_req.iqWidth = pRbElm->iqWidth;\r
-\r
- bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4);\r
- bfp_decom_rsp.len = 0;\r
-\r
- if(xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp) < 0){\r
- printf ("compression failed [%d]\n",\r
- pRbElm->compMethod);\r
- exit(-1);\r
- } else {\r
- payload_len = bfp_decom_rsp.len;\r
- }\r
- } else {\r
- rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4);\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
- rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
-\r
- if(rx_log_buffer_position[flowId] >= rx_log_buffer_size[flowId])\r
- rx_log_buffer_position[flowId] = 0;\r
- }\r
-\r
- /* prach RX for O-DU only */\r
- if(startupConfiguration.appMode == APP_O_DU) {\r
- flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++){\r
- if(p_prach_log_buffer[flowId]){\r
- /* (0-79 slots) 10ms of IQs */\r
- pos = ((char*)p_prach_log_buffer[flowId]) + prach_log_buffer_position[flowId];\r
- ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; //8192 144\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- rte_memcpy(pos, u32dptr, PRACH_PLAYBACK_BUFFER_BYTES);\r
- }else\r
- printf("ptr ==NULL\n");\r
-\r
- prach_log_buffer_position[flowId] += PRACH_PLAYBACK_BUFFER_BYTES;\r
-\r
- if(prach_log_buffer_position[flowId] >= prach_log_buffer_size[flowId])\r
- prach_log_buffer_position[flowId] = 0;\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* SRS RX for O-DU only */\r
- if(startupConfiguration.appMode == APP_O_DU) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){\r
- flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;\r
- for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++){\r
- if(p_srs_log_buffer[flowId]){\r
- pos = ((char*)p_srs_log_buffer[flowId]) + srs_log_buffer_position[flowId];\r
- ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- rte_memcpy(pos, u32dptr, pXranConf->nULRBs*N_SC_PER_PRB*4);\r
- }else\r
- printf("ptr ==NULL\n");\r
-\r
- srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
-\r
- if(srs_log_buffer_position[flowId] >= srs_log_buffer_size[flowId])\r
- srs_log_buffer_position[flowId] = 0;\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-void version_print(void)\r
-{\r
- char sysversion[100];\r
- char *compilation_date = __DATE__;\r
- char *compilation_time = __TIME__;\r
-\r
- uint32_t nLen;\r
- uint32_t i;\r
-\r
- snprintf(sysversion, 99, "Version: %s", VERSIONX);\r
- nLen = strlen(sysversion);\r
-\r
- printf("\n\n");\r
- printf("===========================================================================================================\n");\r
- printf("SAMPLE-APP VERSION\n");\r
- printf("===========================================================================================================\n");\r
-\r
- printf("%s\n", sysversion);\r
- printf("build-date: %s\n", compilation_date);\r
- printf("build-time: %s\n", compilation_time);\r
-}\r
-\r
-int main(int argc, char *argv[])\r
-{\r
- int i;\r
- int j, len;\r
- int lcore_id = 0;\r
- char filename[256];\r
- char prefix_name[256];\r
- uint32_t nCenterFreq;\r
- int32_t xret = 0;\r
- struct stat st = {0};\r
- uint32_t filenameLength = strlen(argv[1]);\r
- char *pCheckName1 = NULL, *pCheckName2 = NULL;\r
- enum xran_if_state xran_curr_if_state = XRAN_INIT;\r
-\r
- uint64_t nMask = (uint64_t)1;\r
- uint16_t nCoreUsage[4*64+1];\r
- uint16_t nCoreId[4*64];\r
- float nTotal = 0.0;\r
- uint64_t nTotalTime;\r
- uint64_t nUsedTime;\r
- uint32_t nCoreUsed;\r
- float nUsedPercent;\r
-\r
-\r
- if (argc == 3)\r
- errx(2, "Need two argument - the PCI address of the network port");\r
- if (filenameLength >= 256)\r
- {\r
- printf("Config file name input is too long, exiting!\n");\r
- exit(-1);\r
- }\r
-\r
- version_print();\r
-\r
- //add for Klocworks\r
- len = strlen(argv[1]) + 1;\r
- if (len > (sizeof(filename) - 10))\r
- len = (sizeof(filename) - 10);\r
- strncpy(filename, argv[1], (sizeof(filename) - 10));\r
- filename[len] = '\0';\r
-\r
- if (xran_is_synchronized() != 0)\r
- printf("Machine is not synchronized using PTP!\n");\r
- else\r
- printf("Machine is synchronized using PTP!\n");\r
-\r
- memset(&startupConfiguration, 0, sizeof(RuntimeConfig));\r
-\r
- if (parseConfigFile(filename, (RuntimeConfig*)&startupConfiguration) != 0) {\r
- printf("Configuration file error.\n");\r
- return -1;\r
- }\r
-\r
- if(startupConfiguration.ant_file[0] == NULL){\r
- printf("it looks like test vector for antennas were not provided\n");\r
- exit(-1);\r
- }\r
-\r
- if (startupConfiguration.numCC > XRAN_MAX_SECTOR_NR) {\r
- printf("Number of cells %d exceeds max number supported %d!\n", startupConfiguration.numCC, XRAN_MAX_SECTOR_NR);\r
- startupConfiguration.numCC = XRAN_MAX_SECTOR_NR;\r
-\r
- }\r
- if (startupConfiguration.antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {\r
- printf("Number of Antenna elements %d exceeds max number supported %d!\n", startupConfiguration.antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);\r
- startupConfiguration.antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;\r
- }\r
-\r
- numCCPorts = startupConfiguration.numCC;\r
- num_eAxc = startupConfiguration.numAxc;\r
-\r
- printf("numCCPorts %d num_eAxc%d\n", numCCPorts, num_eAxc);\r
-\r
- if (startupConfiguration.mu_number <= 1){\r
- nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/\r
- nFpgaToSW_PRACH_RxBufferLen = 8192;\r
- nSW_ToFpga_FTH_TxBufferLen = 13168 + /* 273*12*4 + 64* + ETH AND ORAN HDRs */\r
- XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +\r
- sizeof(struct xran_ecpri_hdr) +\r
- sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
- } else if (startupConfiguration.mu_number == 3){\r
- nFpgaToSW_FTH_RxBufferLen = 3328;\r
- nFpgaToSW_PRACH_RxBufferLen = 8192;\r
- nSW_ToFpga_FTH_TxBufferLen = 3328 +\r
- XRAN_MAX_SECTIONS_PER_SYM * (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +\r
- sizeof(struct xran_ecpri_hdr) +\r
- sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
- } else {\r
- printf("given numerology is not supported %d\n", startupConfiguration.mu_number);\r
- exit(-1);\r
- }\r
- printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen);\r
-\r
- memset(&xranInit, 0, sizeof(struct xran_fh_init));\r
-\r
- if(startupConfiguration.appMode == APP_O_DU) {\r
- printf("set O-DU\n");\r
- xranInit.io_cfg.id = 0;/* O-DU */\r
- xranInit.io_cfg.core = startupConfiguration.io_core;\r
- xranInit.io_cfg.system_core = 0;\r
- xranInit.io_cfg.pkt_proc_core = startupConfiguration.io_core+1;\r
- xranInit.io_cfg.pkt_aux_core = 0; /* do not start*/\r
- xranInit.io_cfg.timing_core = startupConfiguration.io_core+2;\r
- } else {\r
- printf("set O-RU\n");\r
- xranInit.io_cfg.id = 1; /* O-RU*/\r
- xranInit.io_cfg.core = startupConfiguration.io_core;\r
- xranInit.io_cfg.system_core = 0;\r
- xranInit.io_cfg.pkt_proc_core = startupConfiguration.io_core+1;\r
- xranInit.io_cfg.pkt_aux_core = 0; /* do not start */\r
- xranInit.io_cfg.timing_core = startupConfiguration.io_core+2;\r
- }\r
-\r
- xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
-\r
- if(startupConfiguration.xranCat == XRAN_CATEGORY_A){\r
- xranInit.eAxCId_conf.mask_cuPortId = 0xf000;\r
- xranInit.eAxCId_conf.mask_bandSectorId = 0x0f00;\r
- xranInit.eAxCId_conf.mask_ccId = 0x00f0;\r
- xranInit.eAxCId_conf.mask_ruPortId = 0x000f;\r
- xranInit.eAxCId_conf.bit_cuPortId = 12;\r
- xranInit.eAxCId_conf.bit_bandSectorId = 8;\r
- xranInit.eAxCId_conf.bit_ccId = 4;\r
- xranInit.eAxCId_conf.bit_ruPortId = 0;\r
- } else {\r
- xranInit.eAxCId_conf.mask_cuPortId = 0xf000;\r
- xranInit.eAxCId_conf.mask_bandSectorId = 0x0c00;\r
- xranInit.eAxCId_conf.mask_ccId = 0x0300;\r
- xranInit.eAxCId_conf.mask_ruPortId = 0x00ff; /* more than [0-127] eAxC */\r
- xranInit.eAxCId_conf.bit_cuPortId = 12;\r
- xranInit.eAxCId_conf.bit_bandSectorId = 10;\r
- xranInit.eAxCId_conf.bit_ccId = 8;\r
- xranInit.eAxCId_conf.bit_ruPortId = 0;\r
- }\r
-\r
- xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = argv[2];\r
- xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = argv[3];\r
- xranInit.mtu = startupConfiguration.mtu;\r
-\r
- xranInit.p_o_du_addr = (int8_t *)&startupConfiguration.o_du_addr;\r
- xranInit.p_o_ru_addr = (int8_t *)&startupConfiguration.o_ru_addr;\r
-\r
- sprintf(prefix_name, "wls_%d",startupConfiguration.instance_id);\r
- xranInit.filePrefix = prefix_name;\r
-\r
- xranInit.totalBfWeights = startupConfiguration.totalBfWeights;\r
-\r
- xranInit.Tadv_cp_dl = startupConfiguration.Tadv_cp_dl;\r
- xranInit.T2a_min_cp_dl = startupConfiguration.T2a_min_cp_dl;\r
- xranInit.T2a_max_cp_dl = startupConfiguration.T2a_max_cp_dl;\r
- xranInit.T2a_min_cp_ul = startupConfiguration.T2a_min_cp_ul;\r
- xranInit.T2a_max_cp_ul = startupConfiguration.T2a_max_cp_ul;\r
- xranInit.T2a_min_up = startupConfiguration.T2a_min_up;\r
- xranInit.T2a_max_up = startupConfiguration.T2a_max_up;\r
- xranInit.Ta3_min = startupConfiguration.Ta3_min;\r
- xranInit.Ta3_max = startupConfiguration.Ta3_max;\r
- xranInit.T1a_min_cp_dl = startupConfiguration.T1a_min_cp_dl;\r
- xranInit.T1a_max_cp_dl = startupConfiguration.T1a_max_cp_dl;\r
- xranInit.T1a_min_cp_ul = startupConfiguration.T1a_min_cp_ul;\r
- xranInit.T1a_max_cp_ul = startupConfiguration.T1a_max_cp_ul;\r
- xranInit.T1a_min_up = startupConfiguration.T1a_min_up;\r
- xranInit.T1a_max_up = startupConfiguration.T1a_max_up;\r
- xranInit.Ta4_min = startupConfiguration.Ta4_min;\r
- xranInit.Ta4_max = startupConfiguration.Ta4_max;\r
-\r
- xranInit.enableCP = startupConfiguration.enableCP;\r
- xranInit.prachEnable = startupConfiguration.enablePrach;\r
- xranInit.srsEnable = startupConfiguration.enableSrs;\r
- xranInit.debugStop = startupConfiguration.debugStop;\r
- xranInit.debugStopCount = startupConfiguration.debugStopCount;\r
- xranInit.DynamicSectionEna = startupConfiguration.DynamicSectionEna;\r
- xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
- xranInit.GPS_Alpha = startupConfiguration.GPS_Alpha;\r
- xranInit.GPS_Beta = startupConfiguration.GPS_Beta;\r
-\r
- xranInit.cp_vlan_tag = startupConfiguration.cp_vlan_tag;\r
- xranInit.up_vlan_tag = startupConfiguration.up_vlan_tag;\r
-\r
- printf("IQ files size is %d slots\n", startupConfiguration.numSlots);\r
-\r
- iq_playback_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)\r
- *4L);\r
-\r
- iq_playback_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
- *4L);\r
-\r
-\r
- /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
- iq_bfw_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * startupConfiguration.antElmTRx *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)\r
- *4L);\r
-\r
- /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
- iq_bfw_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
- *4L);\r
-\r
- /* 10 * [1*273*2*2] = 349440 bytes */\r
- iq_srs_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
- *4L);\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- p_tx_play_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_dl);\r
- tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;\r
-\r
- if (p_tx_play_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- tx_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ant_file[i],\r
- "DL IFFT IN IQ Samples in binary format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
- tx_play_buffer_position[i] = 0;\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);\r
- tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;\r
-\r
- if (p_tx_dl_bfw_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.dl_bfw_file[i],\r
- "DL BF weights IQ Samples in binary format",\r
- (uint8_t*) p_tx_dl_bfw_buffer[i],\r
- tx_dl_bfw_buffer_size[i],\r
- 1);\r
- tx_dl_bfw_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);\r
- tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;\r
-\r
- if (p_tx_ul_bfw_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_bfw_file[i],\r
- "UL BF weights IQ Samples in binary format",\r
- (uint8_t*) p_tx_ul_bfw_buffer[i],\r
- tx_ul_bfw_buffer_size[i],\r
- 1);\r
- tx_ul_bfw_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- p_tx_prach_play_buffer[i] = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);\r
- tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;\r
-\r
- if (p_tx_prach_play_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);\r
-\r
- tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.prach_file[i],\r
- "PRACH IQ Samples in binary format",\r
- (uint8_t*) p_tx_prach_play_buffer[i],\r
- tx_prach_play_buffer_size[i],\r
- 1);\r
- tx_prach_play_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
-\r
- p_tx_srs_play_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);\r
- tx_srs_play_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;\r
-\r
- if (p_tx_srs_play_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_tx_srs_play_buffer[i], 0, iq_srs_buffer_size_ul);\r
- tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_srs_file[i],\r
- "SRS IQ Samples in binary format",\r
- (uint8_t*) p_tx_srs_play_buffer[i],\r
- tx_srs_play_buffer_size[i],\r
- 1);\r
-\r
- tx_srs_play_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- /* log of ul */\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- p_rx_log_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_ul);\r
- rx_log_buffer_size[i] = (int32_t)iq_playback_buffer_size_ul;\r
-\r
- if (p_rx_log_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- rx_log_buffer_position[i] = 0;\r
-\r
- memset(p_rx_log_buffer[i], 0, rx_log_buffer_size[i]);\r
- }\r
-\r
- /* log of prach */\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- p_prach_log_buffer[i] = (int16_t*)malloc(startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);\r
- prach_log_buffer_size[i] = (int32_t)startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;\r
-\r
- if (p_prach_log_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_prach_log_buffer[i], 0, prach_log_buffer_size[i]);\r
- prach_log_buffer_position[i] = 0;\r
- }\r
-\r
- /* log of SRS */\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
-\r
- p_srs_log_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);\r
- srs_log_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;\r
-\r
- if (p_srs_log_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_srs_log_buffer[i], 0, iq_srs_buffer_size_ul);\r
- srs_log_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (stat("./logs", &st) == -1) {\r
- mkdir("./logs", 0777);\r
- }\r
-\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/%s-play_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL IFFT IN IQ Samples in human readable format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-play_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "DL IFFT IN IQ Samples in binary format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
-\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- sprintf(filename, "./logs/%s-dl_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL Beamformig weights IQ Samples in human readable format",\r
- (uint8_t*) p_tx_dl_bfw_buffer[i],\r
- tx_dl_bfw_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-dl_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "DL Beamformig weightsIQ Samples in binary format",\r
- (uint8_t*) p_tx_dl_bfw_buffer[i],\r
- tx_dl_bfw_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
-\r
-\r
- sprintf(filename, "./logs/%s-ul_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "UL Beamformig weights IQ Samples in human readable format",\r
- (uint8_t*) p_tx_ul_bfw_buffer[i],\r
- tx_ul_bfw_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-ul_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "UL Beamformig weightsIQ Samples in binary format",\r
- (uint8_t*) p_tx_ul_bfw_buffer[i],\r
- tx_ul_bfw_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
-\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- sprintf(filename, "./logs/%s-play_prach_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "PRACH IQ Samples in human readable format",\r
- (uint8_t*) p_tx_prach_play_buffer[i],\r
- tx_prach_play_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-play_prach_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "PRACH IQ Samples in binary format",\r
- (uint8_t*) p_tx_prach_play_buffer[i],\r
- tx_prach_play_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
-\r
-\r
- sprintf(filename, "./logs/%s-play_srs_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "SRS IQ Samples in human readable format",\r
- (uint8_t*) p_tx_srs_play_buffer[i],\r
- tx_srs_play_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-play_srs_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "SRS IQ Samples in binary format",\r
- (uint8_t*) p_tx_srs_play_buffer[i],\r
- tx_srs_play_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- if (startupConfiguration.iqswap == 1){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("TX: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_play_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_dl_bfw_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_ul_bfw_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_prach_play_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_srs_play_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-#if 0\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL IFFT IN IQ Samples in human readable format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
- }\r
-#endif\r
- if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_play_buffer_size[i]/sizeof(short); j++){\r
- p_tx_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_play_buffer[i][j]);\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_dl_bfw_buffer_size[i]/sizeof(short); j++){\r
- p_tx_dl_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_dl_bfw_buffer[i][j]);\r
- }\r
- printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_ul_bfw_buffer_size[i]/sizeof(short); j++){\r
- p_tx_ul_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_ul_bfw_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_prach_play_buffer_size[i]/sizeof(short); j++){\r
- p_tx_prach_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_prach_play_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_srs_play_buffer_size[i]/sizeof(short); j++){\r
- p_tx_srs_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_srs_play_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
- }\r
-\r
-#if 0\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL IFFT IN IQ Samples in human readable format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
- }\r
-#endif\r
-\r
- memset(&xranConf, 0, sizeof(struct xran_fh_config));\r
- pXranConf = &xranConf;\r
-\r
- pXranConf->nDLRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA);\r
- pXranConf->nULRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA);\r
-\r
- if(startupConfiguration.DynamicSectionEna == 0){\r
- struct xran_prb_map* pRbMap;\r
-\r
- pRbMap = &startupConfiguration.PrbMapDl;\r
-\r
- pRbMap->dir = XRAN_DIR_DL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = 0;\r
- pRbMap->ru_port_id = 0;\r
- pRbMap->tti_id = 0;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- pRbMap->prbMap[0].iqWidth = 16;\r
-\r
- pRbMap = &startupConfiguration.PrbMapUl;\r
- pRbMap->dir = XRAN_DIR_UL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = 0;\r
- pRbMap->ru_port_id = 0;\r
- pRbMap->tti_id = 0;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- pRbMap->prbMap[0].iqWidth = 16;\r
- }\r
-\r
- timer_set_tsc_freq_from_clock();\r
- xret = xran_init(argc, argv, &xranInit, argv[0], &xranHandle);\r
- if(xret != XRAN_STATUS_SUCCESS){\r
- printf("xran_init failed %d\n", xret);\r
- exit(-1);\r
- }\r
-\r
- if(xranHandle == NULL)\r
- exit(1);\r
-\r
-\r
- pXranConf->sector_id = 0;\r
- pXranConf->nCC = numCCPorts;\r
- pXranConf->neAxc = num_eAxc;\r
- pXranConf->neAxcUl = startupConfiguration.numUlAxc;\r
- pXranConf->nAntElmTRx = startupConfiguration.antElmTRx;\r
-\r
- pXranConf->frame_conf.nFrameDuplexType = startupConfiguration.nFrameDuplexType;\r
- pXranConf->frame_conf.nNumerology = startupConfiguration.mu_number;\r
- pXranConf->frame_conf.nTddPeriod = startupConfiguration.nTddPeriod;\r
-\r
- for (i = 0; i < startupConfiguration.nTddPeriod; i++){\r
- pXranConf->frame_conf.sSlotConfig[i] = startupConfiguration.sSlotConfig[i];\r
- }\r
-\r
- pXranConf->prach_conf.nPrachSubcSpacing = startupConfiguration.mu_number;\r
- pXranConf->prach_conf.nPrachFreqStart = 0;\r
- pXranConf->prach_conf.nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC;\r
- pXranConf->prach_conf.nPrachConfIdx = startupConfiguration.prachConfigIndex;\r
- pXranConf->prach_conf.nPrachFreqOffset = -792;\r
-\r
- pXranConf->srs_conf.symbMask = startupConfiguration.srsSymMask;\r
- pXranConf->srs_conf.eAxC_offset = 2 * startupConfiguration.numAxc; /* PUSCH, PRACH, SRS */\r
-\r
- pXranConf->ru_conf.xranCat = startupConfiguration.xranCat;\r
- pXranConf->ru_conf.iqWidth = startupConfiguration.PrbMapDl.prbMap[0].iqWidth;\r
-\r
- if (startupConfiguration.compression == 0)\r
- pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_NONE;\r
- else\r
- pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_BLKFLOAT;\r
-\r
- pXranConf->ru_conf.fftSize = 0;\r
- while (startupConfiguration.nULFftSize >>= 1)\r
- ++pXranConf->ru_conf.fftSize;\r
-\r
- pXranConf->ru_conf.byteOrder = (startupConfiguration.nebyteorderswap == 1) ? XRAN_NE_BE_BYTE_ORDER : XRAN_CPU_LE_BYTE_ORDER ;\r
- pXranConf->ru_conf.iqOrder = (startupConfiguration.iqswap == 1) ? XRAN_Q_I_ORDER : XRAN_I_Q_ORDER;\r
-\r
- printf("FFT Order %d\n", pXranConf->ru_conf.fftSize);\r
-\r
- nCenterFreq = startupConfiguration.nDLAbsFrePointA + (((pXranConf->nDLRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));\r
- pXranConf->nDLCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);\r
- printf("DL center freq %d DL NR-ARFCN %d\n", nCenterFreq, pXranConf->nDLCenterFreqARFCN);\r
-\r
- nCenterFreq = startupConfiguration.nULAbsFrePointA + (((pXranConf->nULRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));\r
- pXranConf->nULCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);\r
- printf("UL center freq %d UL NR-ARFCN %d\n", nCenterFreq, pXranConf->nULCenterFreqARFCN);\r
-\r
- pXranConf->bbdev_dec = NULL;\r
- pXranConf->bbdev_enc = NULL;\r
-\r
- pXranConf->log_level = 1;\r
-\r
- if(startupConfiguration.maxFrameId)\r
- pXranConf->ru_conf.xran_max_frame = startupConfiguration.maxFrameId;\r
-\r
- if(init_xran() != 0)\r
- exit(-1);\r
-\r
- xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);\r
- xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);\r
- xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);\r
-\r
- init_xran_iq_content();\r
-\r
- xret = xran_open(xranHandle, pXranConf);\r
-\r
- if(xret != XRAN_STATUS_SUCCESS){\r
- printf("xran_open failed %d\n", xret);\r
- exit(-1);\r
- }\r
-\r
- sprintf(filename, "mlog-%s", startupConfiguration.appMode == 0 ? "o-du" : "o-ru");\r
-\r
- /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/\r
-\r
- MLogOpen(256, 3, 20000, 0, filename);\r
- MLogSetMask(0);\r
-\r
- puts("----------------------------------------");\r
- printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize());\r
- puts("----------------------------------------");\r
-\r
-\r
- uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};\r
- nActiveCoreMask[0] = 1 << xranInit.io_cfg.timing_core;\r
- uint32_t numCarriers = startupConfiguration.numCC;\r
-\r
- MLogAddTestCase(nActiveCoreMask, numCarriers);\r
-\r
- fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);\r
-\r
- state = APP_RUNNING;\r
- printf("Start XRAN traffic\n");\r
- xran_start(xranHandle);\r
- sleep(3);\r
- print_menu();\r
- for (;;) {\r
- struct xran_common_counters x_counters;\r
- char input[10];\r
- sleep(1);\r
- xran_curr_if_state = xran_get_if_state();\r
- if(xran_get_common_counters(xranHandle, &x_counters) == XRAN_STATUS_SUCCESS) {\r
-\r
- xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);\r
- nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;\r
-\r
- printf("[%s][rx %ld pps %ld kbps %ld][tx %ld pps %ld kbps %ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",\r
- ((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),\r
- rx_counter,\r
- rx_counter-old_rx_counter,\r
- rx_bytes_per_sec*8/1000L,\r
- tx_counter,\r
- tx_counter-old_tx_counter,\r
- tx_bytes_per_sec*8/1000L,\r
- x_counters.Rx_on_time,\r
- x_counters.Rx_early,\r
- x_counters.Rx_late,\r
- x_counters.Rx_corrupt,\r
- x_counters.Rx_pkt_dupl,\r
- x_counters.Total_msgs_rcvd,\r
- nUsedPercent);\r
-\r
- if(rx_counter > old_rx_counter)\r
- old_rx_counter = rx_counter;\r
- if(tx_counter > old_tx_counter)\r
- old_tx_counter = tx_counter;\r
-\r
- if(rx_counter > 0 && tx_counter > 0)\r
- MLogSetMask(0xFFFFFFFF);\r
- } else {\r
- printf("error xran_get_common_counters\n");\r
- }\r
-\r
- if (xran_curr_if_state == XRAN_STOPPED){\r
- break;\r
- }\r
- if (NULL == fgets(input, 10, stdin)) {\r
- continue;\r
- }\r
-\r
- const int sel_opt = atoi(input);\r
- switch (sel_opt) {\r
- case 1:\r
- xran_start(xranHandle);\r
- printf("Start XRAN traffic\n");\r
- break;\r
- case 2:\r
- break;\r
- case 3:\r
- xran_stop(xranHandle);\r
- printf("Stop XRAN traffic\n");\r
- state = APP_STOPPED;\r
- break;\r
- default:\r
- puts("Wrong option passed!");\r
- break;\r
- }\r
- if (APP_STOPPED == state)\r
- break;\r
- }\r
-\r
- get_xran_iq_content();\r
-\r
- puts("Closing l1 app... Ending all threads...");\r
- xran_close(xranHandle);\r
- MLogPrint(NULL);\r
-\r
- stop_xran();\r
- puts("Dump IQs...");\r
-\r
- if (startupConfiguration.iqswap == 1){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("RX: Swap I and Q to match CPU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_rx_log_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_srs_log_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0) {\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < rx_log_buffer_size[i]/sizeof(short); j++){\r
- p_rx_log_buffer[i][j] = rte_be_to_cpu_16(p_rx_log_buffer[i][j]);\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < srs_log_buffer_size[i]/sizeof(short); j++){\r
- p_srs_log_buffer[i][j] = rte_be_to_cpu_16(p_srs_log_buffer[i][j]);\r
- }\r
- }\r
- }\r
- }\r
-\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/%s-rx_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "UL FFT OUT IQ Samples in human readable format",\r
- (uint8_t*) p_rx_log_buffer[i],\r
- rx_log_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-rx_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "UL FFT OUT IQ Samples in binary format",\r
- (uint8_t*) p_rx_log_buffer[i],\r
- rx_log_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- sprintf(filename, "./logs/%s-srs_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "SRS UL FFT OUT IQ Samples in human readable format",\r
- (uint8_t*) p_srs_log_buffer[i],\r
- srs_log_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-srs_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "SRS UL FFT OUT IQ Samples in binary format",\r
- (uint8_t*) p_srs_log_buffer[i],\r
- srs_log_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enablePrach){\r
- if (startupConfiguration.iqswap == 1){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_prach_log_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
-\r
-\r
- if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < prach_log_buffer_size[i]/sizeof(short); j++){\r
- p_prach_log_buffer[i][j] = rte_be_to_cpu_16(p_prach_log_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
-\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/%s-prach_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "PRACH FFT OUT IQ Samples in human readable format",\r
- (uint8_t*) p_prach_log_buffer[i],\r
- prach_log_buffer_size[i],\r
- 1);\r
-\r
- sprintf(filename, "./logs/%s-prach_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "PRACH FFT OUT IQ Samples in binary format",\r
- (uint8_t*) p_prach_log_buffer[i],\r
- prach_log_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- return 0;\r
-}\r
+/******************************************************************************
+*
+* Copyright (c) 2020 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief Main module of sample application. Demonstration of usage of xRAN library for ORAN
+ * WG4 Front haul
+ * @file sample-app.c
+ * @ingroup xran
+ * @author Intel Corporation
+ *
+ **/
+
+#define _GNU_SOURCE
+#include <unistd.h>
+#include <immintrin.h>
+#include <sys/syscall.h>
+#include <sys/sysinfo.h>
+#include <sched.h>
+#include <assert.h>
+#include <err.h>
+#include <libgen.h>
+#include <sys/time.h>
+#include <time.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <pthread.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#include <getopt.h>
+#include <string.h>
+
+#include "common.h"
+#include "config.h"
+#include "xran_mlog_lnx.h"
+
+#include "xran_fh_o_du.h"
+#include "xran_sync_api.h"
+#include "xran_mlog_task_id.h"
+#include "app_io_fh_xran.h"
+#include "app_profile_xran.h"
+#ifdef FWK_ENABLED
+#include "app_bbu_pool.h"
+#endif
+#include "xran_ecpri_owd_measurements.h"
+
+#define MAX_BBU_POOL_CORE_MASK (4)
+#ifndef NS_PER_SEC
+#define NS_PER_SEC 1E9
+#endif
+#define MAIN_PRIORITY 98
+#define CPU_HZ ticks_per_usec /* us */
+
+struct sample_app_params {
+ int num_vfs;
+ int num_o_xu;
+ char *cfg_file;
+ char *usecase_file;
+ char vf_pcie_addr[XRAN_PORTS_NUM][XRAN_VF_MAX][32];
+};
+
+struct app_sym_cb_ctx {
+ int32_t cb_param;
+ struct xran_sense_of_time sense_of_time;
+};
+
+static enum app_state state;
+static uint64_t ticks_per_usec;
+
+UsecaseConfig* p_usecaseConfiguration = {NULL};
+RuntimeConfig* p_startupConfiguration[XRAN_PORTS_NUM] = {NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};
+
+struct app_sym_cb_ctx cb_sym_ctx[XRAN_CB_SYM_MAX];
+
+long old_rx_counter[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0};
+long old_tx_counter[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0};
+
+static void
+app_print_menu()
+{
+ puts("+---------------------------------------+");
+ puts("| Press 1 to start 5G NR XRAN traffic |");
+ puts("| Press 2 reserved for future use |");
+ puts("| Press 3 to quit |");
+ puts("+---------------------------------------+");
+}
+
+uint64_t
+app_timer_get_ticks(void)
+{
+ uint64_t ret;
+ union
+ {
+ uint64_t tsc_64;
+ struct
+ {
+ uint32_t lo_32;
+ uint32_t hi_32;
+ };
+ } tsc;
+
+ __asm volatile("rdtsc" :
+ "=a" (tsc.lo_32),
+ "=d" (tsc.hi_32));
+
+ ret = ((uint64_t)tsc.tsc_64);
+ return ret;
+}
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup xran
+ *
+ * @param void
+ *
+ * @return 0 if SUCCESS
+ *
+ * @description
+ * This function gets the clock speed of the core and figures out number of ticks per usec.
+ * It is used by l1app and testmac applications to initialize the mlog utility
+ *
+**/
+//-------------------------------------------------------------------------------------------
+int32_t
+app_timer_set_tsc_freq_from_clock(void)
+{
+ struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */
+ struct timespec t_start, t_end;
+ uint64_t tsc_resolution_hz = 0;
+
+ if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
+ unsigned long ns, end, start = app_timer_get_ticks();
+ nanosleep(&sleeptime,NULL);
+ clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
+ end = app_timer_get_ticks();
+ ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
+ ns += (t_end.tv_nsec - t_start.tv_nsec);
+
+ double secs = (double)ns/NS_PER_SEC;
+ tsc_resolution_hz = (unsigned long)((end - start)/secs);
+
+ ticks_per_usec = (tsc_resolution_hz / 1000000);
+ printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);
+ printf("Ticks per us %lu\n", ticks_per_usec);
+ return 0;
+ }
+
+ return -1;
+}
+
+void
+app_version_print(void)
+{
+ char sysversion[100];
+ char *compilation_date = __DATE__;
+ char *compilation_time = __TIME__;
+ char compiler[100];
+
+ snprintf(sysversion, 99, "Version: %s", VERSIONX);
+
+#if defined(__clang__)
+ snprintf(compiler, 99, "family clang: %s", __clang_version__);
+#elif defined(__ICC) || defined(__INTEL_COMPILER)
+ snprintf(compiler, 99, "family icc: version %d", __INTEL_COMPILER);
+#elif defined(__INTEL_LLVM_COMPILER)
+ snprintf(compiler, 99, "family icx: version %d", __INTEL_LLVM_COMPILER);
+#elif defined(__GNUC__) || defined(__GNUG__)
+ snprintf(compiler, 99, "family gcc: version %d.%d.%d", __GNUC__, __GNUC_MINOR__,__GNUC_PATCHLEVEL__);
+#endif
+
+ printf("\n\n");
+ printf("===========================================================================================================\n");
+ printf("SAMPLE-APP VERSION\n");
+ printf("===========================================================================================================\n");
+
+ printf("%s\n", sysversion);
+ printf("build-date: %s\n", compilation_date);
+ printf("build-time: %s\n", compilation_time);
+ printf("build-with: %s\n", compiler);
+}
+
+static void
+app_help(void)
+{
+ char help_content[] = \
+ "sample application\n\n"\
+ "Usage: sample-app --usecasefile ./usecase_du.cfg --num_eth_vfs 12"\
+ "--vf_addr_o_xu_a \"0000:51:01.0,0000:51:01.1,0000:51:01.2,0000:51:01.3\""\
+ "--vf_addr_o_xu_b \"0000:51:01.4,0000:51:01.5,0000:51:01.6,0000:51:01.7\""\
+ "--vf_addr_o_xu_c \"0000:51:02.0,0000:51:02.1,0000:51:02.2,0000:51:02.3\"\n\n"\
+ "or sample-app --usecasefile ./usecase_du.cfg --num_eth_vfs 2"\
+ "--vf_addr_o_xu_a \"0000:51:01.0,0000:51:01.1\""\
+ "supports the following options:\n\n"\
+ "-p | --num_eth_pfs <number of ETH ports to connect to O-RU|O-DU> 2 - default\n"
+ "-a | --vf_addr_o_xu_a <list of PCIe Bus Address separated by comma for VFs of O-xU0 >"
+ "-b | --vf_addr_o_xu_b <list of PCIe Bus Address separated by comma for VFs of O-xU1 >"
+ "-c | --vf_addr_o_xu_c <list of PCIe Bus Address separated by comma for VFs of O-xU2 >"
+ "-d | --vf_addr_o_xu_d <list of PCIe Bus Address separated by comma for VFs of O-xU3 >"
+ "-u | --usecasefile <name of use case file for multiple O-DU|O-RUs>\n"\
+ "-h | --help print usage\n";
+
+ printf("%s", help_content);
+}
+
+/**
+ *******************************************************************************
+ *
+ * @fn app_parse_args
+ * @brief is used to parse incoming app args
+ *
+ * @description
+ * The routine is parse input args and convert them into app startup params
+ *
+ * @references
+ *
+ * @ingroup xran_lib
+ *
+ ******************************************************************************/
+static int32_t
+app_parse_cmdline_args(int argc, char ** argv, struct sample_app_params* params)
+{
+ int32_t c = 0;
+ int32_t vf_cnt = 0;
+ int32_t cnt = 0;
+ size_t optlen = 0;
+ char *saveptr = NULL;
+ char *token = NULL;
+ int32_t port = 8;
+
+ static struct option long_options[] = {
+ {"cfgfile", required_argument, 0, 'z'},
+ {"usecasefile", required_argument, 0, 'u'},
+ {"num_eth_vfs", required_argument, 0, 'p'},
+ {"vf_addr_o_xu_a", required_argument, 0, 'a'},
+ {"vf_addr_o_xu_b", required_argument, 0, 'b'},
+ {"vf_addr_o_xu_c", required_argument, 0, 'c'},
+ {"vf_addr_o_xu_d", required_argument, 0, 'd'},
+ {"vf_addr_o_xu_e", required_argument, 0, 'e'},
+ {"vf_addr_o_xu_f", required_argument, 0, 'F'},
+ {"vf_addr_o_xu_g", required_argument, 0, 'g'},
+ {"vf_addr_o_xu_h", required_argument, 0, 'H'},
+ {"help", no_argument, 0, 'h'},
+ {0, 0, 0, 0}
+ };
+
+ memset(params, 0, sizeof (*params));
+
+ while (1) {
+ //int this_option_optind = optind ? optind : 1;
+ int option_index = 0;
+
+ c = getopt_long(argc, argv, "a:b:c:d:e:f:F:g:h:H:p:u:v", long_options, &option_index);
+
+ if (c == -1)
+ break;
+
+ cnt += 1;
+ port = 8;
+
+ switch (c) {
+ case 'f':
+ params->cfg_file = optarg;
+ optlen = strlen(optarg) + 1;
+ printf("%s:%d: %s [len %ld]\n",__FUNCTION__, __LINE__, params->cfg_file, optlen);
+ break;
+ case 'p':
+ params->num_vfs = atoi(optarg);
+ printf("%s:%d: %d\n",__FUNCTION__, __LINE__, params->num_vfs);
+ break;
+ case 'u':
+ params->usecase_file = optarg;
+ optlen = strlen(optarg) + 1;
+ printf("%s:%d: %s [len %ld]\n",__FUNCTION__, __LINE__, params->usecase_file, optlen);
+ break;
+ case 'a':
+ port -= 1;
+ case 'b':
+ port -= 1;
+ case 'c':
+ port -= 1;
+ case 'd':
+ port -= 1;
+ case 'e':
+ port -= 1;
+ case 'F':
+ port -= 1;
+ case 'g':
+ port -= 1;
+ case 'H':
+ port -= 1;
+ vf_cnt = 0;
+ optlen = strlen(optarg) + 1;
+ printf("%s:%d: port %d %s [len %ld]\n",__FUNCTION__, __LINE__, port, optarg, optlen);
+ token = strtok_r(optarg, ",", &saveptr);
+ while (token != NULL) {
+ optlen = strlen(token) + 1;
+ snprintf(¶ms->vf_pcie_addr[port][vf_cnt][0], optlen, "%s", token);
+ printf("%s:%d: port %d %s [len %ld]\n",__FUNCTION__, __LINE__, port, ¶ms->vf_pcie_addr[port][vf_cnt][0], optlen);
+ token = strtok_r(NULL, ",", &saveptr);
+ vf_cnt +=1;
+ }
+ break;
+ case 'h':
+ app_help();
+ exit(0);
+ }
+ }
+ return cnt;
+}
+
+int32_t
+app_apply_slot_cfg(RuntimeConfig *config)
+{
+ int32_t ret = 0;
+ int32_t slot_idx = 0;
+ int32_t cc_idx = 0;
+ int32_t ant_idx = 0;
+ int32_t section_idx = 0;
+ int32_t direction = 0;
+
+ int32_t enable = 0;
+
+ for (slot_idx = 0; slot_idx < config->numSlots; slot_idx++) {
+ for (direction = 0; direction < XRAN_DIR_MAX; direction++) {
+ for (cc_idx = 0; cc_idx < config->numCC; cc_idx++) {
+ for (ant_idx = 0; ant_idx < ((direction == XRAN_DIR_UL) ? config->numUlAxc :config->numAxc); ant_idx++) {
+ for (section_idx = 0; section_idx < config->p_SlotPrbMap[direction][slot_idx]->nPrbElm && section_idx < XRAN_MAX_SECTIONS_PER_SLOT; section_idx++) {
+ if (config->SlotPrbCCmask[direction][slot_idx][section_idx] & (1L << cc_idx)) {
+ if (config->SlotPrbAntCMask[direction][slot_idx][section_idx] & (1L << ant_idx)) {
+ struct xran_prb_map *pRbMap = config->p_RunSlotPrbMap[direction][slot_idx][cc_idx][ant_idx];
+ pRbMap->dir = direction;
+ pRbMap->xran_port = config->o_xu_id;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = cc_idx;
+ pRbMap->ru_port_id = ant_idx;
+ pRbMap->tti_id = slot_idx;
+ pRbMap->start_sym_id = 0;
+ if (pRbMap->nPrbElm < XRAN_MAX_SECTIONS_PER_SLOT && section_idx < XRAN_MAX_SECTIONS_PER_SLOT) {
+ struct xran_prb_elm *pMapElmRun = &pRbMap->prbMap[pRbMap->nPrbElm];
+ struct xran_prb_elm *pMapElmCfg = &config->p_SlotPrbMap[direction][slot_idx]->prbMap[section_idx];
+ memcpy(pMapElmRun, pMapElmCfg, sizeof(struct xran_prb_elm));
+ } else {
+ rte_panic("Incorrect slot cfg\n");
+ }
+ pRbMap->nPrbElm++;
+ enable = 1;
+ }
+ }
+}
+ }
+ }
+ }
+ }
+
+ config->RunSlotPrbMapEnabled = enable;
+ printf("[%d]config->RunSlotPrbMapEnabled %d\n",config->o_xu_id, config->RunSlotPrbMapEnabled);
+
+ return ret;
+}
+
+int32_t
+app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg)
+{
+ int32_t ret = 0;
+ int32_t vf_num = 0;
+ int32_t o_xu_id = 0;
+ char filename[512];
+ char bbu_filename[512];
+ char *dir;
+ size_t len;
+
+ if (p_use_cfg) {
+ memset(p_use_cfg, 0, sizeof(UsecaseConfig));
+ } else {
+ printf("p_use_cfg error.\n");
+ exit(-1);
+ }
+
+ p_use_cfg->dlCpProcBurst = 1;
+
+ if (p_args) {
+ if (p_args->usecase_file) { /* use case for multiple O-RUs */
+ printf("p_args->usecase_file (%s)\n", p_args->usecase_file);
+ len = strlen(p_args->usecase_file) + 1;
+ if (len > 511){
+ printf("app_parse_all_cfgs: Name of p_args->usecase_file, %s is too long. Maximum is 511 characters!!\n", p_args->usecase_file);
+ return -1;
+ } else {
+ strncpy(filename, p_args->usecase_file, RTE_MIN (512,len));
+ }
+ if (parseUsecaseFile(filename, p_use_cfg) != 0) {
+ printf("Use case config file error.\n");
+ return -1;
+ }
+ if (p_use_cfg->oXuNum > XRAN_PORTS_NUM) {
+ printf("Use case config file error.\n");
+ return -1;
+ }
+
+ if (p_o_xu_cfg) {
+ int32_t i;
+ RuntimeConfig* p_o_xu_cfg_loc = p_o_xu_cfg;
+ for (i = 0; i < p_use_cfg->oXuNum; i++) {
+ config_init(p_o_xu_cfg_loc);
+ p_o_xu_cfg_loc++;
+ }
+ } else {
+ printf("p_o_xu_cfg error.\n");
+ exit(-1);
+ }
+ /* use cmdline pcie address */
+ for (o_xu_id = 0; o_xu_id < p_use_cfg->oXuNum && o_xu_id < XRAN_PORTS_NUM; o_xu_id++) {
+ for (vf_num = 0; vf_num < XRAN_VF_MAX && p_args->num_vfs ; vf_num++) {
+ strncpy(&p_use_cfg->o_xu_pcie_bus_addr[o_xu_id][vf_num][0], &p_args->vf_pcie_addr[o_xu_id][vf_num][0], RTE_MIN (512,strlen(&p_args->vf_pcie_addr[o_xu_id][vf_num][0])));
+ }
+ }
+
+
+ dir = dirname(p_args->usecase_file);
+ if(strlen(p_use_cfg->o_xu_bbu_cfg_file)){
+ memset(bbu_filename, 0, sizeof(bbu_filename));
+ printf("dir (%s)\n",dir);
+ len = strlen(dir) + 1;
+ if (len > 511){
+ printf("app_parse_all_cfgs: Name of directory, %s, xu_id = %d is too long. Maximum is 511 characters!!\n", dir, o_xu_id);
+ return -1;
+ } else {
+ strncpy(bbu_filename, dir, RTE_MIN(512,len));
+ }
+ strncat(bbu_filename, "/", 1);
+ len +=1;
+ len = (sizeof(bbu_filename)) - len;
+ if (len > strlen(p_use_cfg->o_xu_bbu_cfg_file)) {
+ strncat(bbu_filename, p_use_cfg->o_xu_bbu_cfg_file, RTE_MIN (len, strlen(p_use_cfg->o_xu_bbu_cfg_file)));
+ } else {
+ printf("File name error\n");
+ return -1;
+ }
+ strncpy(p_use_cfg->o_xu_bbu_cfg_file, bbu_filename, RTE_MIN (512, strlen(bbu_filename)));
+ printf("bbu_cfg_file (%s)\n",p_use_cfg->o_xu_bbu_cfg_file);
+#ifdef FWK_ENABLED
+ p_use_cfg->bbu_offload = 1;
+#else
+ p_use_cfg->bbu_offload = 0;
+#endif
+ } else {
+ printf("bbu_cfg_file is not provided\n");
+ p_use_cfg->bbu_offload = 0;
+ }
+
+ for (o_xu_id = 0; o_xu_id < p_use_cfg->oXuNum && o_xu_id < XRAN_PORTS_NUM; o_xu_id++) {
+ memset(filename, 0, sizeof(filename));
+ printf("dir (%s)\n",dir);
+ len = strlen(dir) + 1;
+ if (len > 511){
+ printf("app_parse_all_cfgs: Name of directory, %s, xu_id = %d is too long. Maximum is 511 characters!!\n", dir, o_xu_id);
+ return -1;
+ } else {
+ strncpy(filename, dir, RTE_MIN (512,len));
+ }
+ strncat(filename, "/", 1);
+ len +=1;
+ len = (sizeof(filename)) - len;
+
+ if (len > strlen(p_use_cfg->o_xu_cfg_file[o_xu_id])) {
+ strncat(filename, p_use_cfg->o_xu_cfg_file[o_xu_id], RTE_MIN (len, strlen(p_use_cfg->o_xu_cfg_file[o_xu_id])));
+ } else {
+ printf("File name error\n");
+ return -1;
+ }
+ printf("cfg_file (%s)\n",filename);
+ printf("\n=================== O-XU %d===================\n", o_xu_id);
+ if (parseConfigFile(filename, p_o_xu_cfg) != 0) {
+ printf("Configuration file error\n");
+ return -1;
+ }
+ p_o_xu_cfg->o_xu_id = o_xu_id;
+ config_init2(p_o_xu_cfg);
+ if (p_o_xu_cfg->SlotNum_fileEnabled) {
+ if (parseSlotConfigFile(dir, p_o_xu_cfg) != 0) {
+ printf("parseSlotConfigFiles\n");
+ return -1;
+ }
+ if (app_apply_slot_cfg(p_o_xu_cfg)!= 0) {
+ printf("app_apply_slot_cfg\n");
+ return -1;
+ }
+ }
+
+ p_o_xu_cfg++;
+ }
+ } else {
+ printf("p_args error\n");
+ app_help();
+ exit(-1);
+ }
+ } else {
+ printf("p_args error\n");
+ exit(-1);
+ }
+
+ return ret;
+}
+
+int32_t
+app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, struct xran_fh_init* p_xran_fh_init)
+{
+ int32_t ret = 0;
+ int32_t i = 0;
+ int32_t j = 0;
+ char filename[256];
+ struct o_xu_buffers *p_iq = NULL;
+
+ if (p_o_xu_cfg->p_buff) {
+ p_iq = p_o_xu_cfg->p_buff;
+ printf("IQ files size is %d slots\n", p_o_xu_cfg->numSlots);
+
+ //printf("numSlots=%u\n", p_o_xu_cfg->numSlots);
+ //getchar();
+ p_iq->iq_playback_buffer_size_dl = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
+ app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number,
+ p_o_xu_cfg->nDLBandwidth, p_o_xu_cfg->nDLAbsFrePointA) *4L);
+
+ p_iq->iq_playback_buffer_size_ul = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
+ app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number,
+ p_o_xu_cfg->nULBandwidth, p_o_xu_cfg->nULAbsFrePointA) *4L);
+
+
+ /* 10 * [273*32*2*2] = 349440 bytes */
+ p_iq->iq_bfw_buffer_size_dl = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * p_o_xu_cfg->antElmTRx *
+ app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number,
+ p_o_xu_cfg->nDLBandwidth, p_o_xu_cfg->nDLAbsFrePointA) *4L);
+
+ /* 10 * [273*32*2*2] = 349440 bytes */
+ p_iq->iq_bfw_buffer_size_ul = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * p_o_xu_cfg->antElmTRx *
+ app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number,
+ p_o_xu_cfg->nULBandwidth, p_o_xu_cfg->nULAbsFrePointA) *4L);
+
+ /* 10 * [1*273*2*2] = 349440 bytes */
+ p_iq->iq_srs_buffer_size_ul = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
+ app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number,
+ p_o_xu_cfg->nULBandwidth, p_o_xu_cfg->nULAbsFrePointA)*4L);
+
+ p_iq->numSlots = p_o_xu_cfg->numSlots;
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ p_iq->p_tx_play_buffer[i] = (int16_t*)malloc(p_iq->iq_playback_buffer_size_dl);
+ p_iq->tx_play_buffer_size[i] = (int32_t)p_iq->iq_playback_buffer_size_dl;
+
+ if (p_iq->p_tx_play_buffer[i] == NULL)
+ exit(-1);
+
+
+ p_iq->tx_play_buffer_size[i] = sys_load_file_to_buff(p_o_xu_cfg->ant_file[i],
+ "DL IFFT IN IQ Samples in binary format",
+ (uint8_t*)p_iq->p_tx_play_buffer[i],
+ p_iq->tx_play_buffer_size[i],
+ 1);
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ p_iq->p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(p_iq->iq_bfw_buffer_size_dl);
+ p_iq->tx_dl_bfw_buffer_size[i] = (int32_t)p_iq->iq_bfw_buffer_size_dl;
+
+ if (p_iq->p_tx_dl_bfw_buffer[i] == NULL)
+ exit(-1);
+
+ p_iq->tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(p_o_xu_cfg->dl_bfw_file[i],
+ "DL BF weights IQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_dl_bfw_buffer[i],
+ p_iq->tx_dl_bfw_buffer_size[i],
+ 1);
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ p_iq->p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(p_iq->iq_bfw_buffer_size_ul);
+ p_iq->tx_ul_bfw_buffer_size[i] = (int32_t)p_iq->iq_bfw_buffer_size_ul;
+
+ if (p_iq->p_tx_ul_bfw_buffer[i] == NULL)
+ exit(-1);
+
+ p_iq->tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(p_o_xu_cfg->ul_bfw_file[i],
+ "UL BF weights IQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_ul_bfw_buffer[i],
+ p_iq->tx_ul_bfw_buffer_size[i],
+ 1);
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->enablePrach) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ p_iq->p_tx_prach_play_buffer[i] = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);
+ p_iq->tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;
+
+ if (p_iq->p_tx_prach_play_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);
+
+ p_iq->tx_prach_play_buffer_size[i] = sys_load_file_to_buff(p_o_xu_cfg->prach_file[i],
+ "PRACH IQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_prach_play_buffer[i],
+ p_iq->tx_prach_play_buffer_size[i],
+ 1);
+ p_iq->tx_prach_play_buffer_position[i] = 0;
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->enableSrs) {
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+
+ p_iq->p_tx_srs_play_buffer[i] = (int16_t*)malloc(p_iq->iq_srs_buffer_size_ul);
+ p_iq->tx_srs_play_buffer_size[i] = (int32_t)p_iq->iq_srs_buffer_size_ul;
+
+ if (p_iq->p_tx_srs_play_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_tx_srs_play_buffer[i], 0, p_iq->iq_srs_buffer_size_ul);
+ p_iq->tx_srs_play_buffer_size[i] = sys_load_file_to_buff(p_o_xu_cfg->ul_srs_file[i],
+ "SRS IQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_srs_play_buffer[i],
+ p_iq->tx_srs_play_buffer_size[i],
+ 1);
+
+ p_iq->tx_srs_play_buffer_position[i] = 0;
+ }
+ }
+
+ /* log of ul */
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ p_iq->p_rx_log_buffer[i] = (int16_t*)malloc(p_iq->iq_playback_buffer_size_ul);
+ p_iq->rx_log_buffer_size[i] = (int32_t)p_iq->iq_playback_buffer_size_ul;
+
+ if (p_iq->p_rx_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_rx_log_buffer[i], 0, p_iq->rx_log_buffer_size[i]);
+ }
+
+ /* log of prach */
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ p_iq->p_prach_log_buffer[i] = (int16_t*)malloc(p_o_xu_cfg->numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);
+ p_iq->prach_log_buffer_size[i] = (int32_t)p_o_xu_cfg->numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;
+
+ if (p_iq->p_prach_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_prach_log_buffer[i], 0, p_iq->prach_log_buffer_size[i]);
+ }
+
+ /* log of SRS */
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) {
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+
+ p_iq->p_srs_log_buffer[i] = (int16_t*)malloc(p_iq->iq_srs_buffer_size_ul);
+ p_iq->srs_log_buffer_size[i] = (int32_t)p_iq->iq_srs_buffer_size_ul;
+
+ if (p_iq->p_srs_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_srs_log_buffer[i], 0, p_iq->iq_srs_buffer_size_ul);
+ }
+ }
+
+ /* log of BFWs */
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ p_iq->p_tx_dl_bfw_log_buffer[i] = (int16_t*)malloc(p_iq->iq_bfw_buffer_size_dl);
+ p_iq->tx_dl_bfw_log_buffer_size[i] = (int32_t)p_iq->iq_bfw_buffer_size_dl;
+
+ if (p_iq->p_tx_dl_bfw_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_tx_dl_bfw_log_buffer[i], 0, p_iq->iq_bfw_buffer_size_dl);
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ p_iq->p_tx_ul_bfw_log_buffer[i] = (int16_t*)malloc(p_iq->iq_bfw_buffer_size_ul);
+ p_iq->tx_ul_bfw_log_buffer_size[i] = (int32_t)p_iq->iq_bfw_buffer_size_ul;
+
+ if (p_iq->p_tx_ul_bfw_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_iq->p_tx_ul_bfw_log_buffer[i], 0, p_iq->iq_bfw_buffer_size_ul);
+ }
+ }
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ snprintf(filename, sizeof(filename), "./logs/%s%d-play_ant%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "DL IFFT IN IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_play_buffer[i],
+ p_iq->tx_play_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s%d-play_ant%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "DL IFFT IN IQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_play_buffer[i],
+ p_iq->tx_play_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ snprintf(filename, sizeof(filename),"./logs/%s%d-dl_bfw_ue%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "DL Beamformig weights IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_dl_bfw_buffer[i],
+ p_iq->tx_dl_bfw_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s%d-dl_bfw_ue%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"),p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "DL Beamformig weightsIQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_dl_bfw_buffer[i],
+ p_iq->tx_dl_bfw_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+
+ snprintf(filename, sizeof(filename), "./logs/%s%d-ul_bfw_ue%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "UL Beamformig weights IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_ul_bfw_buffer[i],
+ p_iq->tx_ul_bfw_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s%d-ul_bfw_ue%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "UL Beamformig weightsIQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_ul_bfw_buffer[i],
+ p_iq->tx_ul_bfw_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->enableSrs && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+
+ snprintf(filename, sizeof(filename), "./logs/%s%d-play_srs_ant%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "SRS IQ Samples in human readable format",
+ (uint8_t*)p_iq->p_tx_srs_play_buffer[i],
+ p_iq->tx_srs_play_buffer_size[i],
+ 1);
+
+ snprintf(filename,sizeof(filename), "./logs/%s%d-play_srs_ant%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "SRS IQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_srs_play_buffer[i],
+ p_iq->tx_srs_play_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+
+ if (p_o_xu_cfg->iqswap == 1) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("TX: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_tx_play_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_tx_dl_bfw_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_tx_ul_bfw_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq-> p_tx_prach_play_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU) {
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+ printf("SRS: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_tx_srs_play_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+ }
+
+#if 0
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);
+ sys_save_buf_to_file_txt(filename,
+ "DL IFFT IN IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_play_buffer[i],
+ p_iq->tx_play_buffer_size[i],
+ 1);
+ }
+#endif
+ if (p_o_xu_cfg->nebyteorderswap == 1 && p_o_xu_cfg->compression == 0) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->tx_play_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_tx_play_buffer[i][j] = rte_cpu_to_be_16(p_iq->p_tx_play_buffer[i][j]);
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->tx_dl_bfw_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_tx_dl_bfw_buffer[i][j] = rte_cpu_to_be_16(p_iq->p_tx_dl_bfw_buffer[i][j]);
+ }
+ printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->tx_ul_bfw_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_tx_ul_bfw_buffer[i][j] = rte_cpu_to_be_16(p_iq->p_tx_ul_bfw_buffer[i][j]);
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->enablePrach) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->tx_prach_play_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_tx_prach_play_buffer[i][j] = rte_cpu_to_be_16(p_iq->p_tx_prach_play_buffer[i][j]);
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->enableSrs) {
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+ printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->tx_srs_play_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_tx_srs_play_buffer[i][j] = rte_cpu_to_be_16(p_iq->p_tx_srs_play_buffer[i][j]);
+ }
+ }
+ }
+
+ }
+
+#if 0
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);
+ sys_save_buf_to_file_txt(filename,
+ "DL IFFT IN IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_play_buffer[i],
+ p_iq->tx_play_buffer_size[i],
+ 1);
+ }
+#endif
+ }
+
+ return ret;
+}
+
+int32_t
+app_dump_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg)
+{
+ int32_t ret = 0;
+ int32_t i = 0;
+ int32_t j = 0;
+ char filename[256];
+ struct o_xu_buffers* p_iq = NULL;
+
+ if (p_o_xu_cfg->p_buff) {
+ p_iq = p_o_xu_cfg->p_buff;
+ } else {
+ printf("Error p_o_xu_cfg->p_buff\n");
+ exit(-1);
+ }
+
+ if (p_o_xu_cfg->iqswap == 1) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("RX: Swap I and Q to match CPU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_rx_log_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) {
+ for (i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+ printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_srs_log_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->nebyteorderswap == 1 && p_o_xu_cfg->compression == 0) {
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->rx_log_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_rx_log_buffer[i][j] = rte_be_to_cpu_16(p_iq->p_rx_log_buffer[i][j]);
+ }
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) {
+ for (i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+ printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->srs_log_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_srs_log_buffer[i][j] = rte_be_to_cpu_16(p_iq->p_srs_log_buffer[i][j]);
+ }
+ }
+ }
+ }
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ snprintf(filename, sizeof(filename), "./logs/%s%d-rx_log_ant%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "UL FFT OUT IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_rx_log_buffer[i],
+ p_iq->rx_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename), "./logs/%s%d-rx_log_ant%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "UL FFT OUT IQ Samples in binary format",
+ (uint8_t*) p_iq->p_rx_log_buffer[i],
+ p_iq->rx_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ snprintf(filename, sizeof(filename),"./logs/%s%d-dl_bfw_log_ue%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "DL Beamformig weights IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_dl_bfw_log_buffer[i],
+ p_iq->tx_dl_bfw_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s%d-dl_bfw_log_ue%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"),p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "DL Beamformig weightsIQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_dl_bfw_log_buffer[i],
+ p_iq->tx_dl_bfw_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+ }
+ if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) {
+ snprintf(filename, sizeof(filename),"./logs/%s%d-ul_bfw_log_ue%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "DL Beamformig weights IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_tx_ul_bfw_log_buffer[i],
+ p_iq->tx_ul_bfw_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s%d-ul_bfw_log_ue%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"),p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "DL Beamformig weightsIQ Samples in binary format",
+ (uint8_t*) p_iq->p_tx_ul_bfw_log_buffer[i],
+ p_iq->tx_ul_bfw_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+
+ }
+
+ if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) {
+ for (i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->antElmTRx);
+ i++) {
+ snprintf(filename, sizeof(filename), "./logs/%s%d-srs_log_ant%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file_txt(filename,
+ "SRS UL FFT OUT IQ Samples in human readable format",
+ (uint8_t*)p_iq-> p_srs_log_buffer[i],
+ p_iq->srs_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename), "./logs/%s%d-srs_log_ant%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i);
+ sys_save_buf_to_file(filename,
+ "SRS UL FFT OUT IQ Samples in binary format",
+ (uint8_t*) p_iq->p_srs_log_buffer[i],
+ p_iq->srs_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+
+ if (p_o_xu_cfg->enablePrach) {
+ if (p_o_xu_cfg->iqswap == 1) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_iq->p_prach_log_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(p_iq->prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2) {
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+
+ if (p_o_xu_cfg->nebyteorderswap == 1 && p_o_xu_cfg->compression == 0) {
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+ printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
+ for (j = 0; j < p_iq->prach_log_buffer_size[i]/sizeof(short); j++) {
+ p_iq->p_prach_log_buffer[i][j] = rte_be_to_cpu_16(p_iq->p_prach_log_buffer[i][j]);
+ }
+ }
+ }
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) {
+
+ if (p_o_xu_cfg->appMode == APP_O_DU)
+ snprintf(filename, sizeof(filename), "./logs/%s%d%s_ant%d.txt","o-du",p_o_xu_cfg->o_xu_id,"-prach_log", i);
+ else
+ snprintf(filename, sizeof(filename), "./logs/%s%d%s_ant%d.txt","o-ru",p_o_xu_cfg->o_xu_id,"-play_prach", i);
+ sys_save_buf_to_file_txt(filename,
+ "PRACH IQ Samples in human readable format",
+ (uint8_t*) p_iq->p_prach_log_buffer[i],
+ p_iq->prach_log_buffer_size[i],
+ 1);
+
+ if (p_o_xu_cfg->appMode == APP_O_DU)
+ snprintf(filename, sizeof(filename), "./logs/%s%d%s_ant%d.bin","o-du",p_o_xu_cfg->o_xu_id,"-prach_log", i);
+ else
+ snprintf(filename, sizeof(filename), "./logs/%s%d%s_ant%d.bin","o-ru",p_o_xu_cfg->o_xu_id,"-play_prach", i);
+ sys_save_buf_to_file(filename,
+ "PRACH IQ Samples in binary format",
+ (uint8_t*) p_iq->p_prach_log_buffer[i],
+ p_iq->prach_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+ return ret;
+}
+
+int32_t
+app_set_main_core(UsecaseConfig* p_usecase)
+{
+ struct sched_param sched_param;
+ cpu_set_t cpuset;
+ int32_t result = 0;
+ memset(&sched_param, 0, sizeof(struct sched_param));
+ /* set main thread affinity mask to CPU2 */
+ sched_param.sched_priority = 99;
+ CPU_ZERO(&cpuset);
+
+ printf("This system has %d processors configured and %d processors available.\n", get_nprocs_conf(), get_nprocs());
+
+ if (p_usecase->main_core < get_nprocs_conf())
+ CPU_SET(p_usecase->main_core, &cpuset);
+ else
+ return -1;
+
+ if ((result = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset)))
+ {
+ printf("pthread_setaffinity_np failed: coreId = 2, result = %d\n",result);
+ }
+ printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, sched_getcpu(), getpid());
+#if 0
+ if ((result = pthread_setschedparam(pthread_self(), SCHED_FIFO, &sched_param)))
+ {
+ printf("priority is not changed: coreId = 2, result = %d\n",result);
+ }
+#endif
+ return result;
+}
+
+int32_t
+app_alloc_all_cfgs(void)
+{
+ void * ptr = NULL;
+ RuntimeConfig* p_rt_cfg = NULL;
+ int32_t i = 0;
+
+ ptr = _mm_malloc(sizeof(UsecaseConfig), 256);
+ if (ptr == NULL) {
+ rte_panic("_mm_malloc: Can't allocate %lu bytes\n", sizeof(UsecaseConfig));
+ }
+
+ p_usecaseConfiguration = (UsecaseConfig*)ptr;
+
+ ptr = _mm_malloc(sizeof(RuntimeConfig)*XRAN_PORTS_NUM, 256);
+ if (ptr == NULL) {
+ rte_panic("_mm_malloc: Can't allocate %lu bytes\n", sizeof(RuntimeConfig)*XRAN_PORTS_NUM);
+ }
+ p_rt_cfg = (RuntimeConfig*)ptr;
+
+ for (i = 0; i < XRAN_PORTS_NUM; i++) {
+ p_startupConfiguration[i] = p_rt_cfg++;
+ }
+
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ int32_t o_xu_id = 0;
+ char filename[256];
+ int32_t xret = 0;
+ struct stat st = {0};
+ uint32_t filenameLength = strlen(argv[1]);
+ enum xran_if_state xran_curr_if_state = XRAN_INIT;
+ struct sample_app_params arg_params;
+ uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};
+ uint64_t nTotalTime;
+ uint64_t nUsedTime;
+ uint32_t nCoresUsed;
+ uint32_t nCoreUsedNum[64];
+ //float nUsedPercent;
+
+ app_version_print();
+ app_timer_set_tsc_freq_from_clock();
+
+ if (xran_is_synchronized() != 0)
+ printf("Machine is not synchronized using PTP!\n");
+ else
+ printf("Machine is synchronized using PTP!\n");
+
+ if (filenameLength >= 256) {
+ printf("Config file name input is too long, exiting!\n");
+ exit(-1);
+ }
+
+ if ((xret = app_alloc_all_cfgs()) < 0) {
+ printf("app_alloc_all_cfgs failed %d\n", xret);
+ exit(-1);
+ }
+
+ if ((xret = app_parse_cmdline_args(argc, argv, &arg_params)) < 0) {
+ printf("app_parse_args failed %d\n", xret);
+ exit(-1);
+ }
+
+ if ((xret = app_parse_all_cfgs(&arg_params, p_usecaseConfiguration, p_startupConfiguration[0])) < 0) {
+ printf("app_parse_all_cfgs failed %d\n", xret);
+ exit(-1);
+ }
+#ifdef FWK_ENABLED
+ if(p_usecaseConfiguration->bbu_offload) {
+ if(p_startupConfiguration[0]->appMode == APP_O_DU) {
+ if ((xret = app_bbu_init(argc, argv, p_usecaseConfiguration->o_xu_bbu_cfg_file, p_usecaseConfiguration, p_startupConfiguration,
+ nActiveCoreMask)) < 0) {
+ printf("app_bbu_init failed %d\n", xret);
+ }
+
+ uint32_t i;
+ uint64_t nMask = 1;
+ /* use only 1 worker for BBU offload */
+ for (i = 0; i < 64; i++)
+ {
+ if(p_usecaseConfiguration->io_core < 64) {
+ if (nMask & p_usecaseConfiguration->io_worker) {
+ p_usecaseConfiguration->io_worker = nMask;
+ p_usecaseConfiguration->io_worker_64_127 = 0;
+ break;
+ }
+ }
+ if(p_usecaseConfiguration->io_core >= 64) {
+ if (nMask & p_usecaseConfiguration->io_worker_64_127) {
+ p_usecaseConfiguration->io_worker_64_127 = nMask;
+ p_usecaseConfiguration->io_worker = 0;
+ break;
+ }
+ }
+ nMask = nMask << 1;
+ }
+ }
+ }
+#endif
+ if ((xret = app_set_main_core(p_usecaseConfiguration)) < 0) {
+ printf("app_set_main_core failed %d\n", xret);
+ exit(-1);
+ }
+
+ app_io_xran_if_alloc();
+
+ /* one init for all O-XU */
+ app_io_xran_fh_init_init(p_usecaseConfiguration, p_startupConfiguration[0], &app_io_xran_fh_init);
+ xret = xran_init(argc, argv, &app_io_xran_fh_init, argv[0], &app_io_xran_handle);
+ if (xret != XRAN_STATUS_SUCCESS) {
+ printf("xran_init failed %d\n", xret);
+ exit(-1);
+ }
+
+ if (app_io_xran_handle == NULL)
+ exit(1);
+
+ if (stat("./logs", &st) == -1) {
+ mkdir("./logs", 0777);
+ }
+
+ snprintf(filename, sizeof(filename),"mlog-%s", p_usecaseConfiguration->appMode == 0 ? "o-du" : "o-ru");
+
+ /* Init mlog */
+ unsigned int mlogSubframes = 128;
+ unsigned int mlogCores = 32;
+ unsigned int mlogSize = 10000;
+
+ // Open Mlog Buffers and initalize variables
+ MLogOpen(mlogSubframes, mlogCores, mlogSize, 0, filename);
+ MLogSetMask(0);
+
+ puts("----------------------------------------");
+ printf("MLog Info: virt=0x%p size=%d\n", MLogGetFileLocation(), MLogGetFileSize());
+ puts("----------------------------------------");
+
+
+ uint32_t totalCC = 0;
+
+ if(((1 << app_io_xran_fh_init.io_cfg.timing_core) | app_io_xran_fh_init.io_cfg.pkt_proc_core) & nActiveCoreMask[0])
+ rte_panic("[0 - 63] BBU and IO cores conflict\n");
+ if(app_io_xran_fh_init.io_cfg.pkt_proc_core_64_127 & nActiveCoreMask[1])
+ rte_panic("[64-127] BBU and IO cores conflict\n");
+
+ nActiveCoreMask[0] |= ((1 << app_io_xran_fh_init.io_cfg.timing_core) | app_io_xran_fh_init.io_cfg.pkt_proc_core);
+ nActiveCoreMask[1] |= app_io_xran_fh_init.io_cfg.pkt_proc_core_64_127;
+
+ MLogSetup(nActiveCoreMask[0], nActiveCoreMask[1], nActiveCoreMask[2], nActiveCoreMask[3]);
+
+ for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) {
+ RuntimeConfig* p_o_xu_cfg = p_startupConfiguration[o_xu_id];
+ totalCC += p_o_xu_cfg->numCC;
+ }
+ MLogAddTestCase(nActiveCoreMask, totalCC);
+
+ /** process all the O-RU|O-DU for use case */
+ for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) {
+ RuntimeConfig* p_o_xu_cfg = p_startupConfiguration[o_xu_id];
+ if (o_xu_id == 0)
+ app_io_xran_buffers_max_sz_set(p_o_xu_cfg);
+
+ if (p_o_xu_cfg->ant_file[0] == NULL) {
+ printf("it looks like test vector for antennas were not provided\n");
+ exit(-1);
+ }
+ if (p_o_xu_cfg->numCC > XRAN_MAX_SECTOR_NR) {
+ printf("Number of cells %d exceeds max number supported %d!\n", p_o_xu_cfg->numCC, XRAN_MAX_SECTOR_NR);
+ p_o_xu_cfg->numCC = XRAN_MAX_SECTOR_NR;
+
+ }
+ if (p_o_xu_cfg->antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {
+ printf("Number of Antenna elements %d exceeds max number supported %d!\n", p_o_xu_cfg->antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);
+ p_o_xu_cfg->antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;
+ }
+
+ printf("Numm CC %d numAxc %d numUlAxc %d\n", p_o_xu_cfg->numCC, p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc);
+
+ app_setup_o_xu_buffers(p_usecaseConfiguration, p_o_xu_cfg, &app_io_xran_fh_init);
+
+ app_io_xran_fh_config_init(p_usecaseConfiguration, p_o_xu_cfg, &app_io_xran_fh_init, &app_io_xran_fh_config[o_xu_id]);
+
+ xret = xran_open(app_io_xran_handle, &app_io_xran_fh_config[o_xu_id]);
+ if(xret != XRAN_STATUS_SUCCESS){
+ printf("xran_open failed %d\n", xret);
+ exit(-1);
+ }
+ if (app_io_xran_interface(o_xu_id, p_startupConfiguration[o_xu_id], p_usecaseConfiguration, &app_io_xran_fh_init) != 0)
+ exit(-1);
+
+ app_io_xran_iq_content_init(o_xu_id, p_startupConfiguration[o_xu_id]);
+#ifdef FWK_ENABLED
+ if(p_o_xu_cfg->appMode == APP_O_DU && p_usecaseConfiguration->bbu_offload) {
+ if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_bbu_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_physide_cb failed %d\n", xret);
+ exit(-1);
+ }
+ } else {
+ if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_physide_cb failed %d\n", xret);
+ exit(-1);
+ }
+ }
+#else
+ if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_physide_cb failed %d\n", xret);
+ exit(-1);
+ }
+#endif
+ if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_physide_cb failed %d\n", xret);
+ exit(-1);
+ }
+ if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_physide_cb failed %d\n", xret);
+ exit(-1);
+ }
+#ifdef TEST_SYM_CBS
+ if ((xret = xran_reg_sym_cb(app_io_xran_handle, app_io_xran_ul_custom_sym_call_back,
+ (void*)&cb_sym_ctx[0].cb_param,
+ &cb_sym_ctx[0].sense_of_time,
+ 3, XRAN_CB_SYM_RX_WIN_BEGIN)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_sym_cb failed %d\n", xret);
+ exit(-1);
+ }
+
+ if ((xret = xran_reg_sym_cb(app_io_xran_handle, app_io_xran_ul_custom_sym_call_back,
+ (void*)&cb_sym_ctx[1].cb_param,
+ &cb_sym_ctx[1].sense_of_time,
+ 3, XRAN_CB_SYM_RX_WIN_END)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_sym_cb failed %d\n", xret);
+ exit(-1);
+ }
+
+ if ((xret = xran_reg_sym_cb(app_io_xran_handle, app_io_xran_ul_custom_sym_call_back,
+ (void*)&cb_sym_ctx[2].cb_param,
+ &cb_sym_ctx[2].sense_of_time,
+ 3, XRAN_CB_SYM_TX_WIN_BEGIN)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_sym_cb failed %d\n", xret);
+ exit(-1);
+ }
+
+ if ((xret = xran_reg_sym_cb(app_io_xran_handle, app_io_xran_ul_custom_sym_call_back,
+ (void*)&cb_sym_ctx[3].cb_param,
+ &cb_sym_ctx[3].sense_of_time,
+ 3, XRAN_CB_SYM_TX_WIN_END)) != XRAN_STATUS_SUCCESS) {
+ printf("xran_reg_sym_cb failed %d\n", xret);
+ exit(-1);
+ }
+#endif
+ }
+
+
+
+ fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);
+
+ state = APP_RUNNING;
+ printf("Start XRAN traffic\n");
+ xran_start(app_io_xran_handle);
+ app_print_menu();
+
+ struct xran_common_counters x_counters[XRAN_PORTS_NUM];
+ int is_mlog_on = 0;
+ for (;;) {
+ char input[10];
+ sleep(1);
+ xran_curr_if_state = xran_get_if_state();
+
+ if (xran_get_common_counters(app_io_xran_handle, &x_counters[0]) == XRAN_STATUS_SUCCESS) {
+ for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) {
+ if (o_xu_id == 0) {
+ xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoresUsed, nCoreUsedNum, 1);
+ //nUsedPercent = 0.0;
+ //if (nTotalTime) {
+ // nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;
+ //}
+ mlog_times.core_total_time += nTotalTime;
+ mlog_times.core_used_time += nUsedTime;
+
+#if 0
+ printf("[nCoresUsed: %d] [MainCore: %d - Util: %5.2f %%]", nCoresUsed, nCoreUsedNum[0], nUsedPercent);
+ if (nCoresUsed > 1) {
+ printf("[Additional Cores: ");
+ for (int nCore = 1; nCore < nCoresUsed; nCore++) {
+ printf("%d ", nCoreUsedNum[nCore]);
+ }
+ printf("]");
+ }
+ printf("\n");
+#endif
+ }
+ printf("[%s%d][rx %7ld pps %7ld kbps %7ld][tx %7ld pps %7ld kbps %7ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Invalid_Ext1_packets %ld Total %ld]\n",
+ ((p_usecaseConfiguration->appMode == APP_O_DU) ? "o-du" : "o-ru"),
+ o_xu_id,
+ x_counters[o_xu_id].rx_counter,
+ x_counters[o_xu_id].rx_counter-old_rx_counter[o_xu_id],
+ x_counters[o_xu_id].rx_bytes_per_sec*8/1000L,
+ x_counters[o_xu_id].tx_counter,
+ x_counters[o_xu_id].tx_counter-old_tx_counter[o_xu_id],
+ x_counters[o_xu_id].tx_bytes_per_sec*8/1000L,
+ x_counters[o_xu_id].Rx_on_time,
+ x_counters[o_xu_id].Rx_early,
+ x_counters[o_xu_id].Rx_late,
+ x_counters[o_xu_id].Rx_corrupt,
+ x_counters[o_xu_id].Rx_pkt_dupl,
+ x_counters[o_xu_id].rx_invalid_ext1_packets,
+ x_counters[o_xu_id].Total_msgs_rcvd);
+
+ if (x_counters[o_xu_id].rx_counter > old_rx_counter[o_xu_id])
+ old_rx_counter[o_xu_id] = x_counters[o_xu_id].rx_counter;
+ if (x_counters[o_xu_id].tx_counter > old_tx_counter[o_xu_id])
+ old_tx_counter[o_xu_id] = x_counters[o_xu_id].tx_counter;
+
+ if(o_xu_id == 0){
+ if(is_mlog_on == 0 && x_counters[o_xu_id].rx_counter > 0 && x_counters[o_xu_id].tx_counter > 0) {
+ xran_set_debug_stop(p_startupConfiguration[0]->debugStop, p_startupConfiguration[0]->debugStopCount);
+ MLogSetMask(0xFFFFFFFF);
+ is_mlog_on = 1;
+ }
+ }
+ }
+ } else {
+ printf("error xran_get_common_counters\n");
+ }
+
+ if (xran_curr_if_state == XRAN_STOPPED){
+ break;
+ }
+ if (NULL == fgets(input, 10, stdin)) {
+ continue;
+ }
+
+ const int sel_opt = atoi(input);
+ switch (sel_opt) {
+ case 1:
+ xran_start(app_io_xran_handle);
+ printf("Start XRAN traffic\n");
+ break;
+ case 2:
+ break;
+ case 3:
+ xran_stop(app_io_xran_handle);
+ printf("Stop XRAN traffic\n");
+ state = APP_STOPPED;
+ break;
+ default:
+ puts("Wrong option passed!");
+ break;
+ }
+ if (APP_STOPPED == state)
+ break;
+ }
+
+ /** process all the O-RU|O-DU for use case */
+ for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) {
+ app_io_xran_iq_content_get(o_xu_id, p_startupConfiguration[o_xu_id]);
+ /* Check for owd results */
+ if (p_usecaseConfiguration->owdmEnable)
+ {
+
+ FILE *file= NULL;
+ uint64_t avgDelay =0;
+ snprintf(filename, sizeof(filename), "./logs/%s%d-owd_results.txt", ((p_startupConfiguration[o_xu_id]->appMode == APP_O_DU)?"o-du":"o-ru"),o_xu_id);
+ file = fopen(filename, "w");
+ if (file == NULL) {
+ printf("can't open file %s\n",filename);
+ exit (-1);
+ }
+ if (xran_get_delay_measurements_results (app_io_xran_handle, (uint16_t) p_startupConfiguration[o_xu_id]->o_xu_id, p_usecaseConfiguration->appMode, &avgDelay))
+ {
+ fprintf(file,"OWD Measurements failed for port %d and appMode %d \n", p_startupConfiguration[o_xu_id]->o_xu_id,p_usecaseConfiguration->appMode);
+ }
+ else
+ {
+ fprintf(file,"OWD Measurements passed for port %d and appMode %d with AverageDelay %lu [ns]\n", p_startupConfiguration[o_xu_id]->o_xu_id,p_usecaseConfiguration->appMode, avgDelay);
+ }
+ fflush(file);
+ fclose(file);
+ }
+ }
+
+ MLogSetMask(0x0);
+ puts("Closing l1 app... Ending all threads...");
+
+ xran_close(app_io_xran_handle);
+#ifdef FWK_ENABLED
+ if(p_startupConfiguration[0]->appMode == APP_O_DU && p_usecaseConfiguration->bbu_offload) {
+ app_bbu_close();
+ }
+#endif
+ app_io_xran_if_stop();
+
+ puts("Dump IQs...");
+ for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) {
+ app_dump_o_xu_buffers(p_usecaseConfiguration, p_startupConfiguration[o_xu_id]);
+ }
+
+ if(is_mlog_on) {
+ app_profile_xran_print_mlog_stats(arg_params.usecase_file);
+ rte_pause();
+ }
+
+ app_io_xran_if_free();
+ return 0;
+}