+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+extern int32_t xran_process_srs_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free,
+ int8_t expect_comp,
+ uint8_t compMeth,
+ uint8_t iqWidth);
+
+extern int32_t xran_pkt_validate(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ union ecpri_seq_id *seq_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id);
+
+int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, struct xran_eaxc_info *p_cid, uint32_t* ret_data)
+{
+ struct rte_mbuf* pkt;
+ struct xran_device_ctx* p_dev_ctx = (struct xran_device_ctx*)handle;
+ void* iq_samp_buf[MBUFS_CNT];
+ union ecpri_seq_id seq[MBUFS_CNT];
+ static int symbol_total_bytes[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR] = { 0 };
+ int num_bytes[MBUFS_CNT] = { 0 }, num_bytes_pusch[MBUFS_CNT] = { 0 };
+ int16_t i, j;
+
+ struct xran_common_counters* pCnt = &p_dev_ctx->fh_counters;
+
+ uint8_t CC_ID[MBUFS_CNT] = { 0 };
+ uint8_t Ant_ID[MBUFS_CNT] = { 0 };
+ uint8_t frame_id[MBUFS_CNT] = { 0 };
+ uint8_t subframe_id[MBUFS_CNT] = { 0 };
+ uint8_t slot_id[MBUFS_CNT] = { 0 };
+ uint8_t symb_id[MBUFS_CNT] = { 0 };
+
+ uint16_t num_prbu[MBUFS_CNT];
+ uint16_t start_prbu[MBUFS_CNT];
+ uint16_t sym_inc[MBUFS_CNT];
+ uint16_t rb[MBUFS_CNT];
+ uint16_t sect_id[MBUFS_CNT];
+ uint16_t prb_elem_id[MBUFS_CNT] = {0};
+
+ uint8_t compMeth[MBUFS_CNT] = { 0 };
+ uint8_t iqWidth[MBUFS_CNT] = { 0 };
+ uint8_t compMeth_ini = 0;
+ uint8_t iqWidth_ini = 0;
+
+ uint32_t pkt_size[MBUFS_CNT];
+
+ int expect_comp = (p_dev_ctx->fh_cfg.ru_conf.compMeth != XRAN_COMPMETHOD_NONE);
+ enum xran_comp_hdr_type staticComp = p_dev_ctx->fh_cfg.ru_conf.xranCompHdrType;
+
+ int16_t num_pusch = 0, num_prach = 0, num_srs = 0;
+ int16_t pusch_idx[MBUFS_CNT] = { 0 }, prach_idx[MBUFS_CNT] = { 0 }, srs_idx[MBUFS_CNT] = { 0 };
+ int8_t xran_port = xran_dev_ctx_get_port_id(p_dev_ctx);
+ int16_t max_ant_num = 0;
+ uint8_t *ptr_seq_id_num_port;
+ struct xran_eaxcid_config* conf;
+ uint8_t seq_id[MBUFS_CNT];
+ uint16_t cid[MBUFS_CNT];
+
+ struct xran_ecpri_hdr* ecpri_hdr[MBUFS_CNT];
+ struct radio_app_common_hdr* radio_hdr[MBUFS_CNT];
+ struct data_section_hdr* data_hdr[MBUFS_CNT];
+ struct data_section_compression_hdr* data_compr_hdr[MBUFS_CNT];
+
+ const int16_t ecpri_size = sizeof(struct xran_ecpri_hdr);
+ const int16_t rad_size = sizeof(struct radio_app_common_hdr);
+ const int16_t data_size = sizeof(struct data_section_hdr);
+ const int16_t compr_size = sizeof(struct data_section_compression_hdr);
+
+ char* buf_start[MBUFS_CNT];
+ uint16_t start_off[MBUFS_CNT];
+ uint16_t iq_offset[MBUFS_CNT];
+ uint16_t last[MBUFS_CNT];
+
+ uint32_t tti = 0;
+ struct rte_mbuf* mb = NULL;
+ struct xran_prb_map* pRbMap = NULL;
+ struct xran_prb_elm* prbMapElm = NULL;
+ //uint16_t iq_sample_size_bits;
+ uint16_t idxElm = 0, total_sections = 0;
+
+#if XRAN_MLOG_VAR
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+#endif
+
+ if (xran_port < 0) {
+ print_err("Invalid pHandle");
+ return MBUF_FREE;
+ }
+
+ if (xran_port > XRAN_PORTS_NUM) {
+ print_err("Invalid port - %d", xran_port);
+ return MBUF_FREE;
+ }
+
+ if(first_call == 0) {
+ for(i = 0; i < num; i++ )
+ ret_data[i] = MBUF_FREE;
+ return MBUF_FREE;
+ }
+
+ conf = &(p_dev_ctx->eAxc_id_cfg);
+ if (conf == NULL) {
+ rte_panic("conf == NULL");
+ }
+
+ if (p_dev_ctx->fh_init.io_cfg.id == O_DU)
+ {
+ max_ant_num = XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR;
+ ptr_seq_id_num_port = &xran_upul_seq_id_num[xran_port][0][0];
+ }
+ else if (p_dev_ctx->fh_init.io_cfg.id == O_RU)
+ {
+ max_ant_num = XRAN_MAX_ANTENNA_NR;
+ ptr_seq_id_num_port = &xran_updl_seq_id_num[xran_port][0][0];
+ }
+ else
+{
+ rte_panic("incorrect fh_init.io_cfg.id");
+ }
+
+ if (staticComp == XRAN_COMP_HDR_TYPE_STATIC)
+ {
+ compMeth_ini = p_dev_ctx->fh_cfg.ru_conf.compMeth;
+ iqWidth_ini = p_dev_ctx->fh_cfg.ru_conf.iqWidth;
+}
+
+ for (i = 0; i < MBUFS_CNT; i++)
+{
+ pkt_size[i] = pkt_q[i]->pkt_len;
+ buf_start[i] = (char*)pkt_q[i]->buf_addr;
+ start_off[i] = pkt_q[i]->data_off;
+}
+
+ if (expect_comp && (staticComp != XRAN_COMP_HDR_TYPE_STATIC))
+ {
+#pragma vector always
+ for (i = 0; i < MBUFS_CNT; i++)
+ {
+#if XRAN_MLOG_VAR
+ mlogVarCnt = 0;
+#endif
+ ecpri_hdr[i] = (void*)(buf_start[i] + start_off[i]);
+ radio_hdr[i] = (void*)(buf_start[i] + start_off[i] + ecpri_size);
+ data_hdr[i] = (void*)(buf_start[i] + start_off[i] + ecpri_size + rad_size);
+ data_compr_hdr[i] = (void*)(buf_start[i] + start_off[i] + ecpri_size + rad_size + data_size);
+ seq[i] = ecpri_hdr[i]->ecpri_seq_id;
+ seq_id[i] = seq[i].bits.seq_id;
+ last[i] = seq[i].bits.e_bit;
+
+ iq_offset[i] = ecpri_size + rad_size + data_size + compr_size;
+
+ iq_samp_buf[i] = (void*)(buf_start[i] + start_off[i] + iq_offset[i]);
+ num_bytes[i] = pkt_size[i] - iq_offset[i];
+
+ if (ecpri_hdr[i] == NULL ||
+ radio_hdr[i] == NULL ||
+ data_hdr[i] == NULL ||
+ data_compr_hdr[i] == NULL ||
+ iq_samp_buf[i] == NULL)
+ {
+ num_bytes[i] = 0; /* packet too short */
+ }
+
+#if XRAN_MLOG_VAR
+ if(radio_hdr[i] != NULL && data_hdr[i] != NULL)
+ {
+ mlogVar[mlogVarCnt++] = 0xBBBBBBBB;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_tti;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->frame_id;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->sf_slot_sym.subframe_id;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->sf_slot_sym.slot_id;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->sf_slot_sym.symb_id;
+ mlogVar[mlogVarCnt++] = data_hdr[i]->fields.sect_id;
+ mlogVar[mlogVarCnt++] = data_hdr[i]->fields.start_prbu;
+ mlogVar[mlogVarCnt++] = data_hdr[i]->fields.num_prbu;
+ mlogVar[mlogVarCnt++] = rte_pktmbuf_pkt_len(pkt_q[i]);
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+ }
+#endif
+ }
+ }
+ else
+ {
+#pragma vector always
+ for (i = 0; i < MBUFS_CNT; i++)
+ {
+#if XRAN_MLOG_VAR
+ mlogVarCnt = 0;
+#endif
+ ecpri_hdr[i] = (void*)(buf_start[i] + start_off[i]);
+ radio_hdr[i] = (void*)(buf_start[i] + start_off[i] + ecpri_size);
+ data_hdr[i] = (void*)(buf_start[i] + start_off[i] + ecpri_size + rad_size);
+ seq[i] = ecpri_hdr[i]->ecpri_seq_id;
+ seq_id[i] = seq[i].bits.seq_id;
+ last[i] = seq[i].bits.e_bit;
+
+ iq_offset[i] = ecpri_size + rad_size + data_size;
+ iq_samp_buf[i] = (void*)(buf_start[i] + start_off[i] + iq_offset[i]);
+ num_bytes[i] = pkt_size[i] - iq_offset[i];
+
+ if (ecpri_hdr[i] == NULL ||
+ radio_hdr[i] == NULL ||
+ data_hdr[i] == NULL ||
+ iq_samp_buf[i] == NULL)
+ {
+ num_bytes[i] = 0; /* packet too short */
+ }
+
+#if XRAN_MLOG_VAR
+ if (radio_hdr[i] != NULL && data_hdr[i] != NULL)
+ {
+ mlogVar[mlogVarCnt++] = 0xBBBBBBBB;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_tti;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->frame_id;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->sf_slot_sym.subframe_id;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->sf_slot_sym.slot_id;
+ mlogVar[mlogVarCnt++] = radio_hdr[i]->sf_slot_sym.symb_id;
+ mlogVar[mlogVarCnt++] = data_hdr[i]->fields.sect_id;
+ mlogVar[mlogVarCnt++] = data_hdr[i]->fields.start_prbu;
+ mlogVar[mlogVarCnt++] = data_hdr[i]->fields.num_prbu;
+ mlogVar[mlogVarCnt++] = rte_pktmbuf_pkt_len(pkt_q[i]);
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+ }
+#endif
+ }
+ }
+
+ for (i = 0; i < MBUFS_CNT; i++) {
+ if(p_cid->ccId == 0xFF && p_cid->ruPortId == 0xFF) {
+ cid[i] = rte_be_to_cpu_16((uint16_t)ecpri_hdr[i]->ecpri_xtc_id);
+ if (num_bytes[i] > 0) {
+ CC_ID[i] = (cid[i] & conf->mask_ccId) >> conf->bit_ccId;
+ Ant_ID[i] = (cid[i] & conf->mask_ruPortId) >> conf->bit_ruPortId;
+ }
+ } else {
+ if (num_bytes[i] > 0) {
+ CC_ID[i] = p_cid->ccId;
+ Ant_ID[i] = p_cid->ruPortId;
+ }
+ }
+ }
+
+ for (i = 0; i < MBUFS_CNT; i++)
+ {
+ radio_hdr[i]->sf_slot_sym.value = rte_be_to_cpu_16(radio_hdr[i]->sf_slot_sym.value);
+ data_hdr[i]->fields.all_bits = rte_be_to_cpu_32(data_hdr[i]->fields.all_bits);
+ }