/******************************************************************************
*
-* Copyright (c) 2019 Intel.
+* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* @author Intel Corporation
**/
-#ifndef _XRAN_TASK_ID_H_
-#define _XRAN_TASK_ID_H_
+#ifndef _XRAN_LIB_TASK_ID_H_
+#define _XRAN_LIB_TASK_ID_H_
#ifdef __cplusplus
extern "C" {
//--------------------------------------------------------------------
// POLLING
//--------------------------------------------------------------------
+#define PID_XRAN_MAIN 101
+
#define PID_XRAN_BBDEV_DL_POLL 51
#define PID_XRAN_BBDEV_DL_POLL_DISPATCH 52
#define PID_XRAN_BBDEV_UL_POLL 53
#define PID_TTI_CB 2101
#define PID_SYM_TIMER 2102
-#define PID_GNB_PROC_TIMING_TIMEOUT 2103
+//#define PID_GNB_PROC_TIMING_TIMEOUT 2103
#define PID_TIME_SYSTIME_POLL 2104
#define PID_TIME_SYSTIME_STOP 2105
#define PID_TIME_ARM_TIMER 2106
#define PID_TIME_ARM_TIMER_DEADLINE 2107
-
+#define PID_TIME_ARM_USER_TIMER_DEADLINE 2108
#define PID_RADIO_FREQ_RX_PKT 2400
#define PID_RADIO_TX_PLAY_BACK_IQ 2415
#define PID_PROCESS_TX_SYM 2416
+#define PID_DISPATCH_TX_SYM 2417
+#define PID_PREPARE_TX_PKT 2418
+#define PID_ATTACH_EXT_BUF 2419
+#define PID_ETH_ENQUEUE_BURST 2420
#define PID_CP_DL_CB 2500
#define PID_CP_UL_CB 2501
#define PID_FULL_SLOT_CB_TO_PHY 2506
#define PID_UP_UL_HALF_DEAD_LINE_CB 2507
#define PID_UP_UL_FULL_DEAD_LINE_CB 2508
+#define PID_UP_UL_USER_DEAD_LINE_CB 2509
#define PID_PROCESS_UP_PKT 2600
+#define PID_PROCESS_UP_PKT_SRS 2601
+#define PID_PROCESS_UP_PKT_PARSE 2602
#define PID_PROCESS_CP_PKT 2700
+#define PID_PROCESS_DELAY_MEAS_PKT 2800
#ifdef __cplusplus
}
#endif
-#endif /* _XRAN_TASK_ID_H_ */
-
+#endif /* _XRAN_LIB_TASK_ID_H_ */