Update to odulow per maintenance bronze
[o-du/phy.git] / fhi_lib / app / usecase / mu0_10mhz / 12 / config_file_o_ru.dat
index 7dcff57..5a5d228 100644 (file)
 
 
 # This is simple configuration file. Use '#' sign for comments
-appMode=1 # lls-CU(0) | RU(1)
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
 xranMode=0 # Category A  (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
-ccNum=12 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
-antNum=4 # Number of Antennas per CC (default: 4)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B 
 
 ##Numerology
 mu=0 #15Khz Sub Carrier Spacing
@@ -36,117 +37,126 @@ nULFftSize=1024
 nFrameDuplexType=0 # 0 - FDD 1 - TDD
 nTddPeriod=0 #TDD priod e.g. DDDS 4
 
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single 
  #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
 Gps_Alpha=0    #alpha and beta value as in section 9.7.2 of ORAN spec
 Gps_Beta=0
 
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
-#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump
-ruMac=00:11:22:33:44:55  #RU VF for RU app
+ioCore=10
+# Eth 0
+duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app
+duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+#Eth 1
+duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF
+ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app
+duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF
+ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app
 
 numSlots=40 #number of slots per IQ files
 
-antC0=./usecase/mu0_10mhz/12/ant_0.bin    #CC0
-antC1=./usecase/mu0_10mhz/12/ant_1.bin    #CC0
-antC2=./usecase/mu0_10mhz/12/ant_2.bin    #CC0
-antC3=./usecase/mu0_10mhz/12/ant_3.bin    #CC0
-antC4=./usecase/mu0_10mhz/12/ant_4.bin    #CC1
-antC5=./usecase/mu0_10mhz/12/ant_5.bin    #CC1
-antC6=./usecase/mu0_10mhz/12/ant_6.bin    #CC1
-antC7=./usecase/mu0_10mhz/12/ant_7.bin    #CC1
-antC8=./usecase/mu0_10mhz/12/ant_8.bin    #CC2
-antC9=./usecase/mu0_10mhz/12/ant_9.bin    #CC2
-antC10=./usecase/mu0_10mhz/12/ant_10.bin  #CC2
-antC11=./usecase/mu0_10mhz/12/ant_11.bin  #CC2
-antC12=./usecase/mu0_10mhz/12/ant_12.bin  #CC3
-antC13=./usecase/mu0_10mhz/12/ant_13.bin  #CC3
-antC14=./usecase/mu0_10mhz/12/ant_14.bin  #CC3
-antC15=./usecase/mu0_10mhz/12/ant_15.bin  #CC3
-antC16=./usecase/mu0_10mhz/12/ant_0.bin   #CC4
-antC17=./usecase/mu0_10mhz/12/ant_1.bin   #CC4
-antC18=./usecase/mu0_10mhz/12/ant_2.bin   #CC4
-antC19=./usecase/mu0_10mhz/12/ant_3.bin   #CC4
-antC20=./usecase/mu0_10mhz/12/ant_4.bin   #CC5
-antC21=./usecase/mu0_10mhz/12/ant_5.bin   #CC5
-antC22=./usecase/mu0_10mhz/12/ant_6.bin   #CC5
-antC23=./usecase/mu0_10mhz/12/ant_7.bin   #CC5
-antC24=./usecase/mu0_10mhz/12/ant_8.bin   #CC6
-antC25=./usecase/mu0_10mhz/12/ant_9.bin   #CC6
-antC26=./usecase/mu0_10mhz/12/ant_10.bin  #CC6
-antC27=./usecase/mu0_10mhz/12/ant_11.bin  #CC6
-antC28=./usecase/mu0_10mhz/12/ant_12.bin  #CC7
-antC29=./usecase/mu0_10mhz/12/ant_13.bin  #CC7
-antC30=./usecase/mu0_10mhz/12/ant_14.bin  #CC7
-antC31=./usecase/mu0_10mhz/12/ant_15.bin  #CC7
-antC32=./usecase/mu0_10mhz/12/ant_0.bin   #CC8
-antC33=./usecase/mu0_10mhz/12/ant_1.bin   #CC8
-antC34=./usecase/mu0_10mhz/12/ant_2.bin   #CC8
-antC35=./usecase/mu0_10mhz/12/ant_3.bin   #CC8
-antC36=./usecase/mu0_10mhz/12/ant_4.bin   #CC9
-antC37=./usecase/mu0_10mhz/12/ant_5.bin   #CC9
-antC38=./usecase/mu0_10mhz/12/ant_6.bin   #CC9
-antC39=./usecase/mu0_10mhz/12/ant_7.bin   #CC9
-antC40=./usecase/mu0_10mhz/12/ant_8.bin   #CC10
-antC41=./usecase/mu0_10mhz/12/ant_9.bin   #CC10
-antC42=./usecase/mu0_10mhz/12/ant_10.bin  #CC10
-antC43=./usecase/mu0_10mhz/12/ant_11.bin  #CC10
-antC44=./usecase/mu0_10mhz/12/ant_12.bin  #CC11
-antC45=./usecase/mu0_10mhz/12/ant_13.bin  #CC11
-antC46=./usecase/mu0_10mhz/12/ant_14.bin  #CC11
-antC47=./usecase/mu0_10mhz/12/ant_15.bin  #CC11
-
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+antC0=./usecase/mu0_10mhz/ant_0.bin    #CC0
+antC1=./usecase/mu0_10mhz/ant_1.bin    #CC0
+antC2=./usecase/mu0_10mhz/ant_2.bin    #CC0
+antC3=./usecase/mu0_10mhz/ant_3.bin    #CC0
+antC4=./usecase/mu0_10mhz/ant_0.bin    #CC1
+antC5=./usecase/mu0_10mhz/ant_1.bin    #CC1
+antC6=./usecase/mu0_10mhz/ant_2.bin    #CC1
+antC7=./usecase/mu0_10mhz/ant_3.bin    #CC1
+antC8=./usecase/mu0_10mhz/ant_0.bin    #CC2
+antC9=./usecase/mu0_10mhz/ant_1.bin    #CC2
+antC10=./usecase/mu0_10mhz/ant_2.bin  #CC2
+antC11=./usecase/mu0_10mhz/ant_3.bin  #CC2
+antC12=./usecase/mu0_10mhz/ant_0.bin  #CC3
+antC13=./usecase/mu0_10mhz/ant_1.bin  #CC3
+antC14=./usecase/mu0_10mhz/ant_2.bin  #CC3
+antC15=./usecase/mu0_10mhz/ant_3.bin  #CC3
+antC16=./usecase/mu0_10mhz/ant_0.bin   #CC4
+antC17=./usecase/mu0_10mhz/ant_1.bin   #CC4
+antC18=./usecase/mu0_10mhz/ant_2.bin   #CC4
+antC19=./usecase/mu0_10mhz/ant_3.bin   #CC4
+antC20=./usecase/mu0_10mhz/ant_0.bin   #CC5
+antC21=./usecase/mu0_10mhz/ant_1.bin   #CC5
+antC22=./usecase/mu0_10mhz/ant_2.bin   #CC5
+antC23=./usecase/mu0_10mhz/ant_3.bin   #CC5
+antC24=./usecase/mu0_10mhz/ant_0.bin   #CC6
+antC25=./usecase/mu0_10mhz/ant_1.bin   #CC6
+antC26=./usecase/mu0_10mhz/ant_2.bin  #CC6
+antC27=./usecase/mu0_10mhz/ant_3.bin  #CC6
+antC28=./usecase/mu0_10mhz/ant_0.bin  #CC7
+antC29=./usecase/mu0_10mhz/ant_1.bin  #CC7
+antC30=./usecase/mu0_10mhz/ant_2.bin  #CC7
+antC31=./usecase/mu0_10mhz/ant_3.bin  #CC7
+antC32=./usecase/mu0_10mhz/ant_0.bin   #CC8
+antC33=./usecase/mu0_10mhz/ant_1.bin   #CC8
+antC34=./usecase/mu0_10mhz/ant_2.bin   #CC8
+antC35=./usecase/mu0_10mhz/ant_3.bin   #CC8
+antC36=./usecase/mu0_10mhz/ant_0.bin   #CC9
+antC37=./usecase/mu0_10mhz/ant_1.bin   #CC9
+antC38=./usecase/mu0_10mhz/ant_2.bin   #CC9
+antC39=./usecase/mu0_10mhz/ant_3.bin   #CC9
+antC40=./usecase/mu0_10mhz/ant_0.bin   #CC10
+antC41=./usecase/mu0_10mhz/ant_1.bin   #CC10
+antC42=./usecase/mu0_10mhz/ant_2.bin  #CC10
+antC43=./usecase/mu0_10mhz/ant_3.bin  #CC10
+antC44=./usecase/mu0_10mhz/ant_0.bin  #CC11
+antC45=./usecase/mu0_10mhz/ant_1.bin  #CC11
+antC46=./usecase/mu0_10mhz/ant_2.bin  #CC11
+antC47=./usecase/mu0_10mhz/ant_3.bin  #CC11
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
 prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
 
-antPrachC0=./usecase/mu0_10mhz/12/ant_0.bin
-antPrachC1=./usecase/mu0_10mhz/12/ant_1.bin
-antPrachC2=./usecase/mu0_10mhz/12/ant_2.bin
-antPrachC3=./usecase/mu0_10mhz/12/ant_3.bin
-antPrachC4=./usecase/mu0_10mhz/12/ant_4.bin
-antPrachC5=./usecase/mu0_10mhz/12/ant_5.bin
-antPrachC6=./usecase/mu0_10mhz/12/ant_6.bin
-antPrachC7=./usecase/mu0_10mhz/12/ant_7.bin
-antPrachC8=./usecase/mu0_10mhz/12/ant_8.bin
-antPrachC9=./usecase/mu0_10mhz/12/ant_9.bin
-antPrachC10=./usecase/mu0_10mhz/12/ant_10.bin
-antPrachC11=./usecase/mu0_10mhz/12/ant_11.bin
-antPrachC12=./usecase/mu0_10mhz/12/ant_12.bin
-antPrachC13=./usecase/mu0_10mhz/12/ant_13.bin
-antPrachC14=./usecase/mu0_10mhz/12/ant_14.bin
-antPrachC15=./usecase/mu0_10mhz/12/ant_15.bin
-antPrachC16=./usecase/mu0_10mhz/12/ant_0.bin
-antPrachC17=./usecase/mu0_10mhz/12/ant_1.bin
-antPrachC18=./usecase/mu0_10mhz/12/ant_2.bin
-antPrachC19=./usecase/mu0_10mhz/12/ant_3.bin
-antPrachC20=./usecase/mu0_10mhz/12/ant_4.bin
-antPrachC21=./usecase/mu0_10mhz/12/ant_5.bin
-antPrachC22=./usecase/mu0_10mhz/12/ant_6.bin
-antPrachC23=./usecase/mu0_10mhz/12/ant_7.bin
-antPrachC24=./usecase/mu0_10mhz/12/ant_8.bin
-antPrachC25=./usecase/mu0_10mhz/12/ant_9.bin
-antPrachC26=./usecase/mu0_10mhz/12/ant_10.bin
-antPrachC27=./usecase/mu0_10mhz/12/ant_11.bin
-antPrachC28=./usecase/mu0_10mhz/12/ant_12.bin
-antPrachC29=./usecase/mu0_10mhz/12/ant_13.bin
-antPrachC30=./usecase/mu0_10mhz/12/ant_14.bin
-antPrachC31=./usecase/mu0_10mhz/12/ant_15.bin
-antPrachC32=./usecase/mu0_10mhz/12/ant_0.bin
-antPrachC33=./usecase/mu0_10mhz/12/ant_1.bin
-antPrachC34=./usecase/mu0_10mhz/12/ant_2.bin
-antPrachC35=./usecase/mu0_10mhz/12/ant_3.bin
-antPrachC36=./usecase/mu0_10mhz/12/ant_4.bin
-antPrachC37=./usecase/mu0_10mhz/12/ant_5.bin
-antPrachC38=./usecase/mu0_10mhz/12/ant_6.bin
-antPrachC39=./usecase/mu0_10mhz/12/ant_7.bin
-antPrachC40=./usecase/mu0_10mhz/12/ant_8.bin
-antPrachC41=./usecase/mu0_10mhz/12/ant_9.bin
-antPrachC42=./usecase/mu0_10mhz/12/ant_10.bin
-antPrachC43=./usecase/mu0_10mhz/12/ant_11.bin
-antPrachC44=./usecase/mu0_10mhz/12/ant_12.bin
-antPrachC45=./usecase/mu0_10mhz/12/ant_13.bin
-antPrachC46=./usecase/mu0_10mhz/12/ant_14.bin
-antPrachC47=./usecase/mu0_10mhz/12/ant_15.bin
+antPrachC0=./usecase/mu0_10mhz/ant_0.bin  
+antPrachC1=./usecase/mu0_10mhz/ant_1.bin  
+antPrachC2=./usecase/mu0_10mhz/ant_2.bin  
+antPrachC3=./usecase/mu0_10mhz/ant_3.bin  
+antPrachC4=./usecase/mu0_10mhz/ant_0.bin  
+antPrachC5=./usecase/mu0_10mhz/ant_1.bin  
+antPrachC6=./usecase/mu0_10mhz/ant_2.bin  
+antPrachC7=./usecase/mu0_10mhz/ant_3.bin  
+antPrachC8=./usecase/mu0_10mhz/ant_0.bin  
+antPrachC9=./usecase/mu0_10mhz/ant_1.bin  
+antPrachC10=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC11=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC12=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC13=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC14=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC15=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC16=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC17=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC18=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC19=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC20=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC21=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC22=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC23=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC24=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC25=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC26=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC27=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC28=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC29=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC30=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC31=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC32=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC33=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC34=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC35=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC36=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC37=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC38=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC39=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC40=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC41=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC42=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC43=./usecase/mu0_10mhz/ant_3.bin 
+antPrachC44=./usecase/mu0_10mhz/ant_0.bin 
+antPrachC45=./usecase/mu0_10mhz/ant_1.bin 
+antPrachC46=./usecase/mu0_10mhz/ant_2.bin 
+antPrachC47=./usecase/mu0_10mhz/ant_3.bin 
 
 
 
@@ -157,22 +167,24 @@ nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to
 ##Debug
 debugStop=1 #stop app on 1pps boundary (gps_second % 30)
 debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
 
 CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
 c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
 u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
 
 ##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
 Tadv_cp_dl=25 #in us  TODO: update per RU implementation
               #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
 
 #Reception Window C-plane DL
-T2a_min_cp_dl=400  #in us
-T2a_max_cp_dl=1120 #in us
+T2a_min_cp_dl=400  #in us  
+T2a_max_cp_dl=1120 #in us 
 
 #Reception Window C-plane UL
-T2a_min_cp_ul=400 #in us
-T2a_max_cp_ul=1120 #in us
+T2a_min_cp_ul=400 #in us  
+T2a_max_cp_ul=1120 #in us 
 
 #Reception Window U-plane
 T2a_min_up=200  # in us