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O-RAN E Maintenance Release contribution for ODULOW
[o-du/phy.git] / fhi_lib / app / usecase / cat_b / mu1_100mhz / 502 / config_file_o_ru.dat
diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat
new file mode 100644 (file)
index 0000000..97c9ac9
--- /dev/null
+++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat
@@ -0,0 +1,289 @@
+#******************************************************************************
+#
+#   Copyright (c) 2019 Intel.
+#
+#   Licensed under the Apache License, Version 2.0 (the "License");
+#   you may not use this file except in compliance with the License.
+#   You may obtain a copy of the License at
+#
+#       http://www.apache.org/licenses/LICENSE-2.0
+#
+#   Unless required by applicable law or agreed to in writing, software
+#   distributed under the License is distributed on an "AS IS" BASIS,
+#   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#   See the License for the specific language governing permissions and
+#   limitations under the License.
+#
+#******************************************************************************/
+
+#Peak
+#4%
+#302   TDD     DDDFU: S it's 10:2:2    1       64T64R  100     8       8       37%     100     1200    37%     100     1200    Peak: 4 %
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A  (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0    #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+numSlots=20 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin   #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin   #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin   #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin   #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin   #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin   #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin   #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin   #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin   #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin   #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin   #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin   #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin   #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin   #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin   #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin   #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin   #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin   #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin   #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin   #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin  #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin  #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin  #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin  #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin  #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin  #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=1 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=1 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+max_sections_per_slot=12
+max_sections_per_symbol=12
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,18,0,14,0,1,1,9,1
+PrbElemDl1=18,18,0,14,1,1,1,9,1
+PrbElemDl2=36,18,0,14,2,1,1,9,1
+PrbElemDl3=54,18,0,14,3,1,1,9,1
+PrbElemDl4=72,18,0,14,4,1,1,9,1
+PrbElemDl5=90,10,0,14,5,1,1,9,1
+
+# Extension Parameters for Beamforming weights
+# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth
+ExtBfwDl0=2,9,0,0,9,1
+ExtBfwDl1=2,9,0,0,9,1
+ExtBfwDl2=2,9,0,0,9,1
+ExtBfwDl3=2,9,0,0,9,1
+ExtBfwDl4=2,9,0,0,9,1
+ExtBfwDl5=2,5,0,0,9,1
+
+
+nPrbElemUl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,18,0,14,0,1,1,9,1
+PrbElemUl1=18,18,0,14,1,1,1,9,1
+PrbElemUl2=36,18,0,14,2,1,1,9,1
+PrbElemUl3=54,18,0,14,3,1,1,9,1
+PrbElemUl4=72,18,0,14,4,1,1,9,1
+PrbElemUl5=90,10,0,14,5,1,1,9,1
+
+# Extension Parameters for Beamforming weights
+# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth
+ExtBfwUl0=2,9,0,0,9,1
+ExtBfwUl1=2,9,0,0,9,1
+ExtBfwUl2=2,9,0,0,9,1
+ExtBfwUl3=2,9,0,0,9,1
+ExtBfwUl4=2,9,0,0,9,1
+ExtBfwUl5=2,5,0,0,9,1
+
+
+nPrbElemSrs=11
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+PrbElemSrs0=0,30,0,1,0,0,1,9,0
+PrbElemSrs1=30,30,0,1,0,0,1,9,0
+PrbElemSrs2=60,30,0,1,0,0,1,9,0
+PrbElemSrs3=90,30,0,1,0,0,1,9,0
+PrbElemSrs4=120,30,0,1,0,0,1,9,0
+PrbElemSrs5=150,30,0,1,0,0,1,9,0
+PrbElemSrs6=180,30,0,1,0,0,1,9,0
+PrbElemSrs7=210,30,0,1,0,0,1,9,0
+PrbElemSrs8=240,30,0,1,0,0,1,9,0
+PrbElemSrs9=270,30,0,1,0,0,1,9,0
+PrbElemSrs10=270,3,0,1,0,0,1,9,0
+
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=64 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+              # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71  # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96  #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0  # in us
+Ta4_max=75 # in us
+###########################################################
+
O-RAN DU Physical Layer