O-RAN E Maintenance Release contribution for ODULOW

[o-du/phy.git] / fhi_lib / app / usecase / cat_a / mu1_100mhz / 2 / config_file_o_ru.dat

diff --git a/fhi_lib/app/usecase/mu1_100mhz/2/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat
similarity index 73%
rename from fhi_lib/app/usecase/mu1_100mhz/2/config_file_o_ru.dat
rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat
index 196e763..86e3219 100644 (file)
--- a/fhi_lib/app/usecase/mu1_100mhz/2/config_file_o_ru.dat
+++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat
@@ -36,7 +36,7 @@ nDLFftSize=4096
 nULFftSize=4096
 
 nFrameDuplexType=0 # 0 - FDD 1 - TDD
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it\92s 6:4:4
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it�s 6:4:4
 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
 sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
 sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
@@ -48,7 +48,7 @@ sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
 sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
 sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
 
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single 
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
  #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
 Gps_Alpha=0    #alpha and beta value as in section 9.7.2 of ORAN spec
 Gps_Beta=0
@@ -65,40 +65,40 @@ ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app
 duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF
 ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app
 
-numSlots=40 #number of slots per IQ files
-antC0=./usecase/mu1_100mhz/ant_0.bin   #CC0
-antC1=./usecase/mu1_100mhz/ant_1.bin   #CC0
-antC2=./usecase/mu1_100mhz/ant_2.bin   #CC0
-antC3=./usecase/mu1_100mhz/ant_3.bin   #CC0
-antC4=./usecase/mu1_100mhz/ant_4.bin   #CC1
-antC5=./usecase/mu1_100mhz/ant_5.bin   #CC1
-antC6=./usecase/mu1_100mhz/ant_6.bin   #CC1
-antC7=./usecase/mu1_100mhz/ant_7.bin   #CC1
-antC8=./usecase/mu1_100mhz/ant_8.bin   #CC2
-antC9=./usecase/mu1_100mhz/ant_9.bin   #CC2
-antC10=./usecase/mu1_100mhz/ant_10.bin #CC2
-antC11=./usecase/mu1_100mhz/ant_11.bin #CC2
-antC12=./usecase/mu1_100mhz/ant_12.bin #CC3
-antC13=./usecase/mu1_100mhz/ant_13.bin #CC3
-antC14=./usecase/mu1_100mhz/ant_14.bin #CC3
-antC15=./usecase/mu1_100mhz/ant_15.bin #CC3
-
-antPrachC0=./usecase/mu1_100mhz/ant_0.bin   #CC0
-antPrachC1=./usecase/mu1_100mhz/ant_1.bin   #CC0
-antPrachC2=./usecase/mu1_100mhz/ant_2.bin   #CC0
-antPrachC3=./usecase/mu1_100mhz/ant_3.bin   #CC0
-antPrachC4=./usecase/mu1_100mhz/ant_4.bin   #CC1
-antPrachC5=./usecase/mu1_100mhz/ant_5.bin   #CC1
-antPrachC6=./usecase/mu1_100mhz/ant_6.bin   #CC1
-antPrachC7=./usecase/mu1_100mhz/ant_7.bin   #CC1
-antPrachC8=./usecase/mu1_100mhz/ant_8.bin   #CC2
-antPrachC9=./usecase/mu1_100mhz/ant_9.bin   #CC2
-antPrachC10=./usecase/mu1_100mhz/ant_10.bin #CC2
-antPrachC11=./usecase/mu1_100mhz/ant_11.bin #CC2
-antPrachC12=./usecase/mu1_100mhz/ant_12.bin #CC3
-antPrachC13=./usecase/mu1_100mhz/ant_13.bin #CC3
-antPrachC14=./usecase/mu1_100mhz/ant_14.bin #CC3
-antPrachC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+numSlots=20 #number of slots per IQ files
+antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin   #CC0
+antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin   #CC0
+antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin   #CC0
+antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin   #CC0
+antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin   #CC1
+antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin   #CC1
+antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin   #CC1
+antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin   #CC1
+antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin   #CC2
+antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin   #CC2
+antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2
+antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2
+antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3
+antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3
+antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3
+antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3
+
+antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin   #CC0
+antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin   #CC0
+antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin   #CC0
+antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin   #CC0
+antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin   #CC1
+antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin   #CC1
+antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin   #CC1
+antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin   #CC1
+antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin   #CC2
+antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin   #CC2
+antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2
+antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2
+antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3
+antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3
+antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3
+antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3
 
 rachEanble=0 # Enable (1)| disable (0) PRACH configuration
 prachConfigIndex=1