1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
21 #include "xran_fh_o_du.h"
22 #include "xran_cp_api.h"
23 #include "xran_lib_wrap.hpp"
24 #include "xran_common.h"
35 const std::string module_name = "init_sys_functional";
37 extern enum xran_if_state xran_if_current_state;
39 int32_t physide_sym_call_back(void * param, struct xran_sense_of_time *time)
45 int physide_dl_tti_call_back(void * param)
51 int physide_ul_half_slot_call_back(void * param)
57 int physide_ul_full_slot_call_back(void * param)
63 void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
69 void xran_fh_srs_callback(void *pCallbackTag, xran_status_t status)
76 void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
82 class Init_Sys_Check : public KernelTests
89 xranlib->Open(0, nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback, (void *)xran_fh_srs_callback);
92 /* It's called after an execution of the each test case.*/
93 void TearDown() override
101 BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
102 BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
103 BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
104 BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
105 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
108 struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
109 struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
110 struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
111 struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
112 struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
114 void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
115 uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][xranLibWraper::MAX_SW_XRAN_INTERFACE_NUM];
116 uint16_t nInstanceNum;
119 TEST_P(Init_Sys_Check, Test_Open_Close)
121 struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
122 /* check stat of lib */
123 ASSERT_EQ(1, p_xran_dev_ctx->enableCP);
124 ASSERT_EQ(1, p_xran_dev_ctx->xran2phy_mem_ready);
127 TEST_P(Init_Sys_Check, Test_xran_mm_init)
130 ret = xran_mm_init (xranlib->get_xranhandle(), (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
134 /* this case cannot be tested since memory cannot be initialized twice */
135 /* memory initialization is moved to the wrapper class */
137 TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)
142 uint32_t nSW_ToFpga_FTH_TxBufferLen = 13168; /* 273*12*4 + 64*/
146 struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
147 struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
148 struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
149 struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
150 struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
151 struct xran_buffer_list *pFthRxRachBufferDecomp[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
153 Init_Sys_Check::nInstanceNum = xranlib->get_num_cc();
155 for (k = 0; k < XRAN_PORTS_NUM; k++) {
156 ret = xran_sector_get_instances (xranlib->get_xranhandle(), Init_Sys_Check::nInstanceNum, &(Init_Sys_Check::nInstanceHandle[k][0]));
158 ASSERT_EQ(1, Init_Sys_Check::nInstanceNum);
162 ret = xran_bm_init(Init_Sys_Check::nInstanceHandle[0][0],
163 &Init_Sys_Check::nBufPoolIndex[0][0],
164 XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
167 ret = xran_bm_allocate_buffer(Init_Sys_Check::nInstanceHandle[0][0], Init_Sys_Check::nBufPoolIndex[0][0],&ptr, &mb);
169 ASSERT_NE(ptr, nullptr);
170 ASSERT_NE(mb, nullptr);
172 ret = xran_bm_free_buffer(Init_Sys_Check::nInstanceHandle[0][0], ptr, mb);
177 for(int i=0; i< xranlib->get_num_cc(); i++)
179 for(int j=0; j<XRAN_N_FE_BUF_LEN; j++)
181 for(int z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
182 pFthTxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
183 pFthTxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
184 pFthRxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
185 pFthRxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
186 pFthRxRachBuffer[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
187 pFthRxRachBufferDecomp[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList);
192 if(NULL != Init_Sys_Check::nInstanceHandle[0])
194 for (int i = 0; i < xranlib->get_num_cc(); i++)
196 ret = xran_5g_fronthault_config (Init_Sys_Check::nInstanceHandle[0][i],
198 pFthTxPrbMapBuffer[i],
200 pFthRxPrbMapBuffer[i],
201 xran_fh_rx_callback, &pFthRxBuffer[i][0]);
206 // add prach callback here
207 for (int i = 0; i < xranlib->get_num_cc(); i++)
209 ret = xran_5g_prach_req(Init_Sys_Check::nInstanceHandle[0][i], pFthRxRachBuffer[i], pFthRxRachBufferDecomp[i],
210 xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
219 TEST_P(Init_Sys_Check, Test_xran_get_common_counters)
222 struct xran_common_counters x_counters;
224 ret = xran_get_common_counters(xranlib->get_xranhandle(), &x_counters);
227 ASSERT_EQ(0, x_counters.Rx_on_time);
228 ASSERT_EQ(0, x_counters.Rx_early);
229 ASSERT_EQ(0, x_counters.Rx_late);
230 ASSERT_EQ(0, x_counters.Rx_corrupt);
231 ASSERT_EQ(0, x_counters.Rx_pkt_dupl);
232 ASSERT_EQ(0, x_counters.Total_msgs_rcvd);
235 TEST_P(Init_Sys_Check, Test_xran_get_slot_idx)
237 #define NUM_OF_SUBFRAME_PER_FRAME 10
238 int32_t nNrOfSlotInSf = 1;
241 uint32_t nSubframeIdx;
245 uint32_t nXranTime = xran_get_slot_idx(0, &nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
246 nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
247 + nSubframeIdx*nNrOfSlotInSf
250 ASSERT_EQ(0, nSfIdx);
253 TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb)
255 struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
257 ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
259 ASSERT_EQ(physide_dl_tti_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]);
260 ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);
261 ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]);
263 ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
265 ASSERT_EQ(physide_ul_half_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]);
266 ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]);
267 ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]);
269 ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
271 ASSERT_EQ(physide_ul_full_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]);
272 ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_FULL_SLOT_RX]);
273 ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_FULL_SLOT_RX]);
277 TEST_P(Init_Sys_Check, Test_xran_reg_sym_cb){
279 ret = xran_reg_sym_cb(xranlib->get_xranhandle(), physide_sym_call_back, NULL, NULL, 11, XRAN_CB_SYM_RX_WIN_END);
283 TEST_P(Init_Sys_Check, Test_xran_mm_destroy){
285 ret = xran_mm_destroy(xranlib->get_xranhandle());
289 TEST_P(Init_Sys_Check, Test_xran_start_stop){
291 ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);
292 ret = xranlib->Start();
294 ASSERT_EQ(XRAN_RUNNING, xran_if_current_state);
295 ret = xranlib->Stop();
297 ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);
300 INSTANTIATE_TEST_CASE_P(UnitTest, Init_Sys_Check,
301 testing::ValuesIn(get_sequence(Init_Sys_Check::get_number_of_cases("init_sys_functional"))));