1 /******************************************************************************
3 * Copyright (c) 2019 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
21 * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and
24 * @ingroup group_source_xran
25 * @author Intel Corporation
28 #ifndef _XRAN_COMMON_H_
29 #define _XRAN_COMMON_H_
34 #include <rte_common.h>
36 #include <rte_timer.h>
38 #include "xran_fh_lls_cu.h"
39 #include "xran_pkt_up.h"
43 #define NUM_OF_PRB_IN_FULL_BAND (66)
44 #define N_SC_PER_PRB 12
45 #define N_SYM_PER_SLOT 14
46 #define N_FULLBAND_SC (NUM_OF_PRB_IN_FULL_BAND*N_SC_PER_PRB)
47 #define MAX_ANT_CARRIER_SUPPORTED 16
48 /* 0.125, just for testing */
49 #define SLOTNUM_PER_SUBFRAME 8
50 #define SUBFRAMES_PER_SYSTEMFRAME 10
51 #define SLOTS_PER_SYSTEMFRAME (SLOTNUM_PER_SUBFRAME*SUBFRAMES_PER_SYSTEMFRAME)
52 #define PDSCH_PAYLOAD_SIZE (N_FULLBAND_SC*4)
53 #define NUM_OF_SLOT_IN_TDD_LOOP (80)
54 #define IQ_PLAYBACK_BUFFER_BYTES (NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*N_FULLBAND_SC*4L)
56 /* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples. The payload length is 3356 octets.*/
57 #define PRACH_PLAYBACK_BUFFER_BYTES (10*839*4L)
59 #define XRAN_MAX_NUM_SECTIONS (NUM_OF_PRB_IN_FULL_BAND) // TODO: need to decide proper value
61 #define XRAN_MAX_MBUF_LEN 9600 /**< jummbo frame */
62 #define NSEC_PER_SEC 1000000000
63 #define TIMER_RESOLUTION_CYCLES 1596*1 /* 1us */
64 #define XRAN_RING_SIZE 512 /*4*14*8 pow of 2 */
65 #define XRAN_NAME_MAX_LEN (64)
66 #define XRAN_RING_NUM (3)
68 #define MAX_NUM_OF_XRAN_CTX (2)
69 #define XranIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_XRAN_CTX-1)) ? 0 : (ctx+1))
70 #define XranDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_XRAN_CTX-1) : (ctx-1))
72 #define XranDiffSymIdx(prevSymIdx, currSymIdx, numTotalSymIdx) ((prevSymIdx > currSymIdx) ? ((currSymIdx + numTotalSymIdx) - prevSymIdx) : (currSymIdx - prevSymIdx))
74 #define XRAN_SYM_JOB_SIZE 512
76 struct send_symbol_cb_args
78 struct rb_map *samp_buf;
87 struct ecpri_seq_id seq;
90 /* PRACH configuration table defines */
91 #define XRAN_PRACH_CANDIDATE_PREAMBLE (2)
92 #define XRAN_PRACH_CANDIDATE_Y (2)
93 #define XRAN_PRACH_CANDIDATE_SLOT (40)
94 #define XRAN_PRACH_CONFIG_TABLE_SIZE (256)
95 #define XRAN_PRACH_PREAMBLE_FORMAT_OF_ABC (9)
114 /* add PRACH used config table, same structure as used in refPHY */
117 uint8_t prachConfigIdx;
118 uint8_t preambleFmrt[XRAN_PRACH_CANDIDATE_PREAMBLE];
120 uint8_t y[XRAN_PRACH_CANDIDATE_Y];
121 uint8_t slotNr[XRAN_PRACH_CANDIDATE_SLOT];
124 uint8_t nrofPrachInSlot;
125 uint8_t occassionsInPrachSlot;
127 } xRANPrachConfigTableStruct;
131 uint8_t preambleFmrt;
136 }xRANPrachPreambleLRAStruct;
147 uint8_t occassionsInPrachSlot;
149 uint8_t y[XRAN_PRACH_CANDIDATE_Y];
150 uint8_t isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];
151 }xRANPrachCPConfigStruct;
154 typedef struct DeviceHandleInfo
156 /**< Structure that contains the information to describe the
157 * instance i.e service type, virtual function, package Id etc..*/
159 /* Unique ID of an handle shared between phy layer and library */
160 /**< number of antennas supported per link*/
161 uint32_t nBufferPoolIndex;
162 /**< Buffer poolIndex*/
163 struct rte_mempool * p_bufferPool[XRAN_MAX_SECTOR_NR];
164 uint32_t bufferPoolElmSz[XRAN_MAX_SECTOR_NR];
165 uint32_t bufferPoolNumElm[XRAN_MAX_SECTOR_NR];
167 }XranLibHandleInfoStruct;
169 typedef void (*XranSymCallbackFn)(struct rte_timer *tim, void* arg);
172 * manage one cell's all Ethernet frames for one DL or UL LTE subframe
175 /* -1-this subframe is not used in current frame format
176 0-this subframe can be transmitted, i.e., data is ready
177 1-this subframe is waiting transmission, i.e., data is not ready
178 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
181 int32_t bValid ; // when UL rx, it is subframe index.
183 int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
184 // -1 means that DL packet to be transmitted is not ready in BS
185 int32_t nSegTransferred; // number of data segments has been transmitted or received
186 struct rte_mbuf *pData[XRAN_N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
187 XRANBufferListStruct sBufferList;
188 } BbuIoBufCtrlStruct;
190 struct xran_sym_job {
193 }__rte_cache_aligned;
195 #define XranIncrementJob(i) ((i >= (XRAN_SYM_JOB_SIZE-1)) ? 0 : (i+1))
201 XRANEAXCIDCONFIG eAxc_id_cfg;
202 XRANFHINIT xran_init_cfg;
203 XRANFHCONFIG xran_fh_cfg;
204 XranLibHandleInfoStruct* pDevHandle;
205 xRANPrachCPConfigStruct PrachCPConfig;
207 char ring_name[XRAN_RING_NUM][XRAN_MAX_SECTOR_NR][RTE_RING_NAMESIZE];
208 struct rte_ring *dl_sym_idx_ring[XRAN_MAX_SECTOR_NR];
209 struct rte_ring *xran2phy_ring[XRAN_MAX_SECTOR_NR];
210 struct rte_ring *xran2prach_ring[XRAN_MAX_SECTOR_NR];
212 struct xran_sym_job sym_job[XRAN_SYM_JOB_SIZE];
213 uint32_t sym_job_idx;
215 BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
216 BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
217 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
220 XRANFlatBufferStruct sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
221 XRANFlatBufferStruct sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
222 XRANFlatBufferStruct sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
224 XranTransportBlockCallbackFn pCallback[XRAN_MAX_SECTOR_NR];
225 void *pCallbackTag[XRAN_MAX_SECTOR_NR];
227 XranTransportBlockCallbackFn pPrachCallback[XRAN_MAX_SECTOR_NR];
228 void *pPrachCallbackTag[XRAN_MAX_SECTOR_NR];
230 XranSymCallbackFn pSymCallback[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
231 void *pSymCallbackTag[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
233 int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */
236 XRANFHTTIPROCCB ttiCb[XRAN_CB_MAX];
237 void *TtiCbParam[XRAN_CB_MAX];
238 uint32_t SkipTti[XRAN_CB_MAX];
240 int xran2phy_mem_ready;
242 int rx_packet_symb_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
243 int rx_packet_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
247 extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_fdd[XRAN_PRACH_CONFIG_TABLE_SIZE];
248 extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_tdd[XRAN_PRACH_CONFIG_TABLE_SIZE];
249 extern const xRANPrachConfigTableStruct gxranPrachDataTable_mmw[XRAN_PRACH_CONFIG_TABLE_SIZE];
250 extern const xRANPrachPreambleLRAStruct gxranPreambleforLRA[XRAN_PRACH_PREAMBLE_FORMAT_OF_ABC];
252 int process_mbuf(struct rte_mbuf *pkt);
253 int process_ring(struct rte_ring *r);
254 int ring_processing_thread(void *args);
255 int packets_dump_thread(void *args);
257 int send_symbol_ex(enum xran_pkt_dir direction,
270 int send_cpmsg_dlul(void *pHandle, enum xran_pkt_dir dir,
271 uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
272 uint8_t startsym, uint8_t numsym, int prb_num,
273 uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id,
276 int send_cpmsg_prach(void *pHandle,
277 uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
278 uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id,
281 uint8_t xran_get_max_sections(void *pHandle);
283 XRANEAXCIDCONFIG *xran_get_conf_eAxC(void *pHandle);
284 uint8_t xran_get_conf_prach_scs(void *pHandle);
285 uint8_t xran_get_conf_fftsize(void *pHandle);
286 uint8_t xran_get_conf_numerology(void *pHandle);
287 uint8_t xran_get_conf_iqwidth(void *pHandle);
288 uint8_t xran_get_conf_compmethod(void *pHandle);
290 uint8_t xran_get_num_cc(void *pHandle);
291 uint8_t xran_get_num_eAxc(void *pHandle);
292 uint8_t xran_get_llscuid(void *pHandle);
293 uint8_t xran_get_sectorid(void *pHandle);
294 struct xran_lib_ctx *xran_lib_get_ctx(void);
296 uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
297 uint8_t xran_get_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);