1 #######################################################################
5 #######################################################################
7 # This is simple configuration file. Use '#' sign for comments
8 instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
9 appMode=0 # lls-CU(0) | RU(1)
10 xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
11 ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
12 antNum=4 # Number of Antennas per CC (default: 4)
15 mu=0 #15Khz Sub Carrier Spacing
16 ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
17 nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
18 nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
19 nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
20 nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
24 nFrameDuplexType=0 # 0 - FDD 1 - TDD
25 nTddPeriod=0 #TDD priod e.g. DDDS 4
27 MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
28 #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
29 Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
34 llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
35 ruMac=00:11:22:33:44:55 #RU VF for RU app
36 #ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
38 numSlots=20 #number of slots per IQ files
40 #antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
41 #antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
42 #antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
43 #antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
45 antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
46 antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
47 antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
48 antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
50 antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0
51 antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0
52 antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0
53 antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0
55 antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0
56 antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0
57 antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0
58 antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0
60 antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0
61 antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0
62 antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0
63 antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0
65 antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0
66 antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0
67 antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0
68 antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0
70 antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0
71 antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0
72 antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0
73 antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0
75 antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0
76 antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0
77 antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0
78 antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0
80 antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0
81 antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0
82 antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0
83 antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0
85 antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0
86 antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0
87 antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0
88 antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0
90 antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0
91 antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0
92 antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0
93 antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0
95 antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0
96 antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0
97 antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0
98 antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0
100 antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0
101 antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0
102 antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0
103 antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0
106 #antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
107 #antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0
108 #antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0
109 #antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0
111 #antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
112 #antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0
113 #antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0
114 #antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0
116 #antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1
117 #antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1
118 #antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1
119 #antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1
120 #antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2
121 #antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2
122 #antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2
123 #antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2
124 #antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3
125 #antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3
126 #antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3
127 #antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3
128 #antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4
129 #antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4
130 #antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4
131 #antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4
132 #antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5
133 #antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5
134 #antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5
135 #antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5
136 #antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6
137 #antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6
138 #antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6
139 #antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6
140 #antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7
141 #antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7
142 #antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7
143 #antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7
144 #antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8
145 #antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8
146 #antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8
147 #antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8
148 #antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9
149 #antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9
150 #antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9
151 #antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9
152 #antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10
153 #antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10
154 #antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10
155 #antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10
156 #antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11
157 #antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11
158 #antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11
159 #antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11
161 rachEanble=0 # Enable (1)| disable (0) PRACH configuration
162 prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
164 ## control of IQ byte order
165 iqswap=0 #do swap of IQ before send buffer to eth
166 nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
169 debugStop=0 #stop app on 1pps boundary (gps_second % 30)
170 debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
172 CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
173 c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
174 u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
177 Tadv_cp_dl=25 #in us TODO: update per RU implementation
178 #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
180 #Reception Window C-plane DL
181 T2a_min_cp_dl=400 #in us
182 T2a_max_cp_dl=1120 #in us
184 #Reception Window C-plane UL
185 T2a_min_cp_ul=400 #in us
186 T2a_max_cp_ul=1120 #in us
188 #Reception Window U-plane
189 T2a_min_up=200 # in us
190 T2a_max_up=1120 # in us
196 ###########################################################
199 #Transmission Window Fast C-plane DL
203 ##Transmission Window Fast C-plane UL
208 ##Transmission Window
215 ###########################################################