1 #######################################################################
5 #######################################################################
7 # This is simple configuration file. Use '#' sign for comments
8 appMode=0 # lls-CU(0) | RU(1)
9 xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
10 ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
11 antNum=4 # Number of Antennas per CC (default: 4)
14 mu=0 #15Khz Sub Carrier Spacing
15 ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
16 nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
17 nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
18 nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
19 nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
23 nFrameDuplexType=0 # 0 - FDD 1 - TDD
24 nTddPeriod=0 #TDD priod e.g. DDDS 4
26 MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
27 #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
28 Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
37 llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
38 ruMac=00:11:22:33:44:55 #RU VF for RU app
39 #ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
41 numSlots=20 #number of slots per IQ files
43 #antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0
44 #antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0
45 #antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0
46 #antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0
48 antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0
49 antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0
50 antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0
51 antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0
53 antC4=./usecase/mu0_20mhz/12/uliq0.bin #CC0
54 antC5=./usecase/mu0_20mhz/12/uliq1.bin #CC0
55 antC6=./usecase/mu0_20mhz/12/uliq2.bin #CC0
56 antC7=./usecase/mu0_20mhz/12/uliq3.bin #CC0
58 antC8=./usecase/mu0_20mhz/12/uliq0.bin #CC0
59 antC9=./usecase/mu0_20mhz/12/uliq1.bin #CC0
60 antC10=./usecase/mu0_20mhz/12/uliq2.bin #CC0
61 antC11=./usecase/mu0_20mhz/12/uliq3.bin #CC0
63 antC12=./usecase/mu0_20mhz/12/uliq0.bin #CC0
64 antC13=./usecase/mu0_20mhz/12/uliq1.bin #CC0
65 antC14=./usecase/mu0_20mhz/12/uliq2.bin #CC0
66 antC15=./usecase/mu0_20mhz/12/uliq3.bin #CC0
68 antC16=./usecase/mu0_20mhz/12/uliq0.bin #CC0
69 antC17=./usecase/mu0_20mhz/12/uliq1.bin #CC0
70 antC18=./usecase/mu0_20mhz/12/uliq2.bin #CC0
71 antC19=./usecase/mu0_20mhz/12/uliq3.bin #CC0
73 antC20=./usecase/mu0_20mhz/12/uliq0.bin #CC0
74 antC21=./usecase/mu0_20mhz/12/uliq1.bin #CC0
75 antC22=./usecase/mu0_20mhz/12/uliq2.bin #CC0
76 antC23=./usecase/mu0_20mhz/12/uliq3.bin #CC0
78 antC24=./usecase/mu0_20mhz/12/uliq0.bin #CC0
79 antC25=./usecase/mu0_20mhz/12/uliq1.bin #CC0
80 antC26=./usecase/mu0_20mhz/12/uliq2.bin #CC0
81 antC27=./usecase/mu0_20mhz/12/uliq3.bin #CC0
83 antC28=./usecase/mu0_20mhz/12/uliq0.bin #CC0
84 antC29=./usecase/mu0_20mhz/12/uliq1.bin #CC0
85 antC30=./usecase/mu0_20mhz/12/uliq2.bin #CC0
86 antC31=./usecase/mu0_20mhz/12/uliq3.bin #CC0
88 antC32=./usecase/mu0_20mhz/12/uliq0.bin #CC0
89 antC33=./usecase/mu0_20mhz/12/uliq1.bin #CC0
90 antC34=./usecase/mu0_20mhz/12/uliq2.bin #CC0
91 antC35=./usecase/mu0_20mhz/12/uliq3.bin #CC0
93 antC36=./usecase/mu0_20mhz/12/uliq0.bin #CC0
94 antC37=./usecase/mu0_20mhz/12/uliq1.bin #CC0
95 antC38=./usecase/mu0_20mhz/12/uliq2.bin #CC0
96 antC39=./usecase/mu0_20mhz/12/uliq3.bin #CC0
98 antC40=./usecase/mu0_20mhz/12/uliq0.bin #CC0
99 antC41=./usecase/mu0_20mhz/12/uliq1.bin #CC0
100 antC42=./usecase/mu0_20mhz/12/uliq2.bin #CC0
101 antC43=./usecase/mu0_20mhz/12/uliq3.bin #CC0
103 antC44=./usecase/mu0_20mhz/12/uliq0.bin #CC0
104 antC45=./usecase/mu0_20mhz/12/uliq1.bin #CC0
105 antC46=./usecase/mu0_20mhz/12/uliq2.bin #CC0
106 antC47=./usecase/mu0_20mhz/12/uliq3.bin #CC0
109 #antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0
110 #antC1=./usecase/mu0_20mhz/12/ant_1.bin #CC0
111 #antC2=./usecase/mu0_20mhz/12/ant_2.bin #CC0
112 #antC3=./usecase/mu0_20mhz/12/ant_3.bin #CC0
114 #antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0
115 #antC1=./usecase/mu0_20mhz/12/ant_0.bin #CC0
116 #antC2=./usecase/mu0_20mhz/12/ant_0.bin #CC0
117 #antC3=./usecase/mu0_20mhz/12/ant_0.bin #CC0
119 #antC4=./usecase/mu0_20mhz/12/ant_4.bin #CC1
120 #antC5=./usecase/mu0_20mhz/12/ant_5.bin #CC1
121 #antC6=./usecase/mu0_20mhz/12/ant_6.bin #CC1
122 #antC7=./usecase/mu0_20mhz/12/ant_7.bin #CC1
123 #antC8=./usecase/mu0_20mhz/12/ant_8.bin #CC2
124 #antC9=./usecase/mu0_20mhz/12/ant_9.bin #CC2
125 #antC10=./usecase/mu0_20mhz/12/ant_10.bin #CC2
126 #antC11=./usecase/mu0_20mhz/12/ant_11.bin #CC2
127 #antC12=./usecase/mu0_20mhz/12/ant_12.bin #CC3
128 #antC13=./usecase/mu0_20mhz/12/ant_13.bin #CC3
129 #antC14=./usecase/mu0_20mhz/12/ant_14.bin #CC3
130 #antC15=./usecase/mu0_20mhz/12/ant_15.bin #CC3
131 #antC16=./usecase/mu0_20mhz/12/ant_0.bin #CC4
132 #antC17=./usecase/mu0_20mhz/12/ant_1.bin #CC4
133 #antC18=./usecase/mu0_20mhz/12/ant_2.bin #CC4
134 #antC19=./usecase/mu0_20mhz/12/ant_3.bin #CC4
135 #antC20=./usecase/mu0_20mhz/12/ant_4.bin #CC5
136 #antC21=./usecase/mu0_20mhz/12/ant_5.bin #CC5
137 #antC22=./usecase/mu0_20mhz/12/ant_6.bin #CC5
138 #antC23=./usecase/mu0_20mhz/12/ant_7.bin #CC5
139 #antC24=./usecase/mu0_20mhz/12/ant_8.bin #CC6
140 #antC25=./usecase/mu0_20mhz/12/ant_9.bin #CC6
141 #antC26=./usecase/mu0_20mhz/12/ant_10.bin #CC6
142 #antC27=./usecase/mu0_20mhz/12/ant_11.bin #CC6
143 #antC28=./usecase/mu0_20mhz/12/ant_12.bin #CC7
144 #antC29=./usecase/mu0_20mhz/12/ant_13.bin #CC7
145 #antC30=./usecase/mu0_20mhz/12/ant_14.bin #CC7
146 #antC31=./usecase/mu0_20mhz/12/ant_15.bin #CC7
147 #antC32=./usecase/mu0_20mhz/12/ant_0.bin #CC8
148 #antC33=./usecase/mu0_20mhz/12/ant_1.bin #CC8
149 #antC34=./usecase/mu0_20mhz/12/ant_2.bin #CC8
150 #antC35=./usecase/mu0_20mhz/12/ant_3.bin #CC8
151 #antC36=./usecase/mu0_20mhz/12/ant_4.bin #CC9
152 #antC37=./usecase/mu0_20mhz/12/ant_5.bin #CC9
153 #antC38=./usecase/mu0_20mhz/12/ant_6.bin #CC9
154 #antC39=./usecase/mu0_20mhz/12/ant_7.bin #CC9
155 #antC40=./usecase/mu0_20mhz/12/ant_8.bin #CC10
156 #antC41=./usecase/mu0_20mhz/12/ant_9.bin #CC10
157 #antC42=./usecase/mu0_20mhz/12/ant_10.bin #CC10
158 #antC43=./usecase/mu0_20mhz/12/ant_11.bin #CC10
159 #antC44=./usecase/mu0_20mhz/12/ant_12.bin #CC11
160 #antC45=./usecase/mu0_20mhz/12/ant_13.bin #CC11
161 #antC46=./usecase/mu0_20mhz/12/ant_14.bin #CC11
162 #antC47=./usecase/mu0_20mhz/12/ant_15.bin #CC11
164 rachEanble=0 # Enable (1)| disable (0) PRACH configuration
165 prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
167 ## control of IQ byte order
168 iqswap=0 #do swap of IQ before send buffer to eth
169 nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
172 debugStop=0 #stop app on 1pps boundary (gps_second % 30)
173 debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
175 CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
176 c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
177 u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
180 Tadv_cp_dl=25 #in us TODO: update per RU implementation
181 #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
183 #Reception Window C-plane DL
184 T2a_min_cp_dl=400 #in us
185 T2a_max_cp_dl=1120 #in us
187 #Reception Window C-plane UL
188 T2a_min_cp_ul=400 #in us
189 T2a_max_cp_ul=1120 #in us
191 #Reception Window U-plane
192 T2a_min_up=200 # in us
193 T2a_max_up=1120 # in us
199 ###########################################################
202 #Transmission Window Fast C-plane DL
206 ##Transmission Window Fast C-plane UL
211 ##Transmission Window
218 ###########################################################