1 /******************************************************************************
\r
3 * Copyright (c) 2019 Intel.
\r
5 * Licensed under the Apache License, Version 2.0 (the "License");
\r
6 * you may not use this file except in compliance with the License.
\r
7 * You may obtain a copy of the License at
\r
9 * http://www.apache.org/licenses/LICENSE-2.0
\r
11 * Unless required by applicable law or agreed to in writing, software
\r
12 * distributed under the License is distributed on an "AS IS" BASIS,
\r
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
\r
14 * See the License for the specific language governing permissions and
\r
15 * limitations under the License.
\r
17 *******************************************************************************/
\r
19 #ifndef _XRAN_APP_COMMON_H_
\r
20 #define _XRAN_APP_COMMON_H_
\r
25 #include "xran_fh_o_du.h"
\r
26 #include "xran_pkt_up.h"
\r
28 #include <rte_common.h>
\r
29 #include <rte_mbuf.h>
\r
31 #define VERSIONX "#DIRTY#"
\r
44 PHY_BW_5_0_MHZ = 5, PHY_BW_10_0_MHZ = 10, PHY_BW_15_0_MHZ = 15, PHY_BW_20_0_MHZ = 20, PHY_BW_25_0_MHZ = 25,
\r
45 PHY_BW_30_0_MHZ = 30, PHY_BW_40_0_MHZ = 40, PHY_BW_50_0_MHZ = 50, PHY_BW_60_0_MHZ = 60, PHY_BW_70_0_MHZ = 70,
\r
46 PHY_BW_80_0_MHZ = 80, PHY_BW_90_0_MHZ = 90, PHY_BW_100_0_MHZ = 100, PHY_BW_200_0_MHZ = 200, PHY_BW_400_0_MHZ = 400
\r
49 #define N_SC_PER_PRB 12
\r
50 #define N_SYM_PER_SLOT 14
\r
51 #define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)
\r
52 #define MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR)
\r
54 #define SUBFRAME_DURATION_US 1000
\r
55 //#define SLOTNUM_PER_SUBFRAME 8
\r
57 #define SUBFRAMES_PER_SYSTEMFRAME 10
\r
58 #define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L)
\r
59 /* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/
\r
60 #define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)
\r
63 #define iAssert(p) if(!(p)){fprintf(stderr,\
\r
64 "Assertion failed: %s, file %s, line %d, val %d\n",\
\r
65 #p, __FILE__, __LINE__, p);exit(-1);}
\r
70 extern int iq_playback_buffer_size_dl;
\r
71 extern int iq_playback_buffer_size_ul;
\r
73 extern int iq_bfw_buffer_size_dl;
\r
74 extern int iq_bfw_buffer_size_ul;
\r
76 extern int iq_srs_buffer_size_ul;
\r
78 extern uint8_t numCCPorts;
\r
79 /* Number of antennas supported by front-end */
\r
81 extern uint8_t num_eAxc;
\r
82 /* Number of antennas supported by front-end */
\r
83 extern int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
84 extern int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
85 extern int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
87 extern int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
88 extern int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
89 extern int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
91 extern int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
\r
92 extern int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
\r
93 extern int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
\r
95 /* Number of antennas supported by front-end */
\r
96 extern int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
97 extern int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
98 extern int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
100 extern int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
101 extern int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
102 extern int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
104 extern int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
\r
105 extern int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
\r
106 extern int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
\r
108 extern int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
109 extern int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
111 extern int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
112 extern int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
114 /* beamforming weights for UL (O-DU) */
\r
115 extern int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
116 extern int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
117 extern int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
119 /* beamforming weights for UL (O-DU) */
\r
120 extern int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
121 extern int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
122 extern int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
124 /* beamforming weights for UL (O-RU) */
\r
125 extern int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
126 extern int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
127 extern int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
129 /* beamforming weights for UL (O-RU) */
\r
130 extern int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
\r
131 extern int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
\r
132 extern int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
\r
134 void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
\r
135 void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
\r
136 int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
\r
137 uint32_t app_xran_get_scs(uint8_t nMu);
\r
138 uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA);
\r
139 uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq);
\r
140 int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType,
\r
141 uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig);
\r
142 uint32_t app_xran_get_tti_interval(uint8_t nMu);
\r
146 #endif /*_XRAN_APP_COMMON_H_*/
\r