1 /******************************************************************************
3 * Copyright (c) 2019 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @file This file consist of FAPI internal functions.
24 #ifndef _NR5G_FAPI_FRAMEWORK_H_
25 #define _NR5G_FAPI_FRAMEWORK_H_
28 #include "fapi_interface.h"
29 #include "nr5g_fapi_log.h"
30 #include "nr5g_fapi_internal.h"
31 #include "nr5g_fapi_std.h"
32 #include "nr5g_fapi_common_types.h"
33 #include "nr5g_fapi_config_loader.h"
35 // FAPI CONFIG.request parameters
36 typedef struct _nr5g_fapi_phy_config {
37 uint8_t n_nr_of_rx_ant;
39 } nr5g_fapi_phy_config_t, *pnr5g_fapi_phy_config_t;
41 typedef struct _nr5g_fapi_rach_info {
43 } nr5g_fapi_rach_info_t;
45 typedef struct _nr5g_fapi_srs_info {
47 } nr5g_fapi_srs_info_t;
49 typedef struct _nr5g_fapi_pusch_info {
51 uint8_t harq_process_id;
53 uint16_t timing_advance;
54 } nr5g_fapi_pusch_info_t;
56 typedef struct _nr5g_fapi_pucch_info {
59 } nr5g_fapi_pucch_info_t;
61 typedef struct _nr5g_fapi_ul_slot_info {
62 uint16_t cookie; //set this to frame_no at UL_TTI.Request and compare the
63 //same during uplink indications.
68 uint8_t rach_presence;
69 nr5g_fapi_rach_info_t rach_info; //Only One RACH PDU will be reported for RACH.Indication message
70 nr5g_fapi_srs_info_t srs_info[FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT];
71 nr5g_fapi_pucch_info_t pucch_info[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT];
72 nr5g_fapi_pusch_info_t pusch_info[FAPI_MAX_NUMBER_OF_ULSCH_PDUS_PER_SLOT];
73 } nr5g_fapi_ul_slot_info_t;
75 typedef struct _nr5g_fapi_stats_info_t {
76 uint8_t fapi_param_req;
77 uint8_t fapi_param_res;
78 uint8_t fapi_config_req;
79 uint8_t fapi_config_res;
80 uint8_t fapi_start_req;
81 uint8_t fapi_stop_req;
82 uint8_t fapi_stop_ind;
83 uint8_t fapi_vendor_msg;
84 uint8_t fapi_vext_shutdown_req;
85 uint8_t fapi_vext_shutdown_res;
87 uint8_t fapi_vext_start_res;
89 uint64_t fapi_dl_tti_req;
90 uint64_t fapi_ul_tti_req;
91 uint64_t fapi_ul_dci_req;
92 uint64_t fapi_tx_data_req;
94 uint64_t fapi_slot_ind;
95 uint64_t fapi_error_ind;
96 uint64_t fapi_crc_ind;
97 uint64_t fapi_rx_data_ind;
98 uint64_t fapi_uci_ind;
99 uint64_t fapi_srs_ind;
100 uint64_t fapi_rach_ind;
102 uint64_t fapi_dl_tti_pdus;
103 uint64_t fapi_dl_tti_pdcch_pdus;
104 uint64_t fapi_dl_tti_pdsch_pdus;
105 uint64_t fapi_dl_tti_csi_rs_pdus;
106 uint64_t fapi_dl_tti_ssb_pdus;
108 uint64_t fapi_ul_dci_pdus;
110 uint64_t fapi_ul_tti_pdus;
111 uint64_t fapi_ul_tti_prach_pdus;
112 uint64_t fapi_ul_tti_pusch_pdus;
113 uint64_t fapi_ul_tti_pucch_pdus;
114 uint64_t fapi_ul_tti_srs_pdus;
115 uint64_t fapi_crc_ind_pdus;
116 uint64_t fapi_rx_data_ind_pdus;
117 uint64_t fapi_uci_ind_pdus;
118 uint64_t fapi_srs_ind_pdus;
119 uint64_t fapi_rach_ind_pdus;
120 } nr5g_fapi_stats_info_t;
122 typedef struct _nr5g_iapi_stats_info_t {
123 uint8_t iapi_param_req;
124 uint8_t iapi_param_res;
125 uint8_t iapi_config_req;
126 uint8_t iapi_config_res;
127 uint8_t iapi_start_req;
128 uint8_t iapi_start_res;
129 uint8_t iapi_stop_req;
130 uint8_t iapi_stop_ind;
131 uint8_t iapi_shutdown_req;
132 uint8_t iapi_shutdown_res;
133 uint64_t iapi_dl_config_req;
134 uint64_t iapi_ul_config_req;
135 uint64_t iapi_ul_dci_req;
136 uint64_t iapi_tx_req;
138 uint64_t iapi_slot_ind;
139 uint64_t iapi_error_ind;
140 uint64_t iapi_crc_ind;
141 uint64_t iapi_rx_data_ind;
142 uint64_t iapi_uci_ind;
143 uint64_t iapi_srs_ind;
144 uint64_t iapi_rach_ind;
146 uint64_t iapi_dl_tti_pdus;
147 uint64_t iapi_dl_tti_pdcch_pdus;
148 uint64_t iapi_dl_tti_pdsch_pdus;
149 uint64_t iapi_dl_tti_csi_rs_pdus;
150 uint64_t iapi_dl_tti_ssb_pdus;
152 uint64_t iapi_ul_dci_pdus;
154 uint64_t iapi_ul_tti_pdus;
155 uint64_t iapi_ul_tti_prach_pdus;
156 uint64_t iapi_ul_tti_pusch_pdus;
157 uint64_t iapi_ul_tti_pucch_pdus;
158 uint64_t iapi_ul_tti_srs_pdus;
159 uint64_t iapi_crc_ind_pdus;
160 uint64_t iapi_rx_data_ind_pdus;
161 uint64_t iapi_uci_ind_pdus;
162 uint64_t iapi_srs_ind_pdus;
163 uint64_t iapi_rach_preambles;
164 } nr5g_iapi_stats_info_t;
166 typedef struct _nr5g_fapi_stats_t {
167 nr5g_fapi_stats_info_t fapi_stats;
168 nr5g_iapi_stats_info_t iapi_stats;
171 // FAPI phy instance structure
172 typedef struct _nr5g_fapi_phy_instance {
174 uint8_t shutdown_retries;
175 uint32_t shutdown_test_type;
176 fapi_states_t state; // FAPI state
177 nr5g_fapi_phy_config_t phy_config; // place holder to store,
178 // parameters from config request
179 nr5g_fapi_stats_t stats;
180 nr5g_fapi_ul_slot_info_t ul_slot_info[MAX_UL_SLOT_INFO_COUNT];
181 } nr5g_fapi_phy_instance_t, *p_nr5g_fapi_phy_instance_t;
184 typedef struct _nr5g_fapi_phy_context {
185 uint8_t num_phy_instance;
186 uint8_t mac2phy_worker_core_id;
187 uint8_t phy2mac_worker_core_id;
188 pthread_t phy2mac_tid;
189 pthread_t mac2phy_tid;
190 uint64_t process_exit;
191 nr5g_fapi_phy_instance_t phy_instance[FAPI_MAX_PHY_INSTANCES];
192 } nr5g_fapi_phy_ctx_t, *p_nr5g_fapi_phy_ctx_t;
194 // Function Declarations
195 inline p_nr5g_fapi_phy_ctx_t nr5g_fapi_get_nr5g_fapi_phy_ctx(
197 uint8_t nr5g_fapi_framework_init(
199 uint8_t nr5g_fapi_framework_stop(
201 uint8_t nr5g_fapi_framework_finish(
203 uint8_t nr5g_fapi_dpdk_init(
204 p_nr5g_fapi_cfg_t cfg);
205 uint8_t nr5g_fapi_dpdk_wait(
206 p_nr5g_fapi_cfg_t cfg);
207 void *nr5g_fapi_phy2mac_thread_func(
209 void *nr5g_fapi_mac2phy_thread_func(
211 nr5g_fapi_ul_slot_info_t *nr5g_fapi_get_ul_slot_info(
214 p_nr5g_fapi_phy_instance_t p_phy_instance);
215 void nr5g_fapi_set_ul_slot_info(
218 nr5g_fapi_ul_slot_info_t * p_ul_slot_info);
219 #endif // _NR5G_FAPI_FRAMEWORK_H_