Support for Intel-L1 Timer mode 52/5152/2
authorlal.harshita <harshita.lal@radisys.com>
Wed, 25 Nov 2020 09:32:57 +0000 (15:02 +0530)
committerlal.harshita <harshita.lal@radisys.com>
Wed, 25 Nov 2020 11:25:12 +0000 (16:55 +0530)
Change-Id: I2be6e0a1368503b8fb1d27b8ae40182707458750
Signed-off-by: lal.harshita <harshita.lal@radisys.com>
build/odu/makefile
docs/README
src/5gnrmac/lwr_mac.h
src/5gnrmac/lwr_mac_fsm.c
src/5gnrmac/lwr_mac_handle_phy.c
src/5gnrmac/lwr_mac_phy.c
src/5gnrmac/mac_cfg_hdl.c
src/5gnrmac/mac_slot_ind.c

index 46ea999..1874e6c 100644 (file)
@@ -70,8 +70,7 @@ endif
 # macro for output file name and makefile name
 #
 
-PLTFRM_FLAGS= -UMSPD -DODU -DINTEL_FAPI #-DSS_USE_WLS_MEM -DINTEL_WLS_MEM -DDEBUG_MODE \
-              #-DODU_SLOT_IND_DEBUG_LOG -DEGTP_TEST
+PLTFRM_FLAGS= -UMSPD -DODU -DINTEL_FAPI #-DODU_SLOT_IND_DEBUG_LOG -DEGTP_TEST
 
 ifeq ($(MODE),TDD)
    PLTFRM_FLAGS += -DMODE=TDD
@@ -83,6 +82,12 @@ endif
 ifeq ($(NODE),TEST_STUB)
        PLTFRM_FLAGS+=-DODU_TEST_STUB
 endif
+ifeq ($(PHY), INTEL_L1)
+       PLTFRM_FLAGS+=-DSS_USE_WLS_MEM -DINTEL_WLS_MEM -DDEBUG_MODE
+ifeq ($(PHY_MODE),TIMER)
+       PLTFRM_FLAGS+=-DINTEL_TIMER_MODE
+endif
+endif
 
 ifeq ($(O1_ENABLE),YES)
        PLTFRM_FLAGS+=-DO1_ENABLE
@@ -100,7 +105,9 @@ export BUILD
 export I_OPTS
 
 # Add to the linker options the platform specific components
-L_OPTS+=-lnsl -lrt -lm -lpthread -lsctp #-L/root/intel/phy/wls_lib/lib -lwls                         \
+L_OPTS+=-lnsl -lrt -lm -lpthread -lsctp 
+ifeq ($(PHY), INTEL_L1)
+       L_OPTS+=-L/root/intel/phy/wls_lib/lib -lwls                         \
         -lhugetlbfs -lnuma -ldl -L/root/intel/dpdk-19.11/x86_64-native-linuxapp-gcc/lib             \
         -ldpdk -lrte_gso -lrte_pmd_atlantic -lrte_pmd_iavf -lrte_pmd_tap -lrte_acl                  \
         -lrte_hash -lrte_pmd_avp -lrte_pmd_ice -lrte_pmd_thunderx_nicvf -lrte_bbdev                 \
@@ -129,6 +136,7 @@ L_OPTS+=-lnsl -lrt -lm -lpthread -lsctp #-L/root/intel/phy/wls_lib/lib -lwls
         -lrte_table -lrte_fib -lrte_pipeline -lrte_pmd_hinic -lrte_pmd_skeleton_event -lrte_timer   \
         -lrte_flow_classify -lrte_pmd_af_packet -lrte_pmd_hns3 -lrte_pmd_softnic -lrte_vhost        \
         -lrte_gro -lrte_pmd_ark -lrte_pmd_i40e -lrte_pmd_sw_event
+endif
 
 # Export some of the flags expected from the command line.
 # # These macros are made available for the makefiles called from this makefile
@@ -152,10 +160,12 @@ help:
                @echo -e "$(RULE)clean_cu  - clean up CU Stub$(NORM)"
                @echo -e "$(RULE)clean_ric  - clean up RIC Stub$(NORM)"
                @echo -e "$(RULE)clean_all - cleanup everything$(NORM)"
-               @echo -e "$(OPTS)  options: $(NORM)"
+               @echo -e "$(OPTS)options: $(NORM)"
                @echo -e "$(OPTS)    MACHINE=BIT64/BIT32  - Default is BIT32$(NORM)"
-               @echo -e "$(OPTS)    NODE=TEST_STUB         - Mandatory option for cu_stub/ric_stub$(NORM)"
+               @echo -e "$(OPTS)    NODE=TEST_STUB       - Mandatory option for cu_stub/ric_stub$(NORM)"
                @echo -e "$(OPTS)    MODE=TDD             - If not specified, MODE=FDD$(NORM)"
+               @echo -e "$(OPTS)    PHY=INTEL_L1         - If not specified, Phy stub is used$(NORM)"
+               @echo -e "$(OPTS)    PHY_MODE=TIMER       - Testing mode for INTEL_L1
                @echo -e "******************************************************************"
 
 prepare_dirs:
index 6454943..a82ab65 100644 (file)
@@ -1,5 +1,5 @@
-Directory Structure :
----------------------
+A. Directory Structure :
+------------------------
 1. l2/build/ : contains files required to compile the code
    a. common : contains individual module's makefile
    b. odu    : contains main makefile to generate an executable binary
@@ -20,8 +20,8 @@ Directory Structure :
    i. o1       : o1 module
 
 
-Pre-requisite for Compilation :
--------------------------------
+B. Pre-requisite for Compilation :
+----------------------------------
 1. Linux 32-bit/64-bit machine
 2. GCC version 4.6.3 and above
 3. Install LKSCTP
@@ -32,8 +32,8 @@ Pre-requisite for Compilation :
    b. On CentOS : yum install libpcap-devel
 
 
-Pre-requisite for running O1 module:
------------------------------------
+C. Pre-requisite for running O1 module:
+---------------------------------------
 Install netconf server
 ----------------------
 
@@ -56,8 +56,8 @@ Install the yang module
    sysrepoctl -i o-ran-sc-odu-alarm-v1.yang
 
 
-How to Clean and Build:
------------------------
+D. How to Clean and Build:
+--------------------------
 1. Building ODU binary:
    a. Build folder
          cd l2/build/odu
@@ -98,36 +98,101 @@ How to Clean and Build:
          make clean_o1 
 
 
-How to execute:
----------------
+E. How to execute:
+------------------
 1. Assign virtual IP addresses as follows:
-      ifconfig <interface name>:ODU "192.168.130.81"
-      ifconfig <interface name>:CU_STUB "192.168.130.82"
-      ifconfig <interface name>:RIC_STUB "192.168.130.80"
-
-2. CU execution folder:
-      cd l2/bin/cu_stub
-     
-3. Run CU Stub binary:
-      ./cu_stub
-
-4. RIC execution folder:
-      cd l2/bin/ric_stub
-     
-5. Run RIC Stub binary:
-      ./ric_stub
-
-6. DU execution folder:
-      cd l2/bin/odu
-     
-7. Run ODU binary:
-      ./odu
-
-8. O1 execution folder:
-      cd l2/build/o1/bin/o1
-
-9. Run O1 binary:
-      ./o1
+   a. ifconfig <interface name>:ODU "192.168.130.81"
+   b. ifconfig <interface name>:CU_STUB "192.168.130.82"
+   c. ifconfig <interface name>:RIC_STUB "192.168.130.80"
+
+2. Execute CU Stub:
+   a. CU execution folder:
+       cd l2/bin/cu_stub
+   b. Run CU Stub binary:
+       ./cu_stub
+
+3. Execute RIC Stub:
+   a. RIC execution folder:
+       cd l2/bin/ric_stub
+   b. Run RIC Stub binary:
+       ./ric_stub
+
+4. Execute DU:
+   a. DU execution folder:
+       cd l2/bin/odu
+   b. Run ODU binary:
+       ./odu
+
+5. Execute O1
+   a. O1 execution folder:
+       cd l2/build/o1/bin/o1
+   b. Run O1 binary:
+       ./o1
 
 PS: CU stub and RIC stub must be run (in no particular sequence) before ODU
     If O1 module is enabled it must be run before ODU
+
+F. How to test with Intel L1:
+-----------------------------
+
+I. Compilation
+   1. Build ODU :
+      a. Create folder l2/src/wls_lib. Copy wls_lib.h from <intel_directory>/phy/wls_lib/ to l2/src/wls_lib.
+      b. Create folder l2/src/dpdk_lib. Copy following files from <intel_directory>/dpdk-19.11/x86_64-native-linuxapp-gcc/include/ to l2/sr        c/dpdk_lib.
+                rte_branch_prediction.h
+                rte_common.h
+                rte_config.h
+                rte_dev.h
+                rte_log.h
+                rte_pci_dev_feature_defs.h
+                rte_bus.h
+                rte_compat.h
+                rte_debug.h
+                rte_eal.h
+                rte_os.h
+                rte_per_lcore.h
+      c. Build folder
+                cd l2/build/odu
+      d. Build ODU Binary:
+                make odu PHY=INTEL_L1 PHY_MODE=TIMER MACHINE=BIT64 MODE=FDD
+
+   2. Build CU Stub and RIC Stub:
+      a. Execute steps in sections D.2 and D.3.
+
+II. Execution
+    1. Execute L1:
+       a. Setup environment:
+                cd <intel_directory>/phy/
+                source ./setupenv.sh
+       b. Run L1 binary :
+                cd <intel_directory>/FlexRAN/l1/bin/nr5g/gnb/l1
+                To run in timer mode : ./l1.sh -e
+                L1 is up when console prints follow:
+
+                   Non BBU threads in application
+                   ===========================================================================================================
+                   nr5g_gnb_phy2mac_api_proc_stats_thread: [PID:   8659] binding on [CPU  0] [PRIO:  0] [POLICY:  1]
+                   wls_rx_handler (non-rt):                [PID:   8663] binding on [CPU  0]
+                   ===========================================================================================================
+                 
+                   PHY>welcome to application console
+
+    2. Execute FAPI Translator:
+       a. Setup environment:
+                cd <intel_directory>/phy/
+                source ./setupenv.sh
+       b. Run FAPI translator binary:
+                cd <intel_directory>/phy/fapi_5g/bin/
+                ./oran_5g_fapi --cfg=oran_5g_fapi.cfg
+
+    3. Execute CU Stub and RIC Stub:
+       a. Run steps in sections E.1-E.3
+
+    4. Execute DU:
+       a. DU execution folder
+               cd l2/bin/odu
+       b. Export WLS library path
+               export LD_LIBRARY_PATH=<intel_directory>/phy/wls_lib/lib:$LD_LIBRARY_PATH
+       c. Run ODU binary
+               ./odu
+
index e1c075e..0d4e04d 100644 (file)
@@ -42,6 +42,9 @@ typedef enum
 
 /* Events in Lower Mac */
 typedef enum{
+#ifdef INTEL_TIMER_MODE
+   UL_IQ_SAMPLE,
+#endif
    PARAM_REQUEST,
    PARAM_RESPONSE,
    CONFIG_REQUEST,
index 9efc6ff..9808c78 100644 (file)
@@ -1891,6 +1891,70 @@ uint8_t lwr_mac_procParamRspEvt(void *msg)
 #endif
 }
 
+#ifdef INTEL_TIMER_MODE
+uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
+{
+   void * wlsHdlr = NULLP;
+   fapi_msg_header_t *msgHeader;
+   fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
+   p_fapi_api_queue_elem_t  headerElem;
+   p_fapi_api_queue_elem_t  iqSampleElem;
+   char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin"; 
+
+   uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
+
+   size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
+
+   /* Fill IQ sample req */
+   mtGetWlsHdl(&wlsHdlr);
+   //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
+      (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t))); 
+   LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
+   if(!iqSampleElem)
+   {
+      DU_LOG("\nLWR_MAC: Memory allocation failed for IQ sample req");
+      return RFAILED;
+   }
+   FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
+      sizeof(fapi_vendor_ext_iq_samples_req_t));
+
+   iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
+   memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
+   fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
+      sizeof(fapi_vendor_ext_iq_samples_req_t));
+
+   iqSampleReq->iq_samples_info.carrNum = 0;
+   iqSampleReq->iq_samples_info.numSubframes = 40;
+   iqSampleReq->iq_samples_info.nIsRadioMode = 0;
+   iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
+   iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
+   iqSampleReq->iq_samples_info.startFrameNum = 0;
+   iqSampleReq->iq_samples_info.startSlotNum = 0;
+   iqSampleReq->iq_samples_info.startSymNum = 0;
+   strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
+   memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
+
+   /* TODO : Fill remaining parameters */
+
+   /* Fill message header */
+   LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+   if(!headerElem)
+   {
+      DU_LOG("\nLWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
+      return RFAILED;
+   }
+   FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+     sizeof(fapi_msg_header_t));
+   msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+   msgHeader->num_msg = 1; 
+   msgHeader->handle = 0;
+
+   DU_LOG("\nLWR_MAC: Sending IQ Sample request to Phy");
+   LwrMacSendToL1(headerElem);
+   return ROK;
+}
+#endif
+
 /*******************************************************************
  *
  * @brief Sends FAPI Config req to PHY
@@ -4160,6 +4224,9 @@ lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
 {
    {
       /* PHY_STATE_IDLE */
+#ifdef INTEL_TIMER_MODE 
+      lwr_mac_procIqSamplesReqEvt,
+#endif
       lwr_mac_procParamReqEvt,
       lwr_mac_procParamRspEvt,
       lwr_mac_procConfigReqEvt,
@@ -4169,6 +4236,9 @@ lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
    },
    {
       /* PHY_STATE_CONFIGURED */
+#ifdef INTEL_TIMER_MODE
+      lwr_mac_procInvalidEvt,
+#endif
       lwr_mac_procParamReqEvt,
       lwr_mac_procParamRspEvt,
       lwr_mac_procConfigReqEvt,
@@ -4178,6 +4248,9 @@ lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
    },
    {
       /* PHY_STATE_RUNNING */
+#ifdef INTEL_TIMER_MODE
+      lwr_mac_procInvalidEvt,
+#endif
       lwr_mac_procInvalidEvt,
       lwr_mac_procInvalidEvt,
       lwr_mac_procConfigReqEvt,
index db000be..9e6d675 100644 (file)
@@ -493,6 +493,16 @@ void procPhyMessages(uint16_t msgType, uint32_t msgSize, void *msg)
 
    switch(header->msg_id)
    {
+#ifdef INTEL_TIMER_MODE
+      case FAPI_VENDOR_EXT_UL_IQ_SAMPLES:
+         {
+            printf("\nLWR_MAC: Received FAPI_VENDOR_EXT_UL_IQ_SAMPLES");
+            //send config req
+            uint16_t cellId = 1;
+            sendToLowerMac(CONFIG_REQUEST, 0, (void *)&cellId);
+            break;
+         } 
+#endif
       case FAPI_PARAM_RESPONSE:
         {
             sendToLowerMac(PARAM_RESPONSE, msgSize, msg);
index a02195c..c927a5c 100644 (file)
@@ -215,7 +215,6 @@ void LwrMacRecvPhyMsg()
    uint16_t msgType;
    uint16_t flag = 0;
    p_fapi_api_queue_elem_t currElem  = NULLP;
-   struct timeval time;
 
    mtGetWlsHdl(&wlsHdlr);
    if(WLS_Ready(wlsHdlr) == 0) 
index 3aa2907..25b783b 100644 (file)
@@ -346,7 +346,11 @@ uint8_t MacProcSchCellCfgCfm(Pst *pst, SchCellCfgCfm *schCellCfgCfm)
    if(schCellCfgCfm->rsp == RSP_OK)
    {
       cellId = &schCellCfgCfm->cellId;
+#ifdef INTEL_TIMER_MODE
+      sendToLowerMac(UL_IQ_SAMPLE, 0, (void *)cellId);
+#else
       sendToLowerMac(CONFIG_REQUEST, 0, (void *)cellId);
+#endif
    }
    else
    {
index 0b07501..7f9142e 100644 (file)
@@ -351,6 +351,9 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd)
    /*starting Task*/
    ODU_START_TASK(&startTime, PID_MAC_TTI_IND);
 
+/* When testing L2 with Intel-L1, any changes specific to 
+ * timer mode testing must be guarded under INTEL_TIMER_MODE*/
+#ifndef INTEL_TIMER_MODE
    /* send slot indication to scheduler */
    ret = sendSlotIndMacToSch(slotInd);
    if(ret != ROK)
@@ -367,6 +370,7 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd)
       MAC_FREE_SHRABL_BUF(pst->region, pst->pool, slotInd, sizeof(SlotIndInfo));
       return ret;
    }
+#endif
 
    /* send slot indication to du app */
    ret = sendSlotIndMacToDuApp(slotInd);