Corrected values in SIB1 serving cell config common

Change-Id: Ic7b420c60d1becfc5266bf9b10f87ffbb7a43bdc
Signed-off-by: lal.harshita <harshita.lal@radisys.com>

diff --git a/src/du_app/du_cfg.c b/src/du_app/du_cfg.c
index d2c758c..18032e7 100644 (file)
--- a/src/du_app/du_cfg.c
+++ b/src/du_app/du_cfg.c
@@ -387,8 +387,8 @@ uint8_t fillServCellCfgCommSib(SrvCellCfgCommSib *srvCellCfgComm)
 
    /* Configuring PDCCH Config Common For SIB1 */
    pdcchCfg.present = BWP_DownlinkCommon__pdcch_ConfigCommon_PR_setup;
-   pdcchCfg.ctrlRsrcSetZero = PDCCH_CTRL_RSRC_SET_ZERO;
-   pdcchCfg.searchSpcZero = PDCCH_SEARCH_SPACE_ZERO;
+   pdcchCfg.ctrlRsrcSetZero = CORESET_0_INDEX;
+   pdcchCfg.searchSpcZero = SEARCHSPACE_0_INDEX;
    pdcchCfg.searchSpcId = PDCCH_SEARCH_SPACE_ID;
    pdcchCfg.ctrlRsrcSetId = PDCCH_CTRL_RSRC_SET_ID;
    pdcchCfg.monitorSlotPrdAndOffPresent = \
@@ -422,7 +422,7 @@ uint8_t fillServCellCfgCommSib(SrvCellCfgCommSib *srvCellCfgComm)
       BCCH_Config__modificationPeriodCoeff_n16;
 
    /* Configuring PCCH Config for SIB1 */
-   pcchCfg.dfltPagingCycle = PagingCycle_rf64;
+   pcchCfg.dfltPagingCycle = PagingCycle_rf256;
    pcchCfg.nAndPagingFrmOffPresent = PCCH_Config__nAndPagingFrameOffset_PR_oneT;
    pcchCfg.numPagingOcc = PCCH_Config__ns_four;
    srvCellCfgComm->dlCfg.pcchCfg = pcchCfg;
@@ -550,8 +550,8 @@ uint8_t readCfg()
    mib.subCarrierSpacingCommon = MIB__subCarrierSpacingCommon_scs15or60;
    mib.ssb_SubcarrierOffset = SSB_SC_OFFSET; 
    mib.dmrs_TypeA_Position = MIB__dmrs_TypeA_Position_pos2;
-   mib.controlResourceSetZero = CORESET_ZERO;
-   mib.searchSpaceZero = SEARCH_SPACE_ZERO;
+   mib.controlResourceSetZero = CORESET_0_INDEX;
+   mib.searchSpaceZero = SEARCHSPACE_0_INDEX;
    mib.cellBarred = MIB__cellBarred_barred;
    mib.intraFreqReselection =
       MIB__intraFreqReselection_notAllowed;

diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h
index 9244f42..ba5665f 100644 (file)
--- a/src/du_app/du_cfg.h
+++ b/src/du_app/du_cfg.h
@@ -73,7 +73,7 @@
 #define SSB_SUBCARRIER_OFFSET 0               
 #define SSB_MULT_CARRIER_BAND FALSE
 #define MULT_CELL_CARRIER FALSE
-#define FREQ_LOC_BW  1099              /* DL frequency location and bandwidth */
+#define FREQ_LOC_BW  28875             /* DL frequency location and bandwidth. Spec 38.508 Table 4.3.1.0B-1*/
 #define UL_P_MAX  23
 #define DMRS_TYPE_A_POS 2
 #define NUM_SYMBOLS_PER_SLOT 14       /* Number of symbols within a slot */
@@ -105,11 +105,9 @@
 #define ROOT_SEQ_LEN 139
 
 /* MACRCO Ddefine for PDCCH Configuration */
-#define PDCCH_CTRL_RSRC_SET_ZERO   13   /* Control resouce set zero */
-#define PDCCH_SEARCH_SPACE_ZERO    0    /* Search space zero */
 #define PDCCH_SEARCH_SPACE_ID      1    /* Common search space id */
 #define PDCCH_CTRL_RSRC_SET_ID     0    /* Control resource set id */
-#define PDCCH_SEARCH_SPACE_ID_SIB1 0    /* Search space id for sib1 */
+#define PDCCH_SEARCH_SPACE_ID_SIB1 1    /* Search space id for sib1 */
 #define PDCCH_SEARCH_SPACE_ID_PAGING 1  /* Search space id for paging */
 #define PDCCH_SEARCH_SPACE_ID_RA   1    /* Search spaced id for random access */
 #define PDCCH_SERACH_SPACE_DCI_FORMAT 0
@@ -214,8 +212,6 @@
 #define SYS_FRAME_NUM 0
 #define SPARE 0
 #define SSB_SC_OFFSET 8
-#define CORESET_ZERO 1
-#define SEARCH_SPACE_ZERO 8
 #define DU_RANAC 1
 #define CELL_IDENTITY 32