[JIRA ID- ODUHIGH-462] [ISSUE ID ODUHIGH-477] Adding support for drx configuration...

[o-du/l2.git] / src / du_app / du_ue_mgr.c

diff --git a/src/du_app/du_ue_mgr.c b/src/du_app/du_ue_mgr.c
index 71e8709..7900c62 100644 (file)
--- a/src/du_app/du_ue_mgr.c
+++ b/src/du_app/du_ue_mgr.c
@@ -876,7 +876,7 @@ void fillDefaultMacCellGrpInfo(MacUeCfg *macUeCfg)
 {
    uint8_t idx;
    MacCellGrpCfg *cellGrp = NULL;
-
+   
    if(macUeCfg)
       cellGrp = &macUeCfg->macCellGrpCfg;
 
@@ -888,12 +888,12 @@ void fillDefaultMacCellGrpInfo(MacUeCfg *macUeCfg)
       cellGrp->schReqCfg.addModListCount = 1;
       if(cellGrp->schReqCfg.addModListCount <= MAX_NUM_SR_CFG_PER_CELL_GRP)
       {
-        for(idx = 0; idx < cellGrp->schReqCfg.addModListCount; idx++)
-        {
-           cellGrp->schReqCfg.addModList[idx].schedReqId    = SCH_REQ_ID;
-           cellGrp->schReqCfg.addModList[idx].srProhibitTmr = SR_PROHIBIT_MS_32;
-           cellGrp->schReqCfg.addModList[idx].srTransMax    = SR_TRANS_MAX_N_16;
-        }
+         for(idx = 0; idx < cellGrp->schReqCfg.addModListCount; idx++)
+         {
+            cellGrp->schReqCfg.addModList[idx].schedReqId    = SCH_REQ_ID;
+            cellGrp->schReqCfg.addModList[idx].srProhibitTmr = SR_PROHIBIT_MS_32;
+            cellGrp->schReqCfg.addModList[idx].srTransMax    = SR_TRANS_MAX_N_16;
+         }
       }
       cellGrp->schReqCfg.relListCount = 0;
 
@@ -901,11 +901,11 @@ void fillDefaultMacCellGrpInfo(MacUeCfg *macUeCfg)
       cellGrp->tagCfg.addModListCount = 1;
       if(cellGrp->tagCfg.addModListCount <= MAC_NUM_TAGS)
       {
-        for(idx = 0; idx < cellGrp->tagCfg.addModListCount; idx++)
-        {
-           cellGrp->tagCfg.addModList[idx].tagId = TAG_ID;
-           cellGrp->tagCfg.addModList[idx].timeAlignTimer = TIME_ALIGNMENT_TIMER_INFINITY;
-        }
+         for(idx = 0; idx < cellGrp->tagCfg.addModListCount; idx++)
+         {
+            cellGrp->tagCfg.addModList[idx].tagId = TAG_ID;
+            cellGrp->tagCfg.addModList[idx].timeAlignTimer = TIME_ALIGNMENT_TIMER_INFINITY;
+         }
       }
       cellGrp->tagCfg.relListCount = 0;
 
@@ -924,6 +924,31 @@ void fillDefaultMacCellGrpInfo(MacUeCfg *macUeCfg)
       cellGrp->phrCfg.phrType2OtherCell = false;
       cellGrp->phrCfg.phrOtherCG = PHR_MODE_OTHER_CG_REAL;  
 
+      /* Filling Drx Config */
+#ifdef NR_DRX
+      cellGrp->drxCfg.drxOnDurationTimer.onDurationTimerValInMs = DRX_ONDURATION_TIMER_VALUE_PRESENT_IN_MS;
+      if(!cellGrp->drxCfg.drxOnDurationTimer.onDurationTimerValInMs)
+         cellGrp->drxCfg.drxOnDurationTimer.onDurationtimerValue.subMilliSeconds = \
+                                                                                   DRX_ONDURATION_TIMER_VALUE_IN_SUBMS;
+      else
+         cellGrp->drxCfg.drxOnDurationTimer.onDurationtimerValue.milliSeconds = \
+                                                                                DRX_ONDURATION_TIMER_VALUE_IN_MS;
+      cellGrp->drxCfg.drxInactivityTimer = DRX_INACTIVITY_TIMER;
+      cellGrp->drxCfg.drxHarqRttTimerDl = DRX_HARQ_RTT_TIMER_DL;
+      cellGrp->drxCfg.drxHarqRttTimerUl = DRX_HARQ_RTT_TIMER_UL;
+      cellGrp->drxCfg.drxRetransmissionTimerDl = DRX_RETRANSMISSION_TIMER_DL;
+      cellGrp->drxCfg.drxRetransmissionTimerUl = DRX_RETRANSMISSION_TIMER_UL;
+      cellGrp->drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetVal = DRX_LONG_CYCLE_START_OFFSET_VAL;
+      cellGrp->drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = DRX_LONG_CYCLE_START_OFFSET_CHOICE;
+      cellGrp->drxCfg.shortDrxPres = DRX_SHORT_CYCLE_PRESENT;
+      if(cellGrp->drxCfg.shortDrxPres)
+      {
+         cellGrp->drxCfg.shortDrx.drxShortCycle = DRX_SHORT_CYCLE;
+         cellGrp->drxCfg.shortDrx.drxShortCycleTimer = DRX_SHORT_CYCLE_TIMER;
+      }
+      cellGrp->drxCfg.drxSlotOffset = DRX_SLOT_OFFSET;
+#endif
+
    }
    else
    {
@@ -1256,6 +1281,23 @@ uint8_t fillMacUeCfg(uint16_t cellId, uint8_t gnbDuUef1apId, uint16_t crnti, DuU
          fillDefaultModulation(macUeCfg);
       }
 
+#ifdef NR_DRX
+      if(ueCfgDb->drxCyclePres)
+      {
+         macUeCfg->macCellGrpCfg.drxCfg.drxLongCycleStartOffset.drxLongCycleStartOffsetChoice = ueCfgDb->drxCycle.drxLongCycleLength;
+         if(ueCfgDb->drxCycle.shortDrxCyclePres)
+         {
+            macUeCfg->macCellGrpCfg.drxCfg.shortDrxPres = true;
+            macUeCfg->macCellGrpCfg.drxCfg.shortDrx.drxShortCycle = ueCfgDb->drxCycle.shortDrxCycle.drxShortCycle;
+            macUeCfg->macCellGrpCfg.drxCfg.shortDrx.drxShortCycleTimer = ueCfgDb->drxCycle.shortDrxCycle.drxShortCycleTimer;
+         }
+         else
+         {
+            macUeCfg->macCellGrpCfg.drxCfg.shortDrxPres = false;
+         }
+      }
+#endif
+
       /* Filling LC Context */
       for(dbIdx = 0; (dbIdx < ueCfgDb->numMacLcs && ret == ROK); dbIdx++)
       {
@@ -1970,6 +2012,9 @@ uint8_t duUpdateMacCfg(MacUeCfg *macUeCfg, F1UeContextSetupDb *f1UeDb)
 
    /*Filling Cell Group Cfg*/
    ret =  procUeReCfgCellInfo(macUeCfg, &f1UeDb->duUeCfg.copyOfmacUeCfg, f1UeDb->duUeCfg.cellGrpCfg);
+#ifdef NR_DRX
+   memcpy(&macUeCfg->macCellGrpCfg.drxCfg, &f1UeDb->duUeCfg.copyOfmacUeCfg.macCellGrpCfg.drxCfg, sizeof(DrxCfg));
+#endif
    if(ret == ROK)
    {
       if(macUeCfg->spCellCfg.servCellCfg.initDlBwp.pdschPresent)