uint16_t numPrb;
}ResAllocType1;
+typedef struct resAllocType1 FreqDomainRsrc;
+
typedef struct
{
uint32_t ssbPbchPwr; /* SSB block power */
{
uint8_t subcarrierSpacing;
uint8_t cyclicPrefix;
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
}BwpCfg;
typedef struct prg
{
uint8_t resourceAllocType;
/* since we are using type-1, rbBitmap excluded */
- ResAllocType1 freqAlloc;
+ uint8_t rbBitmap[36];
+ uint16_t startPrb;
+ uint16_t numPrb;
uint8_t vrbPrbMapping;
-} PdschFreqAlloc;
+}PdschFreqAlloc;
typedef struct pdschTimeAlloc
{
- uint8_t rowIndex;
- TimeDomainAlloc timeAlloc;
+ uint8_t rowIndex;
+ uint16_t startSymb;
+ uint16_t numSymb;
} PdschTimeAlloc;
typedef struct txPowerPdschInfo
uint8_t powerControlOffsetSS;
} TxPowerPdschInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
typedef struct pdschCfg
{
uint16_t pduBitmap;
/* SIB1 interface structure */
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
typedef struct coresetCfg
{
uint8_t coreSetSize;
uint8_t cceRegMappingType;
uint8_t regBundleSize;
uint8_t interleaverSize;
- uint8_t coreSetType;
uint16_t shiftIndex;
+ uint8_t coreSetType;
+ uint8_t coresetPoolIndex;
uint8_t precoderGranularity;
uint8_t cceIndex;
uint8_t aggregationLevel;
typedef struct txPowerPdcchInfo
{
- uint8_t powerValue;
+ uint8_t beta_pdcch_1_0;
uint8_t powerControlOffsetSS;
-} TxPowerPdcchInfo;
+}TxPowerPdcchInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
typedef struct dlDCI
{
uint16_t rnti;
BeamformingInfo beamPdcchInfo;
TxPowerPdcchInfo txPdcchPower;
PdschCfg *pdschCfg;
-} DlDCI;
+}DlDCI;
typedef struct pdcchCfg
{
/* coreset-0 configuration */
CoresetCfg coresetCfg;
-
- uint16_t numDlDci;
- DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
+ uint16_t numDlDci;
+ DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
} PdcchCfg;
/* end of SIB1 PDCCH structures */
uint8_t n0;
BwpCfg bwp;
PdcchCfg sib1PdcchCfg;
- PdschCfg sib1PdschCfg;
PageCfg pageCfg; /*Config of Paging*/
}SchSib1Cfg;
typedef struct schBwpParams
{
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
uint8_t scs;
uint8_t cyclicPrefix;
}SchBwpParams;
typedef struct ssbInfo
{
uint8_t ssbIdx; /* SSB Index */
- TimeDomainAlloc tdAlloc; /* Time domain allocation */
- ResAllocType1 fdAlloc; /* Freq domain allocation */
+ TimeDomainAlloc tdAlloc; /* Time domain allocation */
+ FreqDomainRsrc fdAlloc; /* Freq domain allocation */
}SsbInfo;
typedef struct sib1AllocInfo
{
BwpCfg bwp;
PdcchCfg sib1PdcchCfg;
- PdschCfg sib1PdschCfg;
-} Sib1AllocInfo;
+}Sib1AllocInfo;
typedef struct prachSchInfo
{
/* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
typedef struct dlBrdcstAlloc
{
+ uint16_t crnti; /* SI-RNTI */
/* Ssb transmission is determined as follows:
* 0 : No tranamission
* 1 : SSB Transmission
* 2 : SSB Repetition */
- uint8_t ssbTrans;
+ uint8_t ssbTransmissionMode;
uint8_t ssbIdxSupported;
SsbInfo ssbInfo[MAX_SSB_IDX];
+ bool systemInfoIndicator;
+ uint8_t *siContent;
/* Sib1 transmission is determined as follows:
* 0 : No tranamission
* 1 : SIB1 Transmission
* 2 : SIB1 Repetition */
- uint8_t sib1Trans;
+ uint8_t sib1TransmissionMode;
Sib1AllocInfo sib1Alloc;
}DlBrdcstAlloc;
{
uint8_t freqHopFlag;
uint16_t bwpSize;
- ResAllocType1 msg3FreqAlloc;
+ FreqDomainRsrc msg3FreqAlloc;
uint8_t k2Index;
uint8_t mcs;
uint8_t tpc;
{
uint8_t resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- ResAllocType1 freqAlloc;
+ FreqDomainRsrc freqAlloc;
TimeDomainAlloc timeAlloc;
uint16_t rowIndex;
uint8_t mcs;
}DciInfo;
+/* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
typedef struct dlSchedInfo
{
- uint16_t cellId; /* Cell Id */
+ uint16_t cellId; /* Cell Id */
SchSlotValue schSlotValue;
/* Allocation for broadcast messages */