[Epic-ID: ODUHIGH-405][Task-ID: ODUHIGH-423] Modified RRC asn structures
[o-du/l2.git] / src / codec_utils / RRC / UE-NR-CapabilityAddXDD-Mode.c
1 /*
2  * Generated by asn1c-0.9.29 (http://lionet.info/asn1c)
3  * From ASN.1 module "NR-RRC-Definitions"
4  *      found in "../../../rrc_15.3_asn.asn1"
5  *      `asn1c -D ./25_02_2022_RRC/ -fcompound-names -fno-include-deps -findirect-choice -gen-PER -no-gen-example`
6  */
7
8 #include "UE-NR-CapabilityAddXDD-Mode.h"
9
10 #include "Phy-ParametersXDD-Diff.h"
11 #include "MAC-ParametersXDD-Diff.h"
12 #include "MeasAndMobParametersXDD-Diff.h"
13 asn_TYPE_member_t asn_MBR_UE_NR_CapabilityAddXDD_Mode_1[] = {
14         { ATF_POINTER, 3, offsetof(struct UE_NR_CapabilityAddXDD_Mode, phy_ParametersXDD_Diff),
15                 (ASN_TAG_CLASS_CONTEXT | (0 << 2)),
16                 -1,     /* IMPLICIT tag at current level */
17                 &asn_DEF_Phy_ParametersXDD_Diff,
18                 0,
19                 { 0, 0, 0 },
20                 0, 0, /* No default value */
21                 "phy-ParametersXDD-Diff"
22                 },
23         { ATF_POINTER, 2, offsetof(struct UE_NR_CapabilityAddXDD_Mode, mac_ParametersXDD_Diff),
24                 (ASN_TAG_CLASS_CONTEXT | (1 << 2)),
25                 -1,     /* IMPLICIT tag at current level */
26                 &asn_DEF_MAC_ParametersXDD_Diff,
27                 0,
28                 { 0, 0, 0 },
29                 0, 0, /* No default value */
30                 "mac-ParametersXDD-Diff"
31                 },
32         { ATF_POINTER, 1, offsetof(struct UE_NR_CapabilityAddXDD_Mode, measAndMobParametersXDD_Diff),
33                 (ASN_TAG_CLASS_CONTEXT | (2 << 2)),
34                 -1,     /* IMPLICIT tag at current level */
35                 &asn_DEF_MeasAndMobParametersXDD_Diff,
36                 0,
37                 { 0, 0, 0 },
38                 0, 0, /* No default value */
39                 "measAndMobParametersXDD-Diff"
40                 },
41 };
42 static const int asn_MAP_UE_NR_CapabilityAddXDD_Mode_oms_1[] = { 0, 1, 2 };
43 static const ber_tlv_tag_t asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1[] = {
44         (ASN_TAG_CLASS_UNIVERSAL | (16 << 2))
45 };
46 static const asn_TYPE_tag2member_t asn_MAP_UE_NR_CapabilityAddXDD_Mode_tag2el_1[] = {
47     { (ASN_TAG_CLASS_CONTEXT | (0 << 2)), 0, 0, 0 }, /* phy-ParametersXDD-Diff */
48     { (ASN_TAG_CLASS_CONTEXT | (1 << 2)), 1, 0, 0 }, /* mac-ParametersXDD-Diff */
49     { (ASN_TAG_CLASS_CONTEXT | (2 << 2)), 2, 0, 0 } /* measAndMobParametersXDD-Diff */
50 };
51 asn_SEQUENCE_specifics_t asn_SPC_UE_NR_CapabilityAddXDD_Mode_specs_1 = {
52         sizeof(struct UE_NR_CapabilityAddXDD_Mode),
53         offsetof(struct UE_NR_CapabilityAddXDD_Mode, _asn_ctx),
54         asn_MAP_UE_NR_CapabilityAddXDD_Mode_tag2el_1,
55         3,      /* Count of tags in the map */
56         asn_MAP_UE_NR_CapabilityAddXDD_Mode_oms_1,      /* Optional members */
57         3, 0,   /* Root/Additions */
58         -1,     /* First extension addition */
59 };
60 asn_TYPE_descriptor_t asn_DEF_UE_NR_CapabilityAddXDD_Mode = {
61         "UE-NR-CapabilityAddXDD-Mode",
62         "UE-NR-CapabilityAddXDD-Mode",
63         &asn_OP_SEQUENCE,
64         asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1,
65         sizeof(asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1)
66                 /sizeof(asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1[0]), /* 1 */
67         asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1,     /* Same as above */
68         sizeof(asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1)
69                 /sizeof(asn_DEF_UE_NR_CapabilityAddXDD_Mode_tags_1[0]), /* 1 */
70         { 0, 0, SEQUENCE_constraint },
71         asn_MBR_UE_NR_CapabilityAddXDD_Mode_1,
72         3,      /* Elements count */
73         &asn_SPC_UE_NR_CapabilityAddXDD_Mode_specs_1    /* Additional specs */
74 };
75