1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define EVENT_SCH_GEN_CFG 1
21 #define EVENT_SCH_CELL_CFG 2
22 #define EVENT_SCH_CELL_CFG_CFM 3
23 #define EVENT_DL_SCH_INFO 4
24 #define EVENT_UL_SCH_INFO 5
25 #define EVENT_RACH_IND_TO_SCH 6
26 #define EVENT_CRC_IND_TO_SCH 7
27 #define EVENT_DL_RLC_BO_INFO_TO_SCH 8
28 #define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 9
29 #define EVENT_UE_CONFIG_RSP_TO_MAC 10
30 #define EVENT_SLOT_IND_TO_SCH 11
31 #define EVENT_SHORT_BSR 12
32 #define EVENT_UCI_IND_TO_SCH 13
33 #define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 14
34 #define EVENT_UE_RECONFIG_RSP_TO_MAC 15
35 #define EVENT_UE_DELETE_REQ_TO_SCH 16
36 #define EVENT_UE_DELETE_RSP_TO_MAC 17
37 #define EVENT_CELL_DELETE_REQ_TO_SCH 18
38 #define EVENT_CELL_DELETE_RSP_TO_MAC 19
39 #define EVENT_LONG_BSR 20
40 #define EVENT_SLICE_CFG_REQ_TO_SCH 21
41 #define EVENT_SLICE_CFG_RSP_TO_MAC 22
42 #define EVENT_SLICE_RECFG_REQ_TO_SCH 23
43 #define EVENT_SLICE_RECFG_RSP_TO_MAC 24
44 #define EVENT_RACH_RESOURCE_REQUEST_TO_SCH 25
45 #define EVENT_RACH_RESOURCE_RESPONSE_TO_MAC 26
46 #define EVENT_RACH_RESOURCE_RELEASE_TO_SCH 27
47 #define EVENT_PAGING_IND_TO_SCH 28
48 #define EVENT_DL_PAGING_ALLOC 29
49 #define EVENT_DL_REL_HQ_PROC 30
50 #define EVENT_DL_HARQ_IND_TO_SCH 31
51 #define EVENT_DL_CQI_TO_SCH 32
52 #define EVENT_UL_CQI_TO_SCH 33
53 #define EVENT_PHR_IND_TO_SCH 34
55 #define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */
56 #define SCH_SSB_MASK_SIZE 1
58 #define MAX_NUM_PRG 1 /* max value should be later 275 */
59 #define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
60 #define MAX_CODEWORDS 1 /* max should be 2 */
61 #define SCH_HARQ_PROC_ID 1 /* harq proc id */
62 #define SCH_ALLOC_TYPE_1 1 /*sch res alloc type */
64 /* Datatype in UL SCH Info */
65 #define SCH_DATATYPE_PUSCH 1
66 #define SCH_DATATYPE_PUSCH_UCI 2
67 #define SCH_DATATYPE_UCI 4
68 #define SCH_DATATYPE_SRS 8
69 #define SCH_DATATYPE_PRACH 16
71 #define MAX_NUMBER_OF_CRC_IND_BITS 1
72 #define MAX_NUMBER_OF_UCI_IND_BITS 1
73 #define MAX_SR_BITS_IN_BYTES 1
74 #define MAX_HARQ_BITS_IN_BYTES 1
75 #define MAX_NUM_LOGICAL_CHANNEL_GROUPS 8
76 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */
77 #define MAX_NUM_TAGS 4 /* Max number of timing advance groups */
78 #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */
79 #define MAX_NUM_CRSET 3 /* Max number of control resource set in add/modify/release list */
80 #define MAX_NUM_SEARCH_SPC 10 /* Max number of search space in add/modify/release list */
81 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
82 #define MONITORING_SYMB_WITHIN_SLOT_SIZE 2 /* i.e. 2 bytes because size of monitoring symbols within slot is 14 bits */
83 #define MAX_NUM_DL_ALLOC 16 /* Max number of pdsch time domain downlink allocation */
84 #define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
86 /* PUCCH Configuration Macro */
87 #define MAX_NUM_PUCCH_RESRC 128
88 #define MAX_NUM_PUCCH_RESRC_SET 4
89 #define MAX_NUM_PUCCH_PER_RESRC_SET 32
90 #define MAX_NUM_SPATIAL_RELATIONS 8
91 #define MAX_NUM_PUCCH_P0_PER_SET 8
92 #define MAX_NUM_PATH_LOSS_REF_RS 4
93 #define MAX_NUM_DL_DATA_TO_UL_ACK 15
94 #define QPSK_MODULATION 2
96 #define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
97 #define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
98 #define UL_TX_BUFFER_SIZE 5
100 #define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/
101 #define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
102 #define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */
103 #define MIN_NUM_K1_IDX 4 /* Min K1 values */
104 #define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */
105 #define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */
106 /* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */
107 #define DEFAULT_K2_VALUE_FOR_SCS15 1
108 #define DEFAULT_K2_VALUE_FOR_SCS30 1
109 #define DEFAULT_K2_VALUE_FOR_SCS60 2
110 #define DEFAULT_K2_VALUE_FOR_SCS120 3
113 #define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
115 #define MAX_PHR_REPORT 1 /*TODO: Range of PHR reports in multiple PHR.*/
116 #define MAX_FAILURE_DET_RESOURCES 10 /*Spec 38.331 'maxNrofFailureDetectionResources'*/
118 #define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
120 if ((crntTime.slot + incr) > (numOfSlot - 1)) \
122 toFill.sfn = (crntTime.sfn + 1); \
126 toFill.sfn = crntTime.sfn; \
128 toFill.slot = (crntTime.slot + incr) % numOfSlot; \
129 if (toFill.sfn >= MAX_SFN) \
131 toFill.sfn%=MAX_SFN; \
139 RRC_CONNECTED_USERS_RSRC
147 RESOURCE_NOT_AVAILABLE
161 RESOURCE_UNAVAILABLE,
198 TIME_ALIGNMENT_TIMER_MS500,
199 TIME_ALIGNMENT_TIMER_MS750,
200 TIME_ALIGNMENT_TIMER_MS1280,
201 TIME_ALIGNMENT_TIMER_MS1920,
202 TIME_ALIGNMENT_TIMER_MS2560,
203 TIME_ALIGNMENT_TIMER_MS5120,
204 TIME_ALIGNMENT_TIMER_MS10240,
205 TIME_ALIGNMENT_TIMER_INFINITE
206 }SchTimeAlignmentTimer;
210 PHR_PERIODIC_TIMER_SF10,
211 PHR_PERIODIC_TIMER_SF20,
212 PHR_PERIODIC_TIMER_SF50,
213 PHR_PERIODIC_TIMER_SF100,
214 PHR_PERIODIC_TIMER_SF200,
215 PHR_PERIODIC_TIMER_SF500,
216 PHR_PERIODIC_TIMER_SF1000,
217 PHR_PERIODIC_TIMER_INFINITE
218 }SchPhrPeriodicTimer;
222 PHR_PROHIBIT_TIMER_SF0,
223 PHR_PROHIBIT_TIMER_SF10,
224 PHR_PROHIBIT_TIMER_SF20,
225 PHR_PROHIBIT_TIMER_SF50,
226 PHR_PROHIBIT_TIMER_SF100,
227 PHR_PROHIBIT_TIMER_SF200,
228 PHR_PROHIBIT_TIMER_SF500,
229 PHR_PROHIBIT_TIMER_SF1000
230 }SchPhrProhibitTimer;
234 PHR_TX_PWR_FACTOR_CHANGE_DB1,
235 PHR_TX_PWR_FACTOR_CHANGE_DB3,
236 PHR_TX_PWR_FACTOR_CHANGE_DB6,
237 PHR_TX_PWR_FACTOR_CHANGE_INFINITE
238 }SchPhrTxPwrFactorChange;
248 HARQ_ACK_CODEBOOK_SEMISTATIC,
249 HARQ_ACK_CODEBOOK_DYNAMIC
250 }SchPdschHarqAckCodebook;
254 NUM_HARQ_PROC_FOR_PDSCH_N2,
255 NUM_HARQ_PROC_FOR_PDSCH_N4,
256 NUM_HARQ_PROC_FOR_PDSCH_N6,
257 NUM_HARQ_PROC_FOR_PDSCH_N10,
258 NUM_HARQ_PROC_FOR_PDSCH_N16
259 }SchNumHarqProcForPdsch;
263 MAX_CODE_BLOCK_GROUP_PER_TB_N2,
264 MAX_CODE_BLOCK_GROUP_PER_TB_N4,
265 MAX_CODE_BLOCK_GROUP_PER_TB_N6,
266 MAX_CODE_BLOCK_GROUP_PER_TB_N8
267 }SchMaxCodeBlkGrpPerTB;
271 PDSCH_X_OVERHEAD_XOH_6,
272 PDSCH_X_OVERHEAD_XOH_12,
273 PDSCH_X_OVERHEAD_XOH_18
278 DMRS_ADDITIONAL_POS0,
279 DMRS_ADDITIONAL_POS1,
281 }SchDmrsAdditionPosition;
285 RESOURCE_ALLOCTION_TYPE_0,
286 RESOURCE_ALLOCTION_TYPE_1,
287 RESOURCE_ALLOCTION_DYN_SWITCH
288 }SchResourceAllocType;
292 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_A,
293 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_B
294 }SchTimeDomRsrcAllocMappingType;
298 ENABLED_TRANSFORM_PRECODER,
299 DISABLED_TRANSFORM_PRECODER
300 }SchTransformPrecoder;
304 INTERLEAVED_CCE_REG_MAPPING = 1,
305 NONINTERLEAVED_CCE_REG_MAPPING
310 SLOT_PERIODICITY_AND_OFFSET_SL_1 = 1,
311 SLOT_PERIODICITY_AND_OFFSET_SL_2,
312 SLOT_PERIODICITY_AND_OFFSET_SL_4,
313 SLOT_PERIODICITY_AND_OFFSET_SL_5,
314 SLOT_PERIODICITY_AND_OFFSET_SL_8,
315 SLOT_PERIODICITY_AND_OFFSET_SL_10,
316 SLOT_PERIODICITY_AND_OFFSET_SL_16,
317 SLOT_PERIODICITY_AND_OFFSET_SL_20,
318 SLOT_PERIODICITY_AND_OFFSET_SL_40,
319 SLOT_PERIODICITY_AND_OFFSET_SL_80,
320 SLOT_PERIODICITY_AND_OFFSET_SL_160,
321 SLOT_PERIODICITY_AND_OFFSET_SL_320,
322 SLOT_PERIODICITY_AND_OFFSET_SL_640,
323 SLOT_PERIODICITY_AND_OFFSET_SL_1280,
324 SLOT_PERIODICITY_AND_OFFSET_SL_2560
325 }SchMSlotPeriodAndOffset;
335 SEARCH_SPACE_TYPE_COMMON = 1,
336 SEARCH_SPACE_TYPE_UE_SPECIFIC
341 SCH_QOS_NON_DYNAMIC = 1,
347 AGGREGATION_LEVEL_N0,
348 AGGREGATION_LEVEL_N1,
349 AGGREGATION_LEVEL_N2,
350 AGGREGATION_LEVEL_N3,
351 AGGREGATION_LEVEL_N4,
352 AGGREGATION_LEVEL_N5,
353 AGGREGATION_LEVEL_N6,
365 CODE_WORDS_SCHED_BY_DCI_N1,
366 CODE_WORDS_SCHED_BY_DCI_N2
367 }SchCodeWordsSchedByDci;
371 STATIC_BUNDLING_TYPE = 1,
372 DYNAMIC_BUNDLING_TYPE
378 SCH_SET1_SIZE_WIDEBAND,
379 SCH_SET1_SIZE_N2_WIDEBAND,
380 SCH_SET1_SIZE_N4_WIDEBAND
381 }SchBundlingSizeSet1;
386 SCH_SET2_SIZE_WIDEBAND
387 }SchBundlingSizeSet2;
441 SCH_MCS_TABLE_QAM_64,
442 SCH_MCS_TABLE_QAM_256,
443 SCH_MCS_TABLE_QAM_64_LOW_SE
456 DATA_TRANSMISSION_ALLOWED,
457 STOP_DATA_TRANSMISSION,
458 RESTART_DATA_TRANSMISSION
459 }SchDataTransmission;
466 }SchPurposeOfFailureDet;
475 typedef struct timeDomainAlloc
481 typedef struct resAllocType0
483 uint8_t rbBitmap[36];
486 typedef struct resAllocType1
492 typedef struct resAllocType1 FreqDomainRsrc;
494 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */
495 typedef struct bwpCfg
497 uint8_t subcarrierSpacing;
498 uint8_t cyclicPrefix;
499 FreqDomainRsrc freqAlloc;
505 uint16_t beamIdx[MAX_DIG_BF_INTERFACES];
508 typedef struct beamformingInfo
512 uint8_t digBfInterfaces;
513 Prg prg[MAX_NUM_PRG];
516 /* SIB1 PDSCH structures */
518 typedef struct codewordinfo
520 uint16_t targetCodeRate;
528 typedef struct dmrsInfo
530 uint16_t dlDmrsSymbPos;
531 uint8_t dmrsConfigType;
532 uint16_t dlDmrsScramblingId;
534 uint8_t numDmrsCdmGrpsNoData;
537 uint8_t nrOfDmrsSymbols;
541 typedef struct pdschFreqAlloc
543 uint8_t resourceAllocType;
544 /* since we are using type-1, rbBitmap excluded */
545 uint8_t rbBitmap[36];
548 uint8_t vrbPrbMapping;
551 typedef struct pdschTimeAlloc
558 typedef struct txPowerPdschInfo
560 uint8_t powerControlOffset;
561 uint8_t powerControlOffsetSS;
564 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
565 typedef struct pdschCfg
570 uint8_t numCodewords;
571 CodewordInfo codeword[MAX_CODEWORDS];
572 uint16_t dataScramblingId;
574 uint8_t transmissionScheme;
577 PdschFreqAlloc pdschFreqAlloc;
578 PdschTimeAlloc pdschTimeAlloc;
579 BeamformingInfo beamPdschInfo;
580 TxPowerPdschInfo txPdschPower;
582 /* SIB1 PDSCH structures end */
584 /* SIB1 interface structure */
586 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
587 typedef struct coresetCfg
590 uint8_t startSymbolIndex;
591 uint8_t durationSymbols;
592 uint8_t freqDomainResource[6];
593 uint8_t cceRegMappingType;
594 uint8_t regBundleSize;
595 uint8_t interleaverSize;
598 uint8_t coresetPoolIndex;
599 uint8_t precoderGranularity;
601 uint8_t aggregationLevel;
604 typedef struct txPowerPdcchInfo
606 uint8_t beta_pdcch_1_0;
607 uint8_t powerControlOffsetSS;
610 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
614 uint16_t scramblingId;
615 uint16_t scramblingRnti;
618 BeamformingInfo beamPdcchInfo;
619 TxPowerPdcchInfo txPdcchPower;
623 typedef struct pdcchCfg
625 /* coreset-0 configuration */
626 CoresetCfg coresetCfg;
628 DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
630 /* end of SIB1 PDCCH structures */
632 typedef struct schPcchCfg
634 uint8_t numPO; /*Derived from Ns*/
635 bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
636 uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
639 typedef struct schPdcchConfigSib1
641 uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
642 uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
645 typedef struct schRachCfgGeneric
647 uint8_t prachCfgIdx; /* PRACH config idx */
648 uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
649 uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
650 uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
651 int16_t preambleRcvdTargetPower;
652 uint8_t preambleTransMax;
653 uint8_t pwrRampingStep;
654 uint8_t raRspWindow; /* RA Response Window */
657 typedef struct schRachCfg
659 SchRachCfgGeneric prachCfgGeneric;
660 uint8_t totalNumRaPreamble; /* Total number of RA preambles */
661 uint8_t ssbPerRach; /* SSB per RACH occassion */
662 uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
663 uint8_t raContResTmr; /* RA Contention Resoultion Timer */
664 uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
665 uint16_t rootSeqIdx; /* Root sequence index */
666 uint16_t rootSeqLen; /* root sequence length */
667 uint8_t numRootSeq; /* Number of root sequences required for FD */
668 uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
671 typedef struct schBwpParams
673 FreqDomainRsrc freqAlloc;
675 uint8_t cyclicPrefix;
678 typedef struct schCandidatesInfo
687 typedef struct schSearchSpaceCfg
689 uint8_t searchSpaceId;
691 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
692 uint16_t monitoringSlot;
694 uint16_t monitoringSymbol;
695 SchCandidatesInfo candidate;
698 typedef struct schPdcchCfgCmn
700 SchSearchSpaceCfg commonSearchSpace;
701 uint8_t raSearchSpaceId;
704 typedef struct schPdschCfgCmnTimeDomRsrcAlloc
709 uint8_t lengthSymbol;
710 }SchPdschCfgCmnTimeDomRsrcAlloc;
712 typedef struct schPdschCfgCmn
714 uint8_t numTimeDomAlloc;
715 SchPdschCfgCmnTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
718 typedef struct schPucchCfgCmn
720 uint8_t pucchResourceCommon;
721 uint8_t pucchGroupHopping;
724 /* PUSCH Time Domain Resource Allocation */
725 typedef struct schPuschTimeDomRsrcAlloc
728 SchTimeDomRsrcAllocMappingType mappingType;
730 uint8_t symbolLength;
731 }SchPuschTimeDomRsrcAlloc;
733 typedef struct schPuschCfgCmn
735 uint8_t numTimeDomRsrcAlloc;
736 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
739 typedef struct schK1TimingInfo
742 uint8_t k1Indexes[MAX_NUM_K1_IDX];
745 typedef struct schK0TimingInfo
748 SchK1TimingInfo k1TimingInfo;
751 typedef struct schK0K1TimingInfo
754 SchK0TimingInfo k0Indexes[MAX_NUM_K0_IDX];
757 typedef struct schK0K1TimingInfoTbl
760 SchK0K1TimingInfo k0k1TimingInfo[MAX_NUM_CONFIG_SLOTS];
761 }SchK0K1TimingInfoTbl;
763 typedef struct schBwpDlCfg
766 SchPdcchCfgCmn pdcchCommon;
767 SchPdschCfgCmn pdschCommon;
770 typedef struct schK2TimingInfo
773 uint8_t k2Indexes[MAX_NUM_K2_IDX];
776 typedef struct schK2TimingInfoTbl
779 SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS];
782 typedef struct schBwpUlCfg
785 SchRachCfg schRachCfg; /* PRACH config */
786 SchPucchCfgCmn pucchCommon;
787 SchPuschCfgCmn puschCommon;
790 typedef struct schPlmnInfoList
793 uint8_t numSliceSupport; /* Total slice supporting */
794 Snssai **snssai; /* List of supporting snssai*/
798 /* The following list of structures is taken from the DRX-Config section of specification 33.331. */
800 typedef struct schDrxOnDurationTimer
802 bool onDurationTimerValInMs;
805 uint8_t subMilliSeconds;
806 uint16_t milliSeconds;
807 }onDurationtimerValue;
808 }SchDrxOnDurationTimer;
810 typedef struct schDrxLongCycleStartOffset
812 uint16_t drxLongCycleStartOffsetChoice;
813 uint16_t drxLongCycleStartOffsetVal;
814 }SchDrxLongCycleStartOffset;
816 typedef struct schShortDrx
818 uint16_t drxShortCycle;
819 uint8_t drxShortCycleTimer;
822 typedef struct schDrxCfg
824 SchDrxOnDurationTimer drxOnDurationTimer;
825 uint16_t drxInactivityTimer;
826 uint8_t drxHarqRttTimerDl;
827 uint8_t drxHarqRttTimerUl;
828 uint16_t drxRetransmissionTimerDl;
829 uint16_t drxRetransmissionTimerUl;
830 SchDrxLongCycleStartOffset drxLongCycleStartOffset;
832 SchShortDrx shortDrx;
833 uint8_t drxSlotOffset;
837 /*Spec 38.331 'NrNsPmaxList'*/
838 typedef struct schNrNsPmaxList
841 long additionalSpectrumEmission;
844 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
845 typedef struct schMultiFreqBandListSib
848 SchNrNsPmaxList nrNsPmaxList[1];
849 }SchMultiFreqBandListSib;
851 /*Spec 38.331 'SCS-SpecificCarrier'*/
852 typedef struct schScsSpecificCarrier
854 uint16_t offsetToCarrier;
855 uint8_t subCarrierSpacing;
857 uint16_t txDirectCurrentLoc;
858 }SchScsSpecificCarrier;
860 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
861 typedef struct schFreqInfoDlSib
863 SchMultiFreqBandListSib mutiFreqBandList[1];
864 uint16_t offsetToPointA;
865 SchScsSpecificCarrier schSpcCarrier[1];
868 typedef struct schBcchCfg
873 /*Spec 38.331 'DownlinkConfigCommonSIB'*/
874 typedef struct schDlCfgCommon
876 SchFreqInfoDlSib schFreqInfoDlSib;
877 SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
878 SchBcchCfg schBcchCfg;
879 SchPcchCfg schPcchCfg;
882 /*Spec 38.331 'FrequencyInfoUL-SIB'*/
883 typedef struct schFreqInfoUlSib
885 SchMultiFreqBandListSib mutiFreqBandList[1];
886 uint16_t absoluteFreqPointA;
887 SchScsSpecificCarrier schSpcCarrier[1];
889 bool frequencyShift7p5khz;
892 /*Spec 38.331 'UplinkConfigCommonSIB '*/
893 typedef struct schUlCfgCommon
895 SchFreqInfoUlSib schFreqInfoUlSib;
896 SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */
897 uint16_t schTimeAlignTimer;
900 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.2.1 Cell Conf Request*/
901 typedef struct schCellCfg
903 uint16_t cellId; /* Cell Id */
907 uint16_t phyCellId; /* Physical cell id */
908 SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */
909 SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
910 uint8_t numerology; /* Supported numerology */
911 uint8_t dlBandwidth; /* Supported B/W */
912 uint8_t ulBandwidth; /* Supported B/W */
913 SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/
914 SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/
916 TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */
919 /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
920 *value 1 => corresponding SS/PBCH block is transmitted*/
921 uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
922 SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
923 uint32_t ssbFrequency; /* SB frequency in kHz*/
924 uint8_t dmrsTypeAPos;
925 uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
926 SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/
927 uint32_t ssbPbchPwr; /* SSB block power */
928 uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
932 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.3.1 Cell Config Response*/
933 typedef struct schCellCfgCfm
935 uint16_t cellId; /* Cell Id */
937 SchFailureCause cause;
940 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.2.2 Cell Del Req*/
941 typedef struct schCellDeleteReq
946 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.3.2 Cell Del Response*/
947 typedef struct schCellDeleteRsp
951 SchFailureCause cause;
954 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.2.3*/
955 typedef struct schRrmPolicyRatio
959 uint8_t dedicatedRatio;
962 typedef struct schRrmPolicyOfSlice
965 SchRrmPolicyRatio rrmPolicyRatioInfo;
966 }SchRrmPolicyOfSlice;
968 typedef struct schSliceCfgReq
970 uint8_t numOfConfiguredSlice;
971 SchRrmPolicyOfSlice **listOfSlices;
974 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.3.3 Slice Cfg Response*/
975 typedef struct schSliceCfgRsp
982 /*As per ORAN-WG8 V7.0.0 Sec 11.2.4.3.4 , Slice Cfg and Recfg are same structures*/
983 typedef struct schSliceCfgReq SchSliceRecfgReq;
984 typedef struct schSliceCfgRsp SchSliceRecfgRsp;
986 typedef struct ssbInfo
988 uint8_t ssbIdx; /* SSB Index */
989 TimeDomainAlloc tdAlloc; /* Time domain allocation */
990 FreqDomainRsrc fdAlloc; /* Freq domain allocation */
993 typedef struct sib1AllocInfo
996 PdcchCfg *sib1PdcchCfg;
999 typedef struct prachSchInfo
1001 uint8_t numPrachOcas; /* Num Prach Ocassions */
1002 uint8_t prachFormat; /* PRACH Format */
1003 uint8_t numRa; /* Freq domain ocassion */
1004 uint8_t prachStartSymb; /* Freq domain ocassion */
1007 /* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
1008 typedef struct dlBrdcstAlloc
1010 uint16_t crnti; /* SI-RNTI */
1011 /* Ssb transmission is determined as follows:
1012 * 0 : No tranamission
1013 * 1 : SSB Transmission
1014 * 2 : SSB Repetition */
1015 uint8_t ssbTransmissionMode;
1016 uint8_t ssbIdxSupported;
1017 SsbInfo ssbInfo[MAX_SSB_IDX];
1018 bool systemInfoIndicator;
1020 /* Sib1 transmission is determined as follows:
1021 * 0 : No tranamission
1022 * 1 : SIB1 Transmission
1023 * 2 : SIB1 Repetition */
1024 uint8_t sib1TransmissionMode;
1025 Sib1AllocInfo sib1Alloc;
1028 typedef struct msg3UlGrant
1030 uint8_t freqHopFlag;
1032 FreqDomainRsrc msg3FreqAlloc;
1039 typedef struct rarInfo
1043 Msg3UlGrant ulGrant;
1045 uint8_t rarPdu[RAR_PAYLOAD_SIZE];
1049 typedef struct rarAlloc
1054 PdcchCfg *rarPdcchCfg;
1055 PdschCfg *rarPdschCfg;
1058 typedef struct lcSchInfo
1064 typedef struct ceSchInfo
1070 typedef struct freqDomainAlloc
1072 uint8_t resAllocType; /* Resource allocation type */
1075 ResAllocType0 type0;
1076 ResAllocType1 type1;
1080 typedef struct transportBlock
1087 CeSchInfo ceSchInfo[MAX_NUM_LC];
1089 LcSchInfo lcSchInfo[MAX_NUM_LC];
1092 typedef struct dlMsgSchedInfo
1095 uint8_t dciFormatId;
1096 uint8_t harqProcNum;
1098 uint8_t dlAssignIdx;
1100 uint8_t pucchResInd;
1101 uint8_t harqFeedbackInd;
1102 uint16_t dlMsgPduLen;
1104 FreqDomainAlloc freqAlloc;
1105 TimeDomainAlloc timeAlloc;
1107 TransportBlock transportBlock[2];
1109 PdcchCfg *dlMsgPdcchCfg;
1110 PdschCfg *dlMsgPdschCfg;
1113 typedef struct schSlotValue
1115 SlotTimingInfo currentTime;
1116 SlotTimingInfo broadcastTime;
1117 SlotTimingInfo rarTime;
1118 SlotTimingInfo dlMsgTime;
1119 SlotTimingInfo ulDciTime;
1123 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */
1124 typedef struct format0_0
1126 uint8_t resourceAllocType;
1127 FreqDomainAlloc freqAlloc;
1128 TimeDomainAlloc timeAlloc;
1139 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-40 DCI Format 0_1 Configuration */
1140 typedef struct format0_1
1142 uint8_t carrierIndicator;
1144 uint8_t bwpIndicator;
1145 uint8_t resourceAlloc;
1146 FreqDomainRsrc freqAlloc;
1147 TimeDomainAlloc timeAlloc;
1154 uint8_t firstDownlinkAssignmentIndex;
1155 uint8_t secondDownlinkAssignmentIndex;
1157 uint8_t srsResourceSetIndicator;
1158 uint8_t srsResourceIndicator;
1160 uint8_t antennaPorts;
1163 uint8_t cbgTransmissionInfo;
1165 uint8_t betaOffsetIndicator;
1166 bool dmrsSequenceInitialization;
1167 bool ulschIndicatior;
1170 typedef struct dciFormat
1172 FormatType formatType; /* DCI Format */
1175 Format0_0 format0_0; /* Format 0_0 */
1176 Format0_1 format0_1; /* Format 0_1 */
1180 typedef struct dciInfo
1182 uint16_t crnti; /* CRNTI */
1183 BwpCfg bwpCfg; /* BWP Cfg */
1184 CoresetCfg coresetCfg; /* Coreset1 Cfg */
1185 DciFormat dciFormatInfo; /* Dci Format */
1186 DlDCI dciInfo; /* DlDCI */
1190 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
1191 typedef struct dlSchedInfo
1193 uint16_t cellId; /* Cell Id */
1194 SchSlotValue schSlotValue;
1196 /* Allocation for broadcast messages */
1197 bool isBroadcastPres;
1198 DlBrdcstAlloc brdcstAlloc;
1200 /* Allocation for RAR message */
1201 RarAlloc *rarAlloc[MAX_NUM_UE];
1203 /* UL grant in response to BSR */
1206 /* Allocation from dedicated DL msg */
1207 DlMsgSchInfo *dlMsgAlloc[MAX_NUM_UE];
1211 /*Reference: O-RAN.WG8.AAD.v7.0.0, Sec 11.2.4.3.13 Downlink Paging Allocation*/
1212 typedef struct interleaved_t
1214 uint8_t regBundleSize;
1215 uint8_t interleaverSize;
1216 uint16_t shiftIndex;
1219 typedef struct pageDlDci
1221 uint8_t freqDomainResource[6];
1222 uint8_t durationSymbols;
1223 uint8_t cceRegMappingType;
1226 Interleaved interleaved;
1227 uint8_t nonInterleaved;
1229 uint8_t ssStartSymbolIndex;
1231 uint8_t aggregLevel;
1232 uint8_t precoderGranularity;
1233 uint8_t coreSetSize;
1236 typedef struct resAllocType1 PageFreqDomainAlloc;
1238 typedef struct pageTimeDomainAlloc
1240 uint8_t mappingType;
1243 }PageTimeDomainAlloc;
1245 typedef struct pageDmrsConfig
1249 uint8_t nrOfDmrsSymbols;
1252 typedef struct pageTbInfo
1258 typedef struct pageDlSch
1260 PageFreqDomainAlloc freqAlloc;
1261 PageTimeDomainAlloc timeAlloc;
1262 PageDmrsConfig dmrs;
1263 uint8_t vrbPrbMapping;
1266 uint16_t dlPagePduLen;
1270 typedef struct dlPageAlloc
1273 SlotTimingInfo dlPageTime;
1278 PageDlDci pageDlDci;
1279 PageDlSch pageDlSch;
1282 typedef struct tbInfo
1284 uint8_t mcs; /* MCS */
1285 uint8_t ndi; /* NDI */
1286 uint8_t rv; /* Redundancy Version */
1287 uint16_t tbSize; /* TB Size */
1288 uint8_t qamOrder; /* Modulation Order */
1289 SchMcsTable mcsTable; /* MCS Table */
1292 typedef struct schPuschInfo
1294 uint8_t harqProcId; /* HARQ Process ID */
1295 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1296 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1297 TbInfo tbInfo; /* TB info */
1299 uint8_t dmrsMappingType;
1300 uint8_t nrOfDmrsSymbols;
1305 typedef struct harqInfo
1307 uint16_t harqAckBitLength;
1308 uint8_t betaOffsetHarqAck;
1311 typedef struct csiInfo
1314 uint8_t betaOffsetCsi;
1317 typedef struct harqFdbkInfo
1319 uint16_t harqBitLength;
1322 typedef struct csiFdbkInfo
1327 typedef struct schPucchFormatCfg
1329 uint8_t interSlotFreqHop;
1331 uint8_t maxCodeRate;
1337 typedef struct schPucchInfo
1339 FreqDomainRsrc fdAlloc;
1340 TimeDomainAlloc tdAlloc;
1342 HarqFdbkInfo harqInfo;
1343 CsiFdbkInfo csiInfo;
1344 BeamformingInfo beamPucchInfo;
1345 uint8_t pucchFormat;
1346 uint8_t intraFreqHop;
1347 uint16_t secondPrbHop;
1348 uint8_t initialCyclicShift;
1356 typedef struct schPuschUci
1358 uint8_t harqProcId; /* HARQ Process ID */
1359 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1360 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1361 TbInfo tbInfo; /* TB information */
1362 HarqInfo harqInfo; /* Harq Information */
1363 CsiInfo csiInfo; /* Csi information*/
1366 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.9 UL Scheduling Information */
1367 typedef struct ulSchedInfo
1369 uint16_t cellId; /* Cell Id */
1370 uint16_t crnti; /* CRNI */
1371 SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
1372 uint8_t dataType; /* Type of info being scheduled */
1373 SchPrachInfo prachSchInfo; /* Prach scheduling info */
1374 SchPuschInfo schPuschInfo; /* Pusch scheduling info */
1375 SchPuschUci schPuschUci; /* Pusch Uci */
1376 SchPucchInfo schPucchInfo; /* Pucch and Uci scheduling info */
1379 /* Info of Scheduling Request to Add/Modify */
1380 typedef struct schSchedReqInfo
1383 SchSrProhibitTimer srProhibitTmr;
1384 SchSrTransMax srTransMax;
1387 /* Scheduling Request Configuration */
1388 typedef struct schSchedReqCfg
1390 uint8_t addModListCount;
1391 SchSchedReqInfo addModList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* List of Scheduling req to be added/modified */
1392 uint8_t relListCount;
1393 uint8_t relList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* list of scheduling request Id to be deleted */
1396 /* Info of Tag to Add/Modify */
1397 typedef struct schTagInfo
1400 SchTimeAlignmentTimer timeAlignmentTmr;
1403 /* Timing Advance Group Configuration */
1404 typedef struct schTagCfg
1406 uint8_t addModListCount;
1407 SchTagInfo addModList[MAX_NUM_TAGS]; /* List of Tag to Add/Modify */
1408 uint8_t relListCount;
1409 uint8_t relList[MAX_NUM_TAGS]; /* list of Tag Id to release */
1412 /* Configuration for Power headroom reporting */
1413 typedef struct schPhrCfg
1415 SchPhrPeriodicTimer periodicTmr;
1416 SchPhrProhibitTimer prohibitTmr;
1417 SchPhrTxPwrFactorChange txpowerFactorChange;
1420 bool type2OtherCell;
1421 SchPhrModeOtherCG modeOtherCG;
1424 /* MAC cell Group configuration */
1425 typedef struct schMacCellGrpCfg
1427 SchSchedReqCfg schedReqCfg;
1429 SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */
1432 SchDrxCfg drxCfg; /* Drx configuration */
1436 /* Physical Cell Group Configuration */
1437 typedef struct schPhyCellGrpCfg
1439 SchPdschHarqAckCodebook pdschHarqAckCodebook;
1443 /* Control resource set info */
1444 typedef struct schControlRsrcSet
1446 uint8_t cRSetId; /* Control resource set id */
1447 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
1449 SchREGMappingType cceRegMappingType;
1450 SchPrecoderGranul precoderGranularity;
1451 uint16_t dmrsScramblingId;
1454 /* Search Space info */
1455 typedef struct schSearchSpace
1457 uint8_t searchSpaceId;
1459 SchMSlotPeriodAndOffset mSlotPeriodicityAndOffset;
1460 uint8_t mSymbolsWithinSlot[MONITORING_SYMB_WITHIN_SLOT_SIZE];
1461 SchAggrLevel numCandidatesAggLevel1; /* Number of candidates for aggregation level 1 */
1462 SchAggrLevel numCandidatesAggLevel2; /* Number of candidates for aggregation level 2 */
1463 SchAggrLevel numCandidatesAggLevel4; /* Number of candidates for aggregation level 4 */
1464 SchAggrLevel numCandidatesAggLevel8; /* Number of candidates for aggregation level 8 */
1465 SchAggrLevel numCandidatesAggLevel16; /* Number of candidates for aggregation level 16 */
1466 SchSearchSpaceType searchSpaceType;
1467 uint8_t ueSpecificDciFormat;
1470 /* PDCCH cofniguration */
1471 typedef struct schPdcchConfig
1473 uint8_t numCRsetToAddMod;
1474 SchControlRsrcSet cRSetToAddModList[MAX_NUM_CRSET]; /* List of control resource set to add/modify */
1475 uint8_t numCRsetToRel;
1476 uint8_t cRSetToRelList[MAX_NUM_CRSET]; /* List of control resource set to release */
1477 uint8_t numSearchSpcToAddMod;
1478 SchSearchSpace searchSpcToAddModList[MAX_NUM_SEARCH_SPC]; /* List of search space to add/modify */
1479 uint8_t numSearchSpcToRel;
1480 uint8_t searchSpcToRelList[MAX_NUM_SEARCH_SPC]; /* List of search space to release */
1483 /* PDSCH time domain resource allocation */
1484 typedef struct schPdschTimeDomRsrcAlloc
1487 SchTimeDomRsrcAllocMappingType mappingType;
1488 uint8_t startSymbol;
1489 uint8_t symbolLength;
1490 }SchPdschTimeDomRsrcAlloc;
1493 typedef struct schPdschBundling
1495 struct schStaticBundling
1497 SchBundlingSizeSet2 size;
1499 struct schDynamicBundling
1501 SchBundlingSizeSet1 sizeSet1;
1502 SchBundlingSizeSet2 sizeSet2;
1503 }SchDynamicBundling;
1506 /* DMRS downlink configuration */
1507 typedef struct schDmrsDlCfg
1509 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1512 /* PDSCH Configuration */
1513 typedef struct schPdschConfig
1515 SchDmrsDlCfg dmrsDlCfgForPdschMapTypeA;
1516 SchResourceAllocType resourceAllocType;
1517 uint8_t numTimeDomRsrcAlloc;
1518 SchPdschTimeDomRsrcAlloc timeDomRsrcAllociList[MAX_NUM_DL_ALLOC]; /* PDSCH time domain DL resource allocation list */
1520 SchCodeWordsSchedByDci numCodeWordsSchByDci; /* Number of code words scheduled by DCI */
1521 SchBundlingType bundlingType;
1522 SchPdschBundling bundlingInfo;
1525 /* Initial Downlink BWP */
1526 typedef struct schInitalDlBwp
1529 SchPdcchConfig pdcchCfg;
1531 SchPdschConfig pdschCfg;
1534 /*Spec 38.331 'RadioLinkMonitoringConfig'*/
1535 typedef uint8_t SchRadioLinkMonitoringRsId;
1537 typedef struct schRadioLinkMonRS
1539 SchRadioLinkMonitoringRsId radioLinkMonitoringRsId;
1540 SchPurposeOfFailureDet purpose;
1544 uint8_t nzpCsiRsResId;
1548 typedef struct schRadioLinkConfig
1550 SchRadioLinkMonRS failurDetResAddModList[MAX_FAILURE_DET_RESOURCES];
1551 SchRadioLinkMonitoringRsId failurDetResRelList[MAX_FAILURE_DET_RESOURCES];
1552 uint8_t beamFailureInstanceMaxCount;
1553 uint8_t beamFailureDetectionTimer;
1554 }SchRadioLinkConfig;
1556 /*Spec 38.331 "SPS-Config'*/
1557 typedef struct schSpsConfig
1559 uint16_t periodicity;
1560 uint8_t numOfHqProcess;
1562 SchMcsTable mcsTable;
1565 /* Spec 38.331, 'BWP-DownlinkDedicated'*/
1566 typedef struct schBwpDlCfgDed
1568 SchPdcchConfig pdcchCfgDed;
1569 SchPdschConfig pdschCfgDed;
1570 SchSpsConfig spsCfgDed;
1571 SchRadioLinkConfig radioLnkMonCfgDed;
1574 /* Spec 38.331, 'BWP-Downlink' Downlink BWP information */
1575 typedef struct schDlBwpInfo
1578 SchBwpDlCfg bwpCommon;
1579 SchBwpDlCfgDed bwpDedicated;
1582 /* PDCCH Serving Cell configuration */
1583 typedef struct schPdschServCellCfg
1585 uint8_t *maxMimoLayers;
1586 SchNumHarqProcForPdsch numHarqProcForPdsch;
1587 SchMaxCodeBlkGrpPerTB *maxCodeBlkGrpPerTb;
1588 bool *codeBlkGrpFlushInd;
1589 SchPdschXOverhead *xOverhead;
1590 }SchPdschServCellCfg;
1592 typedef struct schRaPrioritization
1594 uint8_t powerRampingStepHighPriority;
1595 uint8_t scalingFactorBI;
1596 }SchRaPrioritization;
1598 typedef struct schBfrCsiRsRes
1602 uint8_t raPreambleIndex;
1605 typedef struct schBfrSsbRes
1608 uint8_t raPreambleIndex;
1611 typedef struct schPrachResDedBfr
1614 SchBfrCsiRsRes csiRs;
1617 /*Spec 38.331 'BeamFailureRecoveryConfig' */
1618 typedef struct schBeamFailRecoveryCfg
1620 uint8_t rootSeqIndexBfr;
1621 SchRachCfgGeneric rachCfgBfr;
1622 uint8_t rsrpThreshSsbBfr; /* RSRP Threshold SSB */
1623 SchPrachResDedBfr candidateBeamRSList;
1624 uint8_t ssbPerRachBfr; /* SSB per RACH occassion */
1625 uint8_t raSsbOccMaskIndex;
1626 uint8_t recoverySearchSpaceId;
1627 SchRaPrioritization raPrioBfr;
1629 uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
1630 }SchBeamFailRecoveryCfg;
1632 /* PUCCH Configuration */
1633 typedef struct schPucchResrcSetInfo
1636 uint8_t resrcListCount;
1637 uint8_t resrcList[MAX_NUM_PUCCH_PER_RESRC_SET];
1638 uint8_t maxPayLoadSize;
1639 }SchPucchResrcSetInfo;
1641 typedef struct schPucchResrcSetCfg
1643 uint8_t resrcSetToAddModListCount;
1644 SchPucchResrcSetInfo resrcSetToAddModList[MAX_NUM_PUCCH_RESRC_SET];
1645 uint8_t resrcSetToRelListCount;
1646 uint8_t resrcSetToRelList[MAX_NUM_PUCCH_RESRC];
1647 }SchPucchResrcSetCfg;
1649 typedef struct schPucchFormat0
1651 uint8_t initialCyclicShift;
1653 uint8_t startSymbolIdx;
1656 typedef struct schPucchFormat1
1658 uint8_t initialCyclicShift;
1660 uint8_t startSymbolIdx;
1664 typedef struct schPucchFormat2_3
1668 uint8_t startSymbolIdx;
1671 typedef struct schPucchFormat4
1676 uint8_t startSymbolIdx;
1679 typedef struct schPucchResrcInfo
1683 uint8_t intraFreqHop;
1684 uint16_t secondPrbHop;
1685 uint8_t pucchFormat;
1687 SchPucchFormat0 *format0;
1688 SchPucchFormat1 *format1;
1689 SchPucchFormat2_3 *format2;
1690 SchPucchFormat2_3 *format3;
1691 SchPucchFormat4 *format4;
1695 typedef struct schPucchResrcCfg
1697 uint8_t resrcToAddModListCount;
1698 SchPucchResrcInfo resrcToAddModList[MAX_NUM_PUCCH_RESRC];
1699 uint8_t resrcToRelListCount;
1700 uint8_t resrcToRelList[MAX_NUM_PUCCH_RESRC];
1704 typedef struct schSchedReqResrcInfo
1708 uint8_t periodicity;
1711 }SchSchedReqResrcInfo;
1713 typedef struct schPucchSchedReqCfg
1715 uint8_t schedAddModListCount;
1716 SchSchedReqResrcInfo schedAddModList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1717 uint8_t schedRelListCount;
1718 uint8_t schedRelList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1719 }SchPucchSchedReqCfg;
1721 typedef struct schSpatialRelationInfo
1723 uint8_t spatialRelationId;
1724 uint8_t servCellIdx;
1725 uint8_t pathLossRefRSId;
1727 uint8_t closeLoopIdx;
1728 }SchSpatialRelationInfo;
1730 typedef struct schPucchSpatialCfg
1732 uint8_t spatialAddModListCount;
1733 SchSpatialRelationInfo spatialAddModList[MAX_NUM_SPATIAL_RELATIONS];
1734 uint8_t spatialRelListCount;
1735 uint8_t spatialRelList[MAX_NUM_SPATIAL_RELATIONS];
1736 }SchPucchSpatialCfg;
1738 typedef struct schP0PucchCfg
1744 typedef struct schPathLossRefRSCfg
1746 uint8_t pathLossRefRSId;
1747 }SchPathLossRefRSCfg;
1749 typedef struct schPucchMultiCsiCfg
1751 uint8_t multiCsiResrcListCount;
1752 uint8_t multiCsiResrcList[MAX_NUM_PUCCH_RESRC-1];
1753 }SchPucchMultiCsiCfg;
1755 typedef struct schPucchDlDataToUlAck
1757 uint8_t dlDataToUlAckListCount;
1758 uint8_t dlDataToUlAckList[MAX_NUM_DL_DATA_TO_UL_ACK];
1759 }SchPucchDlDataToUlAck;
1761 typedef struct schPucchPowerControl
1769 SchP0PucchCfg p0Set[MAX_NUM_PUCCH_P0_PER_SET];
1770 uint8_t pathLossRefRSListCount;
1771 SchPathLossRefRSCfg pathLossRefRSList[MAX_NUM_PATH_LOSS_REF_RS];
1772 }SchPucchPowerControl;
1774 typedef struct schPucchCfg
1776 SchPucchResrcSetCfg *resrcSet;
1777 SchPucchResrcCfg *resrc;
1778 SchPucchFormatCfg *format1;
1779 SchPucchFormatCfg *format2;
1780 SchPucchFormatCfg *format3;
1781 SchPucchFormatCfg *format4;
1782 SchPucchSchedReqCfg *schedReq;
1783 SchPucchMultiCsiCfg *multiCsiCfg;
1784 SchPucchSpatialCfg *spatialInfo;
1785 SchPucchDlDataToUlAck *dlDataToUlAck;
1786 SchPucchPowerControl *powerControl;
1789 /* Transform precoding disabled */
1790 typedef struct schTransPrecodDisabled
1792 uint16_t scramblingId0;
1793 }SchTransPrecodDisabled;
1795 /* DMRS Uplink configuration */
1796 typedef struct SchDmrsUlCfg
1798 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1799 SchTransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */
1802 /* PUSCH Configuration */
1803 typedef struct schPuschCfg
1805 uint8_t dataScramblingId;
1806 SchDmrsUlCfg dmrsUlCfgForPuschMapTypeA;
1807 SchResourceAllocType resourceAllocType;
1808 uint8_t numTimeDomRsrcAlloc;
1809 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
1810 SchTransformPrecoder transformPrecoder;
1813 /* Initial Uplink BWP */
1814 typedef struct schInitialUlBwp
1817 SchPucchCfg pucchCfg;
1819 SchPuschCfg puschCfg;
1822 typedef struct schBwpCfgDedicated
1824 SchPucchCfg pucchCfg;
1825 SchPuschCfg puschCfg;
1826 }SchBwpCfgDedicated;
1828 /* Uplink BWP information */
1829 typedef struct schUlBwpInfo
1832 SchBwpUlCfg bwpCommon;
1833 SchBwpCfgDedicated bwpDed;
1836 typedef struct schBwpRelInfo
1841 /* Serving cell configuration */
1842 typedef struct schServCellRecfgInfo
1844 SchInitalDlBwp initDlBwp;
1845 SchRadioLinkConfig radioLinkMonConfig;
1846 uint8_t numDlBwpToAddOrMod;
1847 SchDlBwpInfo dlBwpToAddOrModList[MAX_NUM_BWP];
1848 uint8_t numDlBwpToRel;
1849 SchBwpRelInfo dlBwpToRelList[MAX_NUM_BWP];
1850 uint8_t firstActvDlBwpId;
1851 uint8_t defaultDlBwpId;
1852 uint8_t *bwpInactivityTmr;
1853 SchPdschServCellCfg pdschServCellCfg;
1854 SchInitialUlBwp initUlBwp;
1855 SchBeamFailRecoveryCfg beamFailureRecoveryCfg;
1856 uint8_t numUlBwpToAddOrMod;
1857 SchUlBwpInfo ulBwpToAddOrModList[MAX_NUM_BWP];
1858 uint8_t numUlBwpToRel;
1859 SchBwpRelInfo ulBwpToRelList[MAX_NUM_BWP];
1860 uint8_t firstActvUlBwpId;
1861 }SchServCellRecfgInfo;
1863 /* Serving cell configuration */
1864 typedef struct schServCellCfgInfo
1866 SchInitalDlBwp initDlBwp;
1867 SchRadioLinkConfig radioLinkMonConfig;
1868 uint8_t numDlBwpToAdd;
1869 SchDlBwpInfo dlBwpToAddList[MAX_NUM_BWP];
1870 uint8_t firstActvDlBwpId;
1871 uint8_t defaultDlBwpId;
1872 uint8_t *bwpInactivityTmr;
1873 SchPdschServCellCfg pdschServCellCfg;
1874 SchInitialUlBwp initUlBwp;
1875 SchBeamFailRecoveryCfg beamFailureRecoveryCfg;
1876 uint8_t numUlBwpToAdd;
1877 SchUlBwpInfo ulBwpToAddList[MAX_NUM_BWP];
1878 uint8_t firstActvUlBwpId;
1879 }SchServCellCfgInfo;
1881 typedef struct schNonDynFiveQi
1886 uint16_t maxDataBurstVol;
1889 typedef struct schDynFiveQi
1892 uint16_t packetDelayBudget;
1893 uint8_t packetErrRateScalar;
1894 uint8_t packetErrRateExp;
1896 uint8_t delayCritical;
1898 uint16_t maxDataBurstVol;
1901 typedef struct schNgRanAllocAndRetPri
1903 uint8_t priorityLevel;
1904 uint8_t preEmptionCap;
1905 uint8_t preEmptionVul;
1906 }SchNgRanAllocAndRetPri;
1908 typedef struct schGrbQosFlowInfo
1910 uint32_t maxFlowBitRateDl;
1911 uint32_t maxFlowBitRateUl;
1912 uint32_t guarFlowBitRateDl;
1913 uint32_t guarFlowBitRateUl;
1917 typedef struct schDrbQos
1919 SchQosType fiveQiType; /* Dynamic or non-dynamic */
1922 SchNonDynFiveQi nonDyn5Qi;
1923 SchDynFiveQi dyn5Qi;
1925 SchNgRanAllocAndRetPri ngRanRetPri;
1926 SchGrbQosFlowInfo grbQosFlowInfo;
1927 uint16_t pduSessionId;
1928 uint32_t ulPduSessAggMaxBitRate; /* UL PDU Session Aggregate max bit rate */
1931 /* Special cell configuration */
1932 typedef struct schSpCellCfg
1934 uint8_t servCellIdx;
1935 SchServCellCfgInfo servCellCfg;
1938 /* Special cell Reconfiguration */
1939 typedef struct schSpCellRecfg
1941 uint8_t servCellIdx;
1942 SchServCellRecfgInfo servCellRecfg;
1945 /* Uplink logical channel configuration */
1946 typedef struct SchUlLcCfg
1951 uint8_t pbr; // prioritisedBitRate
1952 uint8_t bsd; // bucketSizeDuration
1955 /* Downlink logical channel configuration */
1956 typedef struct schDlLcCfg
1958 uint8_t lcp; // logical Channel Prioritization
1961 /* Logical Channel configuration */
1962 typedef struct schLcCfg
1966 SchDrbQosInfo *drbQos;
1971 /* Aggregate max bit rate */
1972 typedef struct schAmbrCfg
1974 uint32_t ulBr; /* Ul BitRate */
1977 typedef struct schModulationInfo
1981 SchMcsTable mcsTable;
1984 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.5' UE Configuration Request*/
1985 typedef struct schUeCfgReq
1991 bool macCellGrpCfgPres;
1992 SchMacCellGrpCfg macCellGrpCfg;
1993 bool phyCellGrpCfgPres;
1994 SchPhyCellGrpCfg phyCellGrpCfg;
1996 SchSpCellCfg spCellCfg;
1997 SchAmbrCfg *ambrCfg;
1998 SchModulationInfo dlModInfo;
1999 SchModulationInfo ulModInfo;
2000 uint8_t numLcsToAdd;
2001 SchLcCfg schLcCfg[MAX_NUM_LC];
2004 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.6' UE Reconfiguration Request*/
2005 typedef struct schUeRecfgReq
2011 bool macCellGrpRecfgPres;
2012 SchMacCellGrpCfg macCellGrpRecfg;
2013 bool phyCellGrpRecfgPres;
2014 SchPhyCellGrpCfg phyCellGrpRecfg;
2015 bool spCellRecfgPres;
2016 SchSpCellRecfg spCellRecfg;
2017 SchAmbrCfg *ambrRecfg;
2018 SchModulationInfo dlModInfo;
2019 SchModulationInfo ulModInfo;
2020 uint8_t numLcsToAdd;
2021 SchLcCfg schLcCfgAdd[MAX_NUM_LC];
2022 uint8_t numLcsToDel;
2023 uint8_t lcIdToDel[MAX_NUM_LC];
2024 uint8_t numLcsToMod;
2025 SchLcCfg schLcCfgMod[MAX_NUM_LC];
2026 SchDataTransmission dataTransmissionInfo;
2028 bool drxConfigIndicatorRelease;
2032 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.3.5 UE Confg Response*/
2033 typedef struct schUeCfgRsp
2040 SchFailureCause cause;
2043 /*As per WG8 V7.0.0 Sec 11.2.4.3.6, UE ReCFG and UECFG have same structure definition*/
2044 typedef struct schUeCfgRsp SchUeRecfgRsp;
2046 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.7' Delete UE Request*/
2047 typedef struct schUeDelete
2053 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.4.3.7*/
2054 typedef struct schUeDeleteRsp
2062 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.8' DL HARQ Indication*/
2063 typedef struct dlHarqInd
2067 SlotTimingInfo slotInd;
2069 uint8_t harqPayload[MAX_HARQ_BITS_IN_BYTES];
2072 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.9' UL HARQ (CRC) Indication*/
2073 typedef struct crcIndInfo
2077 SlotTimingInfo timingInfo;
2079 uint8_t crcInd[MAX_NUMBER_OF_CRC_IND_BITS];
2082 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.10' UL Channel Quality Indication*/
2083 typedef struct ulCqiReport
2085 CqiUlReportType reportType;
2090 typedef struct schUlCqiInd
2094 SlotTimingInfo timingInfo;
2095 uint8_t numUlCqiReported;
2096 UlCqiReport ulCqiRpt;
2099 /*Spec O-RAN, WG8, V7.0.0, '11.2.4.2.11' DL Channel Quality Indication*/
2100 typedef struct dlCqiReport
2102 uint8_t reportType; /*Bitmap for CQI, PMI, RI, CRI report*/
2109 typedef struct schDlCqiInd
2113 SlotTimingInfo timingInfo;
2114 uint8_t numDlCqiReported;
2115 DlCqiReport dlCqiRpt;
2118 /*Spec O-RAN WG8 v7.0.0, '11.2.4.2.12' Rach Ind contents*/
2119 typedef struct rachIndInfo
2123 SlotTimingInfo timingInfo;
2127 uint8_t preambleIdx;
2131 /*Spec O-RAN WG8 v7.0.0, '11.2.4.2.13' Paging Ind contents*/
2132 typedef struct schPageInd
2141 /*ORAN WG8 v7.0.0, Sec 11.2.4.2.14 Rach Res Request*/
2142 typedef struct schRachRsrcReq
2144 SlotTimingInfo slotInd;
2148 uint8_t ssbIdx[MAX_NUM_SSB];
2151 typedef struct schCfraSsbResource
2154 uint8_t raPreambleIdx;
2155 }SchCfraSsbResource;
2157 typedef struct schCfraRsrc
2160 SchCfraSsbResource ssbResource[MAX_NUM_SSB];
2163 typedef struct schRachRsrcRsp
2168 SchCfraResource cfraResource;
2171 /*ORAN WG8 v7.0.0, Sec 11.2.4.2.15 Rach Res Release*/
2172 typedef struct schRachRsrcRel
2174 SlotTimingInfo slotInd;
2177 SchCfraResource cfraResource;
2180 /*O-RAN WG* v7.0.0 Sec 11.2.4.2.16 DL RLC Buffer Status Information*/
2181 typedef struct dlRlcBOInfo
2186 uint32_t dataVolume;
2189 /*O-RAN WG8 v7.0.0 Sec 11.2.4.2.17 Scheduling Request Indication*/
2190 typedef struct srUciIndInfo
2194 SlotTimingInfo slotInd;
2196 uint8_t srPayload[MAX_SR_BITS_IN_BYTES];
2199 /*O-RAN WG* v7.0.0 Sec 11.2.4.2.18 UL RLC Buffer Status Information*/
2200 typedef struct dataVolInfo
2206 typedef struct ulBufferStatusRptInd
2212 DataVolInfo dataVolInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
2213 }UlBufferStatusRptInd;
2215 /**O-RAN WG* v7.0.0 Sec 11.2.4.2.19 Power Headroom Indication*/
2216 typedef struct phrData /*Spec 38.321 Sec 6.1.3.8*/
2222 typedef struct singlePhrInfo
2227 typedef struct multiPhr
2233 typedef struct multiplePhrInfo /*Spec 38.321 Sec 6.1.3.9*/
2235 uint8_t numPhrReported;
2236 MultiPhr multiPhrStat[MAX_PHR_REPORT];
2239 typedef struct schPwrHeadroomInd
2246 SinglePhrInfo singlePhr;
2247 MultiplePhrInfo multiPhr;
2251 typedef struct schUeHqInfo
2257 typedef struct schRlsHqInfo
2261 SchUeHqInfo *ueHqInfo;
2264 /* function declarations */
2265 uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason);
2266 uint8_t MacMessageRouter(Pst *pst, void *msg);
2267 uint8_t SchMessageRouter(Pst *pst, void *msg);
2269 /**********************************************************************
2271 **********************************************************************/