1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define EVENT_SCH_GEN_CFG 1
21 #define EVENT_SCH_CELL_CFG 2
22 #define EVENT_SCH_CELL_CFG_CFM 3
23 #define EVENT_DL_SCH_INFO 4
24 #define EVENT_UL_SCH_INFO 5
25 #define EVENT_RACH_IND_TO_SCH 6
26 #define EVENT_CRC_IND_TO_SCH 7
27 #define EVENT_DL_RLC_BO_INFO_TO_SCH 8
28 #define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 9
29 #define EVENT_UE_CONFIG_RSP_TO_MAC 10
30 #define EVENT_SLOT_IND_TO_SCH 11
31 #define EVENT_SHORT_BSR 12
32 #define EVENT_UCI_IND_TO_SCH 13
33 #define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 14
34 #define EVENT_UE_RECONFIG_RSP_TO_MAC 15
35 #define EVENT_UE_DELETE_REQ_TO_SCH 16
36 #define EVENT_UE_DELETE_RSP_TO_MAC 17
37 #define EVENT_CELL_DELETE_REQ_TO_SCH 18
38 #define EVENT_CELL_DELETE_RSP_TO_MAC 19
39 #define EVENT_LONG_BSR 20
40 #define EVENT_SLICE_CFG_REQ_TO_SCH 21
41 #define EVENT_SLICE_CFG_RSP_TO_MAC 22
42 #define EVENT_SLICE_RECFG_REQ_TO_SCH 23
43 #define EVENT_SLICE_RECFG_RSP_TO_MAC 24
44 #define EVENT_RACH_RESOURCE_REQUEST_TO_SCH 25
45 #define EVENT_RACH_RESOURCE_RESPONSE_TO_MAC 26
46 #define EVENT_RACH_RESOURCE_RELEASE_TO_SCH 27
47 #define EVENT_PAGING_IND_TO_SCH 28
48 #define EVENT_DL_PAGING_ALLOC 29
49 #define EVENT_DL_REL_HQ_PROC 30
50 #define EVENT_DL_HARQ_IND_TO_SCH 31
52 #define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */
53 #define SCH_SSB_MASK_SIZE 1
55 #define MAX_NUM_PRG 1 /* max value should be later 275 */
56 #define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
57 #define MAX_CODEWORDS 1 /* max should be 2 */
58 #define SCH_HARQ_PROC_ID 1 /* harq proc id */
59 #define SCH_ALLOC_TYPE_1 1 /*sch res alloc type */
61 /* Datatype in UL SCH Info */
62 #define SCH_DATATYPE_PUSCH 1
63 #define SCH_DATATYPE_PUSCH_UCI 2
64 #define SCH_DATATYPE_UCI 4
65 #define SCH_DATATYPE_SRS 8
66 #define SCH_DATATYPE_PRACH 16
68 #define MAX_NUMBER_OF_CRC_IND_BITS 1
69 #define MAX_NUMBER_OF_UCI_IND_BITS 1
70 #define MAX_SR_BITS_IN_BYTES 1
71 #define MAX_HARQ_BITS_IN_BYTES 1
72 #define MAX_NUM_LOGICAL_CHANNEL_GROUPS 8
73 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */
74 #define MAX_NUM_TAGS 4 /* Max number of timing advance groups */
75 #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */
76 #define MAX_NUM_CRSET 3 /* Max number of control resource set in add/modify/release list */
77 #define MAX_NUM_SEARCH_SPC 10 /* Max number of search space in add/modify/release list */
78 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
79 #define MONITORING_SYMB_WITHIN_SLOT_SIZE 2 /* i.e. 2 bytes because size of monitoring symbols within slot is 14 bits */
80 #define MAX_NUM_DL_ALLOC 16 /* Max number of pdsch time domain downlink allocation */
81 #define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
83 /* PUCCH Configuration Macro */
84 #define MAX_NUM_PUCCH_RESRC 128
85 #define MAX_NUM_PUCCH_RESRC_SET 4
86 #define MAX_NUM_PUCCH_PER_RESRC_SET 32
87 #define MAX_NUM_SPATIAL_RELATIONS 8
88 #define MAX_NUM_PUCCH_P0_PER_SET 8
89 #define MAX_NUM_PATH_LOSS_REF_RS 4
90 #define MAX_NUM_DL_DATA_TO_UL_ACK 15
91 #define QPSK_MODULATION 2
93 #define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
94 #define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
95 #define UL_TX_BUFFER_SIZE 5
97 #define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/
98 #define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
99 #define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */
100 #define MIN_NUM_K1_IDX 4 /* Min K1 values */
101 #define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */
102 #define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */
103 /* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */
104 #define DEFAULT_K2_VALUE_FOR_SCS15 1
105 #define DEFAULT_K2_VALUE_FOR_SCS30 1
106 #define DEFAULT_K2_VALUE_FOR_SCS60 2
107 #define DEFAULT_K2_VALUE_FOR_SCS120 3
111 #define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
113 if ((crntTime.slot + incr) > (numOfSlot - 1)) \
115 toFill.sfn = (crntTime.sfn + 1); \
119 toFill.sfn = crntTime.sfn; \
121 toFill.slot = (crntTime.slot + incr) % numOfSlot; \
122 if (toFill.sfn >= MAX_SFN) \
124 toFill.sfn%=MAX_SFN; \
132 RRC_CONNECTED_USERS_RSRC
152 RESOURCE_UNAVAILABLE,
189 TIME_ALIGNMENT_TIMER_MS500,
190 TIME_ALIGNMENT_TIMER_MS750,
191 TIME_ALIGNMENT_TIMER_MS1280,
192 TIME_ALIGNMENT_TIMER_MS1920,
193 TIME_ALIGNMENT_TIMER_MS2560,
194 TIME_ALIGNMENT_TIMER_MS5120,
195 TIME_ALIGNMENT_TIMER_MS10240,
196 TIME_ALIGNMENT_TIMER_INFINITE
197 }SchTimeAlignmentTimer;
201 PHR_PERIODIC_TIMER_SF10,
202 PHR_PERIODIC_TIMER_SF20,
203 PHR_PERIODIC_TIMER_SF50,
204 PHR_PERIODIC_TIMER_SF100,
205 PHR_PERIODIC_TIMER_SF200,
206 PHR_PERIODIC_TIMER_SF500,
207 PHR_PERIODIC_TIMER_SF1000,
208 PHR_PERIODIC_TIMER_INFINITE
209 }SchPhrPeriodicTimer;
213 PHR_PROHIBIT_TIMER_SF0,
214 PHR_PROHIBIT_TIMER_SF10,
215 PHR_PROHIBIT_TIMER_SF20,
216 PHR_PROHIBIT_TIMER_SF50,
217 PHR_PROHIBIT_TIMER_SF100,
218 PHR_PROHIBIT_TIMER_SF200,
219 PHR_PROHIBIT_TIMER_SF500,
220 PHR_PROHIBIT_TIMER_SF1000
221 }SchPhrProhibitTimer;
225 PHR_TX_PWR_FACTOR_CHANGE_DB1,
226 PHR_TX_PWR_FACTOR_CHANGE_DB3,
227 PHR_TX_PWR_FACTOR_CHANGE_DB6,
228 PHR_TX_PWR_FACTOR_CHANGE_INFINITE
229 }SchPhrTxPwrFactorChange;
239 HARQ_ACK_CODEBOOK_SEMISTATIC,
240 HARQ_ACK_CODEBOOK_DYNAMIC
241 }SchPdschHarqAckCodebook;
245 NUM_HARQ_PROC_FOR_PDSCH_N2,
246 NUM_HARQ_PROC_FOR_PDSCH_N4,
247 NUM_HARQ_PROC_FOR_PDSCH_N6,
248 NUM_HARQ_PROC_FOR_PDSCH_N10,
249 NUM_HARQ_PROC_FOR_PDSCH_N16
250 }SchNumHarqProcForPdsch;
254 MAX_CODE_BLOCK_GROUP_PER_TB_N2,
255 MAX_CODE_BLOCK_GROUP_PER_TB_N4,
256 MAX_CODE_BLOCK_GROUP_PER_TB_N6,
257 MAX_CODE_BLOCK_GROUP_PER_TB_N8
258 }SchMaxCodeBlkGrpPerTB;
262 PDSCH_X_OVERHEAD_XOH_6,
263 PDSCH_X_OVERHEAD_XOH_12,
264 PDSCH_X_OVERHEAD_XOH_18
269 DMRS_ADDITIONAL_POS0,
270 DMRS_ADDITIONAL_POS1,
272 }SchDmrsAdditionPosition;
276 RESOURCE_ALLOCTION_TYPE_0,
277 RESOURCE_ALLOCTION_TYPE_1,
278 RESOURCE_ALLOCTION_DYN_SWITCH
279 }SchResourceAllocType;
283 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_A,
284 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_B
285 }SchTimeDomRsrcAllocMappingType;
289 ENABLED_TRANSFORM_PRECODER,
290 DISABLED_TRANSFORM_PRECODER
291 }SchTransformPrecoder;
295 INTERLEAVED_CCE_REG_MAPPING = 1,
296 NONINTERLEAVED_CCE_REG_MAPPING
301 SLOT_PERIODICITY_AND_OFFSET_SL_1 = 1,
302 SLOT_PERIODICITY_AND_OFFSET_SL_2,
303 SLOT_PERIODICITY_AND_OFFSET_SL_4,
304 SLOT_PERIODICITY_AND_OFFSET_SL_5,
305 SLOT_PERIODICITY_AND_OFFSET_SL_8,
306 SLOT_PERIODICITY_AND_OFFSET_SL_10,
307 SLOT_PERIODICITY_AND_OFFSET_SL_16,
308 SLOT_PERIODICITY_AND_OFFSET_SL_20,
309 SLOT_PERIODICITY_AND_OFFSET_SL_40,
310 SLOT_PERIODICITY_AND_OFFSET_SL_80,
311 SLOT_PERIODICITY_AND_OFFSET_SL_160,
312 SLOT_PERIODICITY_AND_OFFSET_SL_320,
313 SLOT_PERIODICITY_AND_OFFSET_SL_640,
314 SLOT_PERIODICITY_AND_OFFSET_SL_1280,
315 SLOT_PERIODICITY_AND_OFFSET_SL_2560
316 }SchMSlotPeriodAndOffset;
326 SEARCH_SPACE_TYPE_COMMON = 1,
327 SEARCH_SPACE_TYPE_UE_SPECIFIC
332 SCH_QOS_NON_DYNAMIC = 1,
338 AGGREGATION_LEVEL_N0,
339 AGGREGATION_LEVEL_N1,
340 AGGREGATION_LEVEL_N2,
341 AGGREGATION_LEVEL_N3,
342 AGGREGATION_LEVEL_N4,
343 AGGREGATION_LEVEL_N5,
344 AGGREGATION_LEVEL_N6,
356 CODE_WORDS_SCHED_BY_DCI_N1,
357 CODE_WORDS_SCHED_BY_DCI_N2
358 }SchCodeWordsSchedByDci;
362 STATIC_BUNDLING_TYPE = 1,
363 DYNAMIC_BUNDLING_TYPE
369 SCH_SET1_SIZE_WIDEBAND,
370 SCH_SET1_SIZE_N2_WIDEBAND,
371 SCH_SET1_SIZE_N4_WIDEBAND
372 }SchBundlingSizeSet1;
377 SCH_SET2_SIZE_WIDEBAND
378 }SchBundlingSizeSet2;
420 SCH_MCS_TABLE_QAM_64,
421 SCH_MCS_TABLE_QAM_256,
422 SCH_MCS_TABLE_QAM_64_LOW_SE
435 DATA_TRANSMISSION_ALLOWED,
436 STOP_DATA_TRANSMISSION,
437 RESTART_DATA_TRANSMISSION
438 }SchDataTransmission;
441 typedef struct timeDomainAlloc
447 typedef struct resAllocType0
449 uint8_t rbBitmap[36];
452 typedef struct resAllocType1
458 typedef struct resAllocType1 FreqDomainRsrc;
460 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */
461 typedef struct bwpCfg
463 uint8_t subcarrierSpacing;
464 uint8_t cyclicPrefix;
465 FreqDomainRsrc freqAlloc;
471 uint16_t beamIdx[MAX_DIG_BF_INTERFACES];
474 typedef struct beamformingInfo
478 uint8_t digBfInterfaces;
479 Prg prg[MAX_NUM_PRG];
482 /* SIB1 PDSCH structures */
484 typedef struct codewordinfo
486 uint16_t targetCodeRate;
494 typedef struct dmrsInfo
496 uint16_t dlDmrsSymbPos;
497 uint8_t dmrsConfigType;
498 uint16_t dlDmrsScramblingId;
500 uint8_t numDmrsCdmGrpsNoData;
503 uint8_t nrOfDmrsSymbols;
507 typedef struct pdschFreqAlloc
509 uint8_t resourceAllocType;
510 /* since we are using type-1, rbBitmap excluded */
511 uint8_t rbBitmap[36];
514 uint8_t vrbPrbMapping;
517 typedef struct pdschTimeAlloc
524 typedef struct txPowerPdschInfo
526 uint8_t powerControlOffset;
527 uint8_t powerControlOffsetSS;
530 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
531 typedef struct pdschCfg
536 uint8_t numCodewords;
537 CodewordInfo codeword[MAX_CODEWORDS];
538 uint16_t dataScramblingId;
540 uint8_t transmissionScheme;
543 PdschFreqAlloc pdschFreqAlloc;
544 PdschTimeAlloc pdschTimeAlloc;
545 BeamformingInfo beamPdschInfo;
546 TxPowerPdschInfo txPdschPower;
548 /* SIB1 PDSCH structures end */
550 /* SIB1 interface structure */
552 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
553 typedef struct coresetCfg
556 uint8_t startSymbolIndex;
557 uint8_t durationSymbols;
558 uint8_t freqDomainResource[6];
559 uint8_t cceRegMappingType;
560 uint8_t regBundleSize;
561 uint8_t interleaverSize;
564 uint8_t coresetPoolIndex;
565 uint8_t precoderGranularity;
567 uint8_t aggregationLevel;
570 typedef struct txPowerPdcchInfo
572 uint8_t beta_pdcch_1_0;
573 uint8_t powerControlOffsetSS;
576 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
580 uint16_t scramblingId;
581 uint16_t scramblingRnti;
584 BeamformingInfo beamPdcchInfo;
585 TxPowerPdcchInfo txPdcchPower;
589 typedef struct pdcchCfg
591 /* coreset-0 configuration */
592 CoresetCfg coresetCfg;
594 DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
596 /* end of SIB1 PDCCH structures */
598 typedef struct schPcchCfg
600 uint8_t numPO; /*Derived from Ns*/
601 bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
602 uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
605 typedef struct schPdcchConfigSib1
607 uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
608 uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
611 typedef struct schRachCfgGeneric
613 uint8_t prachCfgIdx; /* PRACH config idx */
614 uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
615 uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
616 uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
617 int16_t preambleRcvdTargetPower;
618 uint8_t preambleTransMax;
619 uint8_t pwrRampingStep;
620 uint8_t raRspWindow; /* RA Response Window */
623 typedef struct schRachCfg
625 SchRachCfgGeneric prachCfgGeneric;
626 uint8_t totalNumRaPreamble; /* Total number of RA preambles */
627 uint8_t ssbPerRach; /* SSB per RACH occassion */
628 uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
629 uint8_t raContResTmr; /* RA Contention Resoultion Timer */
630 uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
631 uint16_t rootSeqIdx; /* Root sequence index */
632 uint16_t rootSeqLen; /* root sequence length */
633 uint8_t numRootSeq; /* Number of root sequences required for FD */
634 uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
637 typedef struct schBwpParams
639 FreqDomainRsrc freqAlloc;
641 uint8_t cyclicPrefix;
644 typedef struct schCandidatesInfo
653 typedef struct schSearchSpaceCfg
655 uint8_t searchSpaceId;
657 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
658 uint16_t monitoringSlot;
660 uint16_t monitoringSymbol;
661 SchCandidatesInfo candidate;
664 typedef struct schPdcchCfgCmn
666 SchSearchSpaceCfg commonSearchSpace;
667 uint8_t raSearchSpaceId;
670 typedef struct schPdschCfgCmnTimeDomRsrcAlloc
675 uint8_t lengthSymbol;
676 }SchPdschCfgCmnTimeDomRsrcAlloc;
678 typedef struct schPdschCfgCmn
680 uint8_t numTimeDomAlloc;
681 SchPdschCfgCmnTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
684 typedef struct schPucchCfgCmn
686 uint8_t pucchResourceCommon;
687 uint8_t pucchGroupHopping;
690 /* PUSCH Time Domain Resource Allocation */
691 typedef struct schPuschTimeDomRsrcAlloc
694 SchTimeDomRsrcAllocMappingType mappingType;
696 uint8_t symbolLength;
697 }SchPuschTimeDomRsrcAlloc;
699 typedef struct schPuschCfgCmn
701 uint8_t numTimeDomRsrcAlloc;
702 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
705 typedef struct schK1TimingInfo
708 uint8_t k1Indexes[MAX_NUM_K1_IDX];
711 typedef struct schK0TimingInfo
714 SchK1TimingInfo k1TimingInfo;
717 typedef struct schK0K1TimingInfo
720 SchK0TimingInfo k0Indexes[MAX_NUM_K0_IDX];
723 typedef struct schK0K1TimingInfoTbl
726 SchK0K1TimingInfo k0k1TimingInfo[MAX_NUM_CONFIG_SLOTS];
727 }SchK0K1TimingInfoTbl;
729 typedef struct schBwpDlCfg
732 SchPdcchCfgCmn pdcchCommon;
733 SchPdschCfgCmn pdschCommon;
736 typedef struct schK2TimingInfo
739 uint8_t k2Indexes[MAX_NUM_K2_IDX];
742 typedef struct schK2TimingInfoTbl
745 SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS];
748 typedef struct schBwpUlCfg
751 SchRachCfg schRachCfg; /* PRACH config */
752 SchPucchCfgCmn pucchCommon;
753 SchPuschCfgCmn puschCommon;
756 typedef struct schPlmnInfoList
759 uint8_t numSliceSupport; /* Total slice supporting */
760 Snssai **snssai; /* List of supporting snssai*/
764 /* The following list of structures is taken from the DRX-Config section of specification 33.331. */
766 typedef struct schDrxOnDurationTimer
768 bool onDurationTimerValInMs;
771 uint8_t subMilliSeconds;
772 uint16_t milliSeconds;
773 }onDurationtimerValue;
774 }SchDrxOnDurationTimer;
776 typedef struct schDrxLongCycleStartOffset
778 uint16_t drxLongCycleStartOffsetChoice;
779 uint16_t drxLongCycleStartOffsetVal;
780 }SchDrxLongCycleStartOffset;
782 typedef struct schShortDrx
784 uint16_t drxShortCycle;
785 uint8_t drxShortCycleTimer;
788 typedef struct schDrxCfg
790 SchDrxOnDurationTimer drxOnDurationTimer;
791 uint16_t drxInactivityTimer;
792 uint8_t drxHarqRttTimerDl;
793 uint8_t drxHarqRttTimerUl;
794 uint16_t drxRetransmissionTimerDl;
795 uint16_t drxRetransmissionTimerUl;
796 SchDrxLongCycleStartOffset drxLongCycleStartOffset;
798 SchShortDrx shortDrx;
799 uint8_t drxSlotOffset;
803 /*Spec 38.331 'NrNsPmaxList'*/
804 typedef struct schNrNsPmaxList
807 long additionalSpectrumEmission;
810 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
811 typedef struct schMultiFreqBandListSib
814 SchNrNsPmaxList nrNsPmaxList[1];
815 }SchMultiFreqBandListSib;
817 /*Spec 38.331 'SCS-SpecificCarrier'*/
818 typedef struct schScsSpecificCarrier
820 uint16_t offsetToCarrier;
821 uint8_t subCarrierSpacing;
823 uint16_t txDirectCurrentLoc;
824 }SchScsSpecificCarrier;
826 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
827 typedef struct schFreqInfoDlSib
829 SchMultiFreqBandListSib mutiFreqBandList[1];
830 uint16_t offsetToPointA;
831 SchScsSpecificCarrier schSpcCarrier[1];
834 typedef struct schBcchCfg
839 /*Spec 38.331 'DownlinkConfigCommonSIB'*/
840 typedef struct schDlCfgCommon
842 SchFreqInfoDlSib schFreqInfoDlSib;
843 SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
844 SchBcchCfg schBcchCfg;
845 SchPcchCfg schPcchCfg;
848 /*Spec 38.331 'FrequencyInfoUL-SIB'*/
849 typedef struct schFreqInfoUlSib
851 SchMultiFreqBandListSib mutiFreqBandList[1];
852 uint16_t absoluteFreqPointA;
853 SchScsSpecificCarrier schSpcCarrier[1];
855 bool frequencyShift7p5khz;
858 /*Spec 38.331 'UplinkConfigCommonSIB '*/
859 typedef struct schUlCfgCommon
861 SchFreqInfoUlSib schFreqInfoUlSib;
862 SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */
863 uint16_t schTimeAlignTimer;
866 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.3.2.1*/
867 typedef struct schCellCfg
869 uint16_t cellId; /* Cell Id */
873 uint16_t phyCellId; /* Physical cell id */
874 SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */
875 SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
876 uint8_t numerology; /* Supported numerology */
877 uint8_t dlBandwidth; /* Supported B/W */
878 uint8_t ulBandwidth; /* Supported B/W */
879 SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/
880 SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/
882 TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */
885 /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
886 *value 1 => corresponding SS/PBCH block is transmitted*/
887 uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
888 SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
889 uint32_t ssbFrequency; /* SB frequency in kHz*/
890 uint8_t dmrsTypeAPos;
891 uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
892 SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/
893 uint32_t ssbPbchPwr; /* SSB block power */
894 uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
898 typedef struct schCellCfgCfm
900 uint16_t cellId; /* Cell Id */
902 SchFailureCause cause;
905 typedef struct ssbInfo
907 uint8_t ssbIdx; /* SSB Index */
908 TimeDomainAlloc tdAlloc; /* Time domain allocation */
909 FreqDomainRsrc fdAlloc; /* Freq domain allocation */
912 typedef struct sib1AllocInfo
915 PdcchCfg sib1PdcchCfg;
918 typedef struct prachSchInfo
920 uint8_t numPrachOcas; /* Num Prach Ocassions */
921 uint8_t prachFormat; /* PRACH Format */
922 uint8_t numRa; /* Freq domain ocassion */
923 uint8_t prachStartSymb; /* Freq domain ocassion */
926 /* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
927 typedef struct dlBrdcstAlloc
929 uint16_t crnti; /* SI-RNTI */
930 /* Ssb transmission is determined as follows:
931 * 0 : No tranamission
932 * 1 : SSB Transmission
933 * 2 : SSB Repetition */
934 uint8_t ssbTransmissionMode;
935 uint8_t ssbIdxSupported;
936 SsbInfo ssbInfo[MAX_SSB_IDX];
937 bool systemInfoIndicator;
939 /* Sib1 transmission is determined as follows:
940 * 0 : No tranamission
941 * 1 : SIB1 Transmission
942 * 2 : SIB1 Repetition */
943 uint8_t sib1TransmissionMode;
944 Sib1AllocInfo sib1Alloc;
947 typedef struct msg3UlGrant
951 FreqDomainRsrc msg3FreqAlloc;
958 typedef struct rarInfo
965 uint8_t rarPdu[RAR_PAYLOAD_SIZE];
969 typedef struct rarAlloc
975 PdcchCfg rarPdcchCfg;
976 PdschCfg rarPdschCfg;
979 typedef struct dlMsgInfo
987 uint8_t harqFeedbackInd;
990 uint16_t dlMsgPduLen;
994 typedef struct lcSchInfo
997 uint32_t schBytes; /* Number of scheduled bytes */
1000 typedef struct dlMsgSchedInfo
1004 LcSchInfo lcSchInfo[MAX_NUM_LC]; /* Scheduled LC info */
1006 PdcchCfg dlMsgPdcchCfg;
1007 PdschCfg dlMsgPdschCfg;
1010 DlMsgInfo dlMsgInfo;
1013 typedef struct dlMsgAlloc
1016 uint8_t numSchedInfo;
1017 DlMsgSchInfo dlMsgSchedInfo[2];
1020 typedef struct schSlotValue
1022 SlotTimingInfo currentTime;
1023 SlotTimingInfo broadcastTime;
1024 SlotTimingInfo rarTime;
1025 SlotTimingInfo dlMsgTime;
1026 SlotTimingInfo ulDciTime;
1029 typedef struct freqDomainAlloc
1031 uint8_t resAllocType; /* Resource allocation type */
1034 ResAllocType0 type0;
1035 ResAllocType1 type1;
1039 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */
1040 typedef struct format0_0
1042 uint8_t resourceAllocType;
1043 FreqDomainAlloc freqAlloc;
1044 TimeDomainAlloc timeAlloc;
1055 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-40 DCI Format 0_1 Configuration */
1056 typedef struct format0_1
1058 uint8_t carrierIndicator;
1060 uint8_t bwpIndicator;
1061 uint8_t resourceAlloc;
1062 FreqDomainRsrc freqAlloc;
1063 TimeDomainAlloc timeAlloc;
1070 uint8_t firstDownlinkAssignmentIndex;
1071 uint8_t secondDownlinkAssignmentIndex;
1073 uint8_t srsResourceSetIndicator;
1074 uint8_t srsResourceIndicator;
1076 uint8_t antennaPorts;
1079 uint8_t cbgTransmissionInfo;
1081 uint8_t betaOffsetIndicator;
1082 bool dmrsSequenceInitialization;
1083 bool ulschIndicatior;
1086 typedef struct dciFormat
1088 FormatType formatType; /* DCI Format */
1091 Format0_0 format0_0; /* Format 0_0 */
1092 Format0_1 format0_1; /* Format 0_1 */
1096 typedef struct dciInfo
1098 uint16_t crnti; /* CRNTI */
1099 BwpCfg bwpCfg; /* BWP Cfg */
1100 CoresetCfg coresetCfg; /* Coreset1 Cfg */
1101 DciFormat dciFormatInfo; /* Dci Format */
1102 DlDCI dciInfo; /* DlDCI */
1106 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
1107 typedef struct dlSchedInfo
1109 uint16_t cellId; /* Cell Id */
1110 SchSlotValue schSlotValue;
1112 /* Allocation for broadcast messages */
1113 bool isBroadcastPres;
1114 DlBrdcstAlloc brdcstAlloc;
1116 /* Allocation for RAR message */
1117 RarAlloc *rarAlloc[MAX_NUM_UE];
1119 /* UL grant in response to BSR */
1122 /* Allocation from dedicated DL msg */
1123 DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE];
1127 typedef struct dlPageAlloc
1130 SlotTimingInfo dlPageTime;
1135 PdcchCfg pagePdcchCfg;
1136 PdschCfg pagePdschCfg;
1137 uint16_t dlPagePduLen;
1141 typedef struct tbInfo
1143 uint8_t mcs; /* MCS */
1144 uint8_t ndi; /* NDI */
1145 uint8_t rv; /* Redundancy Version */
1146 uint16_t tbSize; /* TB Size */
1147 uint8_t qamOrder; /* Modulation Order */
1148 SchMcsTable mcsTable; /* MCS Table */
1151 typedef struct schPuschInfo
1153 uint8_t harqProcId; /* HARQ Process ID */
1154 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1155 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1156 TbInfo tbInfo; /* TB info */
1158 uint8_t dmrsMappingType;
1159 uint8_t nrOfDmrsSymbols;
1164 typedef struct harqInfo
1166 uint16_t harqAckBitLength;
1167 uint8_t betaOffsetHarqAck;
1170 typedef struct csiInfo
1173 uint8_t betaOffsetCsi;
1176 typedef struct harqAckInfo
1178 uint16_t harqBitLength;
1181 typedef struct csiPartInfo
1186 typedef struct schPucchFormatCfg
1188 uint8_t interSlotFreqHop;
1190 uint8_t maxCodeRate;
1196 typedef struct schPucchInfo
1198 FreqDomainAlloc fdAlloc;
1199 TimeDomainAlloc tdAlloc;
1201 HarqFdbkInfo harqInfo;
1202 csiFdbkInfo csiInfo;
1203 BeamformingInfo beamPucchInfo;
1204 uint8_t pucchFormat;
1205 uint8_t intraFreqHop;
1206 uint16_t secondPrbHop;
1207 uint8_t initialCyclicShift;
1215 typedef struct schPuschUci
1217 uint8_t harqProcId; /* HARQ Process ID */
1218 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1219 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1220 TbInfo tbInfo; /* TB information */
1221 HarqInfo harqInfo; /* Harq Information */
1222 CsiInfo csiInfo; /* Csi information*/
1225 typedef struct ulSchedInfo
1227 uint16_t cellId; /* Cell Id */
1228 uint16_t crnti; /* CRNI */
1229 SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
1230 uint8_t dataType; /* Type of info being scheduled */
1231 SchPrachInfo prachSchInfo; /* Prach scheduling info */
1232 SchPuschInfo schPuschInfo; /* Pusch scheduling info */
1233 SchPuschUci schPuschUci; /* Pusch Uci */
1234 SchPucchInfo schPucchInfo; /* Pucch and Uci scheduling info */
1237 typedef struct rachIndInfo
1241 SlotTimingInfo timingInfo;
1245 uint8_t preambleIdx;
1250 typedef struct crcIndInfo
1254 SlotTimingInfo timingInfo;
1256 uint8_t crcInd[MAX_NUMBER_OF_CRC_IND_BITS];
1259 typedef struct boInfo
1262 uint32_t dataVolume;
1265 typedef struct dlRlcBOInfo
1270 uint32_t dataVolume;
1273 /* Info of Scheduling Request to Add/Modify */
1274 typedef struct schSchedReqInfo
1277 SchSrProhibitTimer srProhibitTmr;
1278 SchSrTransMax srTransMax;
1281 /* Scheduling Request Configuration */
1282 typedef struct schSchedReqCfg
1284 uint8_t addModListCount;
1285 SchSchedReqInfo addModList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* List of Scheduling req to be added/modified */
1286 uint8_t relListCount;
1287 uint8_t relList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* list of scheduling request Id to be deleted */
1290 /* Info of Tag to Add/Modify */
1291 typedef struct schTagInfo
1294 SchTimeAlignmentTimer timeAlignmentTmr;
1297 /* Timing Advance Group Configuration */
1298 typedef struct schTagCfg
1300 uint8_t addModListCount;
1301 SchTagInfo addModList[MAX_NUM_TAGS]; /* List of Tag to Add/Modify */
1302 uint8_t relListCount;
1303 uint8_t relList[MAX_NUM_TAGS]; /* list of Tag Id to release */
1306 /* Configuration for Power headroom reporting */
1307 typedef struct schPhrCfg
1309 SchPhrPeriodicTimer periodicTmr;
1310 SchPhrProhibitTimer prohibitTmr;
1311 SchPhrTxPwrFactorChange txpowerFactorChange;
1314 bool type2OtherCell;
1315 SchPhrModeOtherCG modeOtherCG;
1318 /* MAC cell Group configuration */
1319 typedef struct schMacCellGrpCfg
1321 SchSchedReqCfg schedReqCfg;
1323 SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */
1326 SchDrxCfg drxCfg; /* Drx configuration */
1330 /* Physical Cell Group Configuration */
1331 typedef struct schPhyCellGrpCfg
1333 SchPdschHarqAckCodebook pdschHarqAckCodebook;
1337 /* Control resource set info */
1338 typedef struct schControlRsrcSet
1340 uint8_t cRSetId; /* Control resource set id */
1341 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
1343 SchREGMappingType cceRegMappingType;
1344 SchPrecoderGranul precoderGranularity;
1345 uint16_t dmrsScramblingId;
1348 /* Search Space info */
1349 typedef struct schSearchSpace
1351 uint8_t searchSpaceId;
1353 SchMSlotPeriodAndOffset mSlotPeriodicityAndOffset;
1354 uint8_t mSymbolsWithinSlot[MONITORING_SYMB_WITHIN_SLOT_SIZE];
1355 SchAggrLevel numCandidatesAggLevel1; /* Number of candidates for aggregation level 1 */
1356 SchAggrLevel numCandidatesAggLevel2; /* Number of candidates for aggregation level 2 */
1357 SchAggrLevel numCandidatesAggLevel4; /* Number of candidates for aggregation level 4 */
1358 SchAggrLevel numCandidatesAggLevel8; /* Number of candidates for aggregation level 8 */
1359 SchAggrLevel numCandidatesAggLevel16; /* Number of candidates for aggregation level 16 */
1360 SchSearchSpaceType searchSpaceType;
1361 uint8_t ueSpecificDciFormat;
1364 /* PDCCH cofniguration */
1365 typedef struct schPdcchConfig
1367 uint8_t numCRsetToAddMod;
1368 SchControlRsrcSet cRSetToAddModList[MAX_NUM_CRSET]; /* List of control resource set to add/modify */
1369 uint8_t numCRsetToRel;
1370 uint8_t cRSetToRelList[MAX_NUM_CRSET]; /* List of control resource set to release */
1371 uint8_t numSearchSpcToAddMod;
1372 SchSearchSpace searchSpcToAddModList[MAX_NUM_SEARCH_SPC]; /* List of search space to add/modify */
1373 uint8_t numSearchSpcToRel;
1374 uint8_t searchSpcToRelList[MAX_NUM_SEARCH_SPC]; /* List of search space to release */
1377 /* PDSCH time domain resource allocation */
1378 typedef struct schPdschTimeDomRsrcAlloc
1381 SchTimeDomRsrcAllocMappingType mappingType;
1382 uint8_t startSymbol;
1383 uint8_t symbolLength;
1384 }SchPdschTimeDomRsrcAlloc;
1387 typedef struct schPdschBundling
1389 struct schStaticBundling
1391 SchBundlingSizeSet2 size;
1393 struct schDynamicBundling
1395 SchBundlingSizeSet1 sizeSet1;
1396 SchBundlingSizeSet2 sizeSet2;
1397 }SchDynamicBundling;
1400 /* DMRS downlink configuration */
1401 typedef struct schDmrsDlCfg
1403 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1406 /* PDSCH Configuration */
1407 typedef struct schPdschConfig
1409 SchDmrsDlCfg dmrsDlCfgForPdschMapTypeA;
1410 SchResourceAllocType resourceAllocType;
1411 uint8_t numTimeDomRsrcAlloc;
1412 SchPdschTimeDomRsrcAlloc timeDomRsrcAllociList[MAX_NUM_DL_ALLOC]; /* PDSCH time domain DL resource allocation list */
1414 SchCodeWordsSchedByDci numCodeWordsSchByDci; /* Number of code words scheduled by DCI */
1415 SchBundlingType bundlingType;
1416 SchPdschBundling bundlingInfo;
1419 /* Initial Downlink BWP */
1420 typedef struct schInitalDlBwp
1423 SchPdcchConfig pdcchCfg;
1425 SchPdschConfig pdschCfg;
1427 SchK0K1TimingInfoTbl k0K1InfoTbl;
1430 /* BWP Downlink common */
1431 typedef struct schBwpDlCommon
1435 /* Downlink BWP information */
1436 typedef struct schDlBwpInfo
1441 /* PDCCH Serving Cell configuration */
1442 typedef struct schPdschServCellCfg
1444 uint8_t *maxMimoLayers;
1445 SchNumHarqProcForPdsch numHarqProcForPdsch;
1446 SchMaxCodeBlkGrpPerTB *maxCodeBlkGrpPerTb;
1447 bool *codeBlkGrpFlushInd;
1448 SchPdschXOverhead *xOverhead;
1449 }SchPdschServCellCfg;
1451 /* PUCCH Configuration */
1452 typedef struct schPucchResrcSetInfo
1455 uint8_t resrcListCount;
1456 uint8_t resrcList[MAX_NUM_PUCCH_PER_RESRC_SET];
1457 uint8_t maxPayLoadSize;
1458 }SchPucchResrcSetInfo;
1460 typedef struct schPucchResrcSetCfg
1462 uint8_t resrcSetToAddModListCount;
1463 SchPucchResrcSetInfo resrcSetToAddModList[MAX_NUM_PUCCH_RESRC_SET];
1464 uint8_t resrcSetToRelListCount;
1465 uint8_t resrcSetToRelList[MAX_NUM_PUCCH_RESRC];
1466 }SchPucchResrcSetCfg;
1468 typedef struct schPucchFormat0
1470 uint8_t initialCyclicShift;
1472 uint8_t startSymbolIdx;
1475 typedef struct schPucchFormat1
1477 uint8_t initialCyclicShift;
1479 uint8_t startSymbolIdx;
1483 typedef struct schPucchFormat2_3
1487 uint8_t startSymbolIdx;
1490 typedef struct schPucchFormat4
1495 uint8_t startSymbolIdx;
1498 typedef struct schPucchResrcInfo
1502 uint8_t intraFreqHop;
1503 uint16_t secondPrbHop;
1504 uint8_t pucchFormat;
1506 SchPucchFormat0 *format0;
1507 SchPucchFormat1 *format1;
1508 SchPucchFormat2_3 *format2;
1509 SchPucchFormat2_3 *format3;
1510 SchPucchFormat4 *format4;
1514 typedef struct schPucchResrcCfg
1516 uint8_t resrcToAddModListCount;
1517 SchPucchResrcInfo resrcToAddModList[MAX_NUM_PUCCH_RESRC];
1518 uint8_t resrcToRelListCount;
1519 uint8_t resrcToRelList[MAX_NUM_PUCCH_RESRC];
1523 typedef struct schSchedReqResrcInfo
1527 uint8_t periodicity;
1530 }SchSchedReqResrcInfo;
1532 typedef struct schPucchSchedReqCfg
1534 uint8_t schedAddModListCount;
1535 SchSchedReqResrcInfo schedAddModList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1536 uint8_t schedRelListCount;
1537 uint8_t schedRelList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1538 }SchPucchSchedReqCfg;
1540 typedef struct schSpatialRelationInfo
1542 uint8_t spatialRelationId;
1543 uint8_t servCellIdx;
1544 uint8_t pathLossRefRSId;
1546 uint8_t closeLoopIdx;
1547 }SchSpatialRelationInfo;
1549 typedef struct schPucchSpatialCfg
1551 uint8_t spatialAddModListCount;
1552 SchSpatialRelationInfo spatialAddModList[MAX_NUM_SPATIAL_RELATIONS];
1553 uint8_t spatialRelListCount;
1554 uint8_t spatialRelList[MAX_NUM_SPATIAL_RELATIONS];
1555 }SchPucchSpatialCfg;
1557 typedef struct schP0PucchCfg
1563 typedef struct schPathLossRefRSCfg
1565 uint8_t pathLossRefRSId;
1566 }SchPathLossRefRSCfg;
1568 typedef struct schPucchMultiCsiCfg
1570 uint8_t multiCsiResrcListCount;
1571 uint8_t multiCsiResrcList[MAX_NUM_PUCCH_RESRC-1];
1572 }SchPucchMultiCsiCfg;
1574 typedef struct schPucchDlDataToUlAck
1576 uint8_t dlDataToUlAckListCount;
1577 uint8_t dlDataToUlAckList[MAX_NUM_DL_DATA_TO_UL_ACK];
1578 }SchPucchDlDataToUlAck;
1580 typedef struct schPucchPowerControl
1588 SchP0PucchCfg p0Set[MAX_NUM_PUCCH_P0_PER_SET];
1589 uint8_t pathLossRefRSListCount;
1590 SchPathLossRefRSCfg pathLossRefRSList[MAX_NUM_PATH_LOSS_REF_RS];
1591 }SchPucchPowerControl;
1593 typedef struct schPucchCfg
1595 SchPucchResrcSetCfg *resrcSet;
1596 SchPucchResrcCfg *resrc;
1597 SchPucchFormatCfg *format1;
1598 SchPucchFormatCfg *format2;
1599 SchPucchFormatCfg *format3;
1600 SchPucchFormatCfg *format4;
1601 SchPucchSchedReqCfg *schedReq;
1602 SchPucchMultiCsiCfg *multiCsiCfg;
1603 SchPucchSpatialCfg *spatialInfo;
1604 SchPucchDlDataToUlAck *dlDataToUlAck;
1605 SchPucchPowerControl *powerControl;
1608 /* Transform precoding disabled */
1609 typedef struct schTransPrecodDisabled
1611 uint16_t scramblingId0;
1612 }SchTransPrecodDisabled;
1614 /* DMRS Uplink configuration */
1615 typedef struct SchDmrsUlCfg
1617 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1618 SchTransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */
1621 /* PUSCH Configuration */
1622 typedef struct schPuschCfg
1624 uint8_t dataScramblingId;
1625 SchDmrsUlCfg dmrsUlCfgForPuschMapTypeA;
1626 SchResourceAllocType resourceAllocType;
1627 uint8_t numTimeDomRsrcAlloc;
1628 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
1629 SchTransformPrecoder transformPrecoder;
1632 /* Initial Uplink BWP */
1633 typedef struct schInitialUlBwp
1636 SchPucchCfg pucchCfg;
1638 SchPuschCfg puschCfg;
1640 SchK2TimingInfoTbl k2InfoTbl;
1643 /* Uplink BWP information */
1644 typedef struct schUlBwpInfo
1649 /* Serving cell configuration */
1650 typedef struct schServCellRecfgInfo
1652 SchInitalDlBwp initDlBwp;
1653 uint8_t numDlBwpToAddOrMod;
1654 SchDlBwpInfo dlBwpToAddOrModList[MAX_NUM_BWP];
1655 uint8_t numDlBwpToRel;
1656 SchDlBwpInfo dlBwpToRelList[MAX_NUM_BWP];
1657 uint8_t firstActvDlBwpId;
1658 uint8_t defaultDlBwpId;
1659 uint8_t *bwpInactivityTmr;
1660 SchPdschServCellCfg pdschServCellCfg;
1661 SchInitialUlBwp initUlBwp;
1662 uint8_t numUlBwpToAddOrMod;
1663 SchUlBwpInfo ulBwpToAddOrModList[MAX_NUM_BWP];
1664 uint8_t numUlBwpToRel;
1665 SchUlBwpInfo ulBwpToRelList[MAX_NUM_BWP];
1666 uint8_t firstActvUlBwpId;
1667 }SchServCellRecfgInfo;
1669 /* Serving cell configuration */
1670 typedef struct schServCellCfgInfo
1672 SchInitalDlBwp initDlBwp;
1673 uint8_t numDlBwpToAdd;
1674 SchDlBwpInfo dlBwpToAddList[MAX_NUM_BWP];
1675 uint8_t firstActvDlBwpId;
1676 uint8_t defaultDlBwpId;
1677 uint8_t *bwpInactivityTmr;
1678 SchPdschServCellCfg pdschServCellCfg;
1679 SchInitialUlBwp initUlBwp;
1680 uint8_t numUlBwpToAdd;
1681 SchUlBwpInfo ulBwpToAddList[MAX_NUM_BWP];
1682 uint8_t firstActvUlBwpId;
1683 }SchServCellCfgInfo;
1685 typedef struct schNonDynFiveQi
1690 uint16_t maxDataBurstVol;
1693 typedef struct schDynFiveQi
1696 uint16_t packetDelayBudget;
1697 uint8_t packetErrRateScalar;
1698 uint8_t packetErrRateExp;
1700 uint8_t delayCritical;
1702 uint16_t maxDataBurstVol;
1705 typedef struct schNgRanAllocAndRetPri
1707 uint8_t priorityLevel;
1708 uint8_t preEmptionCap;
1709 uint8_t preEmptionVul;
1710 }SchNgRanAllocAndRetPri;
1712 typedef struct schGrbQosFlowInfo
1714 uint32_t maxFlowBitRateDl;
1715 uint32_t maxFlowBitRateUl;
1716 uint32_t guarFlowBitRateDl;
1717 uint32_t guarFlowBitRateUl;
1721 typedef struct schDrbQos
1723 SchQosType fiveQiType; /* Dynamic or non-dynamic */
1726 SchNonDynFiveQi nonDyn5Qi;
1727 SchDynFiveQi dyn5Qi;
1729 SchNgRanAllocAndRetPri ngRanRetPri;
1730 SchGrbQosFlowInfo grbQosFlowInfo;
1731 uint16_t pduSessionId;
1732 uint32_t ulPduSessAggMaxBitRate; /* UL PDU Session Aggregate max bit rate */
1735 /* Special cell configuration */
1736 typedef struct schSpCellCfg
1738 uint8_t servCellIdx;
1739 SchServCellCfgInfo servCellCfg;
1742 /* Special cell Reconfiguration */
1743 typedef struct schSpCellRecfg
1745 uint8_t servCellIdx;
1746 SchServCellRecfgInfo servCellRecfg;
1749 /* Uplink logical channel configuration */
1750 typedef struct SchUlLcCfg
1755 uint8_t pbr; // prioritisedBitRate
1756 uint8_t bsd; // bucketSizeDuration
1759 /* Downlink logical channel configuration */
1760 typedef struct schDlLcCfg
1762 uint8_t lcp; // logical Channel Prioritization
1765 /* Logical Channel configuration */
1766 typedef struct schLcCfg
1770 SchDrbQosInfo *drbQos;
1775 /* Aggregate max bit rate */
1776 typedef struct schAmbrCfg
1778 uint32_t ulBr; /* Ul BitRate */
1781 typedef struct schModulationInfo
1785 SchMcsTable mcsTable;
1788 /* UE configuration */
1789 typedef struct schUeCfgReq
1795 bool macCellGrpCfgPres;
1796 SchMacCellGrpCfg macCellGrpCfg;
1797 bool phyCellGrpCfgPres;
1798 SchPhyCellGrpCfg phyCellGrpCfg;
1800 SchSpCellCfg spCellCfg;
1801 SchAmbrCfg *ambrCfg;
1802 SchModulationInfo dlModInfo;
1803 SchModulationInfo ulModInfo;
1804 uint8_t numLcsToAdd;
1805 SchLcCfg schLcCfg[MAX_NUM_LC];
1808 /* UE Re-configuration */
1809 typedef struct schUeRecfgReq
1815 bool macCellGrpRecfgPres;
1816 SchMacCellGrpCfg macCellGrpRecfg;
1817 bool phyCellGrpRecfgPres;
1818 SchPhyCellGrpCfg phyCellGrpRecfg;
1819 bool spCellRecfgPres;
1820 SchSpCellRecfg spCellRecfg;
1821 SchAmbrCfg *ambrRecfg;
1822 SchModulationInfo dlModInfo;
1823 SchModulationInfo ulModInfo;
1824 uint8_t numLcsToAdd;
1825 SchLcCfg schLcCfgAdd[MAX_NUM_LC];
1826 uint8_t numLcsToDel;
1827 uint8_t lcIdToDel[MAX_NUM_LC];
1828 uint8_t numLcsToMod;
1829 SchLcCfg schLcCfgMod[MAX_NUM_LC];
1830 SchDataTransmission dataTransmissionInfo;
1832 bool drxConfigIndicatorRelease;
1836 typedef struct schUeCfgRsp
1843 SchFailureCause cause;
1846 /*As per WG8, UE ReCFG and UECFG have same structure definition*/
1847 typedef struct schUeCfgRsp SchUeRecfgRsp;
1849 typedef struct schRachRsrcReq
1851 SlotTimingInfo slotInd;
1855 uint8_t ssbIdx[MAX_NUM_SSB];
1858 typedef struct schCfraSsbResource
1861 uint8_t raPreambleIdx;
1862 }SchCfraSsbResource;
1864 typedef struct schCfraRsrc
1867 SchCfraSsbResource ssbResource[MAX_NUM_SSB];
1870 typedef struct schRachRsrcRsp
1875 SchCfraResource cfraResource;
1878 typedef struct schRachRsrcRel
1880 SlotTimingInfo slotInd;
1883 SchCfraResource cfraResource;
1886 typedef struct schUeDelete
1892 typedef struct schUeDeleteRsp
1900 typedef struct schCellDeleteReq
1906 typedef struct schCellDeleteRsp
1910 SchFailureCause cause;
1913 typedef struct dataVolInfo
1919 typedef struct ulBufferStatusRptInd
1925 DataVolInfo dataVolInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
1926 }UlBufferStatusRptInd;
1928 typedef struct srUciIndInfo
1932 SlotTimingInfo slotInd;
1934 uint8_t srPayload[MAX_SR_BITS_IN_BYTES];
1937 typedef struct dlHarqInd
1941 SlotTimingInfo slotInd;
1943 uint8_t harqPayload[MAX_HARQ_BITS_IN_BYTES];
1946 typedef struct schRrmPolicyRatio
1950 uint8_t dedicatedRatio;
1953 typedef struct schRrmPolicyOfSlice
1956 SchRrmPolicyRatio rrmPolicyRatioInfo;
1957 }SchRrmPolicyOfSlice;
1959 typedef struct schSliceCfgReq
1961 uint8_t numOfConfiguredSlice;
1962 SchRrmPolicyOfSlice **listOfSlices;
1965 typedef struct sliceRsp
1972 typedef struct schSliceCfgRsp
1974 uint8_t numSliceCfgRsp;
1975 SliceRsp **listOfSliceCfgRsp;
1978 /*As per ORAN-WG8, Slice Cfg and Recfg are same structures*/
1979 typedef struct schSliceCfgReq SchSliceRecfgReq;
1980 typedef struct schSliceCfgRsp SchSliceRecfgRsp;
1982 typedef struct schPageInd
1991 typedef struct schUeHqInfo
1997 typedef struct schRlsHqInfo
2001 SchUeHqInfo *ueHqInfo;
2004 /* function declarations */
2005 uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason);
2006 uint8_t MacMessageRouter(Pst *pst, void *msg);
2007 uint8_t SchMessageRouter(Pst *pst, void *msg);
2009 /**********************************************************************
2011 **********************************************************************/