1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define EVENT_SCH_GEN_CFG 1
21 #define EVENT_SCH_CELL_CFG 2
22 #define EVENT_SCH_CELL_CFG_CFM 3
23 #define EVENT_DL_SCH_INFO 4
24 #define EVENT_UL_SCH_INFO 5
25 #define EVENT_RACH_IND_TO_SCH 6
26 #define EVENT_CRC_IND_TO_SCH 7
27 #define EVENT_DL_RLC_BO_INFO_TO_SCH 8
28 #define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 9
29 #define EVENT_UE_CONFIG_RSP_TO_MAC 10
30 #define EVENT_SLOT_IND_TO_SCH 11
31 #define EVENT_SHORT_BSR 12
32 #define EVENT_UCI_IND_TO_SCH 13
33 #define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 14
34 #define EVENT_UE_RECONFIG_RSP_TO_MAC 15
35 #define EVENT_UE_DELETE_REQ_TO_SCH 16
36 #define EVENT_UE_DELETE_RSP_TO_MAC 17
37 #define EVENT_CELL_DELETE_REQ_TO_SCH 18
38 #define EVENT_CELL_DELETE_RSP_TO_MAC 19
39 #define EVENT_LONG_BSR 20
40 #define EVENT_SLICE_CFG_REQ_TO_SCH 21
41 #define EVENT_SLICE_CFG_RSP_TO_MAC 22
42 #define EVENT_SLICE_RECFG_REQ_TO_SCH 23
43 #define EVENT_SLICE_RECFG_RSP_TO_MAC 24
44 #define EVENT_RACH_RESOURCE_REQUEST_TO_SCH 25
45 #define EVENT_RACH_RESOURCE_RESPONSE_TO_MAC 26
46 #define EVENT_RACH_RESOURCE_RELEASE_TO_SCH 27
47 #define EVENT_PAGING_IND_TO_SCH 28
48 #define EVENT_DL_PAGING_ALLOC 29
49 #define EVENT_DL_REL_HQ_PROC 30
50 #define EVENT_DL_HARQ_IND_TO_SCH 31
52 #define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */
53 #define SCH_SSB_MASK_SIZE 1
55 #define MAX_NUM_PRG 1 /* max value should be later 275 */
56 #define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
57 #define MAX_CODEWORDS 1 /* max should be 2 */
58 #define SCH_HARQ_PROC_ID 1 /* harq proc id */
59 #define SCH_ALLOC_TYPE_1 1 /*sch res alloc type */
61 /* Datatype in UL SCH Info */
62 #define SCH_DATATYPE_PUSCH 1
63 #define SCH_DATATYPE_PUSCH_UCI 2
64 #define SCH_DATATYPE_UCI 4
65 #define SCH_DATATYPE_SRS 8
66 #define SCH_DATATYPE_PRACH 16
68 #define MAX_NUMBER_OF_CRC_IND_BITS 1
69 #define MAX_NUMBER_OF_UCI_IND_BITS 1
70 #define MAX_SR_BITS_IN_BYTES 1
71 #define MAX_HARQ_BITS_IN_BYTES 1
72 #define MAX_NUM_LOGICAL_CHANNEL_GROUPS 8
73 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */
74 #define MAX_NUM_TAGS 4 /* Max number of timing advance groups */
75 #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */
76 #define MAX_NUM_CRSET 3 /* Max number of control resource set in add/modify/release list */
77 #define MAX_NUM_SEARCH_SPC 10 /* Max number of search space in add/modify/release list */
78 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
79 #define MONITORING_SYMB_WITHIN_SLOT_SIZE 2 /* i.e. 2 bytes because size of monitoring symbols within slot is 14 bits */
80 #define MAX_NUM_DL_ALLOC 16 /* Max number of pdsch time domain downlink allocation */
81 #define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
83 /* PUCCH Configuration Macro */
84 #define MAX_NUM_PUCCH_RESRC 128
85 #define MAX_NUM_PUCCH_RESRC_SET 4
86 #define MAX_NUM_PUCCH_PER_RESRC_SET 32
87 #define MAX_NUM_SPATIAL_RELATIONS 8
88 #define MAX_NUM_PUCCH_P0_PER_SET 8
89 #define MAX_NUM_PATH_LOSS_REF_RS 4
90 #define MAX_NUM_DL_DATA_TO_UL_ACK 15
91 #define QPSK_MODULATION 2
93 #define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
94 #define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
95 #define UL_TX_BUFFER_SIZE 5
97 #define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/
98 #define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
99 #define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */
100 #define MIN_NUM_K1_IDX 4 /* Min K1 values */
101 #define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */
102 #define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */
103 /* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */
104 #define DEFAULT_K2_VALUE_FOR_SCS15 1
105 #define DEFAULT_K2_VALUE_FOR_SCS30 1
106 #define DEFAULT_K2_VALUE_FOR_SCS60 2
107 #define DEFAULT_K2_VALUE_FOR_SCS120 3
110 #define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
112 #define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
114 if ((crntTime.slot + incr) > (numOfSlot - 1)) \
116 toFill.sfn = (crntTime.sfn + 1); \
120 toFill.sfn = crntTime.sfn; \
122 toFill.slot = (crntTime.slot + incr) % numOfSlot; \
123 if (toFill.sfn >= MAX_SFN) \
125 toFill.sfn%=MAX_SFN; \
133 RRC_CONNECTED_USERS_RSRC
153 RESOURCE_UNAVAILABLE,
190 TIME_ALIGNMENT_TIMER_MS500,
191 TIME_ALIGNMENT_TIMER_MS750,
192 TIME_ALIGNMENT_TIMER_MS1280,
193 TIME_ALIGNMENT_TIMER_MS1920,
194 TIME_ALIGNMENT_TIMER_MS2560,
195 TIME_ALIGNMENT_TIMER_MS5120,
196 TIME_ALIGNMENT_TIMER_MS10240,
197 TIME_ALIGNMENT_TIMER_INFINITE
198 }SchTimeAlignmentTimer;
202 PHR_PERIODIC_TIMER_SF10,
203 PHR_PERIODIC_TIMER_SF20,
204 PHR_PERIODIC_TIMER_SF50,
205 PHR_PERIODIC_TIMER_SF100,
206 PHR_PERIODIC_TIMER_SF200,
207 PHR_PERIODIC_TIMER_SF500,
208 PHR_PERIODIC_TIMER_SF1000,
209 PHR_PERIODIC_TIMER_INFINITE
210 }SchPhrPeriodicTimer;
214 PHR_PROHIBIT_TIMER_SF0,
215 PHR_PROHIBIT_TIMER_SF10,
216 PHR_PROHIBIT_TIMER_SF20,
217 PHR_PROHIBIT_TIMER_SF50,
218 PHR_PROHIBIT_TIMER_SF100,
219 PHR_PROHIBIT_TIMER_SF200,
220 PHR_PROHIBIT_TIMER_SF500,
221 PHR_PROHIBIT_TIMER_SF1000
222 }SchPhrProhibitTimer;
226 PHR_TX_PWR_FACTOR_CHANGE_DB1,
227 PHR_TX_PWR_FACTOR_CHANGE_DB3,
228 PHR_TX_PWR_FACTOR_CHANGE_DB6,
229 PHR_TX_PWR_FACTOR_CHANGE_INFINITE
230 }SchPhrTxPwrFactorChange;
240 HARQ_ACK_CODEBOOK_SEMISTATIC,
241 HARQ_ACK_CODEBOOK_DYNAMIC
242 }SchPdschHarqAckCodebook;
246 NUM_HARQ_PROC_FOR_PDSCH_N2,
247 NUM_HARQ_PROC_FOR_PDSCH_N4,
248 NUM_HARQ_PROC_FOR_PDSCH_N6,
249 NUM_HARQ_PROC_FOR_PDSCH_N10,
250 NUM_HARQ_PROC_FOR_PDSCH_N16
251 }SchNumHarqProcForPdsch;
255 MAX_CODE_BLOCK_GROUP_PER_TB_N2,
256 MAX_CODE_BLOCK_GROUP_PER_TB_N4,
257 MAX_CODE_BLOCK_GROUP_PER_TB_N6,
258 MAX_CODE_BLOCK_GROUP_PER_TB_N8
259 }SchMaxCodeBlkGrpPerTB;
263 PDSCH_X_OVERHEAD_XOH_6,
264 PDSCH_X_OVERHEAD_XOH_12,
265 PDSCH_X_OVERHEAD_XOH_18
270 DMRS_ADDITIONAL_POS0,
271 DMRS_ADDITIONAL_POS1,
273 }SchDmrsAdditionPosition;
277 RESOURCE_ALLOCTION_TYPE_0,
278 RESOURCE_ALLOCTION_TYPE_1,
279 RESOURCE_ALLOCTION_DYN_SWITCH
280 }SchResourceAllocType;
284 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_A,
285 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_B
286 }SchTimeDomRsrcAllocMappingType;
290 ENABLED_TRANSFORM_PRECODER,
291 DISABLED_TRANSFORM_PRECODER
292 }SchTransformPrecoder;
296 INTERLEAVED_CCE_REG_MAPPING = 1,
297 NONINTERLEAVED_CCE_REG_MAPPING
302 SLOT_PERIODICITY_AND_OFFSET_SL_1 = 1,
303 SLOT_PERIODICITY_AND_OFFSET_SL_2,
304 SLOT_PERIODICITY_AND_OFFSET_SL_4,
305 SLOT_PERIODICITY_AND_OFFSET_SL_5,
306 SLOT_PERIODICITY_AND_OFFSET_SL_8,
307 SLOT_PERIODICITY_AND_OFFSET_SL_10,
308 SLOT_PERIODICITY_AND_OFFSET_SL_16,
309 SLOT_PERIODICITY_AND_OFFSET_SL_20,
310 SLOT_PERIODICITY_AND_OFFSET_SL_40,
311 SLOT_PERIODICITY_AND_OFFSET_SL_80,
312 SLOT_PERIODICITY_AND_OFFSET_SL_160,
313 SLOT_PERIODICITY_AND_OFFSET_SL_320,
314 SLOT_PERIODICITY_AND_OFFSET_SL_640,
315 SLOT_PERIODICITY_AND_OFFSET_SL_1280,
316 SLOT_PERIODICITY_AND_OFFSET_SL_2560
317 }SchMSlotPeriodAndOffset;
327 SEARCH_SPACE_TYPE_COMMON = 1,
328 SEARCH_SPACE_TYPE_UE_SPECIFIC
333 SCH_QOS_NON_DYNAMIC = 1,
339 AGGREGATION_LEVEL_N0,
340 AGGREGATION_LEVEL_N1,
341 AGGREGATION_LEVEL_N2,
342 AGGREGATION_LEVEL_N3,
343 AGGREGATION_LEVEL_N4,
344 AGGREGATION_LEVEL_N5,
345 AGGREGATION_LEVEL_N6,
357 CODE_WORDS_SCHED_BY_DCI_N1,
358 CODE_WORDS_SCHED_BY_DCI_N2
359 }SchCodeWordsSchedByDci;
363 STATIC_BUNDLING_TYPE = 1,
364 DYNAMIC_BUNDLING_TYPE
370 SCH_SET1_SIZE_WIDEBAND,
371 SCH_SET1_SIZE_N2_WIDEBAND,
372 SCH_SET1_SIZE_N4_WIDEBAND
373 }SchBundlingSizeSet1;
378 SCH_SET2_SIZE_WIDEBAND
379 }SchBundlingSizeSet2;
421 SCH_MCS_TABLE_QAM_64,
422 SCH_MCS_TABLE_QAM_256,
423 SCH_MCS_TABLE_QAM_64_LOW_SE
436 DATA_TRANSMISSION_ALLOWED,
437 STOP_DATA_TRANSMISSION,
438 RESTART_DATA_TRANSMISSION
439 }SchDataTransmission;
442 typedef struct timeDomainAlloc
448 typedef struct resAllocType0
450 uint8_t rbBitmap[36];
453 typedef struct resAllocType1
459 typedef struct resAllocType1 FreqDomainRsrc;
461 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */
462 typedef struct bwpCfg
464 uint8_t subcarrierSpacing;
465 uint8_t cyclicPrefix;
466 FreqDomainRsrc freqAlloc;
472 uint16_t beamIdx[MAX_DIG_BF_INTERFACES];
475 typedef struct beamformingInfo
479 uint8_t digBfInterfaces;
480 Prg prg[MAX_NUM_PRG];
483 /* SIB1 PDSCH structures */
485 typedef struct codewordinfo
487 uint16_t targetCodeRate;
495 typedef struct dmrsInfo
497 uint16_t dlDmrsSymbPos;
498 uint8_t dmrsConfigType;
499 uint16_t dlDmrsScramblingId;
501 uint8_t numDmrsCdmGrpsNoData;
504 uint8_t nrOfDmrsSymbols;
508 typedef struct pdschFreqAlloc
510 uint8_t resourceAllocType;
511 /* since we are using type-1, rbBitmap excluded */
512 uint8_t rbBitmap[36];
515 uint8_t vrbPrbMapping;
518 typedef struct pdschTimeAlloc
525 typedef struct txPowerPdschInfo
527 uint8_t powerControlOffset;
528 uint8_t powerControlOffsetSS;
531 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
532 typedef struct pdschCfg
537 uint8_t numCodewords;
538 CodewordInfo codeword[MAX_CODEWORDS];
539 uint16_t dataScramblingId;
541 uint8_t transmissionScheme;
544 PdschFreqAlloc pdschFreqAlloc;
545 PdschTimeAlloc pdschTimeAlloc;
546 BeamformingInfo beamPdschInfo;
547 TxPowerPdschInfo txPdschPower;
549 /* SIB1 PDSCH structures end */
551 /* SIB1 interface structure */
553 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
554 typedef struct coresetCfg
557 uint8_t startSymbolIndex;
558 uint8_t durationSymbols;
559 uint8_t freqDomainResource[6];
560 uint8_t cceRegMappingType;
561 uint8_t regBundleSize;
562 uint8_t interleaverSize;
565 uint8_t coresetPoolIndex;
566 uint8_t precoderGranularity;
568 uint8_t aggregationLevel;
571 typedef struct txPowerPdcchInfo
573 uint8_t beta_pdcch_1_0;
574 uint8_t powerControlOffsetSS;
577 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
581 uint16_t scramblingId;
582 uint16_t scramblingRnti;
585 BeamformingInfo beamPdcchInfo;
586 TxPowerPdcchInfo txPdcchPower;
590 typedef struct pdcchCfg
592 /* coreset-0 configuration */
593 CoresetCfg coresetCfg;
595 DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
597 /* end of SIB1 PDCCH structures */
599 typedef struct schPcchCfg
601 uint8_t numPO; /*Derived from Ns*/
602 bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
603 uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
606 typedef struct schPdcchConfigSib1
608 uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
609 uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
612 typedef struct schRachCfgGeneric
614 uint8_t prachCfgIdx; /* PRACH config idx */
615 uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
616 uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
617 uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
618 int16_t preambleRcvdTargetPower;
619 uint8_t preambleTransMax;
620 uint8_t pwrRampingStep;
621 uint8_t raRspWindow; /* RA Response Window */
624 typedef struct schRachCfg
626 SchRachCfgGeneric prachCfgGeneric;
627 uint8_t totalNumRaPreamble; /* Total number of RA preambles */
628 uint8_t ssbPerRach; /* SSB per RACH occassion */
629 uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
630 uint8_t raContResTmr; /* RA Contention Resoultion Timer */
631 uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
632 uint16_t rootSeqIdx; /* Root sequence index */
633 uint16_t rootSeqLen; /* root sequence length */
634 uint8_t numRootSeq; /* Number of root sequences required for FD */
635 uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
638 typedef struct schBwpParams
640 FreqDomainRsrc freqAlloc;
642 uint8_t cyclicPrefix;
645 typedef struct schCandidatesInfo
654 typedef struct schSearchSpaceCfg
656 uint8_t searchSpaceId;
658 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
659 uint16_t monitoringSlot;
661 uint16_t monitoringSymbol;
662 SchCandidatesInfo candidate;
665 typedef struct schPdcchCfgCmn
667 SchSearchSpaceCfg commonSearchSpace;
668 uint8_t raSearchSpaceId;
671 typedef struct schPdschCfgCmnTimeDomRsrcAlloc
676 uint8_t lengthSymbol;
677 }SchPdschCfgCmnTimeDomRsrcAlloc;
679 typedef struct schPdschCfgCmn
681 uint8_t numTimeDomAlloc;
682 SchPdschCfgCmnTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
685 typedef struct schPucchCfgCmn
687 uint8_t pucchResourceCommon;
688 uint8_t pucchGroupHopping;
691 /* PUSCH Time Domain Resource Allocation */
692 typedef struct schPuschTimeDomRsrcAlloc
695 SchTimeDomRsrcAllocMappingType mappingType;
697 uint8_t symbolLength;
698 }SchPuschTimeDomRsrcAlloc;
700 typedef struct schPuschCfgCmn
702 uint8_t numTimeDomRsrcAlloc;
703 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
706 typedef struct schK1TimingInfo
709 uint8_t k1Indexes[MAX_NUM_K1_IDX];
712 typedef struct schK0TimingInfo
715 SchK1TimingInfo k1TimingInfo;
718 typedef struct schK0K1TimingInfo
721 SchK0TimingInfo k0Indexes[MAX_NUM_K0_IDX];
724 typedef struct schK0K1TimingInfoTbl
727 SchK0K1TimingInfo k0k1TimingInfo[MAX_NUM_CONFIG_SLOTS];
728 }SchK0K1TimingInfoTbl;
730 typedef struct schBwpDlCfg
733 SchPdcchCfgCmn pdcchCommon;
734 SchPdschCfgCmn pdschCommon;
737 typedef struct schK2TimingInfo
740 uint8_t k2Indexes[MAX_NUM_K2_IDX];
743 typedef struct schK2TimingInfoTbl
746 SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS];
749 typedef struct schBwpUlCfg
752 SchRachCfg schRachCfg; /* PRACH config */
753 SchPucchCfgCmn pucchCommon;
754 SchPuschCfgCmn puschCommon;
757 typedef struct schPlmnInfoList
760 uint8_t numSliceSupport; /* Total slice supporting */
761 Snssai **snssai; /* List of supporting snssai*/
765 /* The following list of structures is taken from the DRX-Config section of specification 33.331. */
767 typedef struct schDrxOnDurationTimer
769 bool onDurationTimerValInMs;
772 uint8_t subMilliSeconds;
773 uint16_t milliSeconds;
774 }onDurationtimerValue;
775 }SchDrxOnDurationTimer;
777 typedef struct schDrxLongCycleStartOffset
779 uint16_t drxLongCycleStartOffsetChoice;
780 uint16_t drxLongCycleStartOffsetVal;
781 }SchDrxLongCycleStartOffset;
783 typedef struct schShortDrx
785 uint16_t drxShortCycle;
786 uint8_t drxShortCycleTimer;
789 typedef struct schDrxCfg
791 SchDrxOnDurationTimer drxOnDurationTimer;
792 uint16_t drxInactivityTimer;
793 uint8_t drxHarqRttTimerDl;
794 uint8_t drxHarqRttTimerUl;
795 uint16_t drxRetransmissionTimerDl;
796 uint16_t drxRetransmissionTimerUl;
797 SchDrxLongCycleStartOffset drxLongCycleStartOffset;
799 SchShortDrx shortDrx;
800 uint8_t drxSlotOffset;
804 /*Spec 38.331 'NrNsPmaxList'*/
805 typedef struct schNrNsPmaxList
808 long additionalSpectrumEmission;
811 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
812 typedef struct schMultiFreqBandListSib
815 SchNrNsPmaxList nrNsPmaxList[1];
816 }SchMultiFreqBandListSib;
818 /*Spec 38.331 'SCS-SpecificCarrier'*/
819 typedef struct schScsSpecificCarrier
821 uint16_t offsetToCarrier;
822 uint8_t subCarrierSpacing;
824 uint16_t txDirectCurrentLoc;
825 }SchScsSpecificCarrier;
827 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
828 typedef struct schFreqInfoDlSib
830 SchMultiFreqBandListSib mutiFreqBandList[1];
831 uint16_t offsetToPointA;
832 SchScsSpecificCarrier schSpcCarrier[1];
835 typedef struct schBcchCfg
840 /*Spec 38.331 'DownlinkConfigCommonSIB'*/
841 typedef struct schDlCfgCommon
843 SchFreqInfoDlSib schFreqInfoDlSib;
844 SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
845 SchBcchCfg schBcchCfg;
846 SchPcchCfg schPcchCfg;
849 /*Spec 38.331 'FrequencyInfoUL-SIB'*/
850 typedef struct schFreqInfoUlSib
852 SchMultiFreqBandListSib mutiFreqBandList[1];
853 uint16_t absoluteFreqPointA;
854 SchScsSpecificCarrier schSpcCarrier[1];
856 bool frequencyShift7p5khz;
859 /*Spec 38.331 'UplinkConfigCommonSIB '*/
860 typedef struct schUlCfgCommon
862 SchFreqInfoUlSib schFreqInfoUlSib;
863 SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */
864 uint16_t schTimeAlignTimer;
867 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.3.2.1*/
868 typedef struct schCellCfg
870 uint16_t cellId; /* Cell Id */
874 uint16_t phyCellId; /* Physical cell id */
875 SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */
876 SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
877 uint8_t numerology; /* Supported numerology */
878 uint8_t dlBandwidth; /* Supported B/W */
879 uint8_t ulBandwidth; /* Supported B/W */
880 SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/
881 SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/
883 TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */
886 /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
887 *value 1 => corresponding SS/PBCH block is transmitted*/
888 uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
889 SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
890 uint32_t ssbFrequency; /* SB frequency in kHz*/
891 uint8_t dmrsTypeAPos;
892 uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
893 SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/
894 uint32_t ssbPbchPwr; /* SSB block power */
895 uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
899 typedef struct schCellCfgCfm
901 uint16_t cellId; /* Cell Id */
903 SchFailureCause cause;
906 typedef struct ssbInfo
908 uint8_t ssbIdx; /* SSB Index */
909 TimeDomainAlloc tdAlloc; /* Time domain allocation */
910 FreqDomainRsrc fdAlloc; /* Freq domain allocation */
913 typedef struct sib1AllocInfo
916 PdcchCfg sib1PdcchCfg;
919 typedef struct prachSchInfo
921 uint8_t numPrachOcas; /* Num Prach Ocassions */
922 uint8_t prachFormat; /* PRACH Format */
923 uint8_t numRa; /* Freq domain ocassion */
924 uint8_t prachStartSymb; /* Freq domain ocassion */
927 /* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
928 typedef struct dlBrdcstAlloc
930 uint16_t crnti; /* SI-RNTI */
931 /* Ssb transmission is determined as follows:
932 * 0 : No tranamission
933 * 1 : SSB Transmission
934 * 2 : SSB Repetition */
935 uint8_t ssbTransmissionMode;
936 uint8_t ssbIdxSupported;
937 SsbInfo ssbInfo[MAX_SSB_IDX];
938 bool systemInfoIndicator;
940 /* Sib1 transmission is determined as follows:
941 * 0 : No tranamission
942 * 1 : SIB1 Transmission
943 * 2 : SIB1 Repetition */
944 uint8_t sib1TransmissionMode;
945 Sib1AllocInfo sib1Alloc;
948 typedef struct msg3UlGrant
952 FreqDomainRsrc msg3FreqAlloc;
959 typedef struct rarInfo
966 uint8_t rarPdu[RAR_PAYLOAD_SIZE];
970 typedef struct rarAlloc
976 PdcchCfg rarPdcchCfg;
977 PdschCfg rarPdschCfg;
980 typedef struct dlMsgInfo
988 uint8_t harqFeedbackInd;
991 uint16_t dlMsgPduLen;
995 typedef struct lcSchInfo
998 uint32_t schBytes; /* Number of scheduled bytes */
1001 typedef struct dlMsgSchedInfo
1005 LcSchInfo lcSchInfo[MAX_NUM_LC]; /* Scheduled LC info */
1007 PdcchCfg dlMsgPdcchCfg;
1008 PdschCfg dlMsgPdschCfg;
1011 DlMsgInfo dlMsgInfo;
1014 typedef struct dlMsgAlloc
1017 uint8_t numSchedInfo;
1018 DlMsgSchInfo dlMsgSchedInfo[2];
1021 typedef struct schSlotValue
1023 SlotTimingInfo currentTime;
1024 SlotTimingInfo broadcastTime;
1025 SlotTimingInfo rarTime;
1026 SlotTimingInfo dlMsgTime;
1027 SlotTimingInfo ulDciTime;
1030 typedef struct freqDomainAlloc
1032 uint8_t resAllocType; /* Resource allocation type */
1035 ResAllocType0 type0;
1036 ResAllocType1 type1;
1040 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */
1041 typedef struct format0_0
1043 uint8_t resourceAllocType;
1044 FreqDomainAlloc freqAlloc;
1045 TimeDomainAlloc timeAlloc;
1056 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-40 DCI Format 0_1 Configuration */
1057 typedef struct format0_1
1059 uint8_t carrierIndicator;
1061 uint8_t bwpIndicator;
1062 uint8_t resourceAlloc;
1063 FreqDomainRsrc freqAlloc;
1064 TimeDomainAlloc timeAlloc;
1071 uint8_t firstDownlinkAssignmentIndex;
1072 uint8_t secondDownlinkAssignmentIndex;
1074 uint8_t srsResourceSetIndicator;
1075 uint8_t srsResourceIndicator;
1077 uint8_t antennaPorts;
1080 uint8_t cbgTransmissionInfo;
1082 uint8_t betaOffsetIndicator;
1083 bool dmrsSequenceInitialization;
1084 bool ulschIndicatior;
1087 typedef struct dciFormat
1089 FormatType formatType; /* DCI Format */
1092 Format0_0 format0_0; /* Format 0_0 */
1093 Format0_1 format0_1; /* Format 0_1 */
1097 typedef struct dciInfo
1099 uint16_t crnti; /* CRNTI */
1100 BwpCfg bwpCfg; /* BWP Cfg */
1101 CoresetCfg coresetCfg; /* Coreset1 Cfg */
1102 DciFormat dciFormatInfo; /* Dci Format */
1103 DlDCI dciInfo; /* DlDCI */
1107 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
1108 typedef struct dlSchedInfo
1110 uint16_t cellId; /* Cell Id */
1111 SchSlotValue schSlotValue;
1113 /* Allocation for broadcast messages */
1114 bool isBroadcastPres;
1115 DlBrdcstAlloc brdcstAlloc;
1117 /* Allocation for RAR message */
1118 RarAlloc *rarAlloc[MAX_NUM_UE];
1120 /* UL grant in response to BSR */
1123 /* Allocation from dedicated DL msg */
1124 DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE];
1128 /*Reference: O-RAN.WG8.AAD.v7.0.0, Sec 11.2.3.3.13 Downlink Paging Allocation*/
1129 typedef struct interleaved_t
1131 uint8_t regBundleSize;
1132 uint8_t interleaverSize;
1133 uint16_t shiftIndex;
1136 typedef struct pageDlDci
1138 uint8_t freqDomainResource[6];
1139 uint8_t durationSymbols;
1140 uint8_t cceRegMappingType;
1143 Interleaved interleaved;
1144 uint8_t nonInterleaved;
1146 uint8_t ssStartSymbolIndex;
1148 uint8_t aggregLevel;
1149 uint8_t precoderGranularity;
1150 uint8_t coreSetSize;
1153 typedef struct resAllocType1 PageFreqDomainAlloc;
1155 typedef struct pageTimeDomainAlloc
1157 uint8_t mappingType;
1160 }PageTimeDomainAlloc;
1162 typedef struct pageDmrsConfig
1166 uint8_t nrOfDmrsSymbols;
1169 typedef struct pageTbInfo
1175 typedef struct pageDlSch
1177 PageFreqDomainAlloc freqAlloc;
1178 PageTimeDomainAlloc timeAlloc;
1179 PageDmrsConfig dmrs;
1180 uint8_t vrbPrbMapping;
1183 uint16_t dlPagePduLen;
1187 typedef struct dlPageAlloc
1190 SlotTimingInfo dlPageTime;
1195 PageDlDci pageDlDci;
1196 PageDlSch pageDlSch;
1199 typedef struct tbInfo
1201 uint8_t mcs; /* MCS */
1202 uint8_t ndi; /* NDI */
1203 uint8_t rv; /* Redundancy Version */
1204 uint16_t tbSize; /* TB Size */
1205 uint8_t qamOrder; /* Modulation Order */
1206 SchMcsTable mcsTable; /* MCS Table */
1209 typedef struct schPuschInfo
1211 uint8_t harqProcId; /* HARQ Process ID */
1212 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1213 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1214 TbInfo tbInfo; /* TB info */
1216 uint8_t dmrsMappingType;
1217 uint8_t nrOfDmrsSymbols;
1222 typedef struct harqInfo
1224 uint16_t harqAckBitLength;
1225 uint8_t betaOffsetHarqAck;
1228 typedef struct csiInfo
1231 uint8_t betaOffsetCsi;
1234 typedef struct harqAckInfo
1236 uint16_t harqBitLength;
1239 typedef struct csiPartInfo
1244 typedef struct schPucchFormatCfg
1246 uint8_t interSlotFreqHop;
1248 uint8_t maxCodeRate;
1254 typedef struct schPucchInfo
1256 FreqDomainAlloc fdAlloc;
1257 TimeDomainAlloc tdAlloc;
1259 HarqFdbkInfo harqInfo;
1260 csiFdbkInfo csiInfo;
1261 BeamformingInfo beamPucchInfo;
1262 uint8_t pucchFormat;
1263 uint8_t intraFreqHop;
1264 uint16_t secondPrbHop;
1265 uint8_t initialCyclicShift;
1273 typedef struct schPuschUci
1275 uint8_t harqProcId; /* HARQ Process ID */
1276 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1277 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1278 TbInfo tbInfo; /* TB information */
1279 HarqInfo harqInfo; /* Harq Information */
1280 CsiInfo csiInfo; /* Csi information*/
1283 typedef struct ulSchedInfo
1285 uint16_t cellId; /* Cell Id */
1286 uint16_t crnti; /* CRNI */
1287 SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
1288 uint8_t dataType; /* Type of info being scheduled */
1289 SchPrachInfo prachSchInfo; /* Prach scheduling info */
1290 SchPuschInfo schPuschInfo; /* Pusch scheduling info */
1291 SchPuschUci schPuschUci; /* Pusch Uci */
1292 SchPucchInfo schPucchInfo; /* Pucch and Uci scheduling info */
1295 typedef struct rachIndInfo
1299 SlotTimingInfo timingInfo;
1303 uint8_t preambleIdx;
1308 typedef struct crcIndInfo
1312 SlotTimingInfo timingInfo;
1314 uint8_t crcInd[MAX_NUMBER_OF_CRC_IND_BITS];
1317 typedef struct boInfo
1320 uint32_t dataVolume;
1323 typedef struct dlRlcBOInfo
1328 uint32_t dataVolume;
1331 /* Info of Scheduling Request to Add/Modify */
1332 typedef struct schSchedReqInfo
1335 SchSrProhibitTimer srProhibitTmr;
1336 SchSrTransMax srTransMax;
1339 /* Scheduling Request Configuration */
1340 typedef struct schSchedReqCfg
1342 uint8_t addModListCount;
1343 SchSchedReqInfo addModList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* List of Scheduling req to be added/modified */
1344 uint8_t relListCount;
1345 uint8_t relList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* list of scheduling request Id to be deleted */
1348 /* Info of Tag to Add/Modify */
1349 typedef struct schTagInfo
1352 SchTimeAlignmentTimer timeAlignmentTmr;
1355 /* Timing Advance Group Configuration */
1356 typedef struct schTagCfg
1358 uint8_t addModListCount;
1359 SchTagInfo addModList[MAX_NUM_TAGS]; /* List of Tag to Add/Modify */
1360 uint8_t relListCount;
1361 uint8_t relList[MAX_NUM_TAGS]; /* list of Tag Id to release */
1364 /* Configuration for Power headroom reporting */
1365 typedef struct schPhrCfg
1367 SchPhrPeriodicTimer periodicTmr;
1368 SchPhrProhibitTimer prohibitTmr;
1369 SchPhrTxPwrFactorChange txpowerFactorChange;
1372 bool type2OtherCell;
1373 SchPhrModeOtherCG modeOtherCG;
1376 /* MAC cell Group configuration */
1377 typedef struct schMacCellGrpCfg
1379 SchSchedReqCfg schedReqCfg;
1381 SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */
1384 SchDrxCfg drxCfg; /* Drx configuration */
1388 /* Physical Cell Group Configuration */
1389 typedef struct schPhyCellGrpCfg
1391 SchPdschHarqAckCodebook pdschHarqAckCodebook;
1395 /* Control resource set info */
1396 typedef struct schControlRsrcSet
1398 uint8_t cRSetId; /* Control resource set id */
1399 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
1401 SchREGMappingType cceRegMappingType;
1402 SchPrecoderGranul precoderGranularity;
1403 uint16_t dmrsScramblingId;
1406 /* Search Space info */
1407 typedef struct schSearchSpace
1409 uint8_t searchSpaceId;
1411 SchMSlotPeriodAndOffset mSlotPeriodicityAndOffset;
1412 uint8_t mSymbolsWithinSlot[MONITORING_SYMB_WITHIN_SLOT_SIZE];
1413 SchAggrLevel numCandidatesAggLevel1; /* Number of candidates for aggregation level 1 */
1414 SchAggrLevel numCandidatesAggLevel2; /* Number of candidates for aggregation level 2 */
1415 SchAggrLevel numCandidatesAggLevel4; /* Number of candidates for aggregation level 4 */
1416 SchAggrLevel numCandidatesAggLevel8; /* Number of candidates for aggregation level 8 */
1417 SchAggrLevel numCandidatesAggLevel16; /* Number of candidates for aggregation level 16 */
1418 SchSearchSpaceType searchSpaceType;
1419 uint8_t ueSpecificDciFormat;
1422 /* PDCCH cofniguration */
1423 typedef struct schPdcchConfig
1425 uint8_t numCRsetToAddMod;
1426 SchControlRsrcSet cRSetToAddModList[MAX_NUM_CRSET]; /* List of control resource set to add/modify */
1427 uint8_t numCRsetToRel;
1428 uint8_t cRSetToRelList[MAX_NUM_CRSET]; /* List of control resource set to release */
1429 uint8_t numSearchSpcToAddMod;
1430 SchSearchSpace searchSpcToAddModList[MAX_NUM_SEARCH_SPC]; /* List of search space to add/modify */
1431 uint8_t numSearchSpcToRel;
1432 uint8_t searchSpcToRelList[MAX_NUM_SEARCH_SPC]; /* List of search space to release */
1435 /* PDSCH time domain resource allocation */
1436 typedef struct schPdschTimeDomRsrcAlloc
1439 SchTimeDomRsrcAllocMappingType mappingType;
1440 uint8_t startSymbol;
1441 uint8_t symbolLength;
1442 }SchPdschTimeDomRsrcAlloc;
1445 typedef struct schPdschBundling
1447 struct schStaticBundling
1449 SchBundlingSizeSet2 size;
1451 struct schDynamicBundling
1453 SchBundlingSizeSet1 sizeSet1;
1454 SchBundlingSizeSet2 sizeSet2;
1455 }SchDynamicBundling;
1458 /* DMRS downlink configuration */
1459 typedef struct schDmrsDlCfg
1461 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1464 /* PDSCH Configuration */
1465 typedef struct schPdschConfig
1467 SchDmrsDlCfg dmrsDlCfgForPdschMapTypeA;
1468 SchResourceAllocType resourceAllocType;
1469 uint8_t numTimeDomRsrcAlloc;
1470 SchPdschTimeDomRsrcAlloc timeDomRsrcAllociList[MAX_NUM_DL_ALLOC]; /* PDSCH time domain DL resource allocation list */
1472 SchCodeWordsSchedByDci numCodeWordsSchByDci; /* Number of code words scheduled by DCI */
1473 SchBundlingType bundlingType;
1474 SchPdschBundling bundlingInfo;
1477 /* Initial Downlink BWP */
1478 typedef struct schInitalDlBwp
1481 SchPdcchConfig pdcchCfg;
1483 SchPdschConfig pdschCfg;
1485 SchK0K1TimingInfoTbl k0K1InfoTbl;
1488 /* BWP Downlink common */
1489 typedef struct schBwpDlCommon
1493 /* Downlink BWP information */
1494 typedef struct schDlBwpInfo
1499 /* PDCCH Serving Cell configuration */
1500 typedef struct schPdschServCellCfg
1502 uint8_t *maxMimoLayers;
1503 SchNumHarqProcForPdsch numHarqProcForPdsch;
1504 SchMaxCodeBlkGrpPerTB *maxCodeBlkGrpPerTb;
1505 bool *codeBlkGrpFlushInd;
1506 SchPdschXOverhead *xOverhead;
1507 }SchPdschServCellCfg;
1509 /* PUCCH Configuration */
1510 typedef struct schPucchResrcSetInfo
1513 uint8_t resrcListCount;
1514 uint8_t resrcList[MAX_NUM_PUCCH_PER_RESRC_SET];
1515 uint8_t maxPayLoadSize;
1516 }SchPucchResrcSetInfo;
1518 typedef struct schPucchResrcSetCfg
1520 uint8_t resrcSetToAddModListCount;
1521 SchPucchResrcSetInfo resrcSetToAddModList[MAX_NUM_PUCCH_RESRC_SET];
1522 uint8_t resrcSetToRelListCount;
1523 uint8_t resrcSetToRelList[MAX_NUM_PUCCH_RESRC];
1524 }SchPucchResrcSetCfg;
1526 typedef struct schPucchFormat0
1528 uint8_t initialCyclicShift;
1530 uint8_t startSymbolIdx;
1533 typedef struct schPucchFormat1
1535 uint8_t initialCyclicShift;
1537 uint8_t startSymbolIdx;
1541 typedef struct schPucchFormat2_3
1545 uint8_t startSymbolIdx;
1548 typedef struct schPucchFormat4
1553 uint8_t startSymbolIdx;
1556 typedef struct schPucchResrcInfo
1560 uint8_t intraFreqHop;
1561 uint16_t secondPrbHop;
1562 uint8_t pucchFormat;
1564 SchPucchFormat0 *format0;
1565 SchPucchFormat1 *format1;
1566 SchPucchFormat2_3 *format2;
1567 SchPucchFormat2_3 *format3;
1568 SchPucchFormat4 *format4;
1572 typedef struct schPucchResrcCfg
1574 uint8_t resrcToAddModListCount;
1575 SchPucchResrcInfo resrcToAddModList[MAX_NUM_PUCCH_RESRC];
1576 uint8_t resrcToRelListCount;
1577 uint8_t resrcToRelList[MAX_NUM_PUCCH_RESRC];
1581 typedef struct schSchedReqResrcInfo
1585 uint8_t periodicity;
1588 }SchSchedReqResrcInfo;
1590 typedef struct schPucchSchedReqCfg
1592 uint8_t schedAddModListCount;
1593 SchSchedReqResrcInfo schedAddModList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1594 uint8_t schedRelListCount;
1595 uint8_t schedRelList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1596 }SchPucchSchedReqCfg;
1598 typedef struct schSpatialRelationInfo
1600 uint8_t spatialRelationId;
1601 uint8_t servCellIdx;
1602 uint8_t pathLossRefRSId;
1604 uint8_t closeLoopIdx;
1605 }SchSpatialRelationInfo;
1607 typedef struct schPucchSpatialCfg
1609 uint8_t spatialAddModListCount;
1610 SchSpatialRelationInfo spatialAddModList[MAX_NUM_SPATIAL_RELATIONS];
1611 uint8_t spatialRelListCount;
1612 uint8_t spatialRelList[MAX_NUM_SPATIAL_RELATIONS];
1613 }SchPucchSpatialCfg;
1615 typedef struct schP0PucchCfg
1621 typedef struct schPathLossRefRSCfg
1623 uint8_t pathLossRefRSId;
1624 }SchPathLossRefRSCfg;
1626 typedef struct schPucchMultiCsiCfg
1628 uint8_t multiCsiResrcListCount;
1629 uint8_t multiCsiResrcList[MAX_NUM_PUCCH_RESRC-1];
1630 }SchPucchMultiCsiCfg;
1632 typedef struct schPucchDlDataToUlAck
1634 uint8_t dlDataToUlAckListCount;
1635 uint8_t dlDataToUlAckList[MAX_NUM_DL_DATA_TO_UL_ACK];
1636 }SchPucchDlDataToUlAck;
1638 typedef struct schPucchPowerControl
1646 SchP0PucchCfg p0Set[MAX_NUM_PUCCH_P0_PER_SET];
1647 uint8_t pathLossRefRSListCount;
1648 SchPathLossRefRSCfg pathLossRefRSList[MAX_NUM_PATH_LOSS_REF_RS];
1649 }SchPucchPowerControl;
1651 typedef struct schPucchCfg
1653 SchPucchResrcSetCfg *resrcSet;
1654 SchPucchResrcCfg *resrc;
1655 SchPucchFormatCfg *format1;
1656 SchPucchFormatCfg *format2;
1657 SchPucchFormatCfg *format3;
1658 SchPucchFormatCfg *format4;
1659 SchPucchSchedReqCfg *schedReq;
1660 SchPucchMultiCsiCfg *multiCsiCfg;
1661 SchPucchSpatialCfg *spatialInfo;
1662 SchPucchDlDataToUlAck *dlDataToUlAck;
1663 SchPucchPowerControl *powerControl;
1666 /* Transform precoding disabled */
1667 typedef struct schTransPrecodDisabled
1669 uint16_t scramblingId0;
1670 }SchTransPrecodDisabled;
1672 /* DMRS Uplink configuration */
1673 typedef struct SchDmrsUlCfg
1675 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1676 SchTransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */
1679 /* PUSCH Configuration */
1680 typedef struct schPuschCfg
1682 uint8_t dataScramblingId;
1683 SchDmrsUlCfg dmrsUlCfgForPuschMapTypeA;
1684 SchResourceAllocType resourceAllocType;
1685 uint8_t numTimeDomRsrcAlloc;
1686 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
1687 SchTransformPrecoder transformPrecoder;
1690 /* Initial Uplink BWP */
1691 typedef struct schInitialUlBwp
1694 SchPucchCfg pucchCfg;
1696 SchPuschCfg puschCfg;
1698 SchK2TimingInfoTbl k2InfoTbl;
1701 /* Uplink BWP information */
1702 typedef struct schUlBwpInfo
1707 /* Serving cell configuration */
1708 typedef struct schServCellRecfgInfo
1710 SchInitalDlBwp initDlBwp;
1711 uint8_t numDlBwpToAddOrMod;
1712 SchDlBwpInfo dlBwpToAddOrModList[MAX_NUM_BWP];
1713 uint8_t numDlBwpToRel;
1714 SchDlBwpInfo dlBwpToRelList[MAX_NUM_BWP];
1715 uint8_t firstActvDlBwpId;
1716 uint8_t defaultDlBwpId;
1717 uint8_t *bwpInactivityTmr;
1718 SchPdschServCellCfg pdschServCellCfg;
1719 SchInitialUlBwp initUlBwp;
1720 uint8_t numUlBwpToAddOrMod;
1721 SchUlBwpInfo ulBwpToAddOrModList[MAX_NUM_BWP];
1722 uint8_t numUlBwpToRel;
1723 SchUlBwpInfo ulBwpToRelList[MAX_NUM_BWP];
1724 uint8_t firstActvUlBwpId;
1725 }SchServCellRecfgInfo;
1727 /* Serving cell configuration */
1728 typedef struct schServCellCfgInfo
1730 SchInitalDlBwp initDlBwp;
1731 uint8_t numDlBwpToAdd;
1732 SchDlBwpInfo dlBwpToAddList[MAX_NUM_BWP];
1733 uint8_t firstActvDlBwpId;
1734 uint8_t defaultDlBwpId;
1735 uint8_t *bwpInactivityTmr;
1736 SchPdschServCellCfg pdschServCellCfg;
1737 SchInitialUlBwp initUlBwp;
1738 uint8_t numUlBwpToAdd;
1739 SchUlBwpInfo ulBwpToAddList[MAX_NUM_BWP];
1740 uint8_t firstActvUlBwpId;
1741 }SchServCellCfgInfo;
1743 typedef struct schNonDynFiveQi
1748 uint16_t maxDataBurstVol;
1751 typedef struct schDynFiveQi
1754 uint16_t packetDelayBudget;
1755 uint8_t packetErrRateScalar;
1756 uint8_t packetErrRateExp;
1758 uint8_t delayCritical;
1760 uint16_t maxDataBurstVol;
1763 typedef struct schNgRanAllocAndRetPri
1765 uint8_t priorityLevel;
1766 uint8_t preEmptionCap;
1767 uint8_t preEmptionVul;
1768 }SchNgRanAllocAndRetPri;
1770 typedef struct schGrbQosFlowInfo
1772 uint32_t maxFlowBitRateDl;
1773 uint32_t maxFlowBitRateUl;
1774 uint32_t guarFlowBitRateDl;
1775 uint32_t guarFlowBitRateUl;
1779 typedef struct schDrbQos
1781 SchQosType fiveQiType; /* Dynamic or non-dynamic */
1784 SchNonDynFiveQi nonDyn5Qi;
1785 SchDynFiveQi dyn5Qi;
1787 SchNgRanAllocAndRetPri ngRanRetPri;
1788 SchGrbQosFlowInfo grbQosFlowInfo;
1789 uint16_t pduSessionId;
1790 uint32_t ulPduSessAggMaxBitRate; /* UL PDU Session Aggregate max bit rate */
1793 /* Special cell configuration */
1794 typedef struct schSpCellCfg
1796 uint8_t servCellIdx;
1797 SchServCellCfgInfo servCellCfg;
1800 /* Special cell Reconfiguration */
1801 typedef struct schSpCellRecfg
1803 uint8_t servCellIdx;
1804 SchServCellRecfgInfo servCellRecfg;
1807 /* Uplink logical channel configuration */
1808 typedef struct SchUlLcCfg
1813 uint8_t pbr; // prioritisedBitRate
1814 uint8_t bsd; // bucketSizeDuration
1817 /* Downlink logical channel configuration */
1818 typedef struct schDlLcCfg
1820 uint8_t lcp; // logical Channel Prioritization
1823 /* Logical Channel configuration */
1824 typedef struct schLcCfg
1828 SchDrbQosInfo *drbQos;
1833 /* Aggregate max bit rate */
1834 typedef struct schAmbrCfg
1836 uint32_t ulBr; /* Ul BitRate */
1839 typedef struct schModulationInfo
1843 SchMcsTable mcsTable;
1846 /* UE configuration */
1847 typedef struct schUeCfgReq
1853 bool macCellGrpCfgPres;
1854 SchMacCellGrpCfg macCellGrpCfg;
1855 bool phyCellGrpCfgPres;
1856 SchPhyCellGrpCfg phyCellGrpCfg;
1858 SchSpCellCfg spCellCfg;
1859 SchAmbrCfg *ambrCfg;
1860 SchModulationInfo dlModInfo;
1861 SchModulationInfo ulModInfo;
1862 uint8_t numLcsToAdd;
1863 SchLcCfg schLcCfg[MAX_NUM_LC];
1866 /* UE Re-configuration */
1867 typedef struct schUeRecfgReq
1873 bool macCellGrpRecfgPres;
1874 SchMacCellGrpCfg macCellGrpRecfg;
1875 bool phyCellGrpRecfgPres;
1876 SchPhyCellGrpCfg phyCellGrpRecfg;
1877 bool spCellRecfgPres;
1878 SchSpCellRecfg spCellRecfg;
1879 SchAmbrCfg *ambrRecfg;
1880 SchModulationInfo dlModInfo;
1881 SchModulationInfo ulModInfo;
1882 uint8_t numLcsToAdd;
1883 SchLcCfg schLcCfgAdd[MAX_NUM_LC];
1884 uint8_t numLcsToDel;
1885 uint8_t lcIdToDel[MAX_NUM_LC];
1886 uint8_t numLcsToMod;
1887 SchLcCfg schLcCfgMod[MAX_NUM_LC];
1888 SchDataTransmission dataTransmissionInfo;
1890 bool drxConfigIndicatorRelease;
1894 typedef struct schUeCfgRsp
1901 SchFailureCause cause;
1904 /*As per WG8, UE ReCFG and UECFG have same structure definition*/
1905 typedef struct schUeCfgRsp SchUeRecfgRsp;
1907 typedef struct schRachRsrcReq
1909 SlotTimingInfo slotInd;
1913 uint8_t ssbIdx[MAX_NUM_SSB];
1916 typedef struct schCfraSsbResource
1919 uint8_t raPreambleIdx;
1920 }SchCfraSsbResource;
1922 typedef struct schCfraRsrc
1925 SchCfraSsbResource ssbResource[MAX_NUM_SSB];
1928 typedef struct schRachRsrcRsp
1933 SchCfraResource cfraResource;
1936 typedef struct schRachRsrcRel
1938 SlotTimingInfo slotInd;
1941 SchCfraResource cfraResource;
1944 typedef struct schUeDelete
1950 typedef struct schUeDeleteRsp
1958 typedef struct schCellDeleteReq
1964 typedef struct schCellDeleteRsp
1968 SchFailureCause cause;
1971 typedef struct dataVolInfo
1977 typedef struct ulBufferStatusRptInd
1983 DataVolInfo dataVolInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
1984 }UlBufferStatusRptInd;
1986 typedef struct srUciIndInfo
1990 SlotTimingInfo slotInd;
1992 uint8_t srPayload[MAX_SR_BITS_IN_BYTES];
1995 typedef struct dlHarqInd
1999 SlotTimingInfo slotInd;
2001 uint8_t harqPayload[MAX_HARQ_BITS_IN_BYTES];
2004 typedef struct schRrmPolicyRatio
2008 uint8_t dedicatedRatio;
2011 typedef struct schRrmPolicyOfSlice
2014 SchRrmPolicyRatio rrmPolicyRatioInfo;
2015 }SchRrmPolicyOfSlice;
2017 typedef struct schSliceCfgReq
2019 uint8_t numOfConfiguredSlice;
2020 SchRrmPolicyOfSlice **listOfSlices;
2023 typedef struct sliceRsp
2030 typedef struct schSliceCfgRsp
2032 uint8_t numSliceCfgRsp;
2033 SliceRsp **listOfSliceCfgRsp;
2036 /*As per ORAN-WG8, Slice Cfg and Recfg are same structures*/
2037 typedef struct schSliceCfgReq SchSliceRecfgReq;
2038 typedef struct schSliceCfgRsp SchSliceRecfgRsp;
2040 typedef struct schPageInd
2049 typedef struct schUeHqInfo
2055 typedef struct schRlsHqInfo
2059 SchUeHqInfo *ueHqInfo;
2062 /* function declarations */
2063 uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason);
2064 uint8_t MacMessageRouter(Pst *pst, void *msg);
2065 uint8_t SchMessageRouter(Pst *pst, void *msg);
2067 /**********************************************************************
2069 **********************************************************************/