1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
47 * @brief common resource allocation for SSB
51 * Function : schBroadcastSsbAlloc
53 * This function handles common scheduling for SSB
55 * @param[in] SchCellCb *cell, cell cb
56 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
59 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
62 uint8_t ssbStartSymb, idx;
64 SchDlSlotInfo *schDlSlotInfo;
69 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
73 if(dlBrdcstAlloc == NULL)
75 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
79 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
80 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
81 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
83 /* Assign interface structure */
84 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
87 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
88 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
89 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
90 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
91 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
92 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
95 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
97 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
102 schDlSlotInfo->ssbPres = true;
103 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
108 * @brief common resource allocation for SIB1
112 * Function : schBroadcastSib1Alloc
114 * This function handles common scheduling for SIB1
116 * @param[in] SchCellCb *cell, cell cb
117 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
120 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
122 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
124 FreqDomainAlloc freqAlloc;
125 TimeDomainAlloc timeAlloc;
126 SchDlSlotInfo *schDlSlotInfo = NULLP;
130 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
134 if(dlBrdcstAlloc == NULL)
136 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
140 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
141 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
142 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
143 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
145 /* Find total symbols used including DMRS */
146 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
147 * in that case only PDSCH symbols are marked as occupied */
148 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
149 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
151 startSymbol = timeAlloc.startSymb;
152 numSymbol = timeAlloc.numSymb;
154 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
157 startSymbol = dmrsStartSymbol;
158 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
162 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
164 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
168 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
169 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
170 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
171 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
172 schDlSlotInfo->sib1Pres = true;
176 /*******************************************************************
178 * @brief Handles sending UL scheduler info to MAC
182 * Function : sendUlSchInfoToMac
185 * Sends UL Sch info to MAC from SCH
188 * @return ROK - success
191 * ****************************************************************/
192 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
196 memset(&pst, 0, sizeof(Pst));
197 FILL_PST_SCH_TO_MAC(pst, inst);
198 pst.event = EVENT_UL_SCH_INFO;
200 return(MacMessageRouter(&pst, (void *)ulSchedInfo));
204 * @brief Function to fill Pucch Format 0
208 * Function : fillPucchFormat0
210 * Function to fill Pucch format 0
212 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
216 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
218 if(resrcInfo->SchPucchFormat.format0)
220 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
221 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
222 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
223 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
224 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
229 * @brief Function to fill Pucch Format 1
233 * Function : fillPucchFormat1
235 * Function to fill Pucch format 1
237 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
241 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
243 if(resrcInfo->SchPucchFormat.format1)
245 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
246 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
247 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
248 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
249 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
250 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
255 * @brief Function to fill Pucch format for UL Sched Info
259 * Function : fillUlSchedPucchFormat
261 * Function to fill Pucch format for UL Sched Info
263 * @param[in] pucchFormat , SchPucchInfo pointer,
264 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
268 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
269 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
278 fillPucchFormat0(ulSchedPucch, resrcInfo);
285 fillPucchFormat1(ulSchedPucch, resrcInfo);
289 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
292 }/* To Add support for more Pucch Format */
295 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
303 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
307 * Function : fillUlSchedPucchDedicatedCfg
309 * Function to fill Pucch Dedicated Cfg for UL Sched Info
311 * @param[in] pucchFormat to be filled
312 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
316 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
317 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
319 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
320 uint16_t srOffset = 0;
321 uint16_t numSlots = cell->numSlots;
322 bool isAllocated = false;
323 uint16_t pucchStartPrb;
325 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
327 //Assuming one entry in the list
328 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
330 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
332 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
333 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
335 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
336 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
337 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
338 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
339 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
340 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
344 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
358 if(pucchDedCfg->format1)
360 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
361 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
371 /* setting SR and UCI flag */
372 if(pucchDedCfg->schedReq)
374 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
376 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
377 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
380 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
382 ulSchedPucch->srFlag = true;
383 ulSchedPucch->uciFlag = true;
385 ulSchedPucch->harqFlag = true;//check how to enable?
391 * @brief Function to fill Pucch Resource Info
395 * Function : fillPucchResourceInfo
397 * Function to fill Pucch Resource Info
399 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
400 * @return ROK/RFAILED
403 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
405 uint8_t ret = ROK, ueId = 0, ueIdx = 0, pucchIdx = 0;
406 SchCellCb *cell = schCb[inst].cells[inst];
407 SchPucchCfgCmn *pucchCfg = NULLP;
408 SchBwpParams *ulBwp = NULLP;
410 SchUeCb *ueCb = NULLP;
414 GET_UE_ID(schPucchInfo->rnti, ueId);
417 ueCb = schGetUeCb(cell, schPucchInfo->rnti);
418 if(ueCb->ueDrxInfoPres)
420 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
424 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfgPres)
426 /* fill pucch dedicated cfg */
427 ret = fillUlSchedPucchDedicatedCfg(cell,\
428 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
431 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
432 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
438 /* fill pucch common cfg */
439 /* derive pucchResourceSet from schCellCfg */
440 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
441 pucchIdx = pucchCfg->pucchResourceCommon;
442 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
443 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
444 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
445 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
448 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
449 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
450 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
451 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
452 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
454 /* set SR and UCI flag to false */
455 schPucchInfo->srFlag = true;
456 schPucchInfo->uciFlag = true;
463 * @brief resource allocation for UL
467 * Function : schUlResAlloc
469 * This function handles UL Resource allocation
471 * @param[in] SchCellCb *cell, cellCb
474 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
480 UlSchedInfo ulSchedInfo;
481 SchUlSlotInfo *schUlSlotInfo = NULLP;
482 SlotTimingInfo ulTimingInfo;
483 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
486 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
488 ulSchedInfo.cellId = cell->cellId;
489 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
490 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
491 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
493 /* Schedule resources for PRACH */
494 if(cell->firstSib1Transmitted)
495 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
497 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
498 if(schUlSlotInfo->schPuschInfo)
500 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
501 /* Check the ue drx status if the UE is active for uplink scheduling or not */
503 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
504 if(ueCb->ueDrxInfoPres)
506 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
510 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
511 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
512 sizeof(SchPuschInfo));
513 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
514 schUlSlotInfo->schPuschInfo = NULL;
517 if(schUlSlotInfo->pucchPres)
519 ret = fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
522 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
523 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
524 sizeof(SchPucchInfo));
530 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
534 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
537 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
540 schInitUlSlot(schUlSlotInfo);
544 /*******************************************************************
546 * @brief Fills pdcch and pdsch info for msg4
550 * Function : schDlRsrcAllocMsg4
553 * Fills pdcch and pdsch info for msg4
555 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
556 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
557 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
558 * @params[in] bool isRetx, SchDlHqProcCb *hqP
559 * @return ROK - success
562 * ****************************************************************/
563 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
564 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
566 uint8_t coreset0Idx = 0;
567 uint8_t firstSymbol = 0;
568 uint8_t numSymbols = 0;
569 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
570 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
573 SchBwpDlCfg *initialBwp = NULLP;
574 PdcchCfg *pdcch = NULLP;
575 PdschCfg *pdsch = NULLP;
577 DlMsgSchInfo *msg4Alloc = NULLP;
581 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
585 if(dlMsgAlloc == NULL)
587 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
591 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
592 initialBwp = &cell->cellCfg.schInitialDlBwp;
593 pdcch = &msg4Alloc->dlMsgPdcchCfg;
594 pdsch = &msg4Alloc->dlMsgPdschCfg;
595 bwp = &msg4Alloc->bwp;
596 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
598 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
599 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
601 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
602 numRbs = coresetIdxTable[coreset0Idx][1];
603 numSymbols = coresetIdxTable[coreset0Idx][2];
605 /* calculate time domain parameters */
606 uint16_t mask = 0x2000;
607 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
609 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
616 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
617 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
618 bwp->subcarrierSpacing = initialBwp->bwp.scs;
619 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
621 /* fill the PDCCH PDU */
622 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
623 pdcch->coresetCfg.durationSymbols = numSymbols;
624 memcpy(pdcch->coresetCfg.freqDomainResource, \
625 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
627 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
628 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
629 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
630 pdcch->coresetCfg.coreSetType = 0;
631 pdcch->coresetCfg.coreSetSize = numRbs;
632 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
633 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
635 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
636 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
637 pdcch->dci.scramblingRnti = 0;
638 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
639 pdcch->dci.aggregLevel = 4;
640 pdcch->dci.beamPdcchInfo.numPrgs = 1;
641 pdcch->dci.beamPdcchInfo.prgSize = 1;
642 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
643 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
644 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
645 pdcch->dci.txPdcchPower.powerValue = 0;
646 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
647 pdcch->dci.pdschCfg = pdsch;
649 /* fill the PDSCH PDU */
651 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
652 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
654 pdsch->numCodewords = 1;
655 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
657 pdsch->codeword[cwCount].targetCodeRate = 308;
658 pdsch->codeword[cwCount].qamModOrder = 2;
659 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
660 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
663 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
664 hqP->tbInfo[cwCount].tbSzReq = tbSize;
665 pdsch->codeword[cwCount].rvIndex = 0;
669 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
670 tbSize = hqP->tbInfo[cwCount].tbSzReq;
672 pdsch->codeword[cwCount].tbSize = tbSize;
674 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
675 pdsch->numLayers = 1;
676 pdsch->transmissionScheme = 0;
678 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
679 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
680 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
681 pdsch->dmrs.scid = 0;
682 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
683 pdsch->dmrs.dmrsPorts = 0;
684 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
685 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
686 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
688 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
689 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
691 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
692 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
693 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
694 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
696 /* Find total symbols occupied including DMRS */
697 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
698 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
699 * in that case only PDSCH symbols are marked as occupied */
700 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
702 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
703 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
705 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
708 startSymbol = dmrsStartSymbol;
709 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
712 /* Allocate the number of PRBs required for RAR PDSCH */
713 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
714 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
716 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
720 pdsch->beamPdschInfo.numPrgs = 1;
721 pdsch->beamPdschInfo.prgSize = 1;
722 pdsch->beamPdschInfo.digBfInterfaces = 0;
723 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
724 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
725 pdsch->txPdschPower.powerControlOffset = 0;
726 pdsch->txPdschPower.powerControlOffsetSS = 0;
728 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
732 /*******************************************************************
734 * @brief Scheduling for Pucch Resource
738 * Function : schAllocPucchResource
741 * Scheduling for Pucch Resource
743 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
744 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
745 * @return ROK - success
748 *******************************************************************/
750 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
751 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
753 uint16_t pucchSlot = 0;
754 SchUlSlotInfo *schUlSlotInfo = NULLP;
756 pucchSlot = pucchTime.slot;
757 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
758 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
760 schUlSlotInfo->pucchPres = true;
761 schUlSlotInfo->schPucchInfo.rnti = crnti;
764 /* set HARQ flag to true */
765 schUlSlotInfo->schPucchInfo.harqFlag = true;
766 schUlSlotInfo->schPucchInfo.numHarqBits = 1; /* 1 bit for HARQ */
767 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
768 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
773 /*******************************************************************
775 * @brief Fills pdcch and pdsch info for dedicated DL msg
779 * Function : schDlRsrcAllocDlMsg
782 * Fills pdcch and pdsch info for dl msg
784 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
785 * @params[in] uint16_t crnti, uint32_t tbSize
786 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
787 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
788 * @params[in] bool isRetx, SchDlHqProcCb *hqP
789 * @return ROK - success
792 * ****************************************************************/
793 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
794 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
795 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
798 PdcchCfg *pdcch = NULLP;
799 PdschCfg *pdsch = NULLP;
802 SchControlRsrcSet coreset1;
803 SchPdschConfig pdschCfg;
804 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
806 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
807 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
808 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
810 GET_UE_ID(crnti, ueId);
811 ueCb = cell->ueCb[ueId-1];
812 coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
813 pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
816 bwp->freqAlloc.numPrb = MAX_NUM_RB;
817 bwp->freqAlloc.startPrb = 0;
818 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
819 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
821 /* fill the PDCCH PDU */
822 //Considering coreset1 also starts from same symbol as coreset0
823 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
824 pdcch->coresetCfg.durationSymbols = coreset1.duration;
825 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
826 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
827 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
828 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
829 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
830 //Considering number of RBs in coreset1 is same as coreset0
831 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
832 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
833 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
835 pdcch->dci.rnti = ueCb.crnti;
836 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
837 pdcch->dci.scramblingRnti = 0;
838 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
839 pdcch->dci.aggregLevel = 4;
840 pdcch->dci.beamPdcchInfo.numPrgs = 1;
841 pdcch->dci.beamPdcchInfo.prgSize = 1;
842 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
843 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
844 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
845 pdcch->dci.txPdcchPower.powerValue = 0;
846 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
848 /* fill the PDSCH PDU */
850 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
851 pdsch->rnti = ueCb.crnti;
853 pdsch->numCodewords = 1;
854 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
856 pdsch->codeword[cwCount].targetCodeRate = 308;
857 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
858 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
859 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
860 pdsch->codeword[cwCount].rvIndex = 0;
864 tbSize +=TX_PAYLOAD_HDR_LEN;
865 hqP->tbInfo[cwCount].tbSzReq = tbSize;
867 pdsch->codeword[cwCount].tbSize = tbSize;
869 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
870 pdsch->numLayers = 1;
871 pdsch->transmissionScheme = 0;
873 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
874 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
875 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
876 pdsch->dmrs.scid = 0;
877 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
878 pdsch->dmrs.dmrsPorts = 0;
879 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
880 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
881 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
883 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
884 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
886 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
887 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
888 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
889 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
891 /* Find total symbols occupied including DMRS */
892 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
893 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
894 * in that case only PDSCH symbols are marked as occupied */
895 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
897 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
898 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
900 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
903 startSymbol = dmrsStartSymbol;
904 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
907 /* Allocate the number of PRBs required for DL PDSCH */
908 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
909 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
911 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
915 pdsch->beamPdschInfo.numPrgs = 1;
916 pdsch->beamPdschInfo.prgSize = 1;
917 pdsch->beamPdschInfo.digBfInterfaces = 0;
918 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
919 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
920 pdsch->txPdschPower.powerControlOffset = 0;
921 pdsch->txPdschPower.powerControlOffsetSS = 0;
923 pdcch->dci.pdschCfg = pdsch;
927 /*******************************************************************
929 * @brief Fills k0 and k1 information table for FDD
933 * Function : BuildK0K1TableForFdd
936 * Fills k0 and k1 information table for FDD
938 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
939 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
940 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
941 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
942 * @return ROK - success
945 * ****************************************************************/
946 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
947 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
950 uint8_t k1TmpVal =0, cfgIdx=0;
951 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
953 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
954 * required but this will require for harq processing */
955 // uint8_t k0TmpVal = 0;
956 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
957 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
959 /* Initialization the structure and storing the total slot values. */
960 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
961 k0K1InfoTbl->tblSize = cell->numSlots;
963 /* Storing time domain resource allocation list based on common or dedicated configuration. */
964 if(pdschCfgCmnPres == true)
966 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
967 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
969 /*TODO uncomment this line during harq processing */
970 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
975 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
976 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
978 /*TODO uncomment this line during harq processing */
979 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
983 /* Checking all the slots for K0 and K1 values. */
984 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
987 /* Storing the values of k0 based on time domain resource
988 * allocation list. If the value is unavailable then fill default values,
989 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
990 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
992 /* TODO These if 0 we will remove during harq processing */
994 if(pdschCfgCmnPres == true)
996 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1000 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1002 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1006 k0TmpVal = DEFAULT_K0_VALUE;
1010 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1011 * then skip else continue storing the values. */
1013 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1015 k1TmpVal = UlAckTbl[k1Index];
1016 if(k1TmpVal <= MIN_NUM_K1_IDX)
1021 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1022 /* TODO Store K1 index where harq feedback will be received in harq table. */
1026 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1027 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1033 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1038 /*******************************************************************
1040 * @brief Fills k0 and k1 information table
1044 * Function : BuildK0K1Table
1047 * Fills K0 and k1 information table
1049 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1050 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1051 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1052 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1053 * @return ROK - success
1056 * ****************************************************************/
1057 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1058 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1063 bool ulSlotPresent = false;
1064 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1065 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1066 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1067 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1070 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1072 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1078 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1079 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1080 k0K1InfoTbl->tblSize = cell->numSlots;
1081 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1083 /* Storing time domain resource allocation list based on common or
1084 * dedicated configuration availability. */
1085 if(pdschCfgCmnPres == true)
1087 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1088 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1090 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1095 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1096 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1098 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1102 /* Checking all possible indexes for K0 and K1 values. */
1103 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1105 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1106 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1107 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1112 /* Storing K0 , start symbol and length symbol for further processing.
1113 * If K0 value is not available then we can fill the default values
1114 * given in spec 38.331. */
1116 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1118 if(pdschCfgCmnPres == true)
1120 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1121 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1122 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1126 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1128 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1132 k0TmpVal = DEFAULT_K0_VALUE;
1134 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1135 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1138 /* If current slot + k0 is UL then skip the slot
1139 * else if it is DL slot then continue the next steps
1140 * else if it is a FLEXI slot then check symbols of slot, It should not
1141 * contain any UL slot. */
1142 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1143 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1144 if(slotCfg == UL_SLOT)
1148 if(slotCfg == FLEXI_SLOT)
1150 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1152 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1153 if(slotCfg == UL_SLOT)
1160 /* If current slot + k0 + k1 is a DL slot then skip the slot
1161 * else if it is UL slot then store the information
1162 * else if it is FLEXI slot then check the symbols, it must have
1163 * at least one UL symbol. */
1165 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1167 k1TmpVal = UlAckTbl[k1Index];
1168 if(k1TmpVal > MIN_NUM_K1_IDX)
1170 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1171 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1172 if(slotCfg == DL_SLOT)
1176 if(slotCfg == FLEXI_SLOT)
1178 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1180 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1182 ulSlotPresent = true;
1187 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1189 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1190 /* TODO Store K1 index where harq feedback will be received
1196 /* Store all the values if all condition satisfies. */
1199 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1200 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1206 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1213 /*******************************************************************
1215 * @brief Fills K2 information table for FDD
1219 * Function : BuildK2InfoTableForFdd
1222 * Fills K2 information table for FDD
1224 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1225 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1226 * @return ROK - success
1229 * ****************************************************************/
1230 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1231 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1233 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1235 /* Initialization the structure and storing the total slot values. */
1236 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1237 k2InfoTbl->tblSize = cell->numSlots;
1239 msg3K2InfoTbl->tblSize = cell->numSlots;
1241 /* Checking all possible indexes for K2. */
1242 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1244 /* Storing K2 values. */
1245 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1247 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1248 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1249 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1251 /* Updating K2 values for MSG3 */
1254 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1255 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1256 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1262 /*******************************************************************
1264 * @brief Fills K2 information table
1268 * Function : BuildK2InfoTable
1271 * Fills K2 information table
1273 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1274 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1275 * @return ROK - success
1278 * ****************************************************************/
1279 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1280 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1284 bool dlSymbolPresent = false;
1285 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1286 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1287 SlotConfig currentSlot;
1290 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1292 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1298 /* Initialization the structure and storing the total slot values. */
1299 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1300 k2InfoTbl->tblSize = cell->numSlots;
1302 msg3K2InfoTbl->tblSize = cell->numSlots;
1303 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1305 /* Checking all possible indexes for K2. */
1306 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1308 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1310 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1311 if(currentSlot != UL_SLOT)
1313 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1315 /* Storing k2, startSymbol, endSymbol information for further processing.
1316 * If k2 is absent then fill the default values given in spec 38.331
1317 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1318 k2Val = timeDomRsrcAllocList[k2Index].k2;
1321 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1324 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1327 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1330 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1333 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1338 /* Current slot + k2 should be either UL or FLEXI slot.
1339 * If slot is FLEXI then check all the symbols of that slot,
1340 * it should not contain any DL or FLEXI slot */
1341 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1342 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1343 if(slotCfg != DL_SLOT)
1345 if(slotCfg == FLEXI_SLOT)
1347 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1348 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1349 dlSymbolPresent = false;
1350 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1352 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1353 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1355 dlSymbolPresent = true;
1360 /* Store all the values if all condition satisfies. */
1361 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1363 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1364 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1365 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1371 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1373 /* Check for K2 for MSG3 */
1374 /* Current slot + k2 should be either UL or FLEXI slot.
1375 * If slot is FLEXI then check all the symbols of that slot,
1376 * it should not contain any DL or FLEXI slot */
1377 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1378 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1379 if(slotCfg != DL_SLOT)
1381 if(slotCfg == FLEXI_SLOT)
1383 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1384 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1385 dlSymbolPresent = false;
1386 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1388 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1389 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1391 dlSymbolPresent = true;
1396 /* Store all the values if all condition satisfies. */
1397 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1399 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1400 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1401 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1412 /*******************************************************************************************
1414 * @brief Allocate the PRB using RRM policy
1418 * Function : prbAllocUsingRRMPolicy
1421 * [Step1]: Traverse each Node in the LC list
1422 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1423 * [Step3]: Calcualte the maxPRB for this LC.
1424 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1426 * b. For Default, just SharedPRB count
1427 * [Step4]: If the LC is the First one to be allocated for this UE then add
1428 * TX_PAYLODN_LEN to reqBO
1429 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1430 * based on reqBO and maxPRB left.
1431 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1432 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1433 * [Step8]: Continue the next loop from List->head
1436 * [Exit1]: If all the LCs are allocated in list
1437 * [Exit2]: If PRBs are exhausted
1439 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1440 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1441 * I/P > mcsIdx and PDSCH symbols count
1442 * I/P & O/P > Shared PRB , reserved PRB Count
1443 * I/P & O/P > Total TBS size accumulated
1444 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1445 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1449 * *******************************************************************************************/
1450 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1451 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1453 CmLList *node = NULLP;
1454 LcInfo *lcNode = NULLP;
1455 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1459 DU_LOG("\nERROR --> SCH: LcList not present");
1464 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1465 * For Other LcList, remReservedPRB = 0*/
1466 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1468 remReservedPRB = *reservedPRB;
1475 /*For Debugging purpose*/
1478 lcNode = (LcInfo *)node->node;
1480 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1481 * process of LCID which was fully allocated. Check is just for safety purpose*/
1482 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1484 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1486 deleteNodeFromLList(lcLL, node);
1487 SCH_FREE(lcNode, sizeof(LcInfo));
1492 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1493 if(lcNode->allocBO != 0)
1495 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1499 /*[Exit2]: If PRBs are exhausted*/
1502 /*Loop Exit: All resources exhausted*/
1503 if(remReservedPRB == 0 && *sharedPRB == 0)
1505 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1511 /*Loop Exit: All resources exhausted*/
1514 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1520 maxPRB = remReservedPRB + *sharedPRB;
1523 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1525 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1527 *isTxPayloadLenAdded = TRUE;
1528 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1529 mcsIdx, numSymbols, maxPRB, &estPrb);
1530 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1532 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1534 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1537 lcNode->reqBO += UL_GRANT_SIZE;
1538 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1543 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1544 mcsIdx, numSymbols, maxPRB, &estPrb);
1547 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1548 * estimated PRB allocated*/
1549 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1551 remReservedPRB = remReservedPRB - estPrb;
1553 else /*LC requirement need PRB share from SharedPRB*/
1555 if(*sharedPRB <= (estPrb - remReservedPRB))
1557 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1562 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1568 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1569 lcNode->allocPRB = estPrb;
1570 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1572 /*[Step8]:Next loop: First LC to be picked from the list
1573 * because Allocated Nodes are moved to the last*/
1580 /*******************************************************************************************
1582 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1587 * Function : updateGrantSizeForBoRpt
1590 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1591 * BO Report in dlMsgAlloc Pointer
1593 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1594 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1595 * I/P & O/P > BsrInfo (applicable for UL)
1596 * I/P & O/P > accumalatedBOSize
1599 * *******************************************************************************************/
1600 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1601 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1603 CmLList *node = NULLP, *next = NULLP;
1604 LcInfo *lcNode = NULLP;
1605 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1609 DU_LOG("\nERROR --> SCH: LcList not present");
1627 lcNode = (LcInfo *)node->node;
1630 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1631 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1632 if(dlMsgAlloc != NULLP)
1634 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1636 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1637 * report for allocation can be sent to MAC*/
1638 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1639 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1641 /*Calculate the Total Payload/BO size allocated*/
1642 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1644 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1645 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1647 dlMsgSchInfo->numLc++;
1648 /* The LC has been fully allocated, clean it */
1649 if(lcNode->reqBO == 0)
1651 handleLcLList(lcLL, lcNode->lcId, DELETE);
1654 else if(bsrInfo != NULLP)
1656 *accumalatedBOSize += lcNode->allocBO;
1657 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1658 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1666 /*******************************************************************
1668 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1672 * Function : fillDlMsgInfo
1675 * fill DL message information for MSG4 and Dedicated DL Msg
1677 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1678 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1681 *******************************************************************/
1682 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1684 hqP->tbInfo[0].isEnabled = TRUE;
1685 hqP->tbInfo[0].state = HQ_TB_WAITING;
1686 hqP->tbInfo[0].txCntr++;
1687 hqP->tbInfo[1].isEnabled = TRUE;
1688 hqP->tbInfo[1].state = HQ_TB_WAITING;
1689 hqP->tbInfo[1].txCntr++;
1690 dlMsgInfo->crnti = crnti;
1691 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1692 dlMsgInfo->harqProcNum = hqP->procId;
1693 dlMsgInfo->dlAssignIdx = 0;
1694 dlMsgInfo->pucchTpc = 0;
1695 dlMsgInfo->pucchResInd = 0;
1696 dlMsgInfo->harqFeedbackInd = hqP->k1;
1697 dlMsgInfo->dciFormatId = 1;
1700 /*******************************************************************
1702 * @brief sch Process pending Msg4 Req
1706 * Function : schProcessMsg4Req
1709 * sch Process pending Msg4 Req
1711 * @params[in] SchCellCb *cell, cell cb struct pointer
1712 * @params[in] SlotTimingInfo currTime, current timing info
1713 * @params[in] uint8_t ueId, ue ID
1714 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1715 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1716 * @return ROK - success
1719 *******************************************************************/
1721 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1723 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1724 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1725 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1726 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1730 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1734 if (isRetxMsg4 == FALSE)
1736 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1738 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1743 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1744 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1746 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1750 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1752 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1753 if(dciSlotAlloc == NULLP)
1755 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1758 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1759 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1760 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1763 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1765 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1766 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1768 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1769 if(dciSlotAlloc->numSchedInfo == 0)
1771 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1772 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1775 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1779 /* Check if both DCI and RAR are sent in the same slot.
1780 * If not, allocate memory RAR PDSCH slot to store RAR info
1782 if(pdcchTime.slot == pdschTime.slot)
1784 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1785 dciSlotAlloc->numSchedInfo++;
1789 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1790 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1792 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1793 if(msg4SlotAlloc == NULLP)
1795 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1796 if(dciSlotAlloc->numSchedInfo == 0)
1798 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1799 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1802 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1805 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1806 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1807 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1810 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1812 /* Copy all RAR info */
1813 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1814 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1815 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1816 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1818 /* Assign correct PDU types in corresponding slots */
1819 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1820 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1821 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1823 dciSlotAlloc->numSchedInfo++;
1824 msg4SlotAlloc->numSchedInfo++;
1827 /* PUCCH resource */
1828 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1830 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1831 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1832 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1833 cell->raCb[ueId-1].msg4recvd = FALSE;
1836 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1841 /*******************************************************************
1843 * @brief sch Process pending Sr or Bsr Req
1847 * Function : updateBsrAndLcList
1850 * Updating the BSRInfo in UECB and Lclist
1852 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1853 * @return ROK - success
1856 *******************************************************************/
1857 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
1859 CmLList *node = NULLP, *next = NULLP;
1860 LcInfo *lcNode = NULLP;
1864 DU_LOG("\nERROR --> SCH: LcList not present");
1881 lcNode = (LcInfo *)node->node;
1884 /*Only when Status is OK then allocation is marked as ZERO and reqBO
1885 * is updated in UE's DB. If Failure, then allocation is added to reqBO
1886 * and same is updated in Ue's DB inside BSR Info structure*/
1889 lcNode->allocBO = 0;
1892 lcNode->reqBO += lcNode->allocBO;
1893 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
1894 if(lcNode->reqBO == 0)
1896 handleLcLList(lcLL, lcNode->lcId, DELETE);
1903 /*******************************************************************
1905 * @brief sch Process pending Sr or Bsr Req
1909 * Function : schProcessSrOrBsrReq
1912 * sch Process pending Sr or Bsr Req
1914 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1915 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1916 * @return true - success
1919 *******************************************************************/
1920 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
1922 bool k2Found = FALSE;
1923 uint8_t startSymb = 0, symbLen = 0;
1924 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1926 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1927 SlotTimingInfo dciTime, puschTime;
1931 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
1935 ueCb = &cell->ueCb[ueId-1];
1939 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
1943 if (isRetx == FALSE)
1945 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
1951 /* Calculating time frame to send DCI for SR */
1952 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
1954 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1957 if(ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
1958 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2InfoTbl;
1960 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
1962 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
1964 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
1966 if(!ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
1968 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
1969 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
1970 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
1974 k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
1975 startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
1976 symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
1978 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
1979 /* Calculating time frame to send PUSCH for SR */
1980 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
1982 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1985 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
1992 ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
2000 if(cell->api->SchScheduleUlLc(dciTime, puschTime, startSymb, symbLen, isRetx, hqP) != ROK)
2005 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2011 /********************************************************************************
2013 * @brief Increment the Slot by a input factor
2017 * Function : schIncrSlot
2020 * Increment the slot by a input factor till num of Slots configured in a
2021 * Radio Frame. If it exceeds, move to next sfn.
2023 * @params[in/out] SlotTimingInfo timingInfo
2024 * [in] uint8_t incr [Increment factor]
2025 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2027 * @return ROK - success
2030 *******************************************************************/
2031 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2033 timingInfo->slot += incr;
2034 if(timingInfo->slot >= numSlotsPerRF)
2036 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2037 timingInfo->slot %= numSlotsPerRF;
2038 if(timingInfo->sfn > MAX_SFN)
2040 timingInfo->sfn %= MAX_SFN;
2045 /*******************************************************************
2047 * @brief Fill PDSCH info in Page Alloc
2051 * Function : schFillPagePdschCfg
2053 * Functionality: Fill PDSCH info in Page Alloc
2055 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2056 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2058 * @return pointer to return Value(ROK, RFAILED)
2060 * ****************************************************************/
2061 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2063 uint8_t cwCount = 0;
2064 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2066 /* fill the PDSCH PDU */
2068 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2069 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2070 pagePdschCfg->pduIndex = 0;
2071 pagePdschCfg->numCodewords = 1;
2072 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2074 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2075 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2076 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2077 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2078 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2079 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2080 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2082 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2083 pagePdschCfg->numLayers = 1;
2084 pagePdschCfg->transmissionScheme = 0;
2085 pagePdschCfg->refPoint = 0;
2086 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2087 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2088 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2089 pagePdschCfg->dmrs.scid = 0;
2090 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2091 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2092 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2093 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2094 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2096 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2097 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2098 pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
2099 pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2100 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2101 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2102 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2103 pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2104 pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2106 /* Find total symbols occupied including DMRS */
2107 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2108 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2109 * in that case only PDSCH symbols are marked as occupied */
2110 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2112 startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
2113 numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2115 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2118 startSymbol = dmrsStartSymbol;
2119 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2122 /* Allocate the number of PRBs required for DL PDSCH */
2123 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2124 &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
2126 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2130 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2131 pagePdschCfg->beamPdschInfo.prgSize = 1;
2132 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2133 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2134 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2135 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2136 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2141 /**********************************************************************
2143 **********************************************************************/