1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
47 * @brief common resource allocation for SSB
51 * Function : schBroadcastSsbAlloc
53 * This function handles common scheduling for SSB
55 * @param[in] SchCellCb *cell, cell cb
56 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
59 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
62 uint8_t ssbStartSymb, idx;
64 SchDlSlotInfo *schDlSlotInfo;
69 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
73 if(dlBrdcstAlloc == NULL)
75 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
79 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
80 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
81 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
83 /* Assign interface structure */
84 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
87 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
88 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
89 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
90 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
91 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
92 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
95 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
97 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
102 schDlSlotInfo->ssbPres = true;
103 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
108 * @brief common resource allocation for SIB1
112 * Function : schBroadcastSib1Alloc
114 * This function handles common scheduling for SIB1
116 * @param[in] SchCellCb *cell, cell cb
117 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
120 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
122 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
124 ResAllocType1 freqAlloc;
125 TimeDomainAlloc timeAlloc;
126 SchDlSlotInfo *schDlSlotInfo = NULLP;
130 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
134 if(dlBrdcstAlloc == NULL)
136 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
140 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
141 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
142 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
143 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
145 /* Find total symbols used including DMRS */
146 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
147 * in that case only PDSCH symbols are marked as occupied */
148 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
149 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
151 startSymbol = timeAlloc.startSymb;
152 numSymbol = timeAlloc.numSymb;
154 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
157 startSymbol = dmrsStartSymbol;
158 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
162 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
164 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
168 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
169 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
170 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
171 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
172 schDlSlotInfo->sib1Pres = true;
176 /*******************************************************************
178 * @brief Handles sending UL scheduler info to MAC
182 * Function : sendUlSchInfoToMac
185 * Sends UL Sch info to MAC from SCH
188 * @return ROK - success
191 * ****************************************************************/
192 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
196 memset(&pst, 0, sizeof(Pst));
197 FILL_PST_SCH_TO_MAC(pst, inst);
198 pst.event = EVENT_UL_SCH_INFO;
200 return(MacMessageRouter(&pst, (void *)ulSchedInfo));
204 * @brief Function to fill Pucch Format 0
208 * Function : fillPucchFormat0
210 * Function to fill Pucch format 0
212 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
216 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
218 if(resrcInfo->SchPucchFormat.format0)
220 ulSchedPucch->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
221 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
222 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
223 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
224 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
229 * @brief Function to fill Pucch Format 1
233 * Function : fillPucchFormat1
235 * Function to fill Pucch format 1
237 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
241 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
243 if(resrcInfo->SchPucchFormat.format1)
245 ulSchedPucch->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
246 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
247 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
248 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
249 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
250 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
255 * @brief Function to fill Pucch format for UL Sched Info
259 * Function : fillUlSchedPucchFormat
261 * Function to fill Pucch format for UL Sched Info
263 * @param[in] pucchFormat , SchPucchInfo pointer,
264 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
268 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
269 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
278 fillPucchFormat0(ulSchedPucch, resrcInfo);
285 fillPucchFormat1(ulSchedPucch, resrcInfo);
289 ulSchedPucch->addDmrs = formatCfg->addDmrs;
290 ulSchedPucch->pi2BPSK = formatCfg->pi2BPSK;
293 }/* To Add support for more Pucch Format */
296 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
304 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
308 * Function : fillUlSchedPucchDedicatedCfg
310 * Function to fill Pucch Dedicated Cfg for UL Sched Info
312 * @param[in] pucchFormat to be filled
313 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
317 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
318 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
320 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
321 uint16_t srOffset = 0;
322 uint16_t numSlots = cell->numSlots;
323 bool isAllocated = false;
324 uint16_t pucchStartPrb;
326 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
328 //Assuming one entry in the list
329 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
331 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
333 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
334 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
336 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
337 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
338 ulSchedPucch->fdAlloc.resAlloc.type1.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
339 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
340 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
341 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
345 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
346 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
359 if(pucchDedCfg->format1)
361 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
371 /* setting SR and UCI flag */
372 if(pucchDedCfg->schedReq)
374 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
376 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
377 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
380 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
382 ulSchedPucch->srFlag = true;
389 * @brief Function to fill Pucch Resource Info
393 * Function : fillPucchResourceInfo
395 * Function to fill Pucch Resource Info
397 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
398 * @return ROK/RFAILED
401 uint16_t fillPucchResourceInfo(uint8_t ueId, SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
403 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
404 SchCellCb *cell = schCb[inst].cells[inst];
405 SchPucchCfgCmn *pucchCfg = NULLP;
406 SchBwpParams *ulBwp = NULLP;
408 SchUeCb *ueCb = NULLP;
414 ueCb = &(cell->ueCb[ueIdx]);
415 if(ueCb->ueDrxInfoPres)
417 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
421 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfgPres)
423 /* fill pucch dedicated cfg */
424 ret = fillUlSchedPucchDedicatedCfg(cell,\
425 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
428 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
429 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
435 /* fill pucch common cfg */
436 /* derive pucchResourceSet from schCellCfg */
437 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
438 pucchIdx = pucchCfg->pucchResourceCommon;
439 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
440 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
441 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
442 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
445 schPucchInfo->fdAlloc.resAlloc.type1.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
446 schPucchInfo->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
447 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
448 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
449 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
451 /* set SR and UCI flag to false */
452 schPucchInfo->srFlag = true;
459 * @brief resource allocation for UL
463 * Function : schUlResAlloc
465 * This function handles UL Resource allocation
467 * @param[in] SchCellCb *cell, cellCb
470 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
476 UlSchedInfo ulSchedInfo;
477 SchUlSlotInfo *schUlSlotInfo = NULLP;
478 SlotTimingInfo ulTimingInfo;
479 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
482 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
484 ulSchedInfo.cellId = cell->cellId;
485 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
486 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
487 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
489 /* Schedule resources for PRACH */
490 if(cell->firstSib1Transmitted)
491 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
493 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
494 if(schUlSlotInfo->schPuschInfo)
496 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->puschUe);
497 /* Check the ue drx status if the UE is active for uplink scheduling or not */
499 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
500 if(ueCb->ueDrxInfoPres)
502 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
506 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
507 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
508 sizeof(SchPuschInfo));
509 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
510 schUlSlotInfo->schPuschInfo = NULL;
513 if(schUlSlotInfo->pucchPres)
515 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->pucchUe);
516 ret = fillPucchResourceInfo(schUlSlotInfo->pucchUe, &schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
519 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
520 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
521 sizeof(SchPucchInfo));
527 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
531 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
534 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
537 schInitUlSlot(schUlSlotInfo);
541 /*******************************************************************
543 * @brief Fills pdcch and pdsch info for msg4
547 * Function : schDlRsrcAllocMsg4
550 * Fills pdcch and pdsch info for msg4
552 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
553 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
554 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
555 * @params[in] bool isRetx, SchDlHqProcCb *hqP
556 * @return ROK - success
559 * ****************************************************************/
560 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
561 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
563 uint8_t coreset0Idx = 0;
564 uint8_t firstSymbol = 0;
565 uint8_t numSymbols = 0;
566 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
567 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
570 SchBwpDlCfg *initialBwp = NULLP;
571 PdcchCfg *pdcch = NULLP;
572 PdschCfg *pdsch = NULLP;
574 DlMsgSchInfo *msg4Alloc = NULLP;
578 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
582 if(dlMsgAlloc == NULL)
584 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
588 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
589 initialBwp = &cell->cellCfg.schInitialDlBwp;
590 pdcch = &msg4Alloc->dlMsgPdcchCfg;
591 pdsch = &msg4Alloc->dlMsgPdschCfg;
592 bwp = &msg4Alloc->bwp;
593 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
595 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
596 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
598 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
599 numRbs = coresetIdxTable[coreset0Idx][1];
600 numSymbols = coresetIdxTable[coreset0Idx][2];
602 /* calculate time domain parameters */
603 uint16_t mask = 0x2000;
604 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
606 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
613 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
614 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
615 bwp->subcarrierSpacing = initialBwp->bwp.scs;
616 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
618 /* fill the PDCCH PDU */
619 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
620 pdcch->coresetCfg.durationSymbols = numSymbols;
621 memcpy(pdcch->coresetCfg.freqDomainResource, \
622 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
624 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
625 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
626 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
627 pdcch->coresetCfg.coreSetType = 0;
628 pdcch->coresetCfg.coreSetSize = numRbs;
629 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
630 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
632 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
633 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
634 pdcch->dci.scramblingRnti = 0;
635 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
636 pdcch->dci.aggregLevel = 4;
637 pdcch->dci.beamPdcchInfo.numPrgs = 1;
638 pdcch->dci.beamPdcchInfo.prgSize = 1;
639 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
640 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
641 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
642 pdcch->dci.txPdcchPower.powerValue = 0;
643 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
644 pdcch->dci.pdschCfg = pdsch;
646 /* fill the PDSCH PDU */
648 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
649 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
651 pdsch->numCodewords = 1;
652 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
654 pdsch->codeword[cwCount].targetCodeRate = 308;
655 pdsch->codeword[cwCount].qamModOrder = 2;
656 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
657 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
660 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
661 hqP->tbInfo[cwCount].tbSzReq = tbSize;
662 pdsch->codeword[cwCount].rvIndex = 0;
666 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
667 tbSize = hqP->tbInfo[cwCount].tbSzReq;
669 pdsch->codeword[cwCount].tbSize = tbSize;
671 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
672 pdsch->numLayers = 1;
673 pdsch->transmissionScheme = 0;
675 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
676 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
677 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
678 pdsch->dmrs.scid = 0;
679 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
680 pdsch->dmrs.dmrsPorts = 0;
681 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
682 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
683 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
685 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
686 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
688 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
689 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
690 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
691 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
693 /* Find total symbols occupied including DMRS */
694 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
695 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
696 * in that case only PDSCH symbols are marked as occupied */
697 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
699 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
700 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
702 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
705 startSymbol = dmrsStartSymbol;
706 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
709 /* Allocate the number of PRBs required for RAR PDSCH */
710 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
711 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
713 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
717 pdsch->beamPdschInfo.numPrgs = 1;
718 pdsch->beamPdschInfo.prgSize = 1;
719 pdsch->beamPdschInfo.digBfInterfaces = 0;
720 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
721 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
722 pdsch->txPdschPower.powerControlOffset = 0;
723 pdsch->txPdschPower.powerControlOffsetSS = 0;
725 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
729 /*******************************************************************
731 * @brief Scheduling for Pucch Resource
735 * Function : schAllocPucchResource
738 * Scheduling for Pucch Resource
740 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
741 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
742 * @return ROK - success
745 *******************************************************************/
747 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
748 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
750 uint16_t pucchSlot = 0;
751 SchUlSlotInfo *schUlSlotInfo = NULLP;
753 pucchSlot = pucchTime.slot;
754 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
755 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
757 schUlSlotInfo->pucchPres = true;
760 /* set HARQ flag to true */
761 schUlSlotInfo->schPucchInfo.harqInfo.harqBitLength = 1; /* 1 bit for HARQ */
762 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
763 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
768 /*******************************************************************
770 * @brief Fills pdcch and pdsch info for dedicated DL msg
774 * Function : schDlRsrcAllocDlMsg
777 * Fills pdcch and pdsch info for dl msg
779 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
780 * @params[in] uint16_t crnti, uint32_t tbSize
781 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
782 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
783 * @params[in] bool isRetx, SchDlHqProcCb *hqP
784 * @return ROK - success
787 * ****************************************************************/
788 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
789 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
790 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
793 PdcchCfg *pdcch = NULLP;
794 PdschCfg *pdsch = NULLP;
797 SchControlRsrcSet coreset1;
798 SchPdschConfig pdschCfg;
799 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
801 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
802 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
803 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
805 GET_UE_ID(crnti, ueId);
806 ueCb = cell->ueCb[ueId-1];
807 coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
808 pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
811 bwp->freqAlloc.numPrb = MAX_NUM_RB;
812 bwp->freqAlloc.startPrb = 0;
813 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
814 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
816 /* fill the PDCCH PDU */
817 //Considering coreset1 also starts from same symbol as coreset0
818 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
819 pdcch->coresetCfg.durationSymbols = coreset1.duration;
820 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
821 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
822 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
823 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
824 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
825 //Considering number of RBs in coreset1 is same as coreset0
826 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
827 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
828 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
830 pdcch->dci.rnti = ueCb.crnti;
831 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
832 pdcch->dci.scramblingRnti = 0;
833 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
834 pdcch->dci.aggregLevel = 4;
835 pdcch->dci.beamPdcchInfo.numPrgs = 1;
836 pdcch->dci.beamPdcchInfo.prgSize = 1;
837 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
838 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
839 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
840 pdcch->dci.txPdcchPower.powerValue = 0;
841 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
843 /* fill the PDSCH PDU */
845 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
846 pdsch->rnti = ueCb.crnti;
848 pdsch->numCodewords = 1;
849 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
851 pdsch->codeword[cwCount].targetCodeRate = 308;
852 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
853 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
854 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
855 pdsch->codeword[cwCount].rvIndex = 0;
859 tbSize +=TX_PAYLOAD_HDR_LEN;
860 hqP->tbInfo[cwCount].tbSzReq = tbSize;
862 pdsch->codeword[cwCount].tbSize = tbSize;
864 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
865 pdsch->numLayers = 1;
866 pdsch->transmissionScheme = 0;
868 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
869 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
870 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
871 pdsch->dmrs.scid = 0;
872 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
873 pdsch->dmrs.dmrsPorts = 0;
874 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
875 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
876 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
878 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
879 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
881 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
882 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
883 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
884 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
886 /* Find total symbols occupied including DMRS */
887 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
888 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
889 * in that case only PDSCH symbols are marked as occupied */
890 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
892 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
893 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
895 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
898 startSymbol = dmrsStartSymbol;
899 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
902 /* Allocate the number of PRBs required for DL PDSCH */
903 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
904 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
906 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
910 pdsch->beamPdschInfo.numPrgs = 1;
911 pdsch->beamPdschInfo.prgSize = 1;
912 pdsch->beamPdschInfo.digBfInterfaces = 0;
913 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
914 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
915 pdsch->txPdschPower.powerControlOffset = 0;
916 pdsch->txPdschPower.powerControlOffsetSS = 0;
918 pdcch->dci.pdschCfg = pdsch;
922 /*******************************************************************
924 * @brief Fills k0 and k1 information table for FDD
928 * Function : BuildK0K1TableForFdd
931 * Fills k0 and k1 information table for FDD
933 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
934 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
935 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
936 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
937 * @return ROK - success
940 * ****************************************************************/
941 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
942 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
945 uint8_t k1TmpVal =0, cfgIdx=0;
946 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
948 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
949 * required but this will require for harq processing */
950 // uint8_t k0TmpVal = 0;
951 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
952 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
954 /* Initialization the structure and storing the total slot values. */
955 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
956 k0K1InfoTbl->tblSize = cell->numSlots;
958 /* Storing time domain resource allocation list based on common or dedicated configuration. */
959 if(pdschCfgCmnPres == true)
961 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
962 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
964 /*TODO uncomment this line during harq processing */
965 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
970 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
971 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
973 /*TODO uncomment this line during harq processing */
974 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
978 /* Checking all the slots for K0 and K1 values. */
979 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
982 /* Storing the values of k0 based on time domain resource
983 * allocation list. If the value is unavailable then fill default values,
984 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
985 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
987 /* TODO These if 0 we will remove during harq processing */
989 if(pdschCfgCmnPres == true)
991 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
995 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
997 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1001 k0TmpVal = DEFAULT_K0_VALUE;
1005 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1006 * then skip else continue storing the values. */
1008 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1010 k1TmpVal = UlAckTbl[k1Index];
1011 if(k1TmpVal <= MIN_NUM_K1_IDX)
1016 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1017 /* TODO Store K1 index where harq feedback will be received in harq table. */
1021 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1022 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1028 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1033 /*******************************************************************
1035 * @brief Fills k0 and k1 information table
1039 * Function : BuildK0K1Table
1042 * Fills K0 and k1 information table
1044 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1045 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1046 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1047 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1048 * @return ROK - success
1051 * ****************************************************************/
1052 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1053 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1058 bool ulSlotPresent = false;
1059 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1060 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1061 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1062 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1065 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1067 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1073 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1074 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1075 k0K1InfoTbl->tblSize = cell->numSlots;
1076 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1078 /* Storing time domain resource allocation list based on common or
1079 * dedicated configuration availability. */
1080 if(pdschCfgCmnPres == true)
1082 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1083 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1085 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1090 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1091 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1093 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1097 /* Checking all possible indexes for K0 and K1 values. */
1098 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1100 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1101 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1102 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1107 /* Storing K0 , start symbol and length symbol for further processing.
1108 * If K0 value is not available then we can fill the default values
1109 * given in spec 38.331. */
1111 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1113 if(pdschCfgCmnPres == true)
1115 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1116 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1117 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1121 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1123 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1127 k0TmpVal = DEFAULT_K0_VALUE;
1129 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1130 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1133 /* If current slot + k0 is UL then skip the slot
1134 * else if it is DL slot then continue the next steps
1135 * else if it is a FLEXI slot then check symbols of slot, It should not
1136 * contain any UL slot. */
1137 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1138 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1139 if(slotCfg == UL_SLOT)
1143 if(slotCfg == FLEXI_SLOT)
1145 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1147 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1148 if(slotCfg == UL_SLOT)
1155 /* If current slot + k0 + k1 is a DL slot then skip the slot
1156 * else if it is UL slot then store the information
1157 * else if it is FLEXI slot then check the symbols, it must have
1158 * at least one UL symbol. */
1160 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1162 k1TmpVal = UlAckTbl[k1Index];
1163 if(k1TmpVal > MIN_NUM_K1_IDX)
1165 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1166 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1167 if(slotCfg == DL_SLOT)
1171 if(slotCfg == FLEXI_SLOT)
1173 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1175 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1177 ulSlotPresent = true;
1182 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1184 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1185 /* TODO Store K1 index where harq feedback will be received
1191 /* Store all the values if all condition satisfies. */
1194 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1195 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1201 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1208 /*******************************************************************
1210 * @brief Fills K2 information table for FDD
1214 * Function : BuildK2InfoTableForFdd
1217 * Fills K2 information table for FDD
1219 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1220 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1221 * @return ROK - success
1224 * ****************************************************************/
1225 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1226 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1228 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1230 /* Initialization the structure and storing the total slot values. */
1231 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1232 k2InfoTbl->tblSize = cell->numSlots;
1234 msg3K2InfoTbl->tblSize = cell->numSlots;
1236 /* Checking all possible indexes for K2. */
1237 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1239 /* Storing K2 values. */
1240 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1242 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1243 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1244 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1246 /* Updating K2 values for MSG3 */
1249 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1250 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1251 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1257 /*******************************************************************
1259 * @brief Fills K2 information table
1263 * Function : BuildK2InfoTable
1266 * Fills K2 information table
1268 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1269 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1270 * @return ROK - success
1273 * ****************************************************************/
1274 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1275 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1279 bool dlSymbolPresent = false;
1280 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1281 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1282 SlotConfig currentSlot;
1285 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1287 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1293 /* Initialization the structure and storing the total slot values. */
1294 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1295 k2InfoTbl->tblSize = cell->numSlots;
1297 msg3K2InfoTbl->tblSize = cell->numSlots;
1298 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1300 /* Checking all possible indexes for K2. */
1301 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1303 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1305 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1306 if(currentSlot != UL_SLOT)
1308 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1310 /* Storing k2, startSymbol, endSymbol information for further processing.
1311 * If k2 is absent then fill the default values given in spec 38.331
1312 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1313 k2Val = timeDomRsrcAllocList[k2Index].k2;
1316 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1319 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1322 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1325 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1328 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1333 /* Current slot + k2 should be either UL or FLEXI slot.
1334 * If slot is FLEXI then check all the symbols of that slot,
1335 * it should not contain any DL or FLEXI slot */
1336 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1337 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1338 if(slotCfg != DL_SLOT)
1340 if(slotCfg == FLEXI_SLOT)
1342 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1343 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1344 dlSymbolPresent = false;
1345 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1347 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1348 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1350 dlSymbolPresent = true;
1355 /* Store all the values if all condition satisfies. */
1356 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1358 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1359 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1360 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1366 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1368 /* Check for K2 for MSG3 */
1369 /* Current slot + k2 should be either UL or FLEXI slot.
1370 * If slot is FLEXI then check all the symbols of that slot,
1371 * it should not contain any DL or FLEXI slot */
1372 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1373 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1374 if(slotCfg != DL_SLOT)
1376 if(slotCfg == FLEXI_SLOT)
1378 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1379 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1380 dlSymbolPresent = false;
1381 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1383 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1384 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1386 dlSymbolPresent = true;
1391 /* Store all the values if all condition satisfies. */
1392 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1394 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1395 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1396 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1407 /*******************************************************************************************
1409 * @brief Allocate the PRB using RRM policy
1413 * Function : prbAllocUsingRRMPolicy
1416 * [Step1]: Traverse each Node in the LC list
1417 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1418 * [Step3]: Calcualte the maxPRB for this LC.
1419 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1421 * b. For Default, just SharedPRB count
1422 * [Step4]: If the LC is the First one to be allocated for this UE then add
1423 * TX_PAYLODN_LEN to reqBO
1424 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1425 * based on reqBO and maxPRB left.
1426 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1427 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1428 * [Step8]: Continue the next loop from List->head
1431 * [Exit1]: If all the LCs are allocated in list
1432 * [Exit2]: If PRBs are exhausted
1434 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1435 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1436 * I/P > mcsIdx and PDSCH symbols count
1437 * I/P & O/P > Shared PRB , reserved PRB Count
1438 * I/P & O/P > Total TBS size accumulated
1439 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1440 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1444 * *******************************************************************************************/
1445 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1446 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1448 CmLList *node = NULLP;
1449 LcInfo *lcNode = NULLP;
1450 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1454 DU_LOG("\nERROR --> SCH: LcList not present");
1459 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1460 * For Other LcList, remReservedPRB = 0*/
1461 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1463 remReservedPRB = *reservedPRB;
1470 /*For Debugging purpose*/
1473 lcNode = (LcInfo *)node->node;
1475 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1476 * process of LCID which was fully allocated. Check is just for safety purpose*/
1477 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1479 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1481 deleteNodeFromLList(lcLL, node);
1482 SCH_FREE(lcNode, sizeof(LcInfo));
1487 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1488 if(lcNode->allocBO != 0)
1490 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1494 /*[Exit2]: If PRBs are exhausted*/
1497 /*Loop Exit: All resources exhausted*/
1498 if(remReservedPRB == 0 && *sharedPRB == 0)
1500 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1506 /*Loop Exit: All resources exhausted*/
1509 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1515 maxPRB = remReservedPRB + *sharedPRB;
1518 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1520 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1522 *isTxPayloadLenAdded = TRUE;
1523 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1524 mcsIdx, numSymbols, maxPRB, &estPrb);
1525 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1527 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1529 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1532 lcNode->reqBO += UL_GRANT_SIZE;
1533 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1538 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1539 mcsIdx, numSymbols, maxPRB, &estPrb);
1542 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1543 * estimated PRB allocated*/
1544 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1546 remReservedPRB = remReservedPRB - estPrb;
1548 else /*LC requirement need PRB share from SharedPRB*/
1550 if(*sharedPRB <= (estPrb - remReservedPRB))
1552 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1557 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1563 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1564 lcNode->allocPRB = estPrb;
1565 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1567 /*[Step8]:Next loop: First LC to be picked from the list
1568 * because Allocated Nodes are moved to the last*/
1575 /*******************************************************************************************
1577 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1582 * Function : updateGrantSizeForBoRpt
1585 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1586 * BO Report in dlMsgAlloc Pointer
1588 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1589 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1590 * I/P & O/P > BsrInfo (applicable for UL)
1591 * I/P & O/P > accumalatedBOSize
1594 * *******************************************************************************************/
1595 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1596 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1598 CmLList *node = NULLP, *next = NULLP;
1599 LcInfo *lcNode = NULLP;
1600 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1604 DU_LOG("\nERROR --> SCH: LcList not present");
1622 lcNode = (LcInfo *)node->node;
1625 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1626 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1627 if(dlMsgAlloc != NULLP)
1629 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1631 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1632 * report for allocation can be sent to MAC*/
1633 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1634 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1636 /*Calculate the Total Payload/BO size allocated*/
1637 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1639 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1640 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1642 dlMsgSchInfo->numLc++;
1643 /* The LC has been fully allocated, clean it */
1644 if(lcNode->reqBO == 0)
1646 handleLcLList(lcLL, lcNode->lcId, DELETE);
1649 else if(bsrInfo != NULLP)
1651 *accumalatedBOSize += lcNode->allocBO;
1652 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1653 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1661 /*******************************************************************
1663 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1667 * Function : fillDlMsgInfo
1670 * fill DL message information for MSG4 and Dedicated DL Msg
1672 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1673 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1676 *******************************************************************/
1677 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1679 hqP->tbInfo[0].isEnabled = TRUE;
1680 hqP->tbInfo[0].state = HQ_TB_WAITING;
1681 hqP->tbInfo[0].txCntr++;
1682 hqP->tbInfo[1].isEnabled = TRUE;
1683 hqP->tbInfo[1].state = HQ_TB_WAITING;
1684 hqP->tbInfo[1].txCntr++;
1685 dlMsgInfo->crnti = crnti;
1686 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1687 dlMsgInfo->harqProcNum = hqP->procId;
1688 dlMsgInfo->dlAssignIdx = 0;
1689 dlMsgInfo->pucchTpc = 0;
1690 dlMsgInfo->pucchResInd = 0;
1691 dlMsgInfo->harqFeedbackInd = hqP->k1;
1692 dlMsgInfo->dciFormatId = 1;
1695 /*******************************************************************
1697 * @brief sch Process pending Msg4 Req
1701 * Function : schProcessMsg4Req
1704 * sch Process pending Msg4 Req
1706 * @params[in] SchCellCb *cell, cell cb struct pointer
1707 * @params[in] SlotTimingInfo currTime, current timing info
1708 * @params[in] uint8_t ueId, ue ID
1709 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1710 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1711 * @return ROK - success
1714 *******************************************************************/
1716 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1718 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1719 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1720 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1721 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1725 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1729 if (isRetxMsg4 == FALSE)
1731 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1733 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1738 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1739 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1741 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1745 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1747 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1748 if(dciSlotAlloc == NULLP)
1750 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1753 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1754 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1755 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1758 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1760 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1761 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1763 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1764 if(dciSlotAlloc->numSchedInfo == 0)
1766 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1767 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1770 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1774 /* Check if both DCI and RAR are sent in the same slot.
1775 * If not, allocate memory RAR PDSCH slot to store RAR info
1777 if(pdcchTime.slot == pdschTime.slot)
1779 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1780 dciSlotAlloc->numSchedInfo++;
1784 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1785 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1787 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1788 if(msg4SlotAlloc == NULLP)
1790 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1791 if(dciSlotAlloc->numSchedInfo == 0)
1793 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1794 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1797 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1800 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1801 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1802 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1805 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1807 /* Copy all RAR info */
1808 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1809 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1810 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1811 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1813 /* Assign correct PDU types in corresponding slots */
1814 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1815 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1816 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1818 dciSlotAlloc->numSchedInfo++;
1819 msg4SlotAlloc->numSchedInfo++;
1822 /* PUCCH resource */
1823 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1825 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1826 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1827 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1828 cell->raCb[ueId-1].msg4recvd = FALSE;
1831 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1836 /*******************************************************************
1838 * @brief sch Process pending Sr or Bsr Req
1842 * Function : updateBsrAndLcList
1845 * Updating the BSRInfo in UECB and Lclist
1847 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1848 * @return ROK - success
1851 *******************************************************************/
1852 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
1854 CmLList *node = NULLP, *next = NULLP;
1855 LcInfo *lcNode = NULLP;
1859 DU_LOG("\nERROR --> SCH: LcList not present");
1876 lcNode = (LcInfo *)node->node;
1879 /*Only when Status is OK then allocation is marked as ZERO and reqBO
1880 * is updated in UE's DB. If Failure, then allocation is added to reqBO
1881 * and same is updated in Ue's DB inside BSR Info structure*/
1884 lcNode->allocBO = 0;
1887 lcNode->reqBO += lcNode->allocBO;
1888 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
1889 if(lcNode->reqBO == 0)
1891 handleLcLList(lcLL, lcNode->lcId, DELETE);
1898 /*******************************************************************
1900 * @brief sch Process pending Sr or Bsr Req
1904 * Function : schProcessSrOrBsrReq
1907 * sch Process pending Sr or Bsr Req
1909 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1910 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1911 * @return true - success
1914 *******************************************************************/
1915 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
1917 bool k2Found = FALSE;
1918 uint8_t startSymb = 0, symbLen = 0;
1919 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1921 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1922 SlotTimingInfo dciTime, puschTime;
1926 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
1930 ueCb = &cell->ueCb[ueId-1];
1934 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
1938 if (isRetx == FALSE)
1940 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
1946 /* Calculating time frame to send DCI for SR */
1947 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
1949 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1952 if(ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
1953 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2InfoTbl;
1955 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
1957 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
1959 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
1961 if(!ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
1963 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
1964 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
1965 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
1969 k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
1970 startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
1971 symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
1973 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
1974 /* Calculating time frame to send PUSCH for SR */
1975 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
1977 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1980 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
1987 ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
1995 if(cell->api->SchScheduleUlLc(dciTime, puschTime, startSymb, symbLen, isRetx, hqP) != ROK)
2000 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2006 /********************************************************************************
2008 * @brief Increment the Slot by a input factor
2012 * Function : schIncrSlot
2015 * Increment the slot by a input factor till num of Slots configured in a
2016 * Radio Frame. If it exceeds, move to next sfn.
2018 * @params[in/out] SlotTimingInfo timingInfo
2019 * [in] uint8_t incr [Increment factor]
2020 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2022 * @return ROK - success
2025 *******************************************************************/
2026 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2028 timingInfo->slot += incr;
2029 if(timingInfo->slot >= numSlotsPerRF)
2031 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2032 timingInfo->slot %= numSlotsPerRF;
2033 if(timingInfo->sfn > MAX_SFN)
2035 timingInfo->sfn %= MAX_SFN;
2040 /*******************************************************************
2042 * @brief Fill PDSCH info in Page Alloc
2046 * Function : schFillPagePdschCfg
2048 * Functionality: Fill PDSCH info in Page Alloc
2050 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2051 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2053 * @return pointer to return Value(ROK, RFAILED)
2055 * ****************************************************************/
2056 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2058 uint8_t cwCount = 0;
2059 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2061 /* fill the PDSCH PDU */
2063 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2064 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2065 pagePdschCfg->pduIndex = 0;
2066 pagePdschCfg->numCodewords = 1;
2067 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2069 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2070 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2071 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2072 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2073 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2074 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2075 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2077 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2078 pagePdschCfg->numLayers = 1;
2079 pagePdschCfg->transmissionScheme = 0;
2080 pagePdschCfg->refPoint = 0;
2081 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2082 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2083 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2084 pagePdschCfg->dmrs.scid = 0;
2085 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2086 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2087 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2088 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2089 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2091 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2092 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2093 pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
2094 pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2095 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2096 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2097 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2098 pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2099 pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2101 /* Find total symbols occupied including DMRS */
2102 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2103 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2104 * in that case only PDSCH symbols are marked as occupied */
2105 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2107 startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
2108 numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2110 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2113 startSymbol = dmrsStartSymbol;
2114 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2117 /* Allocate the number of PRBs required for DL PDSCH */
2118 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2119 &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
2121 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2125 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2126 pagePdschCfg->beamPdschInfo.prgSize = 1;
2127 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2128 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2129 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2130 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2131 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2136 /**********************************************************************
2138 **********************************************************************/