1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
328 uint16_t numSlots = cell->numSlots;
329 bool isAllocated = false;
330 uint16_t pucchStartPrb;
332 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
334 //Assuming one entry in the list
335 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
337 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
339 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
340 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
342 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
343 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
344 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
346 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
347 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
351 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
352 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
365 if(pucchDedCfg->format1)
367 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
368 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
378 /* setting SR and UCI flag */
379 if(pucchDedCfg->schedReq)
381 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
383 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
384 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
387 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
389 ulSchedPucch->srFlag = true;
390 ulSchedPucch->uciFlag = true;
392 ulSchedPucch->harqFlag = true;//check how to enable?
398 * @brief Function to fill Pucch Resource Info
402 * Function : fillPucchResourceInfo
404 * Function to fill Pucch Resource Info
406 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
407 * @return ROK/RFAILED
410 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
412 uint8_t ret = ROK, ueId = 0, ueIdx = 0, pucchIdx = 0;
413 SchCellCb *cell = schCb[inst].cells[inst];
414 SchPucchCfgCmn *pucchCfg = NULLP;
415 SchBwpParams *ulBwp = NULLP;
418 GET_UE_ID(schPucchInfo->rnti, ueId);
420 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
422 /* fill pucch dedicated cfg */
423 ret = fillUlSchedPucchDedicatedCfg(cell,\
424 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
427 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
428 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
434 /* fill pucch common cfg */
435 /* derive pucchResourceSet from schCellCfg */
436 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
437 pucchIdx = pucchCfg->pucchResourceCommon;
438 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
439 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
440 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
441 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
444 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
445 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
446 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
447 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
448 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
450 /* set SR and UCI flag to false */
451 schPucchInfo->srFlag = true;
452 schPucchInfo->uciFlag = true;
459 * @brief resource allocation for UL
463 * Function : schUlResAlloc
465 * This function handles UL Resource allocation
467 * @param[in] SchCellCb *cell, cellCb
470 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
474 UlSchedInfo ulSchedInfo;
475 SchUlSlotInfo *schUlSlotInfo = NULLP;
476 SlotTimingInfo ulTimingInfo;
477 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
480 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA);
482 ulSchedInfo.cellId = cell->cellId;
483 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
484 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
485 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
487 /* Schedule resources for PRACH */
488 if(cell->firstSib1Transmitted)
489 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
491 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
492 if(schUlSlotInfo->schPuschInfo)
494 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
495 /* Check the ue drx status if the UE is active for uplink scheduling or not */
497 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
498 if(ueCb->ueDrxInfoPres)
500 if(ueCb->drxUeCb.drxUlUeActiveStatus)
504 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
505 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
506 sizeof(SchPuschInfo));
507 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
508 schUlSlotInfo->schPuschInfo = NULL;
511 if(schUlSlotInfo->pucchPres)
513 ret = fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
516 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
517 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
518 sizeof(SchPucchInfo));
520 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
524 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
527 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
530 schInitUlSlot(schUlSlotInfo);
534 /*******************************************************************
536 * @brief Fills pdcch and pdsch info for msg4
540 * Function : schDlRsrcAllocMsg4
543 * Fills pdcch and pdsch info for msg4
545 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
546 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
547 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
548 * @params[in] bool isRetx, SchDlHqProcCb *hqP
549 * @return ROK - success
552 * ****************************************************************/
553 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
554 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
556 uint8_t coreset0Idx = 0;
557 uint8_t firstSymbol = 0;
558 uint8_t numSymbols = 0;
559 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
560 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
563 SchBwpDlCfg *initialBwp = NULLP;
564 PdcchCfg *pdcch = NULLP;
565 PdschCfg *pdsch = NULLP;
567 DlMsgSchInfo *msg4Alloc = NULLP;
571 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
575 if(dlMsgAlloc == NULL)
577 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
581 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
582 initialBwp = &cell->cellCfg.schInitialDlBwp;
583 pdcch = &msg4Alloc->dlMsgPdcchCfg;
584 pdsch = &msg4Alloc->dlMsgPdschCfg;
585 bwp = &msg4Alloc->bwp;
586 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
588 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
589 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
591 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
592 numRbs = coresetIdxTable[coreset0Idx][1];
593 numSymbols = coresetIdxTable[coreset0Idx][2];
595 /* calculate time domain parameters */
596 uint16_t mask = 0x2000;
597 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
599 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
606 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
607 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
608 bwp->subcarrierSpacing = initialBwp->bwp.scs;
609 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
611 /* fill the PDCCH PDU */
612 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
613 pdcch->coresetCfg.durationSymbols = numSymbols;
614 memcpy(pdcch->coresetCfg.freqDomainResource, \
615 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
617 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
618 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
619 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
620 pdcch->coresetCfg.coreSetType = 0;
621 pdcch->coresetCfg.coreSetSize = numRbs;
622 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
623 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
625 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
626 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
627 pdcch->dci.scramblingRnti = 0;
628 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
629 pdcch->dci.aggregLevel = 4;
630 pdcch->dci.beamPdcchInfo.numPrgs = 1;
631 pdcch->dci.beamPdcchInfo.prgSize = 1;
632 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
633 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
634 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
635 pdcch->dci.txPdcchPower.powerValue = 0;
636 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
637 pdcch->dci.pdschCfg = pdsch;
639 /* fill the PDSCH PDU */
641 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
642 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
644 pdsch->numCodewords = 1;
645 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
647 pdsch->codeword[cwCount].targetCodeRate = 308;
648 pdsch->codeword[cwCount].qamModOrder = 2;
649 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
650 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
653 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
654 hqP->tbInfo[cwCount].tbSzReq = tbSize;
655 pdsch->codeword[cwCount].rvIndex = 0;
659 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
660 tbSize = hqP->tbInfo[cwCount].tbSzReq;
662 pdsch->codeword[cwCount].tbSize = tbSize;
664 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
665 pdsch->numLayers = 1;
666 pdsch->transmissionScheme = 0;
668 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
669 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
670 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
671 pdsch->dmrs.scid = 0;
672 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
673 pdsch->dmrs.dmrsPorts = 0;
674 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
675 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
676 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
678 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
679 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
681 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
682 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
683 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
684 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
686 /* Find total symbols occupied including DMRS */
687 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
688 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
689 * in that case only PDSCH symbols are marked as occupied */
690 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
692 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
693 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
695 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
698 startSymbol = dmrsStartSymbol;
699 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
702 /* Allocate the number of PRBs required for RAR PDSCH */
703 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
704 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
706 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
710 pdsch->beamPdschInfo.numPrgs = 1;
711 pdsch->beamPdschInfo.prgSize = 1;
712 pdsch->beamPdschInfo.digBfInterfaces = 0;
713 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
714 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
715 pdsch->txPdschPower.powerControlOffset = 0;
716 pdsch->txPdschPower.powerControlOffsetSS = 0;
718 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
722 /*******************************************************************
724 * @brief Scheduling for Pucch Resource
728 * Function : schAllocPucchResource
731 * Scheduling for Pucch Resource
733 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
734 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
735 * @return ROK - success
738 *******************************************************************/
740 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
741 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
743 uint16_t pucchSlot = 0;
744 SchUlSlotInfo *schUlSlotInfo = NULLP;
746 pucchSlot = pucchTime.slot;
747 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
748 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
750 schUlSlotInfo->pucchPres = true;
751 schUlSlotInfo->schPucchInfo.rnti = crnti;
754 /* set HARQ flag to true */
755 schUlSlotInfo->schPucchInfo.harqFlag = true;
756 schUlSlotInfo->schPucchInfo.numHarqBits = 1; /* 1 bit for HARQ */
757 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3); /* SLOT_DELAY=3 */
758 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
763 /*******************************************************************
765 * @brief Fills pdcch and pdsch info for dedicated DL msg
769 * Function : schDlRsrcAllocDlMsg
772 * Fills pdcch and pdsch info for dl msg
774 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
775 * @params[in] uint16_t crnti, uint32_t tbSize
776 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
777 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
778 * @params[in] bool isRetx, SchDlHqProcCb *hqP
779 * @return ROK - success
782 * ****************************************************************/
783 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
784 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
785 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
788 PdcchCfg *pdcch = NULLP;
789 PdschCfg *pdsch = NULLP;
792 SchControlRsrcSet coreset1;
793 SchPdschConfig pdschCfg;
794 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
796 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
797 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
798 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
800 GET_UE_ID(crnti, ueId);
801 ueCb = cell->ueCb[ueId-1];
802 coreset1 = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
803 pdschCfg = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdschCfg;
806 bwp->freqAlloc.numPrb = MAX_NUM_RB;
807 bwp->freqAlloc.startPrb = 0;
808 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
809 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
811 /* fill the PDCCH PDU */
812 //Considering coreset1 also starts from same symbol as coreset0
813 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
814 pdcch->coresetCfg.durationSymbols = coreset1.duration;
815 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
816 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
817 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
818 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
819 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
820 //Considering number of RBs in coreset1 is same as coreset0
821 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
822 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
823 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
825 pdcch->dci.rnti = ueCb.crnti;
826 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
827 pdcch->dci.scramblingRnti = 0;
828 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
829 pdcch->dci.aggregLevel = 4;
830 pdcch->dci.beamPdcchInfo.numPrgs = 1;
831 pdcch->dci.beamPdcchInfo.prgSize = 1;
832 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
833 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
834 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
835 pdcch->dci.txPdcchPower.powerValue = 0;
836 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
838 /* fill the PDSCH PDU */
840 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
841 pdsch->rnti = ueCb.crnti;
843 pdsch->numCodewords = 1;
844 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
846 pdsch->codeword[cwCount].targetCodeRate = 308;
847 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
848 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
849 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
850 pdsch->codeword[cwCount].rvIndex = 0;
854 tbSize +=TX_PAYLOAD_HDR_LEN;
855 hqP->tbInfo[cwCount].tbSzReq = tbSize;
857 pdsch->codeword[cwCount].tbSize = tbSize;
859 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
860 pdsch->numLayers = 1;
861 pdsch->transmissionScheme = 0;
863 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
864 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
865 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
866 pdsch->dmrs.scid = 0;
867 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
868 pdsch->dmrs.dmrsPorts = 0;
869 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
870 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
871 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
873 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
874 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
876 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
877 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
878 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
879 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
881 /* Find total symbols occupied including DMRS */
882 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
883 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
884 * in that case only PDSCH symbols are marked as occupied */
885 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
887 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
888 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
890 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
893 startSymbol = dmrsStartSymbol;
894 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
897 /* Allocate the number of PRBs required for DL PDSCH */
898 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
899 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
901 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
905 pdsch->beamPdschInfo.numPrgs = 1;
906 pdsch->beamPdschInfo.prgSize = 1;
907 pdsch->beamPdschInfo.digBfInterfaces = 0;
908 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
909 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
910 pdsch->txPdschPower.powerControlOffset = 0;
911 pdsch->txPdschPower.powerControlOffsetSS = 0;
913 pdcch->dci.pdschCfg = pdsch;
917 /*******************************************************************
919 * @brief Fills k0 and k1 information table for FDD
923 * Function : BuildK0K1TableForFdd
926 * Fills k0 and k1 information table for FDD
928 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
929 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
930 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
931 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
932 * @return ROK - success
935 * ****************************************************************/
936 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
937 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
940 uint8_t k1TmpVal =0, cfgIdx=0;
941 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
943 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
944 * required but this will require for harq processing */
945 // uint8_t k0TmpVal = 0;
946 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
947 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
949 /* Initialization the structure and storing the total slot values. */
950 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
951 k0K1InfoTbl->tblSize = cell->numSlots;
953 /* Storing time domain resource allocation list based on common or dedicated configuration. */
954 if(pdschCfgCmnPres == true)
956 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
957 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
959 /*TODO uncomment this line during harq processing */
960 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
965 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
966 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
968 /*TODO uncomment this line during harq processing */
969 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
973 /* Checking all the slots for K0 and K1 values. */
974 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
977 /* Storing the values of k0 based on time domain resource
978 * allocation list. If the value is unavailable then fill default values,
979 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
980 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
982 /* TODO These if 0 we will remove during harq processing */
984 if(pdschCfgCmnPres == true)
986 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
990 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
992 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
996 k0TmpVal = DEFAULT_K0_VALUE;
1000 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1001 * then skip else continue storing the values. */
1003 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1005 k1TmpVal = UlAckTbl[k1Index];
1006 if(k1TmpVal <= MIN_NUM_K1_IDX)
1011 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1012 /* TODO Store K1 index where harq feedback will be received in harq table. */
1016 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1017 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1023 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1028 /*******************************************************************
1030 * @brief Fills k0 and k1 information table
1034 * Function : BuildK0K1Table
1037 * Fills K0 and k1 information table
1039 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1040 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1041 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1042 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1043 * @return ROK - success
1046 * ****************************************************************/
1047 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1048 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1053 bool ulSlotPresent = false;
1054 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1055 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1056 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1057 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1060 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1062 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1068 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1069 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1070 k0K1InfoTbl->tblSize = cell->numSlots;
1071 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1073 /* Storing time domain resource allocation list based on common or
1074 * dedicated configuration availability. */
1075 if(pdschCfgCmnPres == true)
1077 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1078 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1080 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1085 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1086 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1088 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1092 /* Checking all possible indexes for K0 and K1 values. */
1093 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1095 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1096 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1097 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1102 /* Storing K0 , start symbol and length symbol for further processing.
1103 * If K0 value is not available then we can fill the default values
1104 * given in spec 38.331. */
1106 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1108 if(pdschCfgCmnPres == true)
1110 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1111 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1112 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1116 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1118 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1122 k0TmpVal = DEFAULT_K0_VALUE;
1124 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1125 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1128 /* If current slot + k0 is UL then skip the slot
1129 * else if it is DL slot then continue the next steps
1130 * else if it is a FLEXI slot then check symbols of slot, It should not
1131 * contain any UL slot. */
1132 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1133 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1134 if(slotCfg == UL_SLOT)
1138 if(slotCfg == FLEXI_SLOT)
1140 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1142 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1143 if(slotCfg == UL_SLOT)
1150 /* If current slot + k0 + k1 is a DL slot then skip the slot
1151 * else if it is UL slot then store the information
1152 * else if it is FLEXI slot then check the symbols, it must have
1153 * at least one UL symbol. */
1155 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1157 k1TmpVal = UlAckTbl[k1Index];
1158 if(k1TmpVal > MIN_NUM_K1_IDX)
1160 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1161 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1162 if(slotCfg == DL_SLOT)
1166 if(slotCfg == FLEXI_SLOT)
1168 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1170 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1172 ulSlotPresent = true;
1177 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1179 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1180 /* TODO Store K1 index where harq feedback will be received
1186 /* Store all the values if all condition satisfies. */
1189 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1190 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1196 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1203 /*******************************************************************
1205 * @brief Fills K2 information table for FDD
1209 * Function : BuildK2InfoTableForFdd
1212 * Fills K2 information table for FDD
1214 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1215 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1216 * @return ROK - success
1219 * ****************************************************************/
1220 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1221 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1223 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1225 /* Initialization the structure and storing the total slot values. */
1226 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1227 k2InfoTbl->tblSize = cell->numSlots;
1229 msg3K2InfoTbl->tblSize = cell->numSlots;
1231 /* Checking all possible indexes for K2. */
1232 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1234 /* Storing K2 values. */
1235 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1237 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1238 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1239 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1241 /* Updating K2 values for MSG3 */
1244 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1245 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1246 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1252 /*******************************************************************
1254 * @brief Fills K2 information table
1258 * Function : BuildK2InfoTable
1261 * Fills K2 information table
1263 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1264 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1265 * @return ROK - success
1268 * ****************************************************************/
1269 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1270 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1274 bool dlSymbolPresent = false;
1275 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1276 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1277 SlotConfig currentSlot;
1280 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1282 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1288 /* Initialization the structure and storing the total slot values. */
1289 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1290 k2InfoTbl->tblSize = cell->numSlots;
1292 msg3K2InfoTbl->tblSize = cell->numSlots;
1293 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1295 /* Checking all possible indexes for K2. */
1296 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1298 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1300 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1301 if(currentSlot != UL_SLOT)
1303 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1305 /* Storing k2, startSymbol, endSymbol information for further processing.
1306 * If k2 is absent then fill the default values given in spec 38.331
1307 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1308 k2Val = timeDomRsrcAllocList[k2Index].k2;
1311 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1314 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1317 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1320 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1323 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1328 /* Current slot + k2 should be either UL or FLEXI slot.
1329 * If slot is FLEXI then check all the symbols of that slot,
1330 * it should not contain any DL or FLEXI slot */
1331 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1332 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1333 if(slotCfg != DL_SLOT)
1335 if(slotCfg == FLEXI_SLOT)
1337 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1338 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1339 dlSymbolPresent = false;
1340 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1342 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1343 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1345 dlSymbolPresent = true;
1350 /* Store all the values if all condition satisfies. */
1351 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1353 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1354 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1355 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1361 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1363 /* Check for K2 for MSG3 */
1364 /* Current slot + k2 should be either UL or FLEXI slot.
1365 * If slot is FLEXI then check all the symbols of that slot,
1366 * it should not contain any DL or FLEXI slot */
1367 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1368 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1369 if(slotCfg != DL_SLOT)
1371 if(slotCfg == FLEXI_SLOT)
1373 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1374 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1375 dlSymbolPresent = false;
1376 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1378 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1379 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1381 dlSymbolPresent = true;
1386 /* Store all the values if all condition satisfies. */
1387 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1389 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1390 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1391 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1402 /*******************************************************************************************
1404 * @brief Allocate the PRB using RRM policy
1408 * Function : prbAllocUsingRRMPolicy
1411 * [Step1]: Traverse each Node in the LC list
1412 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1413 * [Step3]: Calcualte the maxPRB for this LC.
1414 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1416 * b. For Default, just SharedPRB count
1417 * [Step4]: If the LC is the First one to be allocated for this UE then add
1418 * TX_PAYLODN_LEN to reqBO
1419 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1420 * based on reqBO and maxPRB left.
1421 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1422 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1423 * [Step8]: Continue the next loop from List->head
1426 * [Exit1]: If all the LCs are allocated in list
1427 * [Exit2]: If PRBs are exhausted
1429 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1430 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1431 * I/P > mcsIdx and PDSCH symbols count
1432 * I/P & O/P > Shared PRB , reserved PRB Count
1433 * I/P & O/P > Total TBS size accumulated
1434 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1435 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1439 * *******************************************************************************************/
1440 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1441 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1443 CmLList *node = NULLP;
1444 LcInfo *lcNode = NULLP;
1445 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1449 DU_LOG("\nERROR --> SCH: LcList not present");
1454 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1455 * For Other LcList, remReservedPRB = 0*/
1456 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1458 remReservedPRB = *reservedPRB;
1465 /*For Debugging purpose*/
1468 lcNode = (LcInfo *)node->node;
1470 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1471 * process of LCID which was fully allocated. Check is just for safety purpose*/
1472 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1474 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1476 deleteNodeFromLList(lcLL, node);
1477 SCH_FREE(lcNode, sizeof(LcInfo));
1482 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1483 if(lcNode->allocBO != 0)
1485 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1489 /*[Exit2]: If PRBs are exhausted*/
1492 /*Loop Exit: All resources exhausted*/
1493 if(remReservedPRB == 0 && *sharedPRB == 0)
1495 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1501 /*Loop Exit: All resources exhausted*/
1504 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1510 maxPRB = remReservedPRB + *sharedPRB;
1513 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1515 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1517 *isTxPayloadLenAdded = TRUE;
1518 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1519 mcsIdx, numSymbols, maxPRB, &estPrb);
1520 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1522 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1524 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1527 lcNode->reqBO += UL_GRANT_SIZE;
1528 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1533 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1534 mcsIdx, numSymbols, maxPRB, &estPrb);
1537 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1538 * estimated PRB allocated*/
1539 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1541 remReservedPRB = remReservedPRB - estPrb;
1543 else /*LC requirement need PRB share from SharedPRB*/
1545 if(*sharedPRB <= (estPrb - remReservedPRB))
1547 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1552 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1558 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1559 lcNode->allocPRB = estPrb;
1560 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1562 /*[Step8]:Next loop: First LC to be picked from the list
1563 * because Allocated Nodes are moved to the last*/
1570 /*******************************************************************************************
1572 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1577 * Function : updateGrantSizeForBoRpt
1580 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1581 * BO Report in dlMsgAlloc Pointer
1583 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1584 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1585 * I/P & O/P > BsrInfo (applicable for UL)
1586 * I/P & O/P > accumalatedBOSize
1589 * *******************************************************************************************/
1590 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1591 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1593 CmLList *node = NULLP, *next = NULLP;
1594 LcInfo *lcNode = NULLP;
1595 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1599 DU_LOG("\nERROR --> SCH: LcList not present");
1617 lcNode = (LcInfo *)node->node;
1620 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1621 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1622 if(dlMsgAlloc != NULLP)
1624 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1626 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1627 * report for allocation can be sent to MAC*/
1628 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1629 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1631 /*Calculate the Total Payload/BO size allocated*/
1632 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1634 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1635 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1637 dlMsgSchInfo->numLc++;
1638 /*The LC has been fully allocated, clean it*/
1639 if(lcNode->reqBO == 0)
1641 handleLcLList(lcLL, lcNode->lcId, DELETE);
1644 else if(bsrInfo != NULLP)
1646 *accumalatedBOSize += lcNode->allocBO;
1647 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1648 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1656 /*******************************************************************
1658 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1662 * Function : fillDlMsgInfo
1665 * fill DL message information for MSG4 and Dedicated DL Msg
1667 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1668 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1671 *******************************************************************/
1672 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1674 hqP->tbInfo[0].isEnabled = TRUE;
1675 hqP->tbInfo[0].state = HQ_TB_WAITING;
1676 hqP->tbInfo[0].txCntr++;
1677 hqP->tbInfo[1].isEnabled = TRUE;
1678 hqP->tbInfo[1].state = HQ_TB_WAITING;
1679 hqP->tbInfo[1].txCntr++;
1680 dlMsgInfo->crnti = crnti;
1681 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1682 dlMsgInfo->harqProcNum = hqP->procId;
1683 dlMsgInfo->dlAssignIdx = 0;
1684 dlMsgInfo->pucchTpc = 0;
1685 dlMsgInfo->pucchResInd = 0;
1686 dlMsgInfo->harqFeedbackInd = hqP->k1;
1687 dlMsgInfo->dciFormatId = 1;
1690 /*******************************************************************
1692 * @brief sch Process pending Msg4 Req
1696 * Function : schProcessMsg4Req
1699 * sch Process pending Msg4 Req
1701 * @params[in] SchCellCb *cell, cell cb struct pointer
1702 * @params[in] SlotTimingInfo currTime, current timing info
1703 * @params[in] uint8_t ueId, ue ID
1704 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1705 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1706 * @return ROK - success
1709 *******************************************************************/
1711 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1713 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1714 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1715 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1716 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1720 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1724 if (isRetxMsg4 == FALSE)
1726 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1728 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1733 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1734 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1736 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1740 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1742 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1743 if(dciSlotAlloc == NULLP)
1745 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1748 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1749 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1750 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1753 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1755 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1756 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1758 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1759 if(dciSlotAlloc->numSchedInfo == 0)
1761 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1762 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1765 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1769 /* Check if both DCI and RAR are sent in the same slot.
1770 * If not, allocate memory RAR PDSCH slot to store RAR info
1772 if(pdcchTime.slot == pdschTime.slot)
1774 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1775 dciSlotAlloc->numSchedInfo++;
1779 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1780 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1782 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1783 if(msg4SlotAlloc == NULLP)
1785 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1786 if(dciSlotAlloc->numSchedInfo == 0)
1788 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1789 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1792 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1795 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1796 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1797 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1800 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1802 /* Copy all RAR info */
1803 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1804 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1805 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1806 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1808 /* Assign correct PDU types in corresponding slots */
1809 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1810 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1811 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1813 dciSlotAlloc->numSchedInfo++;
1814 msg4SlotAlloc->numSchedInfo++;
1817 /* PUCCH resource */
1818 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1820 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1821 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1822 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1823 cell->raCb[ueId-1].msg4recvd = FALSE;
1826 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1831 /*******************************************************************
1833 * @brief Handler to calculate TBS size for BSR requested
1837 * Function : schCalculateUlTbs
1839 * Functionality: Function will note the required TBS for each LCGIDX and use
1840 * the Priority LCG List and RRM policy to allocate the TBS size
1842 * @params [in] ueCb (Pointer to UE CB)
1843 * [in] puschTime (Time slot where PUSCH will be sent)
1844 * [in] symbLen (No of Symbols used for PUSCH transmission)
1845 * [out] startPrb(Pointer to startPRB which will be calculated while
1846 * finding the best Free Block)
1847 * [out] totTBS(Pointer to total TBS size)
1848 * [in] isRetx (to indicate retransmission)
1849 * [in] hqP (UL Harq process pointer)
1851 * @return uint8_t : ROK > Scheduling of UL grant is successful
1852 * RFAILED > vice versa
1854 * ****************************************************************/
1855 uint8_t schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
1856 uint16_t *startPrb, uint32_t *totTBS, bool isRetx, SchUlHqProcCb *hqP)
1858 uint16_t mcsIdx = 0;
1859 CmLListCp *lcLL = NULLP;
1860 uint16_t lcgIdx = 0, lcId =0, maxFreePRB = 0;
1861 uint16_t rsvdDedicatedPRB;
1866 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1868 if(ueCb->bsrInfo[lcgIdx].dataVol == 0)
1873 /*TODO: lcgIdx and LCID has been implemented as one to one mapping.
1874 * Need to check the mapping to figure out the LCID and lcgIdx once L2
1875 * spec specifies any logic*/
1877 if(ueCb->ulInfo.ulLcCtxt[lcId].isDedicated)
1879 lcLL = &(hqP->ulLcPrbEst.dedLcList);
1880 rsvdDedicatedPRB = ueCb->ulInfo.ulLcCtxt[lcId].rsvdDedicatedPRB;
1884 lcLL = &(hqP->ulLcPrbEst.defLcList);
1887 /*[Step2]: Update the reqPRB and Payloadsize for this LC in the appropriate List*/
1888 if(updateLcListReqPRB(lcLL, lcId, ueCb->bsrInfo[lcgIdx].dataVol) != ROK)
1890 DU_LOG("\nERROR --> SCH: LcgId:%d updation failed",lcId);
1895 if ((hqP->ulLcPrbEst.defLcList.count == 0) && (hqP->ulLcPrbEst.dedLcList.count == 0))
1897 if( (ueCb->srRcvd) || (isRetx) )
1899 *startPrb = MAX_NUM_RB;
1900 *totTBS = schCalcTbSize(UL_GRANT_SIZE);
1902 /*Returning true when NO Grant is there for UE as this is not scheduling
1907 maxFreePRB = searchLargestFreeBlock(ueCb->cellCb, puschTime, startPrb, DIR_UL);
1909 /*[Step4]: Estimation of PRB and BO which can be allocated to each LC in
1910 * the list based on RRM policy*/
1912 /*Either this UE contains no reservedPRB pool fir dedicated S-NSSAI or
1913 * Num of Free PRB available is not enough to reserve Dedicated PRBs*/
1916 mcsIdx = ueCb->ueCfg.ulModInfo.mcsIndex;
1917 if((hqP->ulLcPrbEst.dedLcList.count == 0) || ((maxFreePRB < rsvdDedicatedPRB)))
1919 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB;
1920 DU_LOG("\nDEBUG --> SCH : UL Only Default Slice is scheduled, sharedPRB Count:%d",\
1921 hqP->ulLcPrbEst.sharedNumPrb);
1923 /*PRB Alloc for Default LCs*/
1924 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen,\
1925 &(hqP->ulLcPrbEst.sharedNumPrb), NULLP, NULLP,&(ueCb->srRcvd));
1929 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB - rsvdDedicatedPRB;
1931 /*PRB Alloc for Dedicated LCs*/
1932 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.dedLcList), TRUE, mcsIdx, symbLen,\
1933 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1934 NULLP,&(ueCb->srRcvd));
1936 /*PRB Alloc for Default LCs*/
1937 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen, \
1938 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1939 NULLP,&(ueCb->srRcvd));
1942 /*[Step5]:Traverse each LCID in LcList to calculate the exact Scheduled Bytes
1943 * using allocated BO per LC and Update dlMsgAlloc(BO report for MAC*/
1944 if(hqP->ulLcPrbEst.dedLcList.count != 0)
1945 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.dedLcList), NULLP, ueCb->bsrInfo, totTBS);
1947 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.defLcList), NULLP, ueCb->bsrInfo, totTBS);
1949 /*Below case will hit if NO LC(s) are allocated due to resource crunch*/
1954 DU_LOG("\nERROR --> SCH : NO FREE PRB!!");
1958 /*Schedule the LC for next slot*/
1959 DU_LOG("\nDEBUG --> SCH : No LC has been scheduled");
1966 /*******************************************************************
1968 * @brief sch Process pending Sr or Bsr Req
1972 * Function : schProcessSrOrBsrReq
1975 * sch Process pending Sr or Bsr Req
1977 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1978 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1979 * @return true - success
1982 *******************************************************************/
1983 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
1985 bool k2Found = FALSE;
1986 uint8_t ret = RFAILED;
1987 uint8_t startSymb = 0, symbLen = 0;
1988 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1989 uint16_t startPrb = 0;
1990 uint32_t totDataReq = 0; /* in bytes */
1992 SchPuschInfo *puschInfo;
1993 DciInfo *dciInfo = NULLP;
1994 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1995 SlotTimingInfo dciTime, puschTime;
1999 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
2003 ueCb = &cell->ueCb[ueId-1];
2007 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
2011 if (isRetx == FALSE)
2013 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
2019 /* Calculating time frame to send DCI for SR */
2020 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
2022 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2025 if(ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
2026 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl;
2028 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
2030 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
2032 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
2034 if(!ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
2036 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2037 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
2038 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
2042 k2Val = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
2043 startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
2044 symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
2046 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
2047 /* Calculating time frame to send PUSCH for SR */
2048 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val);
2050 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2053 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
2064 ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq, isRetx, *hqP);
2066 if(totDataReq > 0 && ret == ROK)
2068 SCH_ALLOC(dciInfo, sizeof(DciInfo));
2071 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
2074 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2075 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2077 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2081 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
2082 memset(dciInfo,0,sizeof(DciInfo));
2084 /* Update PUSCH allocation */
2085 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb, isRetx, *hqP) == ROK)
2087 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
2089 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
2090 if(puschInfo != NULLP)
2092 /* Fill DCI for UL grant */
2093 schFillUlDci(ueCb, puschInfo, dciInfo, isRetx, *hqP);
2094 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
2095 ueCb->srRcvd = false;
2096 ueCb->bsrRcvd = false;
2097 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
2098 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2099 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, ROK);
2100 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, ROK);
2101 cmLListAdd2Tail(&(ueCb->hqUlmap[puschTime.slot]->hqList), &(*hqP)->ulSlotLnk);
2106 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2107 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2108 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2113 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2120 /*******************************************************************
2122 * @brief sch Process pending Sr or Bsr Req
2126 * Function : updateBsrAndLcList
2129 * Updating the BSRInfo in UECB and Lclist
2131 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2132 * @return ROK - success
2135 *******************************************************************/
2136 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
2138 CmLList *node = NULLP, *next = NULLP;
2139 LcInfo *lcNode = NULLP;
2143 DU_LOG("\nERROR --> SCH: LcList not present");
2160 lcNode = (LcInfo *)node->node;
2163 /*Only when Status is OK then allocation is marked as ZERO and reqBO
2164 * is updated in UE's DB. If Failure, then allocation is added to reqBO
2165 * and same is updated in Ue's DB inside BSR Info structure*/
2168 lcNode->allocBO = 0;
2171 lcNode->reqBO += lcNode->allocBO;
2172 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
2173 if(lcNode->reqBO == 0)
2175 handleLcLList(lcLL, lcNode->lcId, DELETE);
2182 /********************************************************************************
2184 * @brief Increment the Slot by a input factor
2188 * Function : schIncrSlot
2191 * Increment the slot by a input factor till num of Slots configured in a
2192 * Radio Frame. If it exceeds, move to next sfn.
2194 * @params[in/out] SlotTimingInfo timingInfo
2195 * [in] uint8_t incr [Increment factor]
2196 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2198 * @return ROK - success
2201 *******************************************************************/
2202 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2204 timingInfo->slot += incr;
2205 if(timingInfo->slot >= numSlotsPerRF)
2207 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2208 timingInfo->slot %= numSlotsPerRF;
2209 if(timingInfo->sfn > MAX_SFN)
2211 timingInfo->sfn %= MAX_SFN;
2216 /*******************************************************************
2218 * @brief Fill PDSCH info in Page Alloc
2222 * Function : schFillPagePdschCfg
2224 * Functionality: Fill PDSCH info in Page Alloc
2226 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2227 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2229 * @return pointer to return Value(ROK, RFAILED)
2231 * ****************************************************************/
2232 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2234 uint8_t cwCount = 0;
2235 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2237 /* fill the PDSCH PDU */
2239 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2240 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2241 pagePdschCfg->pduIndex = 0;
2242 pagePdschCfg->numCodewords = 1;
2243 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2245 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2246 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2247 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2248 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2249 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2250 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2251 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2253 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2254 pagePdschCfg->numLayers = 1;
2255 pagePdschCfg->transmissionScheme = 0;
2256 pagePdschCfg->refPoint = 0;
2257 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2258 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2259 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2260 pagePdschCfg->dmrs.scid = 0;
2261 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2262 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2263 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2264 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2265 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2267 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2268 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2269 pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
2270 pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2271 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2272 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2273 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2274 pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2275 pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2277 /* Find total symbols occupied including DMRS */
2278 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2279 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2280 * in that case only PDSCH symbols are marked as occupied */
2281 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2283 startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
2284 numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2286 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2289 startSymbol = dmrsStartSymbol;
2290 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2293 /* Allocate the number of PRBs required for DL PDSCH */
2294 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2295 &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
2297 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2301 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2302 pagePdschCfg->beamPdschInfo.prgSize = 1;
2303 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2304 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2305 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2306 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2307 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2312 /**********************************************************************
2314 **********************************************************************/