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3 # Copyright (c) [2017-2019] [Radisys] #
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19 /************************************************************************
25 Desc: C source code for scheduler fucntions
29 **********************************************************************/
32 @brief This file implements the schedulers main access to MAC layer code.
34 #include "common_def.h"
35 #include "du_app_mac_inf.h"
40 #include "rg_sch_inf.h"
43 #include "tfu.x" /* TFU types */
44 #include "lrg.x" /* layer management typedefs for MAC */
45 #include "rgr.x" /* layer management typedefs for MAC */
46 #include "rg_sch_inf.x" /* typedefs for Scheduler */
47 #include "mac_sch_interface.h"
49 #include "sch_utils.h"
51 #include "sch_slice_based.h"
54 * @brief Task Initiation function.
58 * Function : schActvInit
60 * This function is supplied as one of parameters during MAC's
61 * task registration. MAC will invoke this function once, after
62 * it creates and attaches this TAPA Task to a system task.
64 * @param[in] Ent Entity, the entity ID of this task.
65 * @param[in] Inst Inst, the instance ID of this task.
66 * @param[in] Region Region, the region ID registered for memory
68 * @param[in] Reason Reason.
72 uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason)
74 Inst inst = (instId - SCH_INST_START);
76 /* Initialize the MAC TskInit structure to zero */
77 memset ((uint8_t *)&schCb[inst], 0, sizeof(schCb));
79 /* Initialize the MAC TskInit with received values */
80 schCb[inst].schInit.ent = entity;
81 schCb[inst].schInit.inst = inst;
82 schCb[inst].schInit.region = region;
83 schCb[inst].schInit.pool = 0;
84 schCb[inst].schInit.reason = reason;
85 schCb[inst].schInit.cfgDone = FALSE;
86 schCb[inst].schInit.acnt = FALSE;
87 schCb[inst].schInit.usta = FALSE;
88 schCb[inst].schInit.trc = FALSE;
89 schCb[inst].schInit.procId = ODU_GET_PROCID();
95 * @brief Scheduler All Apis initialized.
99 * Function : schAllApisInit
101 * This function initializes all Scheduler APIs/functionality for each kind
104 * @param[in] Inst inst, the Scheduler instance
107 void schAllApisInit(Inst inst)
109 schFcfsAllApisInit(&schCb[inst].allApis[SCH_FCFS]);
110 schSliceBasedAllApisInit(&schCb[inst].allApis[SCH_SLICE_BASED]);
114 * @brief Scheduler instance Configuration Handler.
118 * Function : SchInstCfg
120 * This function in called by SchProcGenCfgReq(). It handles the
121 * general configurations of the scheduler instance. Returns
122 * reason for success/failure of this function.
124 * @param[in] RgCfg *cfg, the Configuaration information
126 * -# LCM_REASON_NOT_APPL
127 * -# LCM_REASON_INVALID_MSGTYPE
128 * -# LCM_REASON_MEM_NOAVAIL
130 uint8_t SchInstCfg(RgCfg *cfg, Inst dInst)
132 uint16_t ret = LCM_REASON_NOT_APPL;
133 Inst inst = (dInst - SCH_INST_START);
135 DU_LOG("\nDEBUG --> SCH : Entered SchInstCfg()");
136 /* Check if Instance Configuration is done already */
137 if (schCb[inst].schInit.cfgDone == TRUE)
139 return LCM_REASON_INVALID_MSGTYPE;
141 /* Update the Pst structure for LM interface */
142 memcpy(&schCb[inst].schInit.lmPst, &cfg->s.schInstCfg.genCfg.lmPst, sizeof(Pst));
144 schCb[inst].schInit.inst = inst;
145 schCb[inst].schInit.lmPst.srcProcId = schCb[inst].schInit.procId;
146 schCb[inst].schInit.lmPst.srcEnt = schCb[inst].schInit.ent;
147 schCb[inst].schInit.lmPst.srcInst = schCb[inst].schInit.inst +
149 schCb[inst].schInit.lmPst.event = EVTNONE;
151 schCb[inst].schInit.region = cfg->s.schInstCfg.genCfg.mem.region;
152 schCb[inst].schInit.pool = cfg->s.schInstCfg.genCfg.mem.pool;
153 schCb[inst].genCfg.tmrRes = cfg->s.schInstCfg.genCfg.tmrRes;
155 schCb[inst].genCfg.forceCntrlSrbBoOnPCel = cfg->s.schInstCfg.genCfg.forceCntrlSrbBoOnPCel;
156 schCb[inst].genCfg.isSCellActDeactAlgoEnable = cfg->s.schInstCfg.genCfg.isSCellActDeactAlgoEnable;
158 schCb[inst].genCfg.startCellId = cfg->s.schInstCfg.genCfg.startCellId;
160 /* Initialzie the timer queue */
161 memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType) * SCH_TQ_SIZE);
162 /* Initialize the timer control point */
163 memset(&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
164 schCb[inst].tmrTqCp.tmrLen = RGSCH_TQ_SIZE;
166 /* SS_MT_TMR needs to be enabled as schActvTmr needs instance information */
167 /* Timer Registration request to system services */
168 if (ODU_REG_TMR_MT(schCb[inst].schInit.ent, dInst, (int)schCb[inst].genCfg.tmrRes, schActvTmr) != ROK)
170 DU_LOG("\nERROR --> SCH : SchInstCfg(): Failed to "
172 return (LCM_REASON_MEM_NOAVAIL);
175 /* Set Config done in TskInit */
176 schCb[inst].schInit.cfgDone = TRUE;
177 DU_LOG("\nINFO --> SCH : Scheduler gen config done");
179 schAllApisInit(inst);
184 * @brief Layer Manager Configuration request handler.
188 * Function : SchProcGenCfgReq
190 * This function handles the configuration
191 * request received at scheduler instance from the Layer Manager.
192 * -# Based on the cfg->hdr.elmId.elmnt value it invokes one of the
193 * functions rgHdlGenCfg() or rgHdlSapCfg().
194 * -# Invokes RgMiLrgSchCfgCfm() to send back the confirmation to the LM.
196 * @param[in] Pst *pst, the post structure
197 * @param[in] RgMngmt *cfg, the configuration parameter's structure
201 uint8_t SchProcGenCfgReq(Pst *pst, RgMngmt *cfg)
203 uint8_t ret = LCM_PRIM_OK;
204 uint16_t reason = LCM_REASON_NOT_APPL;
208 if(pst->dstInst < SCH_INST_START)
210 DU_LOG("\nERROR --> SCH : Invalid inst ID");
211 DU_LOG("\nERROR --> SCH : SchProcGenCfgReq(): "
212 "pst->dstInst=%d SCH_INST_START=%d", pst->dstInst,SCH_INST_START);
215 DU_LOG("\nINFO --> SCH : Received scheduler gen config");
216 /* Fill the post structure for sending the confirmation */
217 memset(&cfmPst, 0 , sizeof(Pst));
218 SchFillCfmPst(pst, &cfmPst, cfg);
220 memset(&cfm, 0, sizeof(RgMngmt));
227 cfm.hdr.elmId.elmnt = cfg->hdr.elmId.elmnt;
228 switch(cfg->hdr.elmId.elmnt)
231 reason = SchInstCfg(&cfg->t.cfg,pst->dstInst );
235 reason = LCM_REASON_INVALID_ELMNT;
236 DU_LOG("\nERROR --> SCH : Invalid Elmnt=%d", cfg->hdr.elmId.elmnt);
240 if (reason != LCM_REASON_NOT_APPL)
245 cfm.cfm.status = ret;
246 cfm.cfm.reason = reason;
248 SchSendCfgCfm(&cfmPst, &cfm);
249 /* SCH_FREE(pst->region, pst->pool, (Data *)cfg, sizeof(RgMngmt)); */
252 }/*-- SchProcGenCfgReq --*/
256 *@brief Returns TDD periodicity in micro seconds
260 * Function : schGetPeriodicityInMsec
262 * This API retunrs TDD periodicity in micro seconds
264 * @param[in] DlUlTxPeriodicity
265 * @return periodicityInMsec
268 uint16_t schGetPeriodicityInMsec(DlUlTxPeriodicity tddPeriod)
270 uint16_t periodicityInMsec = 0;
273 case TX_PRDCTY_MS_0P5:
275 periodicityInMsec = 500;
278 case TX_PRDCTY_MS_0P625:
280 periodicityInMsec = 625;
285 periodicityInMsec = 1000;
288 case TX_PRDCTY_MS_1P25:
290 periodicityInMsec = 1250;
295 periodicityInMsec = 2000;
298 case TX_PRDCTY_MS_2P5:
300 periodicityInMsec = 2500;
305 periodicityInMsec = 5000;
308 case TX_PRDCTY_MS_10:
310 periodicityInMsec = 10000;
315 DU_LOG("\nERROR --> SCH : Invalid DlUlTxPeriodicity:%d", tddPeriod);
319 return periodicityInMsec;
324 * @brief init TDD slot config
328 * Function : schInitTddSlotCfg
330 * This API is invoked after receiving schCellCfg
332 * @param[in] schCellCb *cell
333 * @param[in] SchCellCfg *schCellCfg
336 void schInitTddSlotCfg(SchCellCb *cell, SchCellCfg *schCellCfg)
338 uint16_t periodicityInMicroSec = 0;
339 int8_t slotIdx, symbIdx;
341 periodicityInMicroSec = schGetPeriodicityInMsec(schCellCfg->tddCfg.tddPeriod);
342 cell->numSlotsInPeriodicity = (periodicityInMicroSec * pow(2, schCellCfg->numerology))/1000;
343 cell->slotFrmtBitMap = 0;
344 for(slotIdx = cell->numSlotsInPeriodicity-1; slotIdx >= 0; slotIdx--)
347 /* If the first and last symbol are the same, the entire slot is the same type */
348 if((cell->slotCfg[slotIdx][symbIdx] == cell->slotCfg[slotIdx][MAX_SYMB_PER_SLOT-1]) &&
349 cell->slotCfg[slotIdx][symbIdx] != FLEXI_SLOT)
351 switch(cell->slotCfg[slotIdx][symbIdx])
355 /*BitMap to be set to 00 */
356 cell->slotFrmtBitMap = (cell->slotFrmtBitMap<<2);
361 /*BitMap to be set to 01 */
362 cell->slotFrmtBitMap = ((cell->slotFrmtBitMap<<2) | (UL_SLOT));
366 DU_LOG("\nERROR --> SCH : Invalid slot Config in schInitTddSlotCfg");
370 /* slot config is flexible. First set slotBitMap to 10 */
371 cell->slotFrmtBitMap = ((cell->slotFrmtBitMap<<2) | (FLEXI_SLOT));
377 * @brief Fill SSB start symbol
381 * Function : fillSsbStartSymb
383 * This API stores SSB start index per beam
385 * @param[in] SchCellCb *cellCb
390 void fillSsbStartSymb(SchCellCb *cellCb)
392 uint8_t cnt, scs, symbIdx, ssbStartSymbArr[SCH_MAX_SSB_BEAM];
394 scs = cellCb->cellCfg.scsCommon;
396 memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
398 /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
403 if(cellCb->cellCfg.ssbFrequency <= 300000)
404 cnt = 2;/* n = 0, 1 */
406 cnt = 4; /* n = 0, 1, 2, 3 */
407 for(uint8_t idx=0; idx<cnt; idx++)
409 /* start symbol determined using {2, 8} + 14n */
410 ssbStartSymbArr[symbIdx++] = 2 + MAX_SYMB_PER_SLOT*idx;
411 ssbStartSymbArr[symbIdx++] = 8 + MAX_SYMB_PER_SLOT*idx;
417 if(cellCb->cellCfg.ssbFrequency <= 300000)
420 cnt = 2; /* n = 0, 1 */
421 for(uint8_t idx=0; idx<cnt; idx++)
423 /* start symbol determined using {4, 8, 16, 20} + 28n */
424 ssbStartSymbArr[symbIdx++] = 4 + MAX_SYMB_PER_SLOT*idx;
425 ssbStartSymbArr[symbIdx++] = 8 + MAX_SYMB_PER_SLOT*idx;
426 ssbStartSymbArr[symbIdx++] = 16 + MAX_SYMB_PER_SLOT*idx;
427 ssbStartSymbArr[symbIdx++] = 20 + MAX_SYMB_PER_SLOT*idx;
432 DU_LOG("\nERROR --> SCH : SCS %d is currently not supported", scs);
434 memset(cellCb->ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
435 memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM);
440 * @brief init cellCb based on cellCfg
444 * Function : schInitCellCb
446 * This API is invoked after receiving schCellCfg
448 * @param[in] schCellCb *cell
449 * @param[in] SchCellCfg *schCellCfg
454 uint8_t schInitCellCb(Inst inst, SchCellCfg *schCellCfg)
456 SchCellCb *cell= NULLP;
457 SCH_ALLOC(cell, sizeof(SchCellCb));
460 DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
464 cell->cellId = schCellCfg->cellId;
465 cell->instIdx = inst;
466 switch(schCellCfg->numerology)
468 case SCH_NUMEROLOGY_0:
470 cell->numSlots = SCH_MU0_NUM_SLOTS;
473 case SCH_NUMEROLOGY_1:
475 cell->numSlots = SCH_MU1_NUM_SLOTS;
478 case SCH_NUMEROLOGY_2:
480 cell->numSlots = SCH_MU2_NUM_SLOTS;
483 case SCH_NUMEROLOGY_3:
485 cell->numSlots = SCH_MU3_NUM_SLOTS;
488 case SCH_NUMEROLOGY_4:
490 cell->numSlots = SCH_MU4_NUM_SLOTS;
494 DU_LOG("\nERROR --> SCH : Numerology %d not supported", schCellCfg->numerology);
497 schInitTddSlotCfg(cell, schCellCfg);
500 SCH_ALLOC(cell->schDlSlotInfo, cell->numSlots * sizeof(SchDlSlotInfo*));
501 if(!cell->schDlSlotInfo)
503 DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb for schDlSlotInfo");
507 SCH_ALLOC(cell->schUlSlotInfo, cell->numSlots * sizeof(SchUlSlotInfo*));
508 if(!cell->schUlSlotInfo)
510 DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb for schUlSlotInfo");
514 for(uint8_t idx=0; idx<cell->numSlots; idx++)
516 SchDlSlotInfo *schDlSlotInfo;
517 SchUlSlotInfo *schUlSlotInfo;
520 SCH_ALLOC(schDlSlotInfo, sizeof(SchDlSlotInfo));
523 DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
528 SCH_ALLOC(schUlSlotInfo, sizeof(SchUlSlotInfo));
531 DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
535 schInitDlSlot(schDlSlotInfo);
536 schInitUlSlot(schUlSlotInfo);
538 cell->schDlSlotInfo[idx] = schDlSlotInfo;
539 cell->schUlSlotInfo[idx] = schUlSlotInfo;
542 cell->firstSsbTransmitted = false;
543 cell->firstSib1Transmitted = false;
544 fillSsbStartSymb(cell);
547 memset(cell->drxCb, 0, MAX_DRX_SIZE*sizeof(SchDrxCb));
549 schCb[inst].cells[inst] = cell;
551 DU_LOG("\nINFO --> SCH : Cell init completed for cellId:%d", cell->cellId);
557 * @brief Fill SIB1 configuration
561 * Function : fillSchSib1Cfg
563 * Fill SIB1 configuration
565 * @param[in] uint8_t bandwidth : total available bandwidth
566 * uint8_t numSlots : total slots per SFN
567 * SchSib1Cfg *sib1SchCfg : cfg to be filled
568 * uint16_t pci : physical cell Id
569 * uint8_t offsetPointA : offset
572 uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchConfigSib1 *pdcchCfgSib1,\
573 SchSib1Cfg *sib1SchCfg, uint16_t pci, uint8_t offsetPointA, uint16_t sib1PduLen)
575 uint8_t coreset0Idx = 0;
576 uint8_t searchSpace0Idx = 0;
577 //uint8_t ssbMuxPattern = 0;
579 uint8_t numSymbols = 0;
582 //uint8_t numSearchSpacePerSlot = 0;
584 uint8_t firstSymbol = 0; /* need to calculate using formula mentioned in 38.213 */
585 uint8_t slotIndex = 0;
586 uint8_t FreqDomainResource[FREQ_DOM_RSRC_SIZE] = {0};
593 pdcch = &(sib1SchCfg->sib1PdcchCfg);
594 bwp = &(sib1SchCfg->bwp);
596 coreset0Idx = pdcchCfgSib1->coresetZeroIndex;
597 searchSpace0Idx = pdcchCfgSib1->searchSpaceZeroIndex;
599 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
600 //ssbMuxPattern = coresetIdxTable[coreset0Idx][0];
601 numRbs = coresetIdxTable[coreset0Idx][1];
602 numSymbols = coresetIdxTable[coreset0Idx][2];
603 offset = coresetIdxTable[coreset0Idx][3];
605 /* derive the search space params from table 13-11 spec 38.213 */
606 oValue = searchSpaceIdxTable[searchSpace0Idx][0];
607 //numSearchSpacePerSlot = searchSpaceIdxTable[searchSpace0Idx][1];
608 mValue = searchSpaceIdxTable[searchSpace0Idx][2];
609 firstSymbol = searchSpaceIdxTable[searchSpace0Idx][3];
611 /* calculate the n0, need to add the formulae, as of now the value is 0
612 * Need to add the even and odd values of i during configuration
613 * [(O . 2^u + i . M ) ] mod numSlotsPerSubframe
614 * assuming u = 0, i = 0, numSlotsPerSubframe = 10
615 * Also, from this configuration, coreset0 is only on even subframe */
616 slotIndex = (int)((oValue*pow(2, mu)) + floor(ssbIdx*mValue))%numSlots;
617 sib1SchCfg->n0 = slotIndex;
622 case BANDWIDTH_20MHZ:
624 bwp->freqAlloc.numPrb = TOTAL_PRB_20MHZ_MU0;
627 case BANDWIDTH_100MHZ:
629 bwp->freqAlloc.numPrb = TOTAL_PRB_100MHZ_MU1;
633 DU_LOG("\nERROR --> SCH : Bandwidth %d not supported", bandwidth);
636 bwp->freqAlloc.startPrb = 0;
637 bwp->subcarrierSpacing = 0; /* 15Khz */
638 bwp->cyclicPrefix = 0; /* normal */
640 /* fill the PDCCH PDU */
641 pdcch->coresetCfg.coreSetSize = numRbs;
642 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
643 pdcch->coresetCfg.durationSymbols = numSymbols;
645 /* Fill Bitmap for PRBs in coreset */
646 fillCoresetFeqDomAllocMap(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
647 covertFreqDomRsrcMapToIAPIFormat(FreqDomainResource, pdcch->coresetCfg.freqDomainResource);
649 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
650 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
651 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
652 pdcch->coresetCfg.coreSetType = 0;
653 pdcch->coresetCfg.shiftIndex = pci;
654 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
656 pdcch->dci.rnti = SI_RNTI;
657 pdcch->dci.scramblingId = pci;
658 pdcch->dci.scramblingRnti = 0;
659 pdcch->dci.cceIndex = 0;
660 pdcch->dci.aggregLevel = 4;
661 pdcch->dci.beamPdcchInfo.numPrgs = 1;
662 pdcch->dci.beamPdcchInfo.prgSize = 1;
663 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
664 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
665 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
666 pdcch->dci.txPdcchPower.beta_pdcch_1_0= 0;
667 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
668 /* Storing pdschCfg pointer here. Required to access pdsch config while
669 fillig up pdcch pdu */
670 SCH_ALLOC(pdcch->dci.pdschCfg, sizeof(PdschCfg));
671 if(pdcch->dci.pdschCfg == NULLP)
673 DU_LOG("\nERROR --> SCH : Memory allocation failed in %s ", __func__);
676 pdsch = pdcch->dci.pdschCfg;
678 /* fill the PDSCH PDU */
680 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
681 pdsch->rnti = 0xFFFF; /* SI-RNTI */
683 pdsch->numCodewords = 1;
684 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
686 pdsch->codeword[cwCount].targetCodeRate = 308;
687 pdsch->codeword[cwCount].qamModOrder = 2;
688 pdsch->codeword[cwCount].mcsIndex = DEFAULT_MCS;
689 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
690 pdsch->codeword[cwCount].rvIndex = 0;
691 tbSize = schCalcTbSize(sib1PduLen + TX_PAYLOAD_HDR_LEN);
692 pdsch->codeword[cwCount].tbSize = tbSize;
694 pdsch->dataScramblingId = pci;
695 pdsch->numLayers = 1;
696 pdsch->transmissionScheme = 0;
698 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
699 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
700 pdsch->dmrs.dlDmrsScramblingId = pci;
701 pdsch->dmrs.scid = 0;
702 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
703 pdsch->dmrs.dmrsPorts = 0x0001;
704 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
705 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
706 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
708 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
709 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
710 pdsch->pdschFreqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB;
711 pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, DEFAULT_MCS, NUM_PDSCH_SYMBOL);
712 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
713 pdsch->pdschTimeAlloc.rowIndex = 1;
714 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
715 pdsch->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
716 pdsch->pdschTimeAlloc.numSymb = NUM_PDSCH_SYMBOL;
717 pdsch->beamPdschInfo.numPrgs = 1;
718 pdsch->beamPdschInfo.prgSize = 1;
719 pdsch->beamPdschInfo.digBfInterfaces = 0;
720 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
721 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
722 pdsch->txPdschPower.powerControlOffset = 0;
723 pdsch->txPdschPower.powerControlOffsetSS = 0;
729 * @brief cell config from MAC to SCH.
733 * Function : macSchCellCfgReq
735 * This API is invoked by MAC to send cell config to SCH
737 * @param[in] Pst *pst
738 * @param[in] SchCellCfg *schCellCfg
743 uint8_t SchProcCellCfgReq(Pst *pst, SchCellCfg *schCellCfg)
747 SchCellCfgCfm schCellCfgCfm;
749 Inst inst = pst->dstInst - SCH_INST_START;
750 uint8_t coreset0Idx = 0;
753 uint8_t freqDomainResource[FREQ_DOM_RSRC_SIZE] = {0};
754 SchPdschConfig pdschCfg;
756 schInitCellCb(inst, schCellCfg);
757 cellCb = schCb[inst].cells[inst]; //cells is of MAX_CELLS, why inst
758 cellCb->macInst = pst->srcInst;
760 /* derive the SIB1 config parameters */
761 ret = fillSchSib1Cfg(schCellCfg->numerology, schCellCfg->dlBandwidth, cellCb->numSlots,
762 &(schCellCfg->pdcchCfgSib1), &(cellCb->sib1SchCfg), schCellCfg->phyCellId,
763 schCellCfg->dlCfgCommon.schFreqInfoDlSib.offsetToPointA, schCellCfg->sib1PduLen);
767 DU_LOG("\nERROR --> SCH : Failed to fill sib1 configuration");
770 memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg));
771 schProcPagingCfg(cellCb);
773 /* Fill coreset frequencyDomainResource bitmap */
774 coreset0Idx = cellCb->cellCfg.dlCfgCommon.schInitialDlBwp.pdcchCommon.commonSearchSpace.coresetId;
775 numRbs = coresetIdxTable[coreset0Idx][1];
776 offset = coresetIdxTable[coreset0Idx][3];
777 fillCoresetFeqDomAllocMap(((cellCb->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA - offset)/6), \
778 (numRbs/6), freqDomainResource);
779 covertFreqDomRsrcMapToIAPIFormat(freqDomainResource, \
780 cellCb->cellCfg.dlCfgCommon.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc);
782 /* Fill K0 - K1 table for common cfg*/
783 BuildK0K1Table(cellCb, &cellCb->k0K1InfoTbl, true, cellCb->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon,
784 pdschCfg, DEFAULT_UL_ACK_LIST_COUNT, defaultUlAckTbl);
786 BuildK2InfoTable(cellCb, cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList,\
787 cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.numTimeDomRsrcAlloc, &cellCb->msg3K2InfoTbl, \
790 /*As per Spec 38.211, Sec 6.3.3.2; RootSeq Len(Lra) where Lra=839 or Lra=139,
791 *depending on the PRACH preamble format as given by Tables 6.3.3.1-1 and 6.3.3.1-2.*/
792 if(prachCfgIdxTable[cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.prachCfgIdx][0] <= 3)
794 cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.rootSeqLen = ROOT_SEQ_LEN_1;
798 cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.rootSeqLen = ROOT_SEQ_LEN_2;
800 /* Initializing global variables */
801 cellCb->actvUeBitMap = 0;
802 cellCb->boIndBitMap = 0;
804 cellCb->schHqCfg.maxDlDataHqTx = SCH_MAX_NUM_DL_HQ_TX;
805 cellCb->schHqCfg.maxMsg4HqTx = SCH_MAX_NUM_MSG4_TX;
806 cellCb->schHqCfg.maxUlDataHqTx = SCH_MAX_NUM_UL_HQ_TX;
807 cellCb->maxMsg3Tx = SCH_MAX_NUM_MSG3_TX;
809 cellCb->schAlgoType = SCH_FCFS;
810 cellCb->api = &schCb[inst].allApis[cellCb->schAlgoType]; /* For FCFS */
811 cellCb->api->SchCellCfgReq(cellCb);
813 /* Fill and send Cell config confirm */
814 memset(&rspPst, 0, sizeof(Pst));
815 FILL_PST_SCH_TO_MAC(rspPst, pst->dstInst);
816 rspPst.event = EVENT_SCH_CELL_CFG_CFM;
818 schCellCfgCfm.cellId = schCellCfg->cellId;
819 schCellCfgCfm.rsp = RSP_OK;
821 ret = MacMessageRouter(&rspPst, (void *)&schCellCfgCfm);
826 /*******************************************************************
828 * @brief Fill and send Cell delete response to MAC
832 * Function : SchSendCellDeleteRspToMac
834 * Functionality: Fill and send Cell delete response to MAC
836 * @params[in] SchCellDelete *ueDelete, Inst inst, SchMacRsp result
837 * @return ROK - success
840 * ****************************************************************/
841 uint8_t SchSendCellDeleteRspToMac(SchCellDeleteReq *ueDelete, Inst inst, SchMacRsp result)
846 SchCellDeleteRsp delRsp;
848 DU_LOG("\nINFO --> SCH : Filling Cell Delete response");
849 memset(&delRsp, 0, sizeof(SchCellDeleteRsp));
850 delRsp.cellId = ueDelete->cellId;
853 /* Filling response post */
854 memset(&rspPst, 0, sizeof(Pst));
855 FILL_PST_SCH_TO_MAC(rspPst, inst);
856 rspPst.event = EVENT_CELL_DELETE_RSP_TO_MAC;
857 ret = MacMessageRouter(&rspPst, (void *)&delRsp);
860 DU_LOG("\nERROR --> SCH : SchSendCellDeleteRspToMac(): failed to send the Cell Delete response");
866 /*******************************************************************
868 * @brief Function for cellCb Deletion
872 * Function : deleteSchCellCb
874 * Functionality: Function for cellCb Deletion
876 * @params[in] SchCellDelete *cellDelete
877 * @return ROK - success
880 * ****************************************************************/
881 void deleteSchCellCb(SchCellCb *cellCb)
883 uint8_t sliceIdx=0, slotIdx=0, plmnIdx = 0;
884 CmLListCp *list=NULL;
885 CmLList *node=NULL, *next=NULL;
886 SchPageInfo *tempNode = NULLP;
888 if(cellCb->schDlSlotInfo)
890 for(slotIdx=0; slotIdx<cellCb->numSlots; slotIdx++)
892 list = &cellCb->schDlSlotInfo[slotIdx]->prbAlloc.freePrbBlockList;
897 SCH_FREE(node->node, sizeof(FreePrbBlock));
898 deleteNodeFromLList(list, node);
901 SCH_FREE(cellCb->schDlSlotInfo[slotIdx], sizeof(SchDlSlotInfo));
903 SCH_FREE(cellCb->schDlSlotInfo, cellCb->numSlots *sizeof(SchDlSlotInfo*));
906 if(cellCb->schUlSlotInfo)
908 for(slotIdx=0; slotIdx<cellCb->numSlots; slotIdx++)
910 list = &cellCb->schUlSlotInfo[slotIdx]->prbAlloc.freePrbBlockList;
915 SCH_FREE(node->node, sizeof(FreePrbBlock));
916 deleteNodeFromLList(list, node);
919 SCH_FREE(cellCb->schUlSlotInfo[slotIdx], sizeof(SchUlSlotInfo));
921 SCH_FREE(cellCb->schUlSlotInfo, cellCb->numSlots * sizeof(SchUlSlotInfo*));
924 for(plmnIdx = 0; plmnIdx < MAX_PLMN; plmnIdx++)
926 if(cellCb->cellCfg.plmnInfoList[plmnIdx].snssai)
928 for(sliceIdx=0; sliceIdx<cellCb->cellCfg.plmnInfoList[plmnIdx].numSliceSupport; sliceIdx++)
930 SCH_FREE(cellCb->cellCfg.plmnInfoList[plmnIdx].snssai[sliceIdx], sizeof(Snssai));
932 SCH_FREE(cellCb->cellCfg.plmnInfoList[plmnIdx].snssai, cellCb->cellCfg.plmnInfoList[plmnIdx].numSliceSupport*sizeof(Snssai*));
935 SCH_FREE(cellCb->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg, sizeof(PdschCfg));
937 for(uint16_t idx =0; idx<MAX_SFN; idx++)
939 list = &cellCb->pageCb.pageIndInfoRecord[idx];
946 tempNode = (SchPageInfo*)(node->node);
947 SCH_FREE(tempNode->pagePdu, tempNode->msgLen);
948 SCH_FREE(node->node, sizeof(SchPageInfo));
950 deleteNodeFromLList(list, node);
955 cellCb->api->SchCellDeleteReq(cellCb);
957 memset(cellCb, 0, sizeof(SchCellCb));
960 /*******************************************************************
962 * @brief Function for cell Delete request from MAC to SCH
966 * Function : SchProcCellDeleteReq
968 * Functionality: Function for cell Delete request from MAC to SCH
970 * @params[in] Pst *pst, SchCellDelete *cellDelete
971 * @return ROK - success
974 * ****************************************************************/
975 uint8_t SchProcCellDeleteReq(Pst *pst, SchCellDeleteReq *cellDelete)
977 uint8_t cellIdx=0, ret = RFAILED;
978 Inst inst = pst->dstInst - SCH_INST_START;
979 SchMacRsp result= RSP_OK;
983 DU_LOG("\nERROR --> SCH : SchProcCellDeleteReq(): Ue Delete request failed");
987 GET_CELL_IDX(cellDelete->cellId, cellIdx);
988 if(schCb[inst].cells[cellIdx] == NULLP)
990 DU_LOG("\nERROR --> SCH : SchProcCellDeleteReq(): cell Id[%d] is not available", cellDelete->cellId);
995 if(schCb[inst].cells[cellIdx]->cellId == cellDelete->cellId)
997 deleteSchCellCb(schCb[inst].cells[cellIdx]);
1000 SCH_FREE(schCb[inst].cells[cellIdx], sizeof(SchCellCb));
1001 DU_LOG("\nINFO --> SCH : Sending Cell Delete response to MAC");
1005 DU_LOG("\nERROR --> SCH : SchProcCellDeleteReq(): cell Id[%d] is not available",cellDelete->cellId);
1010 if(SchSendCellDeleteRspToMac(cellDelete, inst, result)!=ROK)
1012 DU_LOG("\nERROR --> SCH : SchProcCellDeleteReq(): failed to send Cell Delete response");
1019 /*******************************************************************
1021 * @brief Processes DL RLC BO info from MAC
1025 * Function : SchProcDlRlcBoInfo
1028 * Processes DL RLC BO info from MAC
1031 * @return ROK - success
1034 * ****************************************************************/
1035 uint8_t SchProcDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo)
1039 bool isLcIdValid = false;
1040 SchUeCb *ueCb = NULLP;
1041 SchCellCb *cell = NULLP;
1042 Inst inst = pst->dstInst-SCH_INST_START;
1044 DU_LOG("\nDEBUG --> SCH : Received RLC BO Status indication LCId [%d] BO [%d]", dlBoInfo->lcId, dlBoInfo->dataVolume);
1045 cell = schCb[inst].cells[inst];
1049 DU_LOG("\nERROR --> SCH : SchProcDlRlcBoInfo(): Cell does not exists");
1053 GET_UE_ID(dlBoInfo->crnti, ueId);
1054 ueCb = &cell->ueCb[ueId-1];
1055 if(ueCb->ueCfg.dataTransmissionAction == STOP_DATA_TRANSMISSION)
1057 DU_LOG("INFO --> SCH : DL Data transmission not allowed for UE %d", ueCb->ueCfg.ueId);
1061 lcId = dlBoInfo->lcId;
1062 CHECK_LCID(lcId, isLcIdValid);
1063 if(isLcIdValid == FALSE)
1065 DU_LOG("ERROR --> SCH: LCID:%d is not valid", lcId);
1069 /*Expected when theres a case of Retransmission Failure or Resetablishment
1070 *By Zero BO, the RLC is informing that previous data can be cleared out
1071 *Thus clearing out the LC from the Lc priority list*/
1072 if(dlBoInfo->dataVolume == 0)
1074 /* TODO : Check the LC is Dedicated or default and accordingly LCList
1079 if(lcId == SRB0_LCID)
1081 cell->raCb[ueId -1].msg4recvd = true;
1082 cell->raCb[ueId -1].dlMsgPduLen = dlBoInfo->dataVolume;
1086 /* TODO : These part of changes will be corrected during DL scheduling as
1087 * per K0 - K1 -K2 */
1088 SET_ONE_BIT(ueId, cell->boIndBitMap);
1089 if(ueCb->dlInfo.dlLcCtxt[lcId].lcId == lcId)
1091 ueCb->dlInfo.dlLcCtxt[lcId].bo = dlBoInfo->dataVolume;
1095 DU_LOG("ERROR --> SCH: LCID:%d is not configured in SCH Cb",lcId);
1099 /* Adding UE Id to list of pending UEs to be scheduled */
1100 cell->api->SchDlRlcBoInfo(cell, ueId);
1104 /*******************************************************************
1106 * @brief Processes BSR indiation from MAC
1110 * Function : SchProcBsr
1113 * Processes DL BSR from MAC
1115 * @params[in] Pst pst
1116 * UlBufferStatusRptInd bsrInd
1117 * @return ROK - success
1120 * ****************************************************************/
1121 uint8_t SchProcBsr(Pst *pst, UlBufferStatusRptInd *bsrInd)
1123 Inst schInst = pst->dstInst-SCH_INST_START;
1124 SchCellCb *cellCb = NULLP;
1125 SchUeCb *ueCb = NULLP;
1128 DU_LOG("\nDEBUG --> SCH : Received BSR");
1131 DU_LOG("\nERROR --> SCH : BSR Ind is empty");
1134 cellCb = schCb[schInst].cells[schInst];
1137 DU_LOG("\nERROR --> SCH : CellCb is empty");
1140 ueCb = schGetUeCb(cellCb, bsrInd->crnti);
1144 DU_LOG("\nERROR --> SCH : UeCB is empty");
1148 if(ueCb->ueCfg.dataTransmissionAction == STOP_DATA_TRANSMISSION)
1150 DU_LOG("\nINFO --> SCH: UL Data transmission not allowed for UE %d", ueCb->ueCfg.ueId);
1154 ueCb->bsrRcvd = true;
1155 /* store dataVolume per lcg in uecb */
1156 for(lcgIdx = 0; lcgIdx < bsrInd->numLcg; lcgIdx++)
1158 ueCb->bsrInfo[bsrInd->dataVolInfo[lcgIdx].lcgId].priority = 1; //TODO: determining LCG priority?
1159 ueCb->bsrInfo[bsrInd->dataVolInfo[lcgIdx].lcgId].dataVol = bsrInd->dataVolInfo[lcgIdx].dataVol;
1162 /* Adding UE Id to list of pending UEs to be scheduled */
1163 cellCb->api->SchBsr(cellCb, ueCb->ueId);
1167 /*******************************************************************
1169 * @brief Processes SR UCI indication from MAC
1173 * Function : SchProcSrUciInd
1176 * Processes SR UCI indication from MAC
1178 * @params[in] Post structure
1180 * @return ROK - success
1183 * ****************************************************************/
1184 uint8_t SchProcSrUciInd(Pst *pst, SrUciIndInfo *uciInd)
1186 Inst inst = pst->dstInst-SCH_INST_START;
1189 SchCellCb *cellCb = schCb[inst].cells[inst];
1191 DU_LOG("\nDEBUG --> SCH : Received SR");
1193 ueCb = schGetUeCb(cellCb, uciInd->crnti);
1195 if(ueCb->state == SCH_UE_STATE_INACTIVE)
1197 DU_LOG("\nERROR --> SCH : Crnti %d is inactive", uciInd->crnti);
1200 if(ueCb->ueCfg.dataTransmissionAction == STOP_DATA_TRANSMISSION)
1202 DU_LOG("\nINFO --> SCH: UL Data transmission not allowed for UE %d", ueCb->ueCfg.ueId);
1205 if(uciInd->numSrBits)
1207 ueCb->srRcvd = true;
1208 /* Adding UE Id to list of pending UEs to be scheduled */
1209 cellCb->api->SchSrUciInd(cellCb, ueCb->ueId);
1214 /*******************************************************************
1216 * @brief Processes DL HARQ indication from MAC
1220 * Function : SchProcDlHarqInd
1223 * Processes DL HARQ indication from MAC
1225 * @params[in] Post structure
1226 * DL HARQ Indication
1227 * @return ROK - success
1230 * ****************************************************************/
1231 uint8_t SchProcDlHarqInd(Pst *pst, DlHarqInd *dlHarqInd)
1233 Inst inst = pst->dstInst-SCH_INST_START;
1235 SchCellCb *cellCb = schCb[inst].cells[inst];
1237 DU_LOG("\nDEBUG --> SCH : Received HARQ");
1239 ueCb = schGetUeCb(cellCb, dlHarqInd->crnti);
1241 if(ueCb->state == SCH_UE_STATE_INACTIVE)
1243 DU_LOG("\nERROR --> SCH : Crnti %d is inactive", dlHarqInd->crnti);
1247 schUpdateHarqFdbk(ueCb, dlHarqInd->numHarq, dlHarqInd->harqPayload, &dlHarqInd->slotInd);
1252 /*******************************************************************
1254 * @brief Allocates requested PRBs for DL
1258 * Function : allocatePrbDl
1261 * Allocates requested PRBs in DL
1262 * Keeps track of allocated PRB (using bitmap) and remaining PRBs
1264 * @params[in] prbAlloc table
1270 * @return ROK - success
1273 * ****************************************************************/
1274 uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \
1275 uint8_t startSymbol, uint8_t symbolLength, uint16_t *startPrb, uint16_t numPrb)
1278 uint16_t broadcastPrbStart=0, broadcastPrbEnd=0;
1279 FreePrbBlock *freePrbBlock = NULLP;
1280 CmLList *freePrbNode = NULLP;
1281 PduTxOccsaion ssbOccasion=0, sib1Occasion=0;
1282 SchDlSlotInfo *schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
1283 SchPrbAlloc *prbAlloc = &schDlSlotInfo->prbAlloc;
1285 /* If startPrb is set to MAX_NUM_RB, it means startPrb is not known currently.
1286 * Search for an appropriate location in PRB grid and allocate requested resources */
1287 if(*startPrb == MAX_NUM_RB)
1289 /* Check if SSB/SIB1 is also scheduled in this slot */
1290 ssbOccasion = schCheckSsbOcc(cell, slotTime);
1291 sib1Occasion = schCheckSib1Occ(cell, slotTime);
1293 if(ssbOccasion && sib1Occasion)
1295 broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA;
1296 broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB + cell->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
1298 else if(ssbOccasion)
1300 broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA;
1301 broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB -1;
1303 else if(sib1Occasion)
1305 broadcastPrbStart = cell->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
1306 broadcastPrbEnd = broadcastPrbStart + cell->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
1309 /* Iterate through all free PRB blocks */
1310 freePrbNode = prbAlloc->freePrbBlockList.first;
1313 freePrbBlock = (FreePrbBlock *)freePrbNode->node;
1315 /* If broadcast message is scheduled in this slot, then check if its PRBs belong to the current free block.
1316 * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */
1317 if((ssbOccasion || sib1Occasion) &&
1318 ((broadcastPrbStart >= freePrbBlock->startPrb) && (broadcastPrbStart <= freePrbBlock->endPrb)) && \
1319 ((broadcastPrbEnd >= freePrbBlock->startPrb) && (broadcastPrbEnd <= freePrbBlock->endPrb)))
1321 /* Implmentation is done such that highest-numbered free-RB is allocated first */
1322 if((freePrbBlock->endPrb > broadcastPrbEnd) && ((freePrbBlock->endPrb - broadcastPrbEnd) >= numPrb))
1324 /* If sufficient free PRBs are available above bradcast message then,
1325 * endPrb = freePrbBlock->endPrb
1326 * startPrb = endPrb - numPrb +1;
1328 *startPrb = freePrbBlock->endPrb - numPrb +1;
1331 else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb))
1333 /* If free PRBs are available below broadcast message then,
1334 * endPrb = broadcastPrbStart - 1
1335 * startPrb = endPrb - numPrb +1
1337 *startPrb = broadcastPrbStart - numPrb;
1342 freePrbNode = freePrbNode->next;
1348 /* Check if requested number of blocks can be allocated from the current block */
1349 if (freePrbBlock->numFreePrb < numPrb)
1351 freePrbNode = freePrbNode->next;
1354 *startPrb = freePrbBlock->endPrb - numPrb +1;
1359 /* If no free block can be used to allocated request number of RBs */
1360 if(*startPrb == MAX_NUM_RB)
1364 /* If startPrb is known already, check if requested PRBs are available for allocation */
1367 freePrbNode = isPrbAvailable(&prbAlloc->freePrbBlockList, *startPrb, numPrb);
1370 DU_LOG("\nERROR --> SCH: Requested DL PRB unavailable");
1375 /* Update bitmap to allocate PRBs */
1376 for(symbol=startSymbol; symbol < (startSymbol+symbolLength); symbol++)
1378 if(fillPrbBitmap(prbAlloc->prbBitMap[symbol], *startPrb, numPrb) != ROK)
1380 DU_LOG("\nERROR --> SCH: fillPrbBitmap() failed for symbol [%d] in DL", symbol);
1385 /* Update the remaining number for free PRBs */
1386 removeAllocatedPrbFromFreePrbList(&prbAlloc->freePrbBlockList, freePrbNode, *startPrb, numPrb);
1391 /*******************************************************************
1393 * @brief Allocates requested PRBs for UL
1397 * Function : allocatePrbUl
1400 * Allocates requested PRBs in UL
1401 * Keeps track of allocated PRB (using bitmap) and remaining PRBs
1403 * @params[in] prbAlloc table
1409 * @return ROK - success
1412 * ****************************************************************/
1413 uint8_t allocatePrbUl(SchCellCb *cell, SlotTimingInfo slotTime, \
1414 uint8_t startSymbol, uint8_t symbolLength, uint16_t *startPrb, uint16_t numPrb)
1417 uint16_t prachStartPrb, prachNumPrb, prachEndPrb;
1418 bool isPrachOccasion;
1419 FreePrbBlock *freePrbBlock = NULLP;
1420 CmLList *freePrbNode = NULLP;
1421 SchPrbAlloc *prbAlloc = NULLP;
1425 DU_LOG("\nERROR --> SCH : allocatePrbUl(): Received cellCb is null");
1429 prbAlloc = &cell->schUlSlotInfo[slotTime.slot]->prbAlloc;
1430 /* If startPrb is set to MAX_NUM_RB, it means startPrb is not known currently.
1431 * Search for an appropriate location in PRB grid and allocate requested resources */
1432 if(*startPrb == MAX_NUM_RB)
1434 /* Check if PRACH is also scheduled in this slot */
1435 isPrachOccasion = schCheckPrachOcc(cell, slotTime);
1438 prachStartPrb = cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.msg1FreqStart;
1439 prachNumPrb = schCalcPrachNumRb(cell);
1440 prachEndPrb = prachStartPrb + prachNumPrb -1;
1443 /* Iterate through all free PRB blocks */
1444 freePrbNode = prbAlloc->freePrbBlockList.first;
1447 freePrbBlock = (FreePrbBlock *)freePrbNode->node;
1449 /* If PRACH is scheduled in this slot, then check if its PRBs belong to the current free block.
1450 * PRBs required for PRACH cannot be allocated to any other message */
1451 if((isPrachOccasion) &&
1452 ((prachStartPrb >= freePrbBlock->startPrb) && (prachStartPrb <= freePrbBlock->endPrb)) &&
1453 ((prachEndPrb >= freePrbBlock->startPrb) && (prachEndPrb <= freePrbBlock->endPrb)))
1455 /* Implmentation is done such that highest-numbered free-RB is allocated first */
1456 if((freePrbBlock->endPrb > prachEndPrb) && ((freePrbBlock->endPrb - prachEndPrb) >= numPrb))
1458 /* If sufficient free PRBs are available above PRACH message then,
1459 * endPrb = freePrbBlock->endPrb
1460 * startPrb = endPrb - numPrb +1;
1462 *startPrb = freePrbBlock->endPrb - numPrb +1;
1465 else if((prachStartPrb > freePrbBlock->startPrb) && ((prachStartPrb - freePrbBlock->startPrb) >= numPrb))
1467 /* If free PRBs are available below PRACH message then,
1468 * endPrb = prachStartPrb - 1
1469 * startPrb = endPrb - numPrb +1
1471 *startPrb = prachStartPrb - numPrb;
1476 freePrbNode = freePrbNode->next;
1482 /* Check if requested number of PRBs can be allocated from currect block */
1483 if(freePrbBlock->numFreePrb < numPrb)
1485 freePrbNode = freePrbNode->next;
1488 *startPrb = freePrbBlock->endPrb - numPrb +1;
1493 /* If no free block can be used to allocated requested number of RBs */
1494 if(*startPrb == MAX_NUM_RB)
1499 /* If startPrb is known already, check if requested PRBs are available for allocation */
1500 freePrbNode = isPrbAvailable(&prbAlloc->freePrbBlockList, *startPrb, numPrb);
1503 DU_LOG("\nERROR --> SCH: Requested UL PRB unavailable");
1508 /* Update bitmap to allocate PRBs */
1509 for(symbol=startSymbol; symbol < (startSymbol+symbolLength); symbol++)
1511 if(fillPrbBitmap(prbAlloc->prbBitMap[symbol], *startPrb, numPrb) != ROK)
1513 DU_LOG("\nERROR --> SCH: fillPrbBitmap() failed for symbol [%d] in UL", symbol);
1518 /* Update the remaining number for free PRBs */
1519 removeAllocatedPrbFromFreePrbList(&prbAlloc->freePrbBlockList, freePrbNode, *startPrb, numPrb);
1524 /*******************************************************************************
1526 * @brief Try to find Best Free Block with Max Num PRB
1530 * Function : searchLargestFreeBlock
1533 * Finds the FreeBlock with MaxNum of FREE PRB considering SSB/SIB1 ocassions.
1535 * @params[in] I/P > prbAlloc table (FreeBlock list)
1536 * I/P > Slot timing Info
1538 * I/P > Direction (UL/DL)
1541 * @return Max Number of Free PRB
1542 * If 0, then no Suitable Free Block
1544 * ********************************************************************************/
1546 uint16_t searchLargestFreeBlock(SchCellCb *cell, SlotTimingInfo slotTime,uint16_t *startPrb, Direction dir)
1548 uint16_t reservedPrbStart=0, reservedPrbEnd=0, maxFreePRB = 0;
1549 FreePrbBlock *freePrbBlock = NULLP;
1550 CmLList *freePrbNode = NULLP;
1551 SchPrbAlloc *prbAlloc = NULLP;
1552 bool checkOccasion = FALSE;
1554 *startPrb = 0; /*Initialize the StartPRB to zero*/
1556 /*Based on Direction, Reserved Messsages will differi.e.
1557 * DL >> SSB and SIB1 ocassions wheres for UL, PRACH ocassions to be checked
1558 * and reserved before allocation for dedicated DL/UL msg*/
1561 SchDlSlotInfo *schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
1562 PduTxOccsaion ssbOccasion=0, sib1Occasion=0;
1564 prbAlloc = &schDlSlotInfo->prbAlloc;
1566 ssbOccasion = schCheckSsbOcc(cell, slotTime);
1567 sib1Occasion = schCheckSib1Occ(cell, slotTime);
1569 checkOccasion = TRUE;
1570 if(ssbOccasion && sib1Occasion)
1572 reservedPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA;
1573 reservedPrbEnd = reservedPrbStart + SCH_SSB_NUM_PRB + \
1574 cell->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
1576 else if(ssbOccasion)
1578 reservedPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA;
1579 reservedPrbEnd = reservedPrbStart + SCH_SSB_NUM_PRB -1;
1581 else if(sib1Occasion)
1583 reservedPrbStart = cell->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
1584 reservedPrbEnd = reservedPrbStart + cell->sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb -1;
1588 checkOccasion = FALSE;
1591 else if(dir == DIR_UL)
1593 prbAlloc = &cell->schUlSlotInfo[slotTime.slot]->prbAlloc;
1595 /* Check if PRACH is also scheduled in this slot */
1596 checkOccasion = schCheckPrachOcc(cell, slotTime);
1599 reservedPrbStart = cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.msg1FreqStart;
1600 reservedPrbEnd = reservedPrbStart + (schCalcPrachNumRb(cell)) -1;
1605 DU_LOG("\nERROR --> SCH: Invalid Direction!");
1606 return (maxFreePRB);
1609 freePrbNode = prbAlloc->freePrbBlockList.first;
1612 freePrbBlock = (FreePrbBlock *)freePrbNode->node;
1614 /*For block with same numFreeBlocks, choose the one with HighestPRB range
1615 *Since FreeBLockList are arranged in Descending order of PRB range thus Skipping this block*/
1616 if(maxFreePRB >= freePrbBlock->numFreePrb)
1619 freePrbNode = freePrbNode->next;
1623 /* If Broadcast/Prach message is scheduled in this slot, then check if its PRBs belong to the current free block.
1624 * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */
1626 ((reservedPrbStart >= freePrbBlock->startPrb) && (reservedPrbStart <= freePrbBlock->endPrb)) && \
1627 ((reservedPrbEnd >= freePrbBlock->startPrb) && (reservedPrbEnd <= freePrbBlock->endPrb)))
1630 /* Implmentation is done such that highest-numbered free-RB is Checked first
1631 and freePRB in this block is greater than Max till now */
1632 if((freePrbBlock->endPrb > reservedPrbEnd) && ((freePrbBlock->endPrb - reservedPrbEnd) > maxFreePRB))
1634 /* If sufficient free PRBs are available above reserved message*/
1635 *startPrb = reservedPrbEnd + 1;
1636 maxFreePRB = (freePrbBlock->endPrb - reservedPrbEnd);
1638 /*Also check the other freeBlock (i.e. Above the reserved message) for MAX FREE PRB*/
1639 if((reservedPrbStart > freePrbBlock->startPrb) && ((reservedPrbStart - freePrbBlock->startPrb) > maxFreePRB))
1641 /* If free PRBs are available below reserved message*/
1642 *startPrb = freePrbBlock->startPrb;
1643 maxFreePRB = (reservedPrbStart - freePrbBlock->startPrb);
1648 if(maxFreePRB < freePrbBlock->numFreePrb)
1650 *startPrb = freePrbBlock->startPrb;
1651 maxFreePRB = freePrbBlock->numFreePrb;
1655 freePrbNode = freePrbNode->next;
1660 /*******************************************************************************
1662 * @brief This function is used to send Slice Cfg rsp to MAC
1666 * Function : SchSendSliceCfgRspToMac
1669 * function is used to send Slice Cfg rsp to MAC
1671 * @params[in] Pst *pst, SchSliceCfgRsp sliceCfgRsp
1675 * ********************************************************************************/
1676 void SchSendSliceCfgRspToMac(Inst inst, SchSliceCfgRsp sliceCfgRsp)
1680 memset(&rspPst, 0, sizeof(Pst));
1681 FILL_PST_SCH_TO_MAC(rspPst, inst);
1682 rspPst.event = EVENT_SLICE_CFG_RSP_TO_MAC;
1684 MacMessageRouter(&rspPst, (void *)&sliceCfgRsp);
1687 /*******************************************************************************
1689 * @brief fill slice configuration response
1693 * Function : fillSliceCfgRsp
1696 * fill slice configuration response
1698 * @params[in] SchCellCb, SchSliceCfgReq, SchSliceCfgRsp,uint8_t count
1704 * ********************************************************************************/
1705 uint8_t fillSliceCfgRsp(bool sliceRecfg, SchSliceCfg *storedSliceCfg, SchCellCb *cellCb, SchSliceCfgReq *schSliceCfgReq, SchSliceCfgRsp *schSliceCfgRsp, uint8_t *count)
1707 bool sliceFound = false;
1708 uint8_t cfgIdx = 0, sliceIdx = 0, plmnIdx = 0;
1710 schSliceCfgRsp->numSliceCfgRsp = schSliceCfgReq->numOfConfiguredSlice;
1711 SCH_ALLOC(schSliceCfgRsp->listOfSliceCfgRsp, schSliceCfgRsp->numSliceCfgRsp * sizeof(SliceRsp*));
1712 if(schSliceCfgRsp->listOfSliceCfgRsp == NULLP)
1714 DU_LOG("\nERROR --> SCH : Memory allocation failed at fillSliceCfgRsp");
1718 for(cfgIdx = 0; cfgIdx<schSliceCfgRsp->numSliceCfgRsp ; cfgIdx++)
1721 /* Here comparing the slice cfg request with the slice stored in cellCfg */
1722 if(sliceRecfg != true)
1724 for(plmnIdx = 0; plmnIdx < MAX_PLMN; plmnIdx++)
1726 for(sliceIdx = 0; sliceIdx<cellCb->cellCfg.plmnInfoList[plmnIdx].numSliceSupport; sliceIdx++)
1728 if(!memcmp(&schSliceCfgReq->listOfSlices[cfgIdx]->snssai, cellCb->cellCfg.plmnInfoList[plmnIdx].snssai[sliceIdx], sizeof(Snssai)))
1735 if(sliceFound == true)
1743 /* Here comparing the slice cfg request with the slice stored in SchDb */
1744 if(storedSliceCfg->listOfSlices)
1746 for(sliceIdx = 0; sliceIdx<storedSliceCfg->numOfSliceConfigured; sliceIdx++)
1748 if(!memcmp(&schSliceCfgReq->listOfSlices[cfgIdx]->snssai, &storedSliceCfg->listOfSlices[sliceIdx]->snssai,\
1759 SCH_ALLOC(schSliceCfgRsp->listOfSliceCfgRsp[cfgIdx], sizeof(SliceRsp));
1760 if(schSliceCfgRsp->listOfSliceCfgRsp[cfgIdx] == NULLP)
1762 DU_LOG("\nERROR --> SCH : Failed to allocate memory in fillSliceCfgRsp");
1767 schSliceCfgRsp->listOfSliceCfgRsp[cfgIdx]->snssai = schSliceCfgReq->listOfSlices[cfgIdx]->snssai;
1768 if(sliceFound == true)
1769 schSliceCfgRsp->listOfSliceCfgRsp[cfgIdx]->rsp = RSP_OK;
1772 schSliceCfgRsp->listOfSliceCfgRsp[cfgIdx]->rsp = RSP_NOK;
1773 schSliceCfgRsp->listOfSliceCfgRsp[cfgIdx]->cause = SLICE_NOT_FOUND;
1779 /*******************************************************************************
1781 * @brief This function is used to store the slice configuration Sch DB
1785 * Function : addSliceCfgInSchDb
1788 * function is used to store the slice configuration Sch DB
1790 * @params[in] SchSliceCfg *storeSliceCfg, SchSliceCfgReq *cfgReq,
1791 * SchSliceCfgRsp cfgRsp, uint8_t count
1797 * ********************************************************************************/
1798 uint8_t addSliceCfgInSchDb(SchSliceCfg *storeSliceCfg, SchSliceCfgReq *cfgReq, SchSliceCfgRsp cfgRsp, uint8_t count)
1800 uint8_t cfgIdx = 0, sliceIdx = 0;
1804 storeSliceCfg->numOfSliceConfigured = count;
1805 SCH_ALLOC(storeSliceCfg->listOfSlices, storeSliceCfg->numOfSliceConfigured * sizeof(SchRrmPolicyOfSlice*));
1806 if(storeSliceCfg->listOfSlices == NULLP)
1808 DU_LOG("\nERROR --> SCH : Failed to allocate memory in addSliceCfgInSchDb");
1812 for(cfgIdx = 0; cfgIdx<storeSliceCfg->numOfSliceConfigured; cfgIdx++)
1814 if(cfgRsp.listOfSliceCfgRsp[cfgIdx]->rsp == RSP_OK)
1816 SCH_ALLOC(storeSliceCfg->listOfSlices[sliceIdx], sizeof(SchRrmPolicyOfSlice));
1817 if(storeSliceCfg->listOfSlices[sliceIdx] == NULLP)
1819 DU_LOG("\nERROR --> SCH : Failed to allocate memory in addSliceCfgInSchDb");
1823 memcpy(&storeSliceCfg->listOfSlices[sliceIdx]->snssai, &cfgReq->listOfSlices[sliceIdx]->snssai, sizeof(Snssai));
1824 memcpy(&storeSliceCfg->listOfSlices[sliceIdx]->rrmPolicyRatioInfo, &cfgReq->listOfSlices[sliceIdx]->rrmPolicyRatioInfo,
1825 sizeof(SchRrmPolicyRatio));
1833 /*******************************************************************************
1835 * @brief This function is used to free the slice cfg and re cfg request pointer
1839 * Function : freeSchSliceCfgReq
1842 * function is used to free the slice cfg and re cfg request pointer
1844 * @params[in] Pst *pst, SchSliceCfgReq *schSliceCfgReq
1849 * ********************************************************************************/
1850 void freeSchSliceCfgReq(SchSliceCfgReq *sliceCfgReq)
1856 if(sliceCfgReq->numOfConfiguredSlice)
1858 for(cfgIdx = 0; cfgIdx<sliceCfgReq->numOfConfiguredSlice; cfgIdx++)
1860 if(sliceCfgReq->listOfSlices[cfgIdx])
1862 SCH_FREE(sliceCfgReq->listOfSlices[cfgIdx], sizeof(SchRrmPolicyOfSlice));
1865 SCH_FREE(sliceCfgReq->listOfSlices, sliceCfgReq->numOfConfiguredSlice * sizeof(SchRrmPolicyOfSlice*));
1867 SCH_FREE(sliceCfgReq, sizeof(SchSliceCfgReq));
1870 /*******************************************************************************
1872 * @brief This function is used to store the slice configuration Sch DB
1876 * Function : SchProcSliceCfgReq
1879 * function is used to store the slice configuration Sch DB
1881 * @params[in] Pst *pst, SchSliceCfgReq *schSliceCfgReq
1887 * ********************************************************************************/
1888 uint8_t SchProcSliceCfgReq(Pst *pst, SchSliceCfgReq *schSliceCfgReq)
1891 Inst inst = pst->dstInst - SCH_INST_START;
1892 SchSliceCfgRsp sliceCfgRsp;
1894 DU_LOG("\nINFO --> SCH : Received Slice Cfg request from MAC");
1897 if(schSliceCfgReq->listOfSlices)
1899 /* filling the slice configuration response of each slice */
1900 if(fillSliceCfgRsp(false, NULLP, schCb[inst].cells[0], schSliceCfgReq, &sliceCfgRsp, &count) != ROK)
1902 DU_LOG("\nERROR --> SCH : Failed to fill the slice cfg rsp");
1906 if(addSliceCfgInSchDb(&schCb[inst].sliceCfg, schSliceCfgReq, sliceCfgRsp, count) != ROK)
1908 DU_LOG("\nERROR --> SCH : Failed to add slice cfg in sch database");
1911 freeSchSliceCfgReq(schSliceCfgReq);
1912 SchSendSliceCfgRspToMac(inst, sliceCfgRsp);
1917 DU_LOG("\nERROR --> SCH : Received SchSliceCfgReq is NULL");
1922 /*******************************************************************************
1924 * @brief This function is used to store the slice reconfiguration Sch DB
1928 * Function : modifySliceCfgInSchDb
1931 * function is used to store the slice re configuration Sch DB
1933 * @params[in] Pst *pst, SchSliceCfgReq *schSliceCfgReq
1939 * ********************************************************************************/
1940 uint8_t modifySliceCfgInSchDb(SchSliceCfg *storeSliceCfg, SchSliceRecfgReq *recfgReq, SchSliceRecfgRsp recfgRsp, uint8_t count)
1942 uint8_t cfgIdx = 0, sliceIdx = 0;
1946 if(storeSliceCfg->listOfSlices == NULLP)
1948 DU_LOG("\nINFO --> SCH : Memory allocation failed in modifySliceCfgInSchDb");
1952 for(cfgIdx = 0; cfgIdx<recfgReq->numOfConfiguredSlice; cfgIdx++)
1954 if(recfgRsp.listOfSliceCfgRsp[cfgIdx]->rsp == RSP_OK)
1956 for(sliceIdx = 0; sliceIdx<storeSliceCfg->numOfSliceConfigured; sliceIdx++)
1958 if(!memcmp(&storeSliceCfg->listOfSlices[sliceIdx]->snssai, &recfgReq->listOfSlices[cfgIdx]->snssai, sizeof(Snssai)))
1960 memcpy(&storeSliceCfg->listOfSlices[sliceIdx]->rrmPolicyRatioInfo, &recfgReq->listOfSlices[cfgIdx]->rrmPolicyRatioInfo,
1961 sizeof(SchRrmPolicyRatio));
1968 freeSchSliceCfgReq(recfgReq);
1971 /*******************************************************************************
1973 * @brief This function is used to send Slice re Cfg rsp to MAC
1977 * Function : SchSendSliceRecfgRspToMac
1980 * function is used to send Slice re Cfg rsp to MAC
1982 * @params[in] Pst *pst, SchSliceRecfgRsp schSliceRecfgRsp
1986 * ********************************************************************************/
1987 void SchSendSliceRecfgRspToMac(Inst inst, SchSliceRecfgRsp schSliceRecfgRsp)
1991 memset(&rspPst, 0, sizeof(Pst));
1992 FILL_PST_SCH_TO_MAC(rspPst, inst);
1993 rspPst.event = EVENT_SLICE_RECFG_RSP_TO_MAC;
1995 MacMessageRouter(&rspPst, (void *)&schSliceRecfgRsp);
1997 /*******************************************************************************
1999 * @brief This function is used to store the slice reconfiguration Sch DB
2003 * Function : SchProcSliceRecfgReq
2006 * function is used to store the slice re configuration Sch DB
2008 * @params[in] Pst *pst, SchSliceRecfgReq *schSliceRecfgReq
2014 * ********************************************************************************/
2015 uint8_t SchProcSliceRecfgReq(Pst *pst, SchSliceRecfgReq *schSliceRecfgReq)
2018 Inst inst = pst->dstInst - SCH_INST_START;
2019 SchSliceRecfgRsp schSliceRecfgRsp;
2021 DU_LOG("\nINFO --> SCH : Received Slice ReCfg request from MAC");
2022 if(schSliceRecfgReq)
2024 if(schSliceRecfgReq->listOfSlices)
2026 /* filling the slice configuration response of each slice */
2027 if(fillSliceCfgRsp(true, &schCb[inst].sliceCfg, NULLP, schSliceRecfgReq, &schSliceRecfgRsp, &count) != ROK)
2029 DU_LOG("\nERROR --> SCH : Failed to fill sch slice cfg response");
2033 /* Modify the slice configuration stored in schCb */
2034 if(modifySliceCfgInSchDb(&schCb[inst].sliceCfg, schSliceRecfgReq, schSliceRecfgRsp, count) != ROK)
2036 DU_LOG("\nERROR --> SCH : Failed to modify slice cfg of SchDb");
2039 SchSendSliceRecfgRspToMac(inst, schSliceRecfgRsp);
2044 DU_LOG("\nERROR --> SCH : Received SchSliceRecfgReq is NULL");
2049 /****************************************************************************
2051 * @brief Stores the Paging Configuration from DU APP in CellCb
2055 * Function : schProcPagingParam
2058 * Process the Paging Configuration when FirstPDCCHMonitoring for
2059 * Paging Ocassion is not present.
2061 * As per 38.304 Sec 7.1,
2062 * "When firstPDCCH-MonitoringOccasionOfPO is present, the
2063 * starting PDCCH monitoring occasion number of (i_s + 1)th PO is the
2064 * (i_s + 1)th value of the firstPDCCHMonitoringOccasionOfPO
2065 * parameter; otherwise, it is equal to i_s * S."
2066 * "S = number of actual transmitted SSBs determined according
2067 * to ssb-PositionsInBurst in SIB1"
2069 * @params[in] SchCellCb *cell
2073 *************************************************************************/
2074 void schProcPagingCfg(SchCellCb *cell)
2076 SchPcchCfg *pageCfgRcvd = NULL;
2079 pageCfgRcvd = &(cell->cellCfg.dlCfgCommon.schPcchCfg);
2081 if(pageCfgRcvd->poPresent == TRUE)
2083 /*Fetching first Pdcch Monitoring Occasion for SFN (i_s + 1)th*/
2084 for(i_sIdx = 0; i_sIdx < pageCfgRcvd->numPO; i_sIdx++)
2086 cell->pageCb.pagMonOcc[i_sIdx].pagingOccSlot = pageCfgRcvd->pagingOcc[i_sIdx] / MAX_SYMB_PER_SLOT ;
2087 if ((pageCfgRcvd->pagingOcc[i_sIdx] % MAX_SYMB_PER_SLOT) != 0 )
2089 cell->pageCb.pagMonOcc[i_sIdx].pagingOccSlot++;
2092 cell->pageCb.pagMonOcc[i_sIdx].frameOffset = 0;
2098 schCfgPdcchMonOccOfPO(cell);
2102 /****************************************************************************
2104 * @brief Calculate PO if not present in Configuration
2108 * Function : schCfgPdcchMonOccOfPO
2110 * Functionality: In this function, PO are calculated i_s * S because
2111 * FirstPDCCHMonitoring_ForPO is not present.
2113 * @params[in] SchCellCb *cellCb
2117 *************************************************************************/
2118 void schCfgPdcchMonOccOfPO(SchCellCb *cell)
2120 uint8_t cnt = 0, incr = 1, i_sIdx = 0, frameOffSet = 0;
2121 uint8_t nsValue = cell->cellCfg.dlCfgCommon.schPcchCfg.numPO;
2122 uint8_t totalNumSsb = countSetBits(cell->cellCfg.ssbPosInBurst[0]);
2123 SlotTimingInfo tmpTimingInfo, pdcchTime;
2125 /*Starting with First Sfn and slot*/
2126 tmpTimingInfo.sfn = 0;
2127 tmpTimingInfo.slot = 0;
2129 pdcchTime = tmpTimingInfo;
2131 while(i_sIdx < nsValue)
2133 /*Increment frame Offset if PO falls on next SFN*/
2134 if(pdcchTime.sfn != tmpTimingInfo.sfn)
2138 pdcchTime = tmpTimingInfo;
2139 schIncrSlot(&(tmpTimingInfo), incr, cell->numSlots);
2143 cell->pageCb.pagMonOcc[i_sIdx].pagingOccSlot = pdcchTime.slot;
2144 cell->pageCb.pagMonOcc[i_sIdx].frameOffset = frameOffSet;
2150 if((cnt == totalNumSsb) && (i_sIdx < MAX_PO_PER_PF))
2152 cell->pageCb.pagMonOcc[i_sIdx].pagingOccSlot = pdcchTime.slot;
2153 cell->pageCb.pagMonOcc[i_sIdx].frameOffset = frameOffSet;
2161 /****************************************************************************
2163 * @brief Storing the paging information in SCH database
2167 * Function : schAddPagingIndtoList
2169 * Functionality: Storing the paging information in SCH database
2171 * @params[in] CmLListCp *storedPageList, CmLList *pageIndInfo
2173 * @return ROK - sucess
2176 *************************************************************************/
2177 uint8_t schAddPagingIndtoList(CmLListCp *storedPageList,void * pageIndInfo)
2179 CmLList *firstNodeOfList = NULLP;
2180 CmLList *currentNodeInfo = NULLP;
2181 SchPageInfo *tempNode = NULLP, *recvdNode = NULLP;
2183 recvdNode = (SchPageInfo*) pageIndInfo;
2184 CM_LLIST_FIRST_NODE(storedPageList,firstNodeOfList);
2186 SCH_ALLOC(currentNodeInfo, sizeof(CmLList));
2187 if(!currentNodeInfo)
2189 DU_LOG("\nERROR --> SCH : schAddPagingIndtoList() : Memory allocation failed");
2193 currentNodeInfo->node = (PTR)pageIndInfo;
2194 while(firstNodeOfList)
2196 tempNode = (SchPageInfo*)(firstNodeOfList->node);
2197 if ((recvdNode->pageTxTime.slot < tempNode->pageTxTime.slot))
2199 cmLListInsCrnt(storedPageList, currentNodeInfo);
2202 else if ((recvdNode->pageTxTime.slot == tempNode->pageTxTime.slot))
2204 DU_LOG("\nERROR --> SCH : schAddPagingIndtoList() : Slot[%d] is already present in the list", recvdNode->pageTxTime.slot);
2209 CM_LLIST_NEXT_NODE(storedPageList, firstNodeOfList);
2213 if(!firstNodeOfList)
2215 cmLListAdd2Tail(storedPageList, currentNodeInfo);
2217 DU_LOG("\nDEBUG --> SCH : Paging information is stored successfully for PF:%d, Slot:%d",\
2218 recvdNode->pageTxTime.sfn, recvdNode->pageTxTime.slot);
2222 /****************************************************************************
2224 * @brief Process paging indication at SCH recevied form MAC
2228 * Function : SchProcPagingInd
2230 * Functionality: Process paging indication at SCH recevied form MAC
2232 * @params[in] Pst *pst, SchPageInd *pageInd
2236 *************************************************************************/
2237 uint8_t SchProcPagingInd(Pst *pst, SchPageInd *pageInd)
2239 uint8_t ret = RFAILED;
2240 uint16_t cellIdx = 0;
2241 Inst inst = pst->dstInst - SCH_INST_START;
2242 SchCellCb *cellCb = NULLP;
2243 SchPageInfo *pageInfo = NULLP;
2247 DU_LOG("\nDEBUG --> SCH : Received paging indication from MAC for cellId[%d]",\
2251 for(cellIdx = 0; cellIdx < MAX_NUM_CELL; cellIdx++)
2253 if((schCb[inst].cells[cellIdx]) && (schCb[inst].cells[cellIdx]->cellId == pageInd->cellId))
2255 cellCb = schCb[inst].cells[cellIdx];
2261 if(pageInd->i_s > cellCb->cellCfg.dlCfgCommon.schPcchCfg.numPO)
2263 DU_LOG("\nERROR --> SCH : SchProcPagingInd(): i_s should not be greater than number of paging occasion");
2267 SCH_ALLOC(pageInfo, sizeof(SchPageInfo));
2270 pageInfo->pf = pageInd->pf;
2271 pageInfo->i_s = pageInd->i_s;
2272 pageInfo->pageTxTime.cellId = pageInd->cellId;
2273 pageInfo->pageTxTime.sfn = (pageInd->pf + cellCb->pageCb.pagMonOcc[pageInd->i_s].frameOffset) % MAX_SFN;
2274 pageInfo->pageTxTime.slot = cellCb->pageCb.pagMonOcc[pageInd->i_s].pagingOccSlot;
2275 pageInfo->mcs = DEFAULT_MCS;
2276 pageInfo->msgLen = pageInd->pduLen;
2277 SCH_ALLOC(pageInfo->pagePdu, pageInfo->msgLen);
2278 if(!pageInfo->pagePdu)
2280 DU_LOG("\nERROR --> SCH : SchProcPagingInd(): Failed to allocate memory");
2284 memcpy(pageInfo->pagePdu, pageInd->pagePdu, pageInfo->msgLen);
2285 ret = schAddPagingIndtoList(&cellCb->pageCb.pageIndInfoRecord[pageInfo->pageTxTime.sfn], pageInfo);
2288 DU_LOG("\nERROR --> SCH : SchProcPagingInd(): Failed to store paging record");
2294 DU_LOG("\nERROR --> SCH : SchProcPagingInd(): Failed to allocate memory");
2300 DU_LOG("\nERROR --> SCH : Cell ID [%d] not found", pageInd->cellId);
2302 SCH_FREE(pageInd->pagePdu, pageInd->pduLen);
2303 SCH_FREE(pageInd, sizeof(SchPageInd));
2307 DU_LOG("\nERROR --> SCH : SchProcPagingInd(): Received null pointer");
2313 /***********************************************************
2315 * Func : SchFillCfmPst
2318 * Desc : Fills the Confirmation Post Structure cfmPst using the reqPst
2319 * and the cfm->hdr.response.
2326 * File : rg_sch_lmm.c
2328 **********************************************************/
2338 inst = (reqPst->dstInst - SCH_INST_START);
2340 cfmPst->srcEnt = ENTMAC;
2341 cfmPst->srcInst = (Inst) 1;
2342 cfmPst->srcProcId = schCb[inst].schInit.procId;
2343 cfmPst->dstEnt = ENTMAC;
2344 cfmPst->dstInst = (Inst) 0;
2345 cfmPst->dstProcId = reqPst->srcProcId;
2347 cfmPst->selector = cfm->hdr.response.selector;
2348 cfmPst->region = cfm->hdr.response.mem.region;
2349 cfmPst->pool = cfm->hdr.response.mem.pool;
2354 /**********************************************************************
2356 **********************************************************************/