src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "nr5g_fapi_internal.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 /* Global variables */
  51 LwrMacCb lwrMacCb;
  52
  53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  54 void fapiMacConfigRsp(uint16_t cellId);
  55 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
  56 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
  57 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
  58 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
  59
  60 void lwrMacLayerInit(Region region, Pool pool)
  61 {
  62 #ifdef INTEL_WLS_MEM
  63    uint8_t idx;
  64 #endif
  65
  66    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  67    lwrMacCb.region = region;
  68    lwrMacCb.pool = pool;
  69    lwrMacCb.clCfgDone = TRUE;
  70    lwrMacCb.numCell = 0;
  71    lwrMacCb.phyState = PHY_STATE_IDLE;
  72
  73 #ifdef INTEL_WLS_MEM
  74    /* Initializing WLS free mem list */
  75    lwrMacCb.phySlotIndCntr = 1;
  76    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  77    {
  78       cmLListInit(&wlsBlockToFreeList[idx]);
  79    }
  80 #endif
  81 }
  82
  83 /*******************************************************************
  84  *
  85  * @brief Handles Invalid Request Event
  86  *
  87  * @details
  88  *
  89  *    Function : lwr_mac_procInvalidEvt
  90  *
  91  *    Functionality:
  92  *         - Displays the PHY state when the invalid event occurs
  93  *
  94  * @params[in]
  95  * @return ROK     - success
  96  *         RFAILED - failure
  97  *
  98  * ****************************************************************/
  99 uint8_t lwr_mac_procInvalidEvt(void *msg)
 100 {
 101 #ifdef CALL_FLOW_DEBUG_LOG
 102    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
 103 #endif
 104    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 105    return ROK;
 106 }
 107
 108 #ifdef INTEL_FAPI
 109 /*******************************************************************
 110  *
 111  * @brief Fills FAPI message header
 112  *
 113  * @details
 114  *
 115  *    Function : fillMsgHeader
 116  *
 117  *    Functionality:
 118  *         -Fills FAPI message header
 119  *
 120  * @params[in] Pointer to header
 121  *             Number of messages
 122  *             Messae Type
 123  *             Length of message
 124  * @return void
 125  *
 126  * ****************************************************************/
 127 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 128 {
 129    memset(hdr, 0, sizeof(fapi_msg_t));
 130    hdr->msg_id = msgType;
 131    hdr->length = msgLen;
 132 }
 133
 134 /*******************************************************************
 135  *
 136  * @brief Fills FAPI Config Request message header
 137  *
 138  * @details
 139  *
 140  *    Function : fillTlvs
 141  *
 142  *    Functionality:
 143  *         -Fills FAPI Config Request message header
 144  *
 145  * @params[in] Pointer to TLV
 146  *             Tag
 147  *             Length
 148  *             Value
 149  *             MsgLen
 150  * @return void
 151  *
 152  * ****************************************************************/
 153 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 154       uint32_t value, uint32_t *msgLen)
 155 {
 156    tlv->tl.tag    = tag;
 157    tlv->tl.length = length;
 158    tlv->value     = value;
 159    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 160 }
 161 /*******************************************************************
 162  *
 163  * @brief fills the cyclic prefix by comparing the bitmask
 164  *
 165  * @details
 166  *
 167  *    Function : fillCyclicPrefix
 168  *
 169  *    Functionality:
 170  *         -checks the value with the bitmask and
 171  *          fills the cellPtr's cyclic prefix.
 172  *
 173  * @params[in] Pointer to ClCellParam
 174  *             Value to be compared
 175  * @return void
 176  *
 177  ********************************************************************/
 178 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 179 {
 180    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 181    {
 182       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 183    }
 184    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 185    {
 186       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 187    }
 188    else
 189    {
 190       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 191    }
 192 }
 193
 194 /*******************************************************************
 195  *
 196  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 197  *
 198  * @details
 199  *
 200  *    Function : fillSubcarrierSpaceDl
 201  *
 202  *    Functionality:
 203  *         -checks the value with the bitmask and
 204  *          fills the cellPtr's subcarrier spacing in DL
 205  *
 206  * @params[in] Pointer to ClCellParam
 207  *             Value to be compared
 208  * @return void
 209  *
 210  * ****************************************************************/
 211
 212 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 213 {
 214    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 215    {
 216       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 217    }
 218    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 219    {
 220       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 221    }
 222    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 223    {
 224       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 225    }
 226    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 227    {
 228       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 229    }
 230    else
 231    {
 232       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 233    }
 234 }
 235
 236 /*******************************************************************
 237  *
 238  * @brief fills the downlink bandwidth by comparing the bitmask
 239  *
 240  * @details
 241  *
 242  *    Function : fillBandwidthDl
 243  *
 244  *    Functionality:
 245  *         -checks the value with the bitmask and
 246  *         -fills the cellPtr's DL Bandwidth
 247  *
 248  * @params[in] Pointer to ClCellParam
 249  *             Value to be compared
 250  * @return void
 251  *
 252  * ****************************************************************/
 253
 254 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 255 {
 256    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 257    {
 258       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 259    }
 260    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 261    {
 262       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 263    }
 264    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 265    {
 266       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 267    }
 268    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 269    {
 270       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 271    }
 272    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 273    {
 274       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 275    }
 276    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 277    {
 278       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 279    }
 280    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 281    {
 282       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 283    }
 284    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 285    {
 286       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 287    }
 288    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 289    {
 290       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 291    }
 292    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 293    {
 294       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 295    }
 296    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 297    {
 298       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 299    }
 300    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 301    {
 302       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 303    }
 304    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 305    {
 306       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 307    }
 308    else
 309    {
 310       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 311    }
 312 }
 313
 314 /*******************************************************************
 315  *
 316  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 317  *
 318  * @details
 319  *
 320  *    Function : fillSubcarrierSpaceUl
 321  *
 322  *    Functionality:
 323  *         -checks the value with the bitmask and
 324  *         -fills cellPtr's subcarrier spacing in UL
 325  *
 326  * @params[in] Pointer to ClCellParam
 327  *             Value to be compared
 328  * @return void
 329  *
 330  * ****************************************************************/
 331
 332 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 333 {
 334    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 335    {
 336       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 337    }
 338    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 339    {
 340       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 341    }
 342    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 343    {
 344       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 345    }
 346    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 347    {
 348       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 349    }
 350    else
 351    {
 352       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 353    }
 354 }
 355
 356 /*******************************************************************
 357  *
 358  * @brief fills the uplink bandwidth by comparing the bitmask
 359  *
 360  * @details
 361  *
 362  *    Function : fillBandwidthUl
 363  *
 364  *    Functionality:
 365  *         -checks the value with the bitmask and
 366  *          fills the cellPtr's UL Bandwidth
 367  *
 368  *
 369  *
 370  * @params[in] Pointer to ClCellParam
 371  *             Value to be compared
 372  * @return void
 373  *
 374  *
 375  * ****************************************************************/
 376
 377 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 378 {
 379    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 380    {
 381       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 382    }
 383    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 384    {
 385       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 386    }
 387    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 388    {
 389       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 390    }
 391    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 392    {
 393       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 394    }
 395    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 396    {
 397       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 398    }
 399    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 400    {
 401       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 402    }
 403    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 404    {
 405       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 406    }
 407    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 408    {
 409       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 410    }
 411    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 412    {
 413       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 414    }
 415    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 416    {
 417       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 418    }
 419    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 420    {
 421       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 422    }
 423    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 424    {
 425       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 426    }
 427    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 428    {
 429       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 430    }
 431    else
 432    {
 433       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 434    }
 435 }
 436 /*******************************************************************
 437  *
 438  * @brief fills the CCE maping by comparing the bitmask
 439  *
 440  * @details
 441  *
 442  *    Function : fillCCEmaping
 443  *
 444  *    Functionality:
 445  *         -checks the value with the bitmask and
 446  *          fills the cellPtr's CCE Mapping Type
 447  *
 448  *
 449  * @params[in] Pointer to ClCellParam
 450  *             Value to be compared
 451  * @return void
 452  *
 453  * ****************************************************************/
 454
 455 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 456 {
 457    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 458    {
 459       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 460    }
 461    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 462    {
 463       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 464    }
 465    else
 466    {
 467       (*cellPtr)->cceMappingType = INVALID_VALUE;
 468    }
 469 }
 470
 471 /*******************************************************************
 472  *
 473  * @brief fills the PUCCH format by comparing the bitmask
 474  *
 475  * @details
 476  *
 477  *    Function : fillPucchFormat
 478  *
 479  *    Functionality:
 480  *         -checks the value with the bitmask and
 481  *          fills the cellPtr's pucch format
 482  *
 483  *
 484  * @params[in] Pointer to ClCellParam
 485  *             Value to be compared
 486  * @return void
 487  *
 488  * ****************************************************************/
 489
 490 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 491 {
 492    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 493    {
 494       (*cellPtr)->pucchFormats    = FORMAT_0;
 495    }
 496    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 497    {
 498       (*cellPtr)->pucchFormats    = FORMAT_1;
 499    }
 500    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 501    {
 502       (*cellPtr)->pucchFormats    = FORMAT_2;
 503    }
 504    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 505    {
 506       (*cellPtr)->pucchFormats    = FORMAT_3;
 507    }
 508    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 509    {
 510       (*cellPtr)->pucchFormats    = FORMAT_4;
 511    }
 512    else
 513    {
 514       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 515    }
 516 }
 517
 518 /*******************************************************************
 519  *
 520  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 521  *
 522  * @details
 523  *
 524  *    Function : fillPdschMappingType
 525  *
 526  *    Functionality:
 527  *         -checks the value with the bitmask and
 528  *          fills the cellPtr's PDSCH MappingType
 529  *
 530  * @params[in] Pointer to ClCellParam
 531  *             Value to be compared
 532  * @return void
 533  *
 534  * ****************************************************************/
 535
 536 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 537 {
 538    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 539    {
 540       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 541    }
 542    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 543    {
 544       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 545    }
 546    else
 547    {
 548       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 549    }
 550 }
 551
 552 /*******************************************************************
 553  *
 554  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 555  *
 556  * @details
 557  *
 558  *    Function : fillPdschAllocationType
 559  *
 560  *    Functionality:
 561  *         -checks the value with the bitmask and
 562  *          fills the cellPtr's PDSCH AllocationType
 563  *
 564  * @params[in] Pointer to ClCellParam
 565  *             Value to be compared
 566  * @return void
 567  *
 568  * ****************************************************************/
 569
 570 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 571 {
 572    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 573    {
 574       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 575    }
 576    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 577    {
 578       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 579    }
 580    else
 581    {
 582       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 583    }
 584 }
 585
 586 /*******************************************************************
 587  *
 588  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 589  *
 590  * @details
 591  *
 592  *    Function : fillPrbMappingType
 593  *
 594  *    Functionality:
 595  *         -checks the value with the bitmask and
 596  *          fills the cellPtr's PRB Mapping Type
 597  *
 598  * @params[in] Pointer to ClCellParam
 599  *             Value to be compared
 600  * @return void
 601  *
 602  ******************************************************************/
 603 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 604 {
 605    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 606    {
 607       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 608    }
 609    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 610    {
 611       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 612    }
 613    else
 614    {
 615       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 616    }
 617 }
 618
 619 /*******************************************************************
 620  *
 621  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 622  *
 623  * @details
 624  *
 625  *    Function : fillPdschDmrsConfigType
 626  *
 627  *    Functionality:
 628  *         -checks the value with the bitmask and
 629  *          fills the cellPtr's DmrsConfig Type
 630  *
 631  * @params[in] Pointer to ClCellParam
 632  *             Value to be compared
 633  * @return void
 634  *
 635  ******************************************************************/
 636
 637 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 638 {
 639    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 640    {
 641       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 642    }
 643    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 644    {
 645       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 646    }
 647    else
 648    {
 649       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 650    }
 651 }
 652
 653 /*******************************************************************
 654  *
 655  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 656  *
 657  * @details
 658  *
 659  *    Function : fillPdschDmrsLength
 660  *
 661  *    Functionality:
 662  *         -checks the value with the bitmask and
 663  *          fills the cellPtr's PdschDmrsLength
 664  *
 665  * @params[in] Pointer to ClCellParam
 666  *             Value to be compared
 667  * @return void
 668  *
 669  ******************************************************************/
 670 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 671 {
 672    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 673    {
 674       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 675    }
 676    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 677    {
 678       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 679    }
 680    else
 681    {
 682       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 683    }
 684 }
 685
 686 /*******************************************************************
 687  *
 688  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 689  *
 690  * @details
 691  *
 692  *    Function : fillPdschDmrsAddPos
 693  *
 694  *    Functionality:
 695  *         -checks the value with the bitmask and
 696  *          fills the cellPtr's Pdsch DmrsAddPos
 697  *
 698  * @params[in] Pointer to ClCellParam
 699  *             Value to be compared
 700  * @return void
 701  *
 702  ******************************************************************/
 703
 704 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 705 {
 706    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 707    {
 708       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 709    }
 710    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 711    {
 712       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 713    }
 714    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 715    {
 716       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 717    }
 718    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 719    {
 720       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 721    }
 722    else
 723    {
 724       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 725    }
 726 }
 727
 728 /*******************************************************************
 729  *
 730  * @brief fills the Modulation Order in DL by comparing the bitmask
 731  *
 732  * @details
 733  *
 734  *    Function : fillModulationOrderDl
 735  *
 736  *    Functionality:
 737  *         -checks the value with the bitmask and
 738  *          fills the cellPtr's ModulationOrder in DL.
 739  *
 740  * @params[in] Pointer to ClCellParam
 741  *             Value to be compared
 742  * @return void
 743  *
 744  ******************************************************************/
 745 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 746 {
 747    if(value == 0 )
 748    {
 749       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 750    }
 751    else if(value == 1)
 752    {
 753       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 754    }
 755    else if(value == 2)
 756    {
 757       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 758    }
 759    else if(value == 3)
 760    {
 761       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 762    }
 763    else
 764    {
 765       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 766    }
 767 }
 768
 769 /*******************************************************************
 770  *
 771  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 772  *
 773  * @details
 774  *
 775  *    Function : fillPuschDmrsConfigType
 776  *
 777  *    Functionality:
 778  *         -checks the value with the bitmask and
 779  *          fills the cellPtr's PUSCH DmrsConfigType
 780  *
 781  * @params[in] Pointer to ClCellParam
 782  *             Value to be compared
 783  * @return void
 784  *
 785  ******************************************************************/
 786
 787 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 788 {
 789    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 790    {
 791       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 792    }
 793    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 794    {
 795       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 796    }
 797    else
 798    {
 799       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 800    }
 801 }
 802
 803 /*******************************************************************
 804  *
 805  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 806  *
 807  * @details
 808  *
 809  *    Function : fillPuschDmrsLength
 810  *
 811  *    Functionality:
 812  *         -checks the value with the bitmask and
 813  *          fills the cellPtr's PUSCH DmrsLength
 814  *
 815  * @params[in] Pointer to ClCellParam
 816  *             Value to be compared
 817  * @return void
 818  *
 819  ******************************************************************/
 820
 821 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 822 {
 823    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 824    {
 825       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 826    }
 827    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 828    {
 829       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 830    }
 831    else
 832    {
 833       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 834    }
 835 }
 836
 837 /*******************************************************************
 838  *
 839  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 840  *
 841  * @details
 842  *
 843  *    Function : fillPuschDmrsAddPos
 844  *
 845  *    Functionality:
 846  *         -checks the value with the bitmask and
 847  *          fills the cellPtr's PUSCH DmrsAddPos
 848  *
 849  * @params[in] Pointer to ClCellParam
 850  *             Value to be compared
 851  * @return void
 852  *
 853  ******************************************************************/
 854
 855 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 856 {
 857    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 858    {
 859       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 860    }
 861    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 862    {
 863       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 864    }
 865    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 866    {
 867       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 868    }
 869    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 870    {
 871       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 872    }
 873    else
 874    {
 875       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 876    }
 877 }
 878
 879 /*******************************************************************
 880  *
 881  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 882  *
 883  * @details
 884  *
 885  *    Function : fillPuschMappingType
 886  *
 887  *    Functionality:
 888  *         -checks the value with the bitmask and
 889  *          fills the cellPtr's PUSCH MappingType
 890  *
 891  * @params[in] Pointer to ClCellParam
 892  *             Value to be compared
 893  * @return void
 894  *
 895  ******************************************************************/
 896
 897 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 898 {
 899    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 900    {
 901       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 902    }
 903    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 904    {
 905       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 906    }
 907    else
 908    {
 909       (*cellPtr)->puschMappingType = INVALID_VALUE;
 910    }
 911 }
 912
 913 /*******************************************************************
 914  *
 915  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 916  *
 917  * @details
 918  *
 919  *    Function : fillPuschAllocationType
 920  *
 921  *    Functionality:
 922  *         -checks the value with the bitmask and
 923  *          fills the cellPtr's PUSCH AllocationType
 924  *
 925  * @params[in] Pointer to ClCellParam
 926  *             Value to be compared
 927  * @return void
 928  *
 929  ******************************************************************/
 930
 931 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 932 {
 933    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 934    {
 935       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 936    }
 937    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 938    {
 939       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 940    }
 941    else
 942    {
 943       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 944    }
 945 }
 946
 947 /*******************************************************************
 948  *
 949  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 950  *
 951  * @details
 952  *
 953  *    Function : fillPuschPrbMappingType
 954  *
 955  *    Functionality:
 956  *         -checks the value with the bitmask and
 957  *          fills the cellPtr's PUSCH PRB MApping Type
 958  *
 959  * @params[in] Pointer to ClCellParam
 960  *             Value to be compared
 961  * @return void
 962  *
 963  ******************************************************************/
 964
 965 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 966 {
 967    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 968    {
 969       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 970    }
 971    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 972    {
 973       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 974    }
 975    else
 976    {
 977       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 978    }
 979 }
 980
 981 /*******************************************************************
 982  *
 983  * @brief fills the Modulation Order in Ul by comparing the bitmask
 984  *
 985  * @details
 986  *
 987  *    Function : fillModulationOrderUl
 988  *
 989  *    Functionality:
 990  *         -checks the value with the bitmask and
 991  *          fills the cellPtr's Modualtsion Order in UL.
 992  *
 993  * @params[in] Pointer to ClCellParam
 994  *             Value to be compared
 995  * @return void
 996  *
 997  ******************************************************************/
 998
 999 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1000 {
1001    if(value == 0)
1002    {
1003       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1004    }
1005    else if(value == 1)
1006    {
1007       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1008    }
1009    else if(value == 2)
1010    {
1011       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1012    }
1013    else if(value == 3)
1014    {
1015       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1016    }
1017    else
1018    {
1019       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1020    }
1021 }
1022
1023 /*******************************************************************
1024  *
1025  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1026  *
1027  * @details
1028  *
1029  *    Function : fillPuschAggregationFactor
1030  *
1031  *    Functionality:
1032  *         -checks the value with the bitmask and
1033  *          fills the cellPtr's PUSCH Aggregation Factor
1034  *
1035  * @params[in] Pointer to ClCellParam
1036  *             Value to be compared
1037  * @return void
1038  *
1039  ******************************************************************/
1040
1041 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1042 {
1043    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1044    {
1045       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1046    }
1047    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1048    {
1049       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1050    }
1051    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1052    {
1053       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1054    }
1055    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1056    {
1057       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1058    }
1059    else
1060    {
1061       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1062    }
1063 }
1064
1065 /*******************************************************************
1066  *
1067  * @brief fills the PRACH Long Format by comparing the bitmask
1068  *
1069  * @details
1070  *
1071  *    Function : fillPrachLongFormat
1072  *
1073  *    Functionality:
1074  *         -checks the value with the bitmask and
1075  *          fills the cellPtr's PRACH Long Format
1076  *
1077  * @params[in] Pointer to ClCellParam
1078  *             Value to be compared
1079  * @return void
1080  *
1081  ******************************************************************/
1082
1083 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1084 {
1085    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1086    {
1087       (*cellPtr)->prachLongFormats    = FORMAT_0;
1088    }
1089    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1090    {
1091       (*cellPtr)->prachLongFormats    = FORMAT_1;
1092    }
1093    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1094    {
1095       (*cellPtr)->prachLongFormats    = FORMAT_2;
1096    }
1097    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1098    {
1099       (*cellPtr)->prachLongFormats    = FORMAT_3;
1100    }
1101    else
1102    {
1103       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1104    }
1105 }
1106
1107 /*******************************************************************
1108  *
1109  * @brief fills the PRACH Short Format by comparing the bitmask
1110  *
1111  * @details
1112  *
1113  *    Function : fillPrachShortFormat
1114  *
1115  *    Functionality:
1116  *         -checks the value with the bitmask and
1117  *          fills the cellPtr's PRACH ShortFormat
1118  *
1119  * @params[in] Pointer to ClCellParam
1120  *             Value to be compared
1121  * @return void
1122  *
1123  ******************************************************************/
1124
1125 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1126 {
1127    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1128    {
1129       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1130    }
1131    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1132    {
1133       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1134    }
1135    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1136    {
1137       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1138    }
1139    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1140    {
1141       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1142    }
1143    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1144    {
1145       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1146    }
1147    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1148    {
1149       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1150    }
1151    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1152    {
1153       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1154    }
1155    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1156    {
1157       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1158    }
1159    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1160    {
1161       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1162    }
1163    else
1164    {
1165       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1166    }
1167 }
1168
1169 /*******************************************************************
1170  *
1171  * @brief fills the Fd Occasions Type by comparing the bitmask
1172  *
1173  * @details
1174  *
1175  *    Function : fillFdOccasions
1176  *
1177  *    Functionality:
1178  *         -checks the value with the bitmask and
1179  *          fills the cellPtr's Fd Occasions
1180  *
1181  * @params[in] Pointer to ClCellParam
1182  *             Value to be compared
1183  * @return void
1184  *
1185  ******************************************************************/
1186
1187 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1188 {
1189    if(value == 0)
1190    {
1191       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1192    }
1193    else if(value == 1)
1194    {
1195       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1196    }
1197    else if(value == 3)
1198    {
1199       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1200    }
1201    else if(value == 4)
1202    {
1203       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1204    }
1205    else
1206    {
1207       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1208    }
1209 }
1210
1211 /*******************************************************************
1212  *
1213  * @brief fills the RSSI Measurement by comparing the bitmask
1214  *
1215  * @details
1216  *
1217  *    Function : fillRssiMeas
1218  *
1219  *    Functionality:
1220  *         -checks the value with the bitmask and
1221  *          fills the cellPtr's RSSI Measurement report
1222  *
1223  * @params[in] Pointer to ClCellParam
1224  *             Value to be compared
1225  * @return void
1226  *
1227  ******************************************************************/
1228
1229 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1230 {
1231    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1232    {
1233       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1234    }
1235    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1236    {
1237       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1238    }
1239    else
1240    {
1241       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1242    }
1243 }
1244
1245 /*******************************************************************
1246  *
1247  * @brief Returns the TLVs value
1248  *
1249  * @details
1250  *
1251  *    Function : getParamValue
1252  *
1253  *    Functionality:
1254  *         -return TLVs value
1255  *
1256  * @params[in]
1257  * @return ROK     - temp
1258  *         RFAILED - failure
1259  *
1260  * ****************************************************************/
1261
1262 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1263 {
1264    void *posPtr;
1265    posPtr   = &tlv->tl.tag;
1266    posPtr   += sizeof(tlv->tl.tag);
1267    posPtr   += sizeof(tlv->tl.length);
1268    /*TO DO: malloc to SSI memory */
1269    if(type == FAPI_UINT_8)
1270    {
1271       return(*(uint8_t *)posPtr);
1272    }
1273    else if(type == FAPI_UINT_16)
1274    {
1275       return(*(uint16_t *)posPtr);
1276    }
1277    else if(type == FAPI_UINT_32)
1278    {
1279       return(*(uint32_t *)posPtr);
1280    }
1281    else
1282    {
1283       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1284       return RFAILED;
1285    }
1286 }
1287 #endif /* FAPI */
1288
1289 /*******************************************************************
1290  *
1291  * @brief Modifes the received mibPdu to uint32 bit
1292  *        and stores it in MacCellCfg
1293  *
1294  * @details
1295  *
1296  *    Function : setMibPdu
1297  *
1298  *    Functionality:
1299  *         -Sets the MibPdu
1300  *
1301  * @params[in] Pointer to mibPdu
1302  *             pointer to modified value
1303  ******************************************************************/
1304 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1305 {
1306    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1307    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1308    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1309 }
1310
1311 /*******************************************************************
1312  *
1313  * @brief Sends FAPI Param req to PHY
1314  *
1315  * @details
1316  *
1317  *    Function : lwr_mac_procParamReqEvt
1318  *
1319  *    Functionality:
1320  *         -Sends FAPI Param req to PHY
1321  *
1322  * @params[in]
1323  * @return ROK     - success
1324  *         RFAILED - failure
1325  *
1326  * ****************************************************************/
1327
1328 uint8_t lwr_mac_procParamReqEvt(void *msg)
1329 {
1330 #ifdef INTEL_FAPI
1331 #ifdef CALL_FLOW_DEBUG_LOG
1332    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1333 #endif
1334
1335    /* startGuardTimer(); */
1336    fapi_param_req_t         *paramReq = NULL;
1337    fapi_msg_header_t        *msgHeader;
1338    p_fapi_api_queue_elem_t  paramReqElem;
1339    p_fapi_api_queue_elem_t  headerElem;
1340
1341    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1342    if(paramReq != NULL)
1343    {
1344       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1345          sizeof(fapi_tx_data_req_t));
1346       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1347       memset(paramReq, 0, sizeof(fapi_param_req_t));
1348       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1349
1350       /* Fill message header */
1351       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1352       if(!headerElem)
1353       {
1354          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1355          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1356          return RFAILED;
1357       }
1358       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1359          sizeof(fapi_msg_header_t));
1360       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1361       msgHeader->num_msg = 1;
1362       msgHeader->handle = 0;
1363
1364       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1365       LwrMacSendToL1(headerElem);
1366    }
1367    else
1368    {
1369       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1370       return RFAILED;
1371    }
1372 #endif
1373    return ROK;
1374 }
1375
1376 /*******************************************************************
1377  *
1378  * @brief Sends FAPI Param Response to MAC via PHY
1379  *
1380  * @details
1381  *
1382  *    Function : lwr_mac_procParamRspEvt
1383  *
1384  *    Functionality:
1385  *         -Sends FAPI Param rsp to MAC via PHY
1386  *
1387  * @params[in]
1388  * @return ROK     - success
1389  *         RFAILED - failure
1390  *
1391  * ****************************************************************/
1392
1393 uint8_t lwr_mac_procParamRspEvt(void *msg)
1394 {
1395 #ifdef INTEL_FAPI
1396    /* stopGuardTimer(); */
1397    uint8_t index;
1398    uint32_t encodedVal;
1399    fapi_param_resp_t *paramRsp;
1400    ClCellParam *cellParam = NULLP;
1401
1402    paramRsp = (fapi_param_resp_t *)msg;
1403    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1404
1405    if(paramRsp != NULLP)
1406    {
1407       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1408       if(cellParam != NULLP)
1409       {
1410          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1411          if(paramRsp->error_code == MSG_OK)
1412          {
1413             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1414             {
1415                switch(paramRsp->tlvs[index].tl.tag)
1416                {
1417                   case FAPI_RELEASE_CAPABILITY_TAG:
1418                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1419                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1420                      {
1421                         cellParam->releaseCapability = RELEASE_15;
1422                      }
1423                      break;
1424
1425                   case FAPI_PHY_STATE_TAG:
1426                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1427                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1428                      {
1429                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1430                         return RFAILED;
1431                      }
1432                      break;
1433
1434                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1435                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1436                      if(encodedVal != RFAILED && encodedVal != 0)
1437                      {
1438                         cellParam->skipBlankDlConfig = SUPPORTED;
1439                      }
1440                      else
1441                      {
1442                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1443                      }
1444                      break;
1445
1446                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1447                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1448                      if(encodedVal != RFAILED && encodedVal != 0)
1449                      {
1450                         cellParam->skipBlankUlConfig = SUPPORTED;
1451                      }
1452                      else
1453                      {
1454                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1455                      }
1456                      break;
1457
1458                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1459                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1460                      break;
1461
1462                   case FAPI_CYCLIC_PREFIX_TAG:
1463                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1464                      if(encodedVal != RFAILED)
1465                      {
1466                         fillCyclicPrefix(encodedVal, &cellParam);
1467                      }
1468                      break;
1469
1470                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1471                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1472                      if(encodedVal != RFAILED)
1473                      {
1474                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1475                      }
1476                      break;
1477
1478                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1479                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1480                      if(encodedVal != RFAILED)
1481                      {
1482                         fillBandwidthDl(encodedVal, &cellParam);
1483                      }
1484                      break;
1485
1486                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1487                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1488                      if(encodedVal != RFAILED)
1489                      {
1490                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1491                      }
1492                      break;
1493
1494                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1495                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1496                      if(encodedVal != RFAILED)
1497                      {
1498                         fillBandwidthUl(encodedVal, &cellParam);
1499                      }
1500                      break;
1501
1502                   case FAPI_CCE_MAPPING_TYPE_TAG:
1503                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1504                      if(encodedVal != RFAILED)
1505                      {
1506                         fillCCEmaping(encodedVal, &cellParam);
1507                      }
1508                      break;
1509
1510                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1511                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1512                      if(encodedVal != RFAILED && encodedVal != 0)
1513                      {
1514                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1515                      }
1516                      else
1517                      {
1518                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1519                      }
1520                      break;
1521
1522                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1523                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1524                      if(encodedVal != RFAILED && encodedVal != 0)
1525                      {
1526                         cellParam->precoderGranularityCoreset = SUPPORTED;
1527                      }
1528                      else
1529                      {
1530                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1531                      }
1532                      break;
1533
1534                   case FAPI_PDCCH_MU_MIMO_TAG:
1535                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1536                      if(encodedVal != RFAILED && encodedVal != 0)
1537                      {
1538                         cellParam->pdcchMuMimo = SUPPORTED;
1539                      }
1540                      else
1541                      {
1542                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1543                      }
1544                      break;
1545
1546                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1547                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1548                      if(encodedVal != RFAILED && encodedVal != 0)
1549                      {
1550                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1551                      }
1552                      else
1553                      {
1554                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1555                      }
1556                      break;
1557
1558                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1559                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1560                      break;
1561
1562                   case FAPI_PUCCH_FORMATS_TAG:
1563                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1564                      if(encodedVal != RFAILED)
1565                      {
1566                         fillPucchFormat(encodedVal, &cellParam);
1567                      }
1568                      break;
1569
1570                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1571                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1572                      break;
1573
1574                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1575                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1576                      if(encodedVal != RFAILED)
1577                      {
1578                         fillPdschMappingType(encodedVal, &cellParam);
1579                      }
1580                      break;
1581
1582                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1583                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1584                      if(encodedVal != RFAILED)
1585                      {
1586                         fillPdschAllocationType(encodedVal, &cellParam);
1587                      }
1588                      break;
1589
1590                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1591                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1592                      if(encodedVal != RFAILED)
1593                      {
1594                         fillPrbMappingType(encodedVal, &cellParam);
1595                      }
1596                      break;
1597
1598                   case FAPI_PDSCH_CBG_TAG:
1599                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1600                      if(encodedVal != RFAILED && encodedVal != 0)
1601                      {
1602                         cellParam->pdschCbg = SUPPORTED;
1603                      }
1604                      else
1605                      {
1606                         cellParam->pdschCbg = NOT_SUPPORTED;
1607                      }
1608                      break;
1609
1610                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1611                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1612                      if(encodedVal != RFAILED)
1613                      {
1614                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1615                      }
1616                      break;
1617
1618                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1619                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1620                      if(encodedVal != RFAILED)
1621                      {
1622                         fillPdschDmrsLength(encodedVal, &cellParam);
1623                      }
1624                      break;
1625
1626                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1627                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1628                      if(encodedVal != RFAILED)
1629                      {
1630                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1631                      }
1632                      break;
1633
1634                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1635                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1636                      break;
1637
1638                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1639                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1640                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1641                      {
1642                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1643                      }
1644                      break;
1645
1646                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1647                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1648                      if(encodedVal != RFAILED)
1649                      {
1650                         fillModulationOrderDl(encodedVal, &cellParam);
1651                      }
1652                      break;
1653
1654                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1655                      cellParam->maxMuMimoUsersDl         = \
1656                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1657                      break;
1658
1659                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1660                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1661                      if(encodedVal != RFAILED && encodedVal != 0)
1662                      {
1663                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1664                      }
1665                      else
1666                      {
1667                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1668                      }
1669                      break;
1670
1671                   case FAPI_PREMPTIONSUPPORT_TAG:
1672                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1673                      if(encodedVal != RFAILED && encodedVal != 0)
1674                      {
1675                         cellParam->premptionSupport = SUPPORTED;
1676                      }
1677                      else
1678                      {
1679                         cellParam->premptionSupport = NOT_SUPPORTED;
1680                      }
1681                      break;
1682
1683                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1684                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1685                      if(encodedVal != RFAILED && encodedVal != 0)
1686                      {
1687                         cellParam->pdschNonSlotSupport = SUPPORTED;
1688                      }
1689                      else
1690                      {
1691                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1692                      }
1693                      break;
1694
1695                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1696                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1697                      if(encodedVal != RFAILED && encodedVal != 0)
1698                      {
1699                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1700                      }
1701                      else
1702                      {
1703                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1704                      }
1705                      break;
1706
1707                   case FAPI_UCI_ONLY_PUSCH_TAG:
1708                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1709                      if(encodedVal != RFAILED && encodedVal != 0)
1710                      {
1711                         cellParam->uciOnlyPusch = SUPPORTED;
1712                      }
1713                      else
1714                      {
1715                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1716                      }
1717                      break;
1718
1719                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1720                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1721                      if(encodedVal != RFAILED && encodedVal != 0)
1722                      {
1723                         cellParam->puschFrequencyHopping = SUPPORTED;
1724                      }
1725                      else
1726                      {
1727                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1728                      }
1729                      break;
1730
1731                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1732                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1733                      if(encodedVal != RFAILED)
1734                      {
1735                         fillPuschDmrsConfig(encodedVal, &cellParam);
1736                      }
1737                      break;
1738
1739                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1740                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1741                      if(encodedVal != RFAILED)
1742                      {
1743                         fillPuschDmrsLength(encodedVal, &cellParam);
1744                      }
1745                      break;
1746
1747                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1748                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1749                      if(encodedVal != RFAILED)
1750                      {
1751                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1752                      }
1753                      break;
1754
1755                   case FAPI_PUSCH_CBG_TAG:
1756                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1757                      if(encodedVal != RFAILED && encodedVal != 0)
1758                      {
1759                         cellParam->puschCbg = SUPPORTED;
1760                      }
1761                      else
1762                      {
1763                         cellParam->puschCbg = NOT_SUPPORTED;
1764                      }
1765                      break;
1766
1767                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1768                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1769                      if(encodedVal != RFAILED)
1770                      {
1771                         fillPuschMappingType(encodedVal, &cellParam);
1772                      }
1773                      break;
1774
1775                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1776                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1777                      if(encodedVal != RFAILED)
1778                      {
1779                         fillPuschAllocationType(encodedVal, &cellParam);
1780                      }
1781                      break;
1782
1783                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1784                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1785                      if(encodedVal != RFAILED)
1786                      {
1787                         fillPuschPrbMappingType(encodedVal, &cellParam);
1788                      }
1789                      break;
1790
1791                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1792                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1793                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1794                      {
1795                         cellParam->puschMaxPtrsPorts = encodedVal;
1796                      }
1797                      break;
1798
1799                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1800                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1801                      break;
1802
1803                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1804                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1805                      break;
1806
1807                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1808                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1809                      if(encodedVal != RFAILED)
1810                      {
1811                         fillModulationOrderUl(encodedVal, &cellParam);
1812                      }
1813                      break;
1814
1815                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1816                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1817                      break;
1818
1819                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1820                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1821                      if(encodedVal != RFAILED && encodedVal != 0)
1822                      {
1823                         cellParam->dftsOfdmSupport = SUPPORTED;
1824                      }
1825                      else
1826                      {
1827                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1828                      }
1829                      break;
1830
1831                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1832                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1833                      if(encodedVal != RFAILED)
1834                      {
1835                         fillPuschAggregationFactor(encodedVal, &cellParam);
1836                      }
1837                      break;
1838
1839                   case FAPI_PRACH_LONG_FORMATS_TAG:
1840                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1841                      if(encodedVal != RFAILED)
1842                      {
1843                         fillPrachLongFormat(encodedVal, &cellParam);
1844                      }
1845                      break;
1846
1847                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1848                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1849                      if(encodedVal != RFAILED)
1850                      {
1851                         fillPrachShortFormat(encodedVal, &cellParam);
1852                      }
1853                      break;
1854
1855                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1856                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1857                      if(encodedVal != RFAILED && encodedVal != 0)
1858                      {
1859                         cellParam->prachRestrictedSets = SUPPORTED;
1860                      }
1861                      else
1862                      {
1863                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1864                      }
1865                      break;
1866
1867                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1868                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1869                      if(encodedVal != RFAILED)
1870                      {
1871                         fillFdOccasions(encodedVal, &cellParam);
1872                      }
1873                      break;
1874
1875                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1876                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1877                      if(encodedVal != RFAILED)
1878                      {
1879                         fillRssiMeas(encodedVal, &cellParam);
1880                      }
1881                      break;
1882                   default:
1883                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1884                      break;
1885                }
1886             }
1887             MAC_FREE(cellParam, sizeof(ClCellParam));
1888             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1889             return ROK;
1890          }
1891          else
1892          {
1893             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1894             return RFAILED;
1895          }
1896       }
1897       else
1898       {
1899          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1900          return RFAILED;
1901       }
1902    }
1903    else
1904    {
1905       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1906       return RFAILED;
1907    }
1908 #else
1909    return ROK;
1910 #endif
1911 }
1912
1913 #ifdef INTEL_TIMER_MODE
1914 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1915 {
1916    void * wlsHdlr = NULLP;
1917    fapi_msg_header_t *msgHeader;
1918    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1919    p_fapi_api_queue_elem_t  headerElem;
1920    p_fapi_api_queue_elem_t  iqSampleElem;
1921    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1922
1923    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1924
1925    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1926
1927    /* Fill IQ sample req */
1928    mtGetWlsHdl(&wlsHdlr);
1929    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1930       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1931    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932    if(!iqSampleElem)
1933    {
1934       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1935       return RFAILED;
1936    }
1937    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1938       sizeof(fapi_vendor_ext_iq_samples_req_t));
1939
1940    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1941    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1942    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1943       sizeof(fapi_vendor_ext_iq_samples_req_t));
1944
1945    iqSampleReq->iq_samples_info.carrNum = 0;
1946    iqSampleReq->iq_samples_info.numSubframes = 40;
1947    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1948    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1949    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1950    iqSampleReq->iq_samples_info.startFrameNum = 0;
1951    iqSampleReq->iq_samples_info.startSlotNum = 0;
1952    iqSampleReq->iq_samples_info.startSymNum = 0;
1953    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1954    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1955
1956    /* TODO : Fill remaining parameters */
1957
1958    /* Fill message header */
1959    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1960    if(!headerElem)
1961    {
1962       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1963       return RFAILED;
1964    }
1965    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1966      sizeof(fapi_msg_header_t));
1967    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1968    msgHeader->num_msg = 1;
1969    msgHeader->handle = 0;
1970
1971    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1972    LwrMacSendToL1(headerElem);
1973    return ROK;
1974 }
1975 #endif
1976
1977 /*******************************************************************
1978  *
1979  * @brief Sends FAPI Config req to PHY
1980  *
1981  * @details
1982  *
1983  *    Function : lwr_mac_procConfigReqEvt
1984  *
1985  *    Functionality:
1986  *         -Sends FAPI Config Req to PHY
1987  *
1988  * @params[in]
1989  * @return ROK     - success
1990  *         RFAILED - failure
1991  *
1992  * ****************************************************************/
1993
1994 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1995 {
1996 #ifdef INTEL_FAPI
1997 #ifdef CALL_FLOW_DEBUG_LOG
1998    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
1999 #endif
2000 #ifdef NR_TDD
2001    uint8_t slotIdx = 0;
2002    uint8_t symbolIdx =0;
2003 #endif
2004    uint16_t index = 0;
2005    uint16_t *cellId =NULLP;
2006    uint16_t cellIdx =0;
2007    uint32_t msgLen = 0;
2008    uint32_t mib = 0;
2009    MacCellCfg macCfgParams;
2010    fapi_vendor_msg_t *vendorMsg;
2011    fapi_config_req_t *configReq;
2012    fapi_msg_header_t *msgHeader;
2013    p_fapi_api_queue_elem_t  headerElem;
2014    p_fapi_api_queue_elem_t  vendorMsgQElem;
2015    p_fapi_api_queue_elem_t  cfgReqQElem;
2016
2017    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2018          lwrMacCb.phyState);
2019
2020    cellId = (uint16_t *)msg;
2021    GET_CELL_IDX(*cellId, cellIdx);
2022    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2023
2024    /* Fill Cell Configuration in lwrMacCb */
2025    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2026    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2027    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2028    lwrMacCb.numCell++;
2029
2030    /* Allocte And fill Vendor msg */
2031    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2032    if(!vendorMsgQElem)
2033    {
2034       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2035       return RFAILED;
2036    }
2037    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2038    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2039    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2040    vendorMsg->config_req_vendor.hopping_id = 0;
2041    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2042    vendorMsg->config_req_vendor.group_hop_flag = 0;
2043    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2044    vendorMsg->config_req_vendor.urllc_capable = 0;
2045    vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2046    vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2047    vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2048    vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2049    vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2050    vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2051    vendorMsg->start_req_vendor.sfn = 0;
2052    vendorMsg->start_req_vendor.slot = 0;
2053    vendorMsg->start_req_vendor.mode = 4;
2054 #ifdef DEBUG_MODE
2055    vendorMsg->start_req_vendor.count = 0;
2056    vendorMsg->start_req_vendor.period = 1;
2057 #endif
2058    /* Fill FAPI config req */
2059    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2060    if(!cfgReqQElem)
2061    {
2062       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2063       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2064       return RFAILED;
2065    }
2066    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2067       sizeof(fapi_config_req_t));
2068
2069    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2070    memset(configReq, 0, sizeof(fapi_config_req_t));
2071    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2072 #ifndef NR_TDD
2073    configReq->number_of_tlvs = 25;
2074 #else
2075    configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2076 #endif
2077
2078    msgLen = sizeof(configReq->number_of_tlvs);
2079
2080    if(macCfgParams.dlCarrCfg.pres)
2081    {
2082       fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2083          sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2084       fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2085          sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2086       /* Due to bug in Intel FT code, commenting TLVs that are are not
2087        * needed to avoid error. Must be uncommented when FT bug is fixed */
2088       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2089          sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2090       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2091          sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2092       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2093          sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2094    }
2095    if(macCfgParams.ulCarrCfg.pres)
2096    {
2097       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2098             sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2099       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2100             sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2101       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2102       sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2103       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2104       sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2105       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2106             sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2107    }
2108    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2109    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2110
2111    /* fill cell config */
2112    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2113          sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2114    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2115          sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2116
2117    /* fill SSB configuration */
2118    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2119          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2120    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2121    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2122    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2123          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2124
2125    /* fill PRACH configuration */
2126    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2127    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2128    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2129          sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2130    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2131          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2132    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2133          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2134    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2135          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2136    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2137          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2138    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2139    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2140    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2141          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2142    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2143          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2144    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2145    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2146    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2147       {
2148       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2149       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2150       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2151       &msgLen);
2152       }
2153       else
2154       {
2155       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2156       }*/
2157
2158    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2159          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2160    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2161    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2162
2163    /* fill SSB table */
2164    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2165          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2166    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2167    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2168    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2169          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2170    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2171          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2172
2173    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2174    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2175          sizeof(uint32_t), mib, &msgLen);
2176
2177    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2178          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2179    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2180          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2181    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2182    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2183    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2184    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2185
2186 #ifdef NR_TDD
2187    /* fill TDD table */
2188    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2189    sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2190    for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2191    {
2192       for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2193       {
2194          fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2195                sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2196       }
2197    }
2198 #endif
2199
2200    /* fill measurement config */
2201    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2202    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2203
2204    /* fill DMRS Type A Pos */
2205    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2206          sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2207
2208    /* Fill message header */
2209    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2210    if(!headerElem)
2211    {
2212       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2213       LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2214       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2215       return RFAILED;
2216    }
2217    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2218          sizeof(fapi_msg_header_t));
2219    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2220    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2221    msgHeader->handle = 0;
2222
2223    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2224    LwrMacSendToL1(headerElem);
2225 #endif
2226
2227    return ROK;
2228 } /* lwr_mac_handleConfigReqEvt */
2229
2230 /*******************************************************************
2231  *
2232  * @brief Processes config response from phy
2233  *
2234  * @details
2235  *
2236  *    Function : lwr_mac_procConfigRspEvt
2237  *
2238  *    Functionality:
2239  *          Processes config response from phy
2240  *
2241  * @params[in] FAPI message pointer
2242  * @return ROK     - success
2243  *         RFAILED - failure
2244  *
2245  * ****************************************************************/
2246
2247 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2248 {
2249 #ifdef INTEL_FAPI
2250    fapi_config_resp_t *configRsp;
2251    configRsp = (fapi_config_resp_t *)msg;
2252
2253    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2254          lwrMacCb.phyState);
2255
2256    if(configRsp != NULL)
2257    {
2258       if(configRsp->error_code == MSG_OK)
2259       {
2260          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2261          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2262          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2263          /* TODO :
2264           * Store config response into an intermediate struture and send to MAC
2265           * Support LC and LWLC for sending config rsp to MAC
2266           */
2267          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2268       }
2269       else
2270       {
2271          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2272          return RFAILED;
2273       }
2274    }
2275    else
2276    {
2277       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2278       return RFAILED;
2279    }
2280 #endif
2281
2282    return ROK;
2283 } /* lwr_mac_procConfigRspEvt */
2284
2285 /*******************************************************************
2286  *
2287  * @brief Build and send start request to phy
2288  *
2289  * @details
2290  *
2291  *    Function : lwr_mac_procStartReqEvt
2292  *
2293  *    Functionality:
2294  *       Build and send start request to phy
2295  *
2296  * @params[in] FAPI message pointer
2297  * @return ROK     - success
2298  *         RFAILED - failure
2299  *
2300  * ****************************************************************/
2301 uint8_t lwr_mac_procStartReqEvt(void *msg)
2302 {
2303 #ifdef INTEL_FAPI
2304 #ifdef CALL_FLOW_DEBUG_LOG
2305    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2306 #endif
2307    fapi_msg_header_t *msgHeader;
2308    fapi_start_req_t *startReq;
2309    fapi_vendor_msg_t *vendorMsg;
2310    p_fapi_api_queue_elem_t  headerElem;
2311    p_fapi_api_queue_elem_t  startReqElem;
2312    p_fapi_api_queue_elem_t  vendorMsgElem;
2313
2314    /* Allocte And fill Vendor msg */
2315    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2316    if(!vendorMsgElem)
2317    {
2318       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2319       return RFAILED;
2320    }
2321    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2322    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2323    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2324    vendorMsg->start_req_vendor.sfn = 0;
2325    vendorMsg->start_req_vendor.slot = 0;
2326    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2327 #ifdef DEBUG_MODE
2328    vendorMsg->start_req_vendor.count = 0;
2329    vendorMsg->start_req_vendor.period = 1;
2330 #endif
2331
2332    /* Fill FAPI config req */
2333    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2334    if(!startReqElem)
2335    {
2336       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2337       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2338       return RFAILED;
2339    }
2340    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2341       sizeof(fapi_start_req_t));
2342
2343    startReq = (fapi_start_req_t *)(startReqElem + 1);
2344    memset(startReq, 0, sizeof(fapi_start_req_t));
2345    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2346
2347    /* Fill message header */
2348    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2349    if(!headerElem)
2350    {
2351       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2352       LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2353       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2354       return RFAILED;
2355    }
2356    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2357       sizeof(fapi_msg_header_t));
2358    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2359    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2360    msgHeader->handle = 0;
2361
2362    /* Send to PHY */
2363    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2364    LwrMacSendToL1(headerElem);
2365 #endif
2366    return ROK;
2367 } /* lwr_mac_procStartReqEvt */
2368
2369 /*******************************************************************
2370  *
2371  * @brief Sends FAPI Stop Req to PHY
2372  *
2373  * @details
2374  *
2375  *    Function : lwr_mac_procStopReqEvt
2376  *
2377  *    Functionality:
2378  *         -Sends FAPI Stop Req to PHY
2379  *
2380  * @params[in]
2381  * @return ROK     - success
2382  *         RFAILED - failure
2383  *
2384  ********************************************************************/
2385
2386 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2387 {
2388 #ifdef INTEL_FAPI
2389 #ifdef CALL_FLOW_DEBUG_LOG
2390    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2391 #endif
2392
2393    fapi_stop_req_t   *stopReq;
2394    p_fapi_api_queue_elem_t  stopReqElem;
2395
2396    vendorMsg->sfn = slotInfo.sfn;
2397    vendorMsg->slot = slotInfo.slot;
2398
2399    /* Fill FAPI stop req */
2400    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2401    if(!stopReqElem)
2402    {
2403       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2404       return RFAILED;
2405    }
2406    FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2407    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2408    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2409    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2410
2411    /* Send to PHY */
2412    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2413    prevElem->p_next = stopReqElem;
2414
2415 #endif
2416    return ROK;
2417 }
2418
2419 #ifdef INTEL_FAPI
2420 /*******************************************************************
2421  *
2422  * @brief fills SSB PDU required for DL TTI info in MAC
2423  *
2424  * @details
2425  *
2426  *    Function : fillSsbPdu
2427  *
2428  *    Functionality:
2429  *         -Fills the SSB PDU info
2430  *          stored in MAC
2431  *
2432  * @params[in] Pointer to FAPI DL TTI Req
2433  *             Pointer to RgCellCb
2434  *             Pointer to msgLen of DL TTI Info
2435  * @return ROK
2436  *
2437  ******************************************************************/
2438
2439 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2440       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2441 {
2442    uint32_t mibPayload = 0;
2443    if(dlTtiReqPdu != NULL)
2444    {
2445       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2446       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2447       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2448       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2449       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2450       /* ssbOfPdufstA to be filled in ssbCfg */
2451       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2452       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2453       /* Bit manipulation for SFN */
2454       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2455       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2456       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2457       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2458       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2459       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2460       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2461          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2462       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2463
2464       return ROK;
2465    }
2466    return RFAILED;
2467 }
2468
2469 /*******************************************************************
2470  *
2471  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2472  *
2473  * @details
2474  *
2475  *    Function : fillSib1DlDciPdu
2476  *
2477  *    Functionality:
2478  *         -Fills the Dl DCI PDU
2479  *
2480  * @params[in] Pointer to fapi_dl_dci_t
2481  *             Pointer to PdcchCfg
2482  * @return ROK
2483  *
2484  ******************************************************************/
2485
2486 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2487 {
2488    if(dlDciPtr != NULLP)
2489    {
2490       uint8_t numBytes=0;
2491       uint8_t bytePos=0;
2492       uint8_t bitPos=0;
2493
2494       uint16_t coreset0Size=0;
2495       uint16_t rbStart=0;
2496       uint16_t rbLen=0;
2497       uint32_t freqDomResAssign=0;
2498       uint32_t timeDomResAssign=0;
2499       uint8_t  VRB2PRBMap=0;
2500       uint32_t modNCodScheme=0;
2501       uint8_t  redundancyVer=0;
2502       uint32_t sysInfoInd=0;
2503       uint32_t reserved=0;
2504
2505       /* Size(in bits) of each field in DCI format 0_1
2506        * as mentioned in spec 38.214 */
2507       uint8_t freqDomResAssignSize = 0;
2508       uint8_t timeDomResAssignSize = 4;
2509       uint8_t VRB2PRBMapSize       = 1;
2510       uint8_t modNCodSchemeSize    = 5;
2511       uint8_t redundancyVerSize    = 2;
2512       uint8_t sysInfoIndSize       = 1;
2513       uint8_t reservedSize         = 15;
2514
2515       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2516       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2517       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2518       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2519       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2520       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2521       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2522       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2523       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2524       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2525       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2526       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2527
2528       /* Calculating freq domain resource allocation field value and size
2529        * coreset0Size = Size of coreset 0
2530        * RBStart = Starting Virtual Rsource block
2531        * RBLen = length of contiguously allocted RBs
2532        * Spec 38.214 Sec 5.1.2.2.2
2533        */
2534       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2535       rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2536       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2537
2538       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2539       {
2540          if((rbLen - 1) <= floor(coreset0Size / 2))
2541             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2542          else
2543             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2544                                + (coreset0Size - 1 - rbStart);
2545
2546          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2547       }
2548
2549       /* Fetching DCI field values */
2550       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2551       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2552       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2553       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2554       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2555       reserved         = 0;
2556
2557       /* Reversing bits in each DCI field */
2558       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2559       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2560       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2561       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2562       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2563       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2564
2565       /* Calulating total number of bytes in buffer */
2566       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2567                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2568                                   + sysInfoIndSize + reservedSize;
2569
2570       numBytes = dlDciPtr->payloadSizeBits / 8;
2571       if(dlDciPtr->payloadSizeBits % 8)
2572          numBytes += 1;
2573
2574       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2575       {
2576          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2577          return;
2578       }
2579
2580       /* Initialize buffer */
2581       for(bytePos = 0; bytePos < numBytes; bytePos++)
2582          dlDciPtr->payload[bytePos] = 0;
2583
2584       bytePos = numBytes - 1;
2585       bitPos = 0;
2586
2587       /* Packing DCI format fields */
2588       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2589             freqDomResAssign, freqDomResAssignSize);
2590       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2591             timeDomResAssign, timeDomResAssignSize);
2592       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2593             VRB2PRBMap, VRB2PRBMapSize);
2594       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2595             modNCodScheme, modNCodSchemeSize);
2596       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2597             redundancyVer, redundancyVerSize);
2598       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2599             sysInfoInd, sysInfoIndSize);
2600       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2601             reserved, reservedSize);
2602
2603    }
2604 } /* fillSib1DlDciPdu */
2605
2606
2607 /*******************************************************************
2608  *
2609  * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2610  *
2611  * @details
2612  *
2613  *    Function : fillPageDlDciPdu
2614  *
2615  *    Functionality:
2616  *         -Fills the Dl DCI PDU for Paging
2617  *
2618  * @params[in] Pointer to fapi_dl_dci_t
2619  *             Pointer to dlPageAlloc
2620  * @return ROK
2621  *
2622  ******************************************************************/
2623
2624 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc)
2625 {
2626    if(dlDciPtr != NULLP)
2627    {
2628       uint8_t numBytes=0;
2629       uint8_t bytePos=0;
2630       uint8_t bitPos=0;
2631
2632       uint16_t coreset0Size     = 0;
2633       uint16_t rbStart          = 0;
2634       uint16_t rbLen            = 0;
2635       uint8_t  shortMsgInd      = 0;
2636       uint8_t  shortMsg         = 0;
2637       uint32_t freqDomResAssign = 0;
2638       uint32_t timeDomResAssign = 0;
2639       uint8_t  VRB2PRBMap       = 0;
2640       uint32_t modNCodScheme    = 0;
2641       uint8_t  tbScaling        = 0;
2642       uint32_t reserved         = 0;
2643
2644       /* Size(in bits) of each field in DCI format 1_0
2645        * as mentioned in spec 38.214 */
2646       uint8_t shortMsgIndSize      = 2;
2647       uint8_t shortMsgSize         = 8;
2648       uint8_t freqDomResAssignSize = 0;
2649       uint8_t timeDomResAssignSize = 4;
2650       uint8_t VRB2PRBMapSize       = 1;
2651       uint8_t modNCodSchemeSize    = 5;
2652       uint8_t tbScalingSize        = 2;
2653       uint8_t reservedSize         = 6;
2654
2655       dlDciPtr->rnti = dlPageAlloc->pagePdcchCfg.dci.rnti;
2656       dlDciPtr->scramblingId = dlPageAlloc->pagePdcchCfg.dci.scramblingId;
2657       dlDciPtr->scramblingRnti = dlPageAlloc->pagePdcchCfg.dci.scramblingRnti;
2658       dlDciPtr->cceIndex = dlPageAlloc->pagePdcchCfg.dci.cceIndex;
2659       dlDciPtr->aggregationLevel = dlPageAlloc->pagePdcchCfg.dci.aggregLevel;
2660       dlDciPtr->pc_and_bform.numPrgs = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.numPrgs;
2661       dlDciPtr->pc_and_bform.prgSize = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prgSize;
2662       dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
2663       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
2664       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
2665       dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerValue;
2666       dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
2667
2668       /* Calculating freq domain resource allocation field value and size
2669        * coreset0Size = Size of coreset 0
2670        * RBStart = Starting Virtual Rsource block
2671        * RBLen = length of contiguously allocted RBs
2672        * Spec 38.214 Sec 5.1.2.2.2
2673        */
2674       coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
2675       rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2676       rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2677
2678       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2679       {
2680          if((rbLen - 1) <= floor(coreset0Size / 2))
2681             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2682          else
2683             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2684                                + (coreset0Size - 1 - rbStart);
2685
2686          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2687       }
2688
2689       /*Fetching DCI field values */
2690
2691       /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2692       if(dlPageAlloc->shortMsgInd != TRUE)
2693       {
2694          /*When Short Msg is absent*/
2695          shortMsgInd = 1;
2696          shortMsg    = 0;
2697       }
2698       else
2699       {
2700          /*Short Msg is Present*/
2701          if(dlPageAlloc->dlPagePduLen == 0 || dlPageAlloc->dlPagePdu == NULLP)
2702          {
2703             /*When Paging Msg is absent*/
2704             shortMsgInd = 2;
2705          }
2706          else
2707          {
2708             /*Both Short and Paging is present*/
2709             shortMsgInd = 3;
2710          }
2711          shortMsg = dlPageAlloc->shortMsg;
2712       }
2713
2714       timeDomResAssign = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2715       VRB2PRBMap       = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2716       modNCodScheme    = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->codeword[0].mcsIndex;
2717       tbScaling        = 0;
2718       reserved         = 0;
2719
2720       /* Reversing bits in each DCI field */
2721       shortMsgInd      = reverseBits(shortMsgInd, shortMsgIndSize);
2722       shortMsg         = reverseBits(shortMsg, shortMsgSize);
2723       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2724       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2725       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2726       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2727       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2728       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2729
2730       /* Calulating total number of bytes in buffer */
2731       dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2732                                   + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2733                                   + tbScaling + reservedSize;
2734
2735       numBytes = dlDciPtr->payloadSizeBits / 8;
2736       if(dlDciPtr->payloadSizeBits % 8)
2737       {
2738          numBytes += 1;
2739       }
2740
2741       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2742       {
2743          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2744          return;
2745       }
2746
2747       /* Initialize buffer */
2748       for(bytePos = 0; bytePos < numBytes; bytePos++)
2749       {
2750          dlDciPtr->payload[bytePos] = 0;
2751       }
2752
2753       bytePos = numBytes - 1;
2754       bitPos = 0;
2755
2756       /* Packing DCI format fields */
2757       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2758             shortMsgInd, shortMsgIndSize);
2759       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2760             shortMsg, shortMsgSize);
2761       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2762             freqDomResAssign, freqDomResAssignSize);
2763       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2764             timeDomResAssign, timeDomResAssignSize);
2765       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2766             VRB2PRBMap, VRB2PRBMapSize);
2767       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2768             modNCodScheme, modNCodSchemeSize);
2769       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2770             tbScaling, tbScalingSize);
2771       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2772             reserved, reservedSize);
2773    }
2774 } /* fillPageDlDciPdu */
2775
2776 /*******************************************************************
2777  *
2778  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2779  *
2780  * @details
2781  *
2782  *    Function : fillRarDlDciPdu
2783  *
2784  *    Functionality:
2785  *         -Fills the Dl DCI PDU
2786  *
2787  * @params[in] Pointer to fapi_dl_dci_t
2788  *             Pointer to PdcchCfg
2789  * @return ROK
2790  *
2791  ******************************************************************/
2792
2793 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2794 {
2795    if(dlDciPtr != NULLP)
2796    {
2797       uint8_t numBytes =0;
2798       uint8_t bytePos =0;
2799       uint8_t bitPos =0;
2800
2801       uint16_t coreset0Size =0;
2802       uint16_t rbStart =0;
2803       uint16_t rbLen =0;
2804       uint32_t freqDomResAssign =0;
2805       uint8_t timeDomResAssign =0;
2806       uint8_t  VRB2PRBMap =0;
2807       uint8_t modNCodScheme =0;
2808       uint8_t tbScaling =0;
2809       uint32_t reserved =0;
2810
2811       /* Size(in bits) of each field in DCI format 1_0 */
2812       uint8_t freqDomResAssignSize = 0;
2813       uint8_t timeDomResAssignSize = 4;
2814       uint8_t VRB2PRBMapSize       = 1;
2815       uint8_t modNCodSchemeSize    = 5;
2816       uint8_t tbScalingSize        = 2;
2817       uint8_t reservedSize         = 16;
2818
2819       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2820       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2821       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2822       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2823       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2824       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2825       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2826       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2827       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2828       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2829       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2830       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2831
2832       /* Calculating freq domain resource allocation field value and size
2833        * coreset0Size = Size of coreset 0
2834        * RBStart = Starting Virtual Rsource block
2835        * RBLen = length of contiguously allocted RBs
2836        * Spec 38.214 Sec 5.1.2.2.2
2837        */
2838
2839       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2840       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2841       rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2842       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2843
2844       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2845       {
2846          if((rbLen - 1) <= floor(coreset0Size / 2))
2847             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2848          else
2849             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2850                                + (coreset0Size - 1 - rbStart);
2851
2852          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2853       }
2854
2855       /* Fetching DCI field values */
2856       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
2857       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2858       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2859       tbScaling        = 0; /* configured to 0 scaling */
2860       reserved         = 0;
2861
2862       /* Reversing bits in each DCI field */
2863       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2864       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2865       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2866       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2867       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2868
2869       /* Calulating total number of bytes in buffer */
2870       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2871                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2872
2873       numBytes = dlDciPtr->payloadSizeBits / 8;
2874       if(dlDciPtr->payloadSizeBits % 8)
2875          numBytes += 1;
2876
2877       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2878       {
2879          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2880          return;
2881       }
2882
2883       /* Initialize buffer */
2884       for(bytePos = 0; bytePos < numBytes; bytePos++)
2885          dlDciPtr->payload[bytePos] = 0;
2886
2887       bytePos = numBytes - 1;
2888       bitPos = 0;
2889
2890       /* Packing DCI format fields */
2891       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2892             freqDomResAssign, freqDomResAssignSize);
2893       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2894             timeDomResAssign, timeDomResAssignSize);
2895       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2896             VRB2PRBMap, VRB2PRBMapSize);
2897       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2898             modNCodScheme, modNCodSchemeSize);
2899       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2900             tbScaling, tbScalingSize);
2901       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2902             reserved, reservedSize);
2903    }
2904 } /* fillRarDlDciPdu */
2905
2906 /*******************************************************************
2907  *
2908  * @brief fills DL DCI PDU required for DL TTI info in MAC
2909  *
2910  * @details
2911  *
2912  *    Function : fillDlMsgDlDciPdu
2913  *
2914  *    Functionality:
2915  *         -Fills the Dl DCI PDU
2916  *
2917  * @params[in] Pointer to fapi_dl_dci_t
2918  *             Pointer to PdcchCfg
2919  * @return ROK
2920  *
2921  ******************************************************************/
2922 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2923       DlMsgInfo *dlMsgInfo)
2924 {
2925    if(dlDciPtr != NULLP)
2926    {
2927       uint8_t numBytes;
2928       uint8_t bytePos;
2929       uint8_t bitPos;
2930
2931       uint16_t coresetSize = 0;
2932       uint16_t rbStart = 0;
2933       uint16_t rbLen = 0;
2934       uint8_t  dciFormatId;
2935       uint32_t freqDomResAssign;
2936       uint8_t  timeDomResAssign;
2937       uint8_t  VRB2PRBMap;
2938       uint8_t  modNCodScheme;
2939       uint8_t  ndi = 0;
2940       uint8_t  redundancyVer = 0;
2941       uint8_t  harqProcessNum = 0;
2942       uint8_t  dlAssignmentIdx = 0;
2943       uint8_t  pucchTpc = 0;
2944       uint8_t  pucchResoInd = 0;
2945       uint8_t  harqFeedbackInd = 0;
2946
2947       /* Size(in bits) of each field in DCI format 1_0 */
2948       uint8_t dciFormatIdSize    = 1;
2949       uint8_t freqDomResAssignSize = 0;
2950       uint8_t timeDomResAssignSize = 4;
2951       uint8_t VRB2PRBMapSize       = 1;
2952       uint8_t modNCodSchemeSize    = 5;
2953       uint8_t ndiSize              = 1;
2954       uint8_t redundancyVerSize    = 2;
2955       uint8_t harqProcessNumSize   = 4;
2956       uint8_t dlAssignmentIdxSize  = 2;
2957       uint8_t pucchTpcSize         = 2;
2958       uint8_t pucchResoIndSize     = 3;
2959       uint8_t harqFeedbackIndSize  = 3;
2960
2961       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2962       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2963       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2964       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2965       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2966       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2967       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2968       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2969       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2970       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2971       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2972       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2973
2974       /* Calculating freq domain resource allocation field value and size
2975        * coreset0Size = Size of coreset 0
2976        * RBStart = Starting Virtual Rsource block
2977        * RBLen = length of contiguously allocted RBs
2978        * Spec 38.214 Sec 5.1.2.2.2
2979        */
2980       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2981       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2982       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2983
2984       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2985       {
2986          if((rbLen - 1) <= floor(coresetSize / 2))
2987             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2988          else
2989             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2990                                + (coresetSize - 1 - rbStart);
2991
2992          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2993       }
2994
2995       /* Fetching DCI field values */
2996       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
2997       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2998       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2999       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
3000       ndi              = dlMsgInfo->ndi;
3001       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
3002       harqProcessNum   = dlMsgInfo->harqProcNum;
3003       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
3004       pucchTpc         = dlMsgInfo->pucchTpc;
3005       pucchResoInd     = dlMsgInfo->pucchResInd;
3006       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
3007
3008       /* Reversing bits in each DCI field */
3009       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
3010       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3011       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3012       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3013       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
3014       ndi              = reverseBits(ndi, ndiSize);
3015       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
3016       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
3017       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3018       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
3019       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
3020       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3021
3022
3023       /* Calulating total number of bytes in buffer */
3024       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3025             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3026             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3027             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3028
3029       numBytes = dlDciPtr->payloadSizeBits / 8;
3030       if(dlDciPtr->payloadSizeBits % 8)
3031          numBytes += 1;
3032
3033       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3034       {
3035          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
3036          return;
3037       }
3038
3039       /* Initialize buffer */
3040       for(bytePos = 0; bytePos < numBytes; bytePos++)
3041          dlDciPtr->payload[bytePos] = 0;
3042
3043       bytePos = numBytes - 1;
3044       bitPos = 0;
3045
3046       /* Packing DCI format fields */
3047       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3048             dciFormatId, dciFormatIdSize);
3049       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3050             freqDomResAssign, freqDomResAssignSize);
3051       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3052             timeDomResAssign, timeDomResAssignSize);
3053       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3054             VRB2PRBMap, VRB2PRBMapSize);
3055       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3056             modNCodScheme, modNCodSchemeSize);
3057       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3058             ndi, ndiSize);
3059       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3060             redundancyVer, redundancyVerSize);
3061       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3062             redundancyVer, redundancyVerSize);
3063       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3064             harqProcessNum, harqProcessNumSize);
3065       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3066             dlAssignmentIdx, dlAssignmentIdxSize);
3067       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3068             pucchTpc, pucchTpcSize);
3069       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3070             pucchResoInd, pucchResoIndSize);
3071       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3072             harqFeedbackInd, harqFeedbackIndSize);
3073    }
3074 }
3075
3076 /*******************************************************************
3077  *
3078  * @brief fills PDCCH PDU required for DL TTI info in MAC
3079  *
3080  * @details
3081  *
3082  *    Function : fillPdcchPdu
3083  *
3084  *    Functionality:
3085  *         -Fills the Pdcch PDU info
3086  *          stored in MAC
3087  *
3088  * @params[in] Pointer to FAPI DL TTI Req
3089  *             Pointer to PdcchCfg
3090  * @return ROK
3091  *
3092  ******************************************************************/
3093 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3094       RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3095 {
3096    if(dlTtiReqPdu != NULLP)
3097    {
3098       PdcchCfg *pdcchInfo = NULLP;
3099       BwpCfg *bwp = NULLP;
3100
3101       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3102       if(rntiType == SI_RNTI_TYPE)
3103       {
3104          pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3105          bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3106          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3107       }
3108       else if(rntiType == P_RNTI_TYPE)
3109       {
3110          pdcchInfo = &dlSlot->pageAllocInfo->pagePdcchCfg;
3111          bwp = &dlSlot->pageAllocInfo->bwp;
3112          fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, dlSlot->pageAllocInfo);
3113       }
3114       else if(rntiType == RA_RNTI_TYPE)
3115       {
3116          pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3117          bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3118          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3119       }
3120       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3121       {
3122          pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
3123          bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
3124          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3125                &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
3126       }
3127       else
3128       {
3129          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
3130          return RFAILED;
3131       }
3132       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3133       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3134       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3135       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3136       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3137       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3138       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3139       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
3140       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3141       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3142       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3143       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
3144       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3145       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3146       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3147
3148       /* Calculating PDU length. Considering only one dl dci pdu for now */
3149       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3150
3151       /* Filling Vendor message PDU */
3152       dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3153       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3154       dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3155       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3156       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3157    }
3158
3159    return ROK;
3160 }
3161
3162 /*******************************************************************
3163  *
3164  * @brief fills PDSCH PDU required for DL TTI info in MAC
3165  *
3166  * @details
3167  *
3168  *    Function : fillPdschPdu
3169  *
3170  *    Functionality:
3171  *         -Fills the Pdsch PDU info
3172  *          stored in MAC
3173  *
3174  * @params[in] Pointer to FAPI DL TTI Req
3175  *             Pointer to PdschCfg
3176  *             Pointer to msgLen of DL TTI Info
3177  * @return ROK
3178  *
3179  ******************************************************************/
3180
3181 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3182       BwpCfg bwp, uint16_t pduIndex)
3183 {
3184    uint8_t idx;
3185
3186    if(dlTtiReqPdu != NULLP)
3187    {
3188       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3189       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3190       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3191       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3192       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3193       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3194       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3195       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3196       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3197       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3198       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3199       {
3200          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3201          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3202          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3203          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3204          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3205          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3206       }
3207       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3208       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3209       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3210       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3211       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3212       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3213       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3214       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3215       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3216       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3217       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3218       /* since we are using type-1, hence rbBitmap excluded */
3219       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3220       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3221       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3222       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3223       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3224       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3225       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3226       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3227       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3228          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3229       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3230          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3231       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3232       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3233       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3234       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3235       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3236
3237       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3238
3239       /* DL TTI Request vendor message */
3240       dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3241       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3242       dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3243       for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3244       {
3245               dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3246       }
3247    }
3248 }
3249
3250 /***********************************************************************
3251  *
3252  * @brief calculates the total size to be allocated for DL TTI Req
3253  *
3254  * @details
3255  *
3256  *    Function : calcDlTtiReqPduCount
3257  *
3258  *    Functionality:
3259  *         -calculates the total pdu count to be allocated for DL TTI Req
3260  *
3261  * @params[in]   MacDlSlot *dlSlot
3262  * @return count
3263  *
3264  * ********************************************************************/
3265 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3266 {
3267    uint8_t count = 0;
3268    uint8_t idx = 0, ueIdx=0;
3269
3270    if(dlSlot->dlInfo.isBroadcastPres)
3271    {
3272       if(dlSlot->dlInfo.brdcstAlloc.ssbTrans)
3273       {
3274          for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3275          {
3276             /* SSB PDU is filled */
3277             count++;
3278          }
3279       }
3280       if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3281       {
3282          /* PDCCH and PDSCH PDU is filled */
3283          count += 2;
3284       }
3285    }
3286
3287    if(dlSlot->pageAllocInfo)
3288    {
3289       /* PDCCH and PDSCH PDU is filled */
3290       count += 2;
3291    }
3292
3293    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3294    {
3295       if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3296       {
3297          /* PDCCH and PDSCH PDU is filled */
3298          if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
3299             count += 2;
3300          else
3301             count += 1;
3302       }
3303
3304       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3305       {
3306          for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3307          {
3308             /* PDCCH and PDSCH PDU is filled */
3309             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
3310                count += 2;
3311             else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
3312                count += 1;
3313          }
3314       }
3315    }
3316    return count;
3317 }
3318
3319 /***********************************************************************
3320  *
3321  * @brief calculates the total size to be allocated for DL TTI Req
3322  *
3323  * @details
3324  *
3325  *    Function : calcTxDataReqPduCount
3326  *
3327  *    Functionality:
3328  *         -calculates the total pdu count to be allocated for DL TTI Req
3329  *
3330  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3331  * @return count
3332  *
3333  * ********************************************************************/
3334 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3335 {
3336    uint8_t idx = 0, count = 0, ueIdx=0;
3337
3338    if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3339    {
3340       count++;
3341    }
3342    if(dlSlot->pageAllocInfo)
3343    {
3344       count++;
3345    }
3346
3347    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3348    {
3349       if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
3350             ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
3351          count++;
3352
3353       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3354       {
3355          for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3356          {
3357             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
3358                   dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
3359                count++;
3360          }
3361       }
3362    }
3363    return count;
3364 }
3365
3366 /***********************************************************************
3367  *
3368  * @brief fills the SIB1 TX-DATA request message
3369  *
3370  * @details
3371  *
3372  *    Function : fillSib1TxDataReq
3373  *
3374  *    Functionality:
3375  *         - fills the SIB1 TX-DATA request message
3376  *
3377  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3378  * @params[in]    macCellCfg consist of SIB1 pdu
3379  * @params[in]    uint32_t *msgLen
3380  * @params[in]    uint16_t pduIndex
3381  * @return ROK
3382  *
3383  * ********************************************************************/
3384 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3385       PdschCfg pdschCfg)
3386 {
3387    uint32_t payloadSize = 0;
3388    uint8_t *sib1Payload = NULLP;
3389    fapi_api_queue_elem_t *payloadElem = NULLP;
3390 #ifdef INTEL_WLS_MEM
3391    void * wlsHdlr = NULLP;
3392 #endif
3393
3394    pduDesc[pduIndex].pdu_index = pduIndex;
3395    pduDesc[pduIndex].num_tlvs = 1;
3396
3397    /* fill the TLV */
3398    payloadSize = pdschCfg.codeword[0].tbSize;
3399    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3400    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3401    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3402    if(sib1Payload == NULLP)
3403    {
3404       return RFAILED;
3405    }
3406    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3407    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3408       macCellCfg->sib1Cfg.sib1PduLen);
3409    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
3410
3411 #ifdef INTEL_WLS_MEM
3412    mtGetWlsHdl(&wlsHdlr);
3413    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3414 #else
3415    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3416 #endif
3417    pduDesc[pduIndex].pdu_length = payloadSize;
3418
3419 #ifdef INTEL_WLS_MEM
3420    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3421 #else
3422    LWR_MAC_FREE(sib1Payload, payloadSize);
3423 #endif
3424
3425    return ROK;
3426 }
3427
3428 /***********************************************************************
3429  *
3430  * @brief fills the PAGE TX-DATA request message
3431  *
3432  * @details
3433  *
3434  *    Function : fillPageTxDataReq
3435  *
3436  *    Functionality:
3437  *         - fills the Page TX-DATA request message
3438  *
3439  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3440  * @params[in]    macCellCfg consist of SIB1 pdu
3441  * @params[in]    uint32_t *msgLen
3442  * @params[in]    uint16_t pduIndex
3443  * @return ROK
3444  *
3445  * ********************************************************************/
3446 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo,
3447                            PdschCfg pdschCfg)
3448 {
3449    uint32_t payloadSize = 0;
3450    uint8_t *pagePayload = NULLP;
3451    fapi_api_queue_elem_t *payloadElem = NULLP;
3452 #ifdef INTEL_WLS_MEM
3453    void * wlsHdlr = NULLP;
3454 #endif
3455
3456    pduDesc[pduIndex].pdu_index = pduIndex;
3457    pduDesc[pduIndex].num_tlvs = 1;
3458
3459    /* fill the TLV */
3460    payloadSize = pdschCfg.codeword[0].tbSize;
3461    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3462    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3463    LWR_MAC_ALLOC(pagePayload, payloadSize);
3464    if(pagePayload == NULLP)
3465    {
3466       return RFAILED;
3467    }
3468    payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3469    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3470          pageAllocInfo->dlPagePduLen);
3471    memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->dlPagePdu, pageAllocInfo->dlPagePduLen);
3472
3473 #ifdef INTEL_WLS_MEM
3474    mtGetWlsHdl(&wlsHdlr);
3475    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3476 #else
3477    pduDesc[pduIndex].tlvs[0].value = pagePayload;
3478 #endif
3479    pduDesc[pduIndex].pdu_length = payloadSize;
3480
3481 #ifdef INTEL_WLS_MEM
3482    addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3483 #else
3484    LWR_MAC_FREE(pagePayload, payloadSize);
3485 #endif
3486
3487    return ROK;
3488 }
3489
3490 /***********************************************************************
3491  *
3492  * @brief fills the RAR TX-DATA request message
3493  *
3494  * @details
3495  *
3496  *    Function : fillRarTxDataReq
3497  *
3498  *    Functionality:
3499  *         - fills the RAR TX-DATA request message
3500  *
3501  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3502  * @params[in]    RarInfo *rarInfo
3503  * @params[in]    uint32_t *msgLen
3504  * @params[in]    uint16_t pduIndex
3505  * @return ROK
3506  *
3507  * ********************************************************************/
3508 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3509 {
3510    uint16_t payloadSize;
3511    uint8_t  *rarPayload = NULLP;
3512    fapi_api_queue_elem_t *payloadElem = NULLP;
3513 #ifdef INTEL_WLS_MEM
3514    void * wlsHdlr = NULLP;
3515 #endif
3516
3517    pduDesc[pduIndex].pdu_index = pduIndex;
3518    pduDesc[pduIndex].num_tlvs = 1;
3519
3520    /* fill the TLV */
3521    payloadSize = pdschCfg.codeword[0].tbSize;
3522    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3523    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3524    LWR_MAC_ALLOC(rarPayload, payloadSize);
3525    if(rarPayload == NULLP)
3526    {
3527       return RFAILED;
3528    }
3529    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3530    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3531    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3532
3533 #ifdef INTEL_WLS_MEM
3534    mtGetWlsHdl(&wlsHdlr);
3535    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3536 #else
3537    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3538 #endif
3539    pduDesc[pduIndex].pdu_length = payloadSize;
3540
3541 #ifdef INTEL_WLS_MEM
3542    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3543 #else
3544    LWR_MAC_FREE(rarPayload, payloadSize);
3545 #endif
3546    return ROK;
3547 }
3548
3549 /***********************************************************************
3550  *
3551  * @brief fills the DL dedicated Msg TX-DATA request message
3552  *
3553  * @details
3554  *
3555  *    Function : fillDlMsgTxDataReq
3556  *
3557  *    Functionality:
3558  *         - fills the Dl Dedicated Msg TX-DATA request message
3559  *
3560  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3561  * @params[in]    DlMsgInfo *dlMsgInfo
3562  * @params[in]    uint32_t *msgLen
3563  * @params[in]    uint16_t pduIndex
3564  * @return ROK
3565  *
3566  * ********************************************************************/
3567 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3568 {
3569    uint16_t payloadSize;
3570    uint8_t  *dlMsgPayload = NULLP;
3571    fapi_api_queue_elem_t *payloadElem = NULLP;
3572 #ifdef INTEL_WLS_MEM
3573    void * wlsHdlr = NULLP;
3574 #endif
3575
3576    pduDesc[pduIndex].pdu_index = pduIndex;
3577    pduDesc[pduIndex].num_tlvs = 1;
3578
3579    /* fill the TLV */
3580    payloadSize = pdschCfg.codeword[0].tbSize;
3581    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3582    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3583    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3584    if(dlMsgPayload == NULLP)
3585    {
3586       return RFAILED;
3587    }
3588    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3589    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3590    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3591
3592 #ifdef INTEL_WLS_MEM
3593    mtGetWlsHdl(&wlsHdlr);
3594    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3595 #else
3596    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3597 #endif
3598    pduDesc[pduIndex].pdu_length = payloadSize;
3599
3600 #ifdef INTEL_WLS_MEM
3601    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3602 #else
3603    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3604 #endif
3605    return ROK;
3606 }
3607
3608 #endif /* FAPI */
3609
3610 /*******************************************************************
3611  *
3612  * @brief Sends DL TTI Request to PHY
3613  *
3614  * @details
3615  *
3616  *    Function : fillDlTtiReq
3617  *
3618  *    Functionality:
3619  *         -Sends FAPI DL TTI req to PHY
3620  *
3621  * @params[in]    timing info
3622  * @return ROK     - success
3623  *         RFAILED - failure
3624  *
3625  * ****************************************************************/
3626 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3627 {
3628 #ifdef CALL_FLOW_DEBUG_LOG
3629    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3630 #endif
3631
3632 #ifdef INTEL_FAPI
3633    uint8_t idx =0;
3634    uint8_t nPdu = 0;
3635    uint8_t numPduEncoded = 0;
3636    uint8_t  ueIdx;
3637    uint16_t cellIdx =0;
3638    uint16_t pduIndex = 0;
3639
3640    SlotTimingInfo dlTtiReqTimingInfo;
3641    MacDlSlot *currDlSlot = NULLP;
3642    MacCellCfg macCellCfg;
3643    RntiType rntiType;
3644    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3645    fapi_msg_header_t *msgHeader = NULLP;
3646    p_fapi_api_queue_elem_t dlTtiElem;
3647    p_fapi_api_queue_elem_t headerElem;
3648    p_fapi_api_queue_elem_t prevElem;
3649    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3650    {
3651            GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3652            /* consider phy delay */
3653            ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL, macCb.macCell[cellIdx]->numOfSlots);
3654            dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3655
3656            macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3657
3658            currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3659
3660            /* Vendor Message */
3661            fapi_vendor_msg_t *vendorMsg;
3662            p_fapi_api_queue_elem_t  vendorMsgQElem;
3663            /* Allocte And fill Vendor msg */
3664            LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3665            if(!vendorMsgQElem)
3666            {
3667                    DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
3668                    return RFAILED;
3669            }
3670            FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3671            vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3672            fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3673
3674            LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3675            if(dlTtiElem)
3676            {
3677                    FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3678                                    sizeof(fapi_dl_tti_req_t));
3679                    /* Fill message header */
3680                    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3681                    if(!headerElem)
3682                    {
3683                            DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3684                            LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3685                            return RFAILED;
3686                    }
3687
3688                    FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3689                                    sizeof(fapi_msg_header_t));
3690                    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3691                    msgHeader->num_msg = 2;
3692                    msgHeader->handle = 0;
3693
3694                    /* Fill Dl TTI Request */
3695                    dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3696                    memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3697                    fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3698
3699                    dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3700                    dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3701                    dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot);  /* get total Pdus */
3702                    nPdu = dlTtiReq->nPdus;
3703
3704                    vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3705                    vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3706
3707                    dlTtiReq->nGroup = 0;
3708                    if(dlTtiReq->nPdus > 0)
3709                    {
3710                            if(currDlSlot->dlInfo.isBroadcastPres)
3711                            {
3712                                    if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3713                                    {
3714                                            if(dlTtiReq->pdus != NULLP)
3715                                            {
3716                                                    for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3717                                                    {
3718                                                            fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3719                                                                            currDlSlot, idx, dlTtiReq->sfn);
3720                                                            numPduEncoded++;
3721                                                    }
3722                                            }
3723                                            DU_LOG("\033[1;31m");
3724                                            DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3725                                            DU_LOG("\033[0m");
3726                                    }
3727
3728                                    if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3729                                    {
3730                                            /* Filling SIB1 param */
3731                                            if(numPduEncoded != nPdu)
3732                                            {
3733                                                    rntiType = SI_RNTI_TYPE;
3734
3735                                                    /* PDCCH PDU */
3736                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3737                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3738                                                    numPduEncoded++;
3739
3740                                                    /* PDSCH PDU */
3741                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3742                                                                    &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3743                                                                    currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3744                                                                    pduIndex);
3745                                                    dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3746                                                    pduIndex++;
3747                                                    numPduEncoded++;
3748                                            }
3749                                            DU_LOG("\033[1;34m");
3750                                            DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3751                                            DU_LOG("\033[0m");
3752                                    }
3753                            }
3754
3755                            if(currDlSlot->pageAllocInfo != NULLP)
3756                            {
3757                                    /* Filling DL Paging Alloc param */
3758                                    if(numPduEncoded != nPdu)
3759                                    {
3760                                            rntiType = P_RNTI_TYPE;
3761                                            fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], currDlSlot, -1, \
3762                                                            rntiType, CORESET_TYPE0, MAX_NUM_UE);
3763                                            numPduEncoded++;
3764                                            fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3765                                                            &currDlSlot->pageAllocInfo->pagePdschCfg,
3766                                                            currDlSlot->pageAllocInfo->bwp,
3767                                                            pduIndex);
3768                                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3769                                            pduIndex++;
3770                                            numPduEncoded++;
3771                                    }
3772                                    DU_LOG("\033[1;34m");
3773                                    DU_LOG("\nDEBUG  -->  LWR_MAC: PAGE sent...");
3774                                    DU_LOG("\033[0m");
3775                            }
3776
3777                            for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3778                            {
3779                                    if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3780                                    {
3781                                            /* Filling RAR param */
3782                                            rntiType = RA_RNTI_TYPE;
3783                                            if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3784                                                            (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
3785                                            {
3786                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3787                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3788                                                    numPduEncoded++;
3789                                            }
3790                                            if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3791                                                            (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3792                                            {
3793                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3794                                                                    &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3795                                                                    currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3796                                                                    pduIndex);
3797                                                    numPduEncoded++;
3798                                                    pduIndex++;
3799
3800                                                    DU_LOG("\033[1;32m");
3801                                                    DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3802                                                    DU_LOG("\033[0m");
3803                                            }
3804                                    }
3805
3806                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3807                                    {
3808                                            for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3809                                            {
3810                                                    /* Filling Msg4 param */
3811                                                    if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3812                                                                    (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
3813                                                    {
3814                                                            if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3815                                                            {
3816                                                                    rntiType = TC_RNTI_TYPE;
3817                                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3818                                                                                    currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
3819                                                            }
3820                                                            else
3821                                                            {
3822                                                                    /* Filling other DL msg params */
3823                                                                    rntiType = C_RNTI_TYPE;
3824                                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3825                                                                                    currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
3826                                                            }
3827                                                            numPduEncoded++;
3828                                                    }
3829
3830                                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
3831                                                    {
3832                                                            if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3833                                                                            (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
3834                                                            {
3835                                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3836                                                                                    &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
3837                                                                                    currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
3838                                                                    numPduEncoded++;
3839                                                                    pduIndex++;
3840
3841                                                                    DU_LOG("\033[1;32m");
3842                                                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3843                                                                    {
3844                                                                            DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3845                                                                    }
3846                                                                    else
3847                                                                    {
3848                                                                            DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3849                                                                    }
3850                                                                    DU_LOG("\033[0m");
3851                                                            }
3852
3853                                                    }
3854                                                    /*   else
3855                                                         {
3856                                                         MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3857                                                         currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3858                                                         }
3859                                                         */
3860                                            }
3861                                    }
3862                            }
3863
3864                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3865                            dlTtiReq->nGroup++;
3866
3867 #ifdef ODU_SLOT_IND_DEBUG_LOG
3868                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3869 #endif
3870
3871                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3872                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
3873                            msgHeader->num_msg++;
3874
3875                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3876                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
3877                            msgHeader->num_msg++;
3878
3879                            /* send Tx-DATA req message */
3880                            sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
3881                            if(dlTtiElem->p_next->p_next->p_next)
3882                            {
3883                                    msgHeader->num_msg++;
3884                                    prevElem = dlTtiElem->p_next->p_next->p_next;
3885                            }
3886                            else
3887                                    prevElem = dlTtiElem->p_next->p_next;
3888                    }
3889                    else
3890                    {
3891 #ifdef ODU_SLOT_IND_DEBUG_LOG
3892                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3893 #endif
3894                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3895                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
3896                            msgHeader->num_msg++;
3897
3898                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3899                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
3900                            msgHeader->num_msg++;
3901
3902                            prevElem = dlTtiElem->p_next->p_next;
3903                    }
3904
3905                    if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
3906                    {
3907                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3908                            lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
3909                            msgHeader->num_msg++;
3910                            macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
3911             prevElem = prevElem->p_next;
3912                    }
3913                    prevElem->p_next = vendorMsgQElem;
3914                    LwrMacSendToL1(headerElem);
3915                    memset(currDlSlot, 0, sizeof(MacDlSlot));
3916                    return ROK;
3917            }
3918            else
3919            {
3920                    DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
3921                    memset(currDlSlot, 0, sizeof(MacDlSlot));
3922                    return RFAILED;
3923            }
3924    }
3925    else
3926    {
3927            lwr_mac_procInvalidEvt(&currTimingInfo);
3928            return RFAILED;
3929    }
3930 #endif
3931    return ROK;
3932 }
3933
3934 /*******************************************************************
3935  *
3936  * @brief Sends TX data Request to PHY
3937  *
3938  * @details
3939  *
3940  *    Function : sendTxDataReq
3941  *
3942  *    Functionality:
3943  *         -Sends FAPI TX data req to PHY
3944  *
3945  * @params[in]    timing info
3946  * @return ROK     - success
3947  *         RFAILED - failure
3948  *
3949  * ****************************************************************/
3950 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
3951 {
3952 #ifdef INTEL_FAPI
3953 #ifdef CALL_FLOW_DEBUG_LOG
3954    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
3955 #endif
3956
3957    uint8_t  nPdu = 0;
3958    uint8_t  ueIdx=0;
3959    uint8_t  schInfoIdx = 0;
3960    uint16_t cellIdx=0;
3961    uint16_t pduIndex = 0;
3962    fapi_tx_data_req_t       *txDataReq =NULLP;
3963    p_fapi_api_queue_elem_t  txDataElem = 0;
3964
3965    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3966
3967    /* send TX_Data request message */
3968    nPdu = calcTxDataReqPduCount(dlSlot);
3969    if(nPdu > 0)
3970    {
3971       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3972       if(txDataElem == NULLP)
3973       {
3974          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
3975          return RFAILED;
3976       }
3977
3978       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3979             sizeof(fapi_tx_data_req_t));
3980       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3981       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3982       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3983
3984       vendorTxDataReq->sym = 0;
3985
3986       txDataReq->sfn  = currTimingInfo.sfn;
3987       txDataReq->slot = currTimingInfo.slot;
3988       if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3989       {
3990          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
3991                dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg);
3992          pduIndex++;
3993          txDataReq->num_pdus++;
3994       }
3995       if(dlSlot->pageAllocInfo != NULLP)
3996       {
3997          fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo, \
3998                dlSlot->pageAllocInfo->pagePdschCfg);
3999          pduIndex++;
4000          txDataReq->num_pdus++;
4001          MAC_FREE(dlSlot->pageAllocInfo->dlPagePdu, sizeof(dlSlot->pageAllocInfo->dlPagePduLen));
4002          MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4003       }
4004
4005       for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4006       {
4007          if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4008          {
4009             if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
4010             {
4011                fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4012                      dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4013                pduIndex++;
4014                txDataReq->num_pdus++;
4015             }
4016             MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4017          }
4018
4019          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4020          {
4021             for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
4022             {
4023                if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
4024                      (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
4025                {
4026                   fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4027                         &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
4028                         dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
4029                   pduIndex++;
4030                   txDataReq->num_pdus++;
4031                }
4032                MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
4033                      dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
4034                dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
4035             }
4036             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
4037          }
4038       }
4039
4040       /* Fill message header */
4041       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
4042       prevElem->p_next = txDataElem;
4043    }
4044 #endif
4045    return ROK;
4046 }
4047
4048 /***********************************************************************
4049  *
4050  * @brief calculates the total size to be allocated for UL TTI Req
4051  *
4052  * @details
4053  *
4054  *    Function : getnPdus
4055  *
4056  *    Functionality:
4057  *         -calculates the total pdu count to be allocated for UL TTI Req
4058  *
4059  * @params[in] Pointer to fapi Ul TTI Req
4060  *             Pointer to CurrUlSlot
4061  * @return count
4062  * ********************************************************************/
4063 #ifdef INTEL_FAPI
4064 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4065 {
4066    uint8_t pduCount = 0;
4067
4068    if(ulTtiReq && currUlSlot)
4069    {
4070       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4071       {
4072          pduCount++;
4073          ulTtiReq->rachPresent++;
4074       }
4075       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4076       {
4077          pduCount++;
4078          ulTtiReq->nUlsch++;
4079       }
4080       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4081       {
4082          pduCount++;
4083          ulTtiReq->nUlsch++;
4084       }
4085       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4086       {
4087          pduCount++;
4088          ulTtiReq->nUlcch++;
4089       }
4090       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
4091       {
4092          pduCount++;
4093       }
4094    }
4095    return pduCount;
4096 }
4097 #endif
4098
4099 /***********************************************************************
4100  *
4101  * @brief Set the value of zero correlation config in PRACH PDU
4102  *
4103  * @details
4104  *
4105  *    Function : setNumCs
4106  *
4107  *    Functionality:
4108  *         -Set the value of zero correlation config in PRACH PDU
4109  *
4110  * @params[in] Pointer to zero correlation config
4111  *             Pointer to MacCellCfg
4112  * ********************************************************************/
4113
4114 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4115 {
4116 #ifdef INTEL_FAPI
4117    uint8_t idx;
4118    if(macCellCfg != NULLP)
4119    {
4120       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4121       *numCs = UnrestrictedSetNcsTable[idx];
4122    }
4123 #endif
4124 }
4125
4126 /***********************************************************************
4127  *
4128  * @brief Fills the PRACH PDU in UL TTI Request
4129  *
4130  * @details
4131  *
4132  *    Function : fillPrachPdu
4133  *
4134  *    Functionality:
4135  *         -Fills the PRACH PDU in UL TTI Request
4136  *
4137  * @params[in] Pointer to Prach Pdu
4138  *             Pointer to CurrUlSlot
4139  *             Pointer to macCellCfg
4140  *             Pointer to msgLen
4141  * ********************************************************************/
4142
4143 #ifdef INTEL_FAPI
4144 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4145 {
4146    if(ulTtiReqPdu != NULLP)
4147    {
4148       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4149       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
4150       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4151          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
4152       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4153          currUlSlot->ulInfo.prachSchInfo.prachFormat;
4154       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
4155       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4156          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
4157       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4158       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4159       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4160       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4161       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4162       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4163    }
4164 }
4165
4166 /*******************************************************************
4167  *
4168  * @brief Filling PUSCH PDU in UL TTI Request
4169  *
4170  * @details
4171  *
4172  *    Function : fillPuschPdu
4173  *
4174  *    Functionality: Filling PUSCH PDU in UL TTI Request
4175  *
4176  * @params[in]
4177  * @return ROK     - success
4178  *         RFAILED - failure
4179  *
4180  * ****************************************************************/
4181 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4182 {
4183    if(ulTtiReqPdu != NULLP)
4184    {
4185       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4186       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4187       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4188       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
4189       /* TODO : Fill handle in raCb when scheduling pusch and access here */
4190       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4191       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
4192       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
4193       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4194          macCellCfg->initialUlBwp.bwp.scs;
4195       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4196          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4197       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4198       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
4199       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
4200       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
4201       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4202       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
4203       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4204       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4205       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4206       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
4207       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4208       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4209       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4210       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4211          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAllocType;
4212       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4213          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.startPrb;
4214       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4215          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.numPrb;
4216       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4217       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4218       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4219       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4220       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4221          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
4222       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4223          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
4224 #ifdef INTEL_FAPI
4225       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4226          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
4227       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4228          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
4229       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4230          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
4231 #endif
4232       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4233          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
4234       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4235          currUlSlot->ulInfo.schPuschInfo.harqProcId;
4236       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4237          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
4238       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4239          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
4240       /* numCb is 0 for new transmission */
4241       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4242
4243       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4244
4245       /* UL TTI Vendor PDU */
4246       ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4247       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4248       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4249       for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4250       {
4251               ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4252       }
4253    }
4254 }
4255
4256 /*******************************************************************
4257  *
4258  * @brief Fill PUCCH PDU in Ul TTI Request
4259  *
4260  * @details
4261  *
4262  *    Function : fillPucchPdu
4263  *
4264  *    Functionality: Fill PUCCH PDU in Ul TTI Request
4265  *
4266  * @params[in]
4267  * @return ROK     - success
4268  *         RFAILED - failure
4269  *
4270  * ****************************************************************/
4271 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4272       MacUlSlot *currUlSlot)
4273 {
4274    if(ulTtiReqPdu != NULLP)
4275    {
4276       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
4277       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4278       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.crnti;
4279       /* TODO : Fill handle in raCb when scheduling pucch and access here */
4280       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
4281       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
4282       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
4283       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
4284       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4285       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
4286       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4287
4288       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.startPrb;
4289       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.numPrb;
4290       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
4291       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
4292       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
4293       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
4294       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4295       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4296       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
4297
4298       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
4299
4300       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4301       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
4302       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
4303       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
4304       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.pi2BPSK;
4305       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.addDmrs;/* Valid for Format 3, 4 only */
4306       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4307       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
4308       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
4309       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.harqInfo.harqBitLength;
4310       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
4311       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
4312       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.numPrgs;
4313       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prgSize;
4314       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.digBfInterfaces;
4315       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prg[0].beamIdx[0];
4316
4317       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4318
4319       /* UL TTI Vendor PDU */
4320       ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4321       ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4322       ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4323       for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4324       {
4325               ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4326       }
4327    }
4328 }
4329
4330 #endif
4331
4332 /*******************************************************************
4333  *
4334  * @brief Sends UL TTI Request to PHY
4335  *
4336  * @details
4337  *
4338  *    Function : fillUlTtiReq
4339  *
4340  *    Functionality:
4341  *         -Sends FAPI Param req to PHY
4342  *
4343  * @params[in]  Pointer to CmLteTimingInfo
4344  * @return ROK     - success
4345  *         RFAILED - failure
4346  *
4347  ******************************************************************/
4348 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4349 {
4350 #ifdef CALL_FLOW_DEBUG_LOG
4351    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4352 #endif
4353
4354 #ifdef INTEL_FAPI
4355    uint16_t   cellIdx =0;
4356    uint8_t    pduIdx = -1;
4357    SlotTimingInfo ulTtiReqTimingInfo;
4358    MacUlSlot *currUlSlot = NULLP;
4359    MacCellCfg macCellCfg;
4360    fapi_ul_tti_req_t *ulTtiReq = NULLP;
4361    p_fapi_api_queue_elem_t ulTtiElem;
4362
4363    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4364    {
4365       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4366       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4367
4368       /* add PHY delta */
4369       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL, macCb.macCell[cellIdx]->numOfSlots);
4370       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4371
4372       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4373       if(ulTtiElem)
4374       {
4375               FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4376                               sizeof(fapi_ul_tti_req_t));
4377               ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4378               memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4379               fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4380               ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
4381               ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4382               ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4383               vendorUlTti->num_ul_pdu =  ulTtiReq->nPdus;
4384               vendorUlTti->sym = 0;
4385               ulTtiReq->nGroup = 0;
4386               if(ulTtiReq->nPdus > 0)
4387               {
4388                       /* Fill Prach Pdu */
4389                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4390                       {
4391                               pduIdx++;
4392                               fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4393                               ulTtiReq->rachPresent++;
4394                       }
4395
4396                       /* Fill PUSCH PDU */
4397                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4398                       {
4399                               pduIdx++;
4400                               fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4401                               ulTtiReq->nUlsch++;
4402                       }
4403                       /* Fill PUCCH PDU */
4404                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4405                       {
4406                               pduIdx++;
4407                               fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4408                               ulTtiReq->nUlcch++;
4409                       }
4410               }
4411
4412 #ifdef ODU_SLOT_IND_DEBUG_LOG
4413               DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
4414 #endif
4415               prevElem->p_next = ulTtiElem;
4416
4417               memset(currUlSlot, 0, sizeof(MacUlSlot));
4418               return ROK;
4419       }
4420       else
4421       {
4422               DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
4423               memset(currUlSlot, 0, sizeof(MacUlSlot));
4424               return RFAILED;
4425       }
4426    }
4427    else
4428    {
4429            lwr_mac_procInvalidEvt(&currTimingInfo);
4430    }
4431 #endif
4432    return ROK;
4433 }
4434
4435 #ifdef INTEL_FAPI
4436 /*******************************************************************
4437  *
4438  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4439  *
4440  * @details
4441  *
4442  *    Function : fillUlDciPdu
4443  *
4444  *    Functionality:
4445  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4446  *
4447  * @params[in] Pointer to fapi_dl_dci_t
4448  *             Pointer to DciInfo
4449  * @return ROK
4450  *
4451  ******************************************************************/
4452 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4453 {
4454 #ifdef CALL_FLOW_DEBUG_LOG
4455    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4456 #endif
4457    if(ulDciPtr != NULLP)
4458    {
4459       uint8_t numBytes =0;
4460       uint8_t bytePos =0;
4461       uint8_t bitPos =0;
4462
4463       uint8_t  coreset1Size = 0;
4464       uint16_t rbStart = 0;
4465       uint16_t rbLen = 0;
4466       uint8_t  dciFormatId = 0;
4467       uint32_t freqDomResAssign =0;
4468       uint8_t  timeDomResAssign =0;
4469       uint8_t  freqHopFlag =0;
4470       uint8_t  modNCodScheme =0;
4471       uint8_t  ndi =0;
4472       uint8_t  redundancyVer = 0;
4473       uint8_t  harqProcessNum = 0;
4474       uint8_t  puschTpc = 0;
4475       uint8_t  ul_SlInd = 0;
4476
4477       /* Size(in bits) of each field in DCI format 0_0 */
4478       uint8_t dciFormatIdSize      = 1;
4479       uint8_t freqDomResAssignSize = 0;
4480       uint8_t timeDomResAssignSize = 4;
4481       uint8_t freqHopFlagSize      = 1;
4482       uint8_t modNCodSchemeSize    = 5;
4483       uint8_t ndiSize              = 1;
4484       uint8_t redundancyVerSize    = 2;
4485       uint8_t harqProcessNumSize   = 4;
4486       uint8_t puschTpcSize         = 2;
4487       uint8_t ul_SlIndSize         = 1;
4488
4489       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4490       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4491       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4492       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4493       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4494       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4495       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4496       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4497       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4498       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4499       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.powerValue;
4500       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4501
4502       /* Calculating freq domain resource allocation field value and size
4503        * coreset1Size = Size of coreset 1
4504        * RBStart = Starting Virtual Rsource block
4505        * RBLen = length of contiguously allocted RBs
4506        * Spec 38.214 Sec 5.1.2.2.2
4507        */
4508       if(schDciInfo->formatType == FORMAT0_0)
4509       {
4510          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4511          rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4512          rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4513
4514          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4515          {
4516             if((rbLen - 1) <= floor(coreset1Size / 2))
4517                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4518             else
4519                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4520                                   + (coreset1Size - 1 - rbStart);
4521
4522             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4523          }
4524          /* Fetching DCI field values */
4525          dciFormatId      = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4526          timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4527          freqHopFlag      = schDciInfo->format.format0_0.freqHopFlag;
4528          modNCodScheme    = schDciInfo->format.format0_0.mcs;
4529          ndi              = schDciInfo->format.format0_0.ndi;
4530          redundancyVer    = schDciInfo->format.format0_0.rv;
4531          harqProcessNum   = schDciInfo->format.format0_0.harqProcId;
4532          puschTpc         = schDciInfo->format.format0_0.tpcCmd;
4533          ul_SlInd         = schDciInfo->format.format0_0.sUlCfgd;
4534
4535          /* Reversing bits in each DCI field */
4536          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4537          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4538          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4539          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4540          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4541          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4542          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4543          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4544       }
4545       /* Calulating total number of bytes in buffer */
4546       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4547       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4548       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4549
4550       numBytes = ulDciPtr->payloadSizeBits / 8;
4551       if(ulDciPtr->payloadSizeBits % 8)
4552          numBytes += 1;
4553
4554       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4555       {
4556          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4557          return;
4558       }
4559
4560       /* Initialize buffer */
4561       for(bytePos = 0; bytePos < numBytes; bytePos++)
4562          ulDciPtr->payload[bytePos] = 0;
4563
4564       bytePos = numBytes - 1;
4565       bitPos = 0;
4566
4567       /* Packing DCI format fields */
4568       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4569             dciFormatId, dciFormatIdSize);
4570       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4571             freqDomResAssign, freqDomResAssignSize);
4572       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4573             timeDomResAssign, timeDomResAssignSize);
4574       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4575             freqHopFlag, freqHopFlagSize);
4576       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4577             modNCodScheme, modNCodSchemeSize);
4578       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4579             ndi, ndiSize);
4580       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4581             redundancyVer, redundancyVerSize);
4582       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4583             harqProcessNum, harqProcessNumSize);
4584       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4585             puschTpc, puschTpcSize);
4586       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4587             ul_SlInd, ul_SlIndSize);
4588    }
4589 } /* fillUlDciPdu */
4590
4591 /*******************************************************************
4592  *
4593  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4594  *
4595  * @details
4596  *
4597  *    Function : fillUlDciPdcchPdu
4598  *
4599  *    Functionality:
4600  *         -Fills the Pdcch PDU info
4601  *
4602  * @params[in] Pointer to FAPI DL TTI Req
4603  *             Pointer to PdcchCfg
4604  * @return ROK
4605  *
4606  ******************************************************************/
4607 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4608 {
4609    if(ulDciReqPdu != NULLP)
4610    {
4611       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4612       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4613       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4614       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4615       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4616       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4617       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4618       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4619       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4620       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4621       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4622       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4623       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4624       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4625       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4626       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4627       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4628
4629       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4630       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4631
4632       /* Vendor UL DCI PDU */
4633       vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4634       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4635       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4636    }
4637    return ROK;
4638 }
4639 #endif
4640 /*******************************************************************
4641  *
4642  * @brief Sends UL DCI Request to PHY
4643  *
4644  * @details
4645  *
4646  *    Function : fillUlDciReq
4647  *
4648  *    Functionality:
4649  *         -Sends FAPI Ul Dci req to PHY
4650  *
4651  * @params[in]  Pointer to CmLteTimingInfo
4652  * @return ROK     - success
4653  *         RFAILED - failure
4654  *
4655  ******************************************************************/
4656 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4657 {
4658 #ifdef INTEL_FAPI
4659    uint8_t      cellIdx =0;
4660    uint8_t      numPduEncoded = 0;
4661    SlotTimingInfo  ulDciReqTimingInfo ={0};
4662    MacDlSlot    *currDlSlot = NULLP;
4663    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4664    p_fapi_api_queue_elem_t  ulDciElem;
4665
4666    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4667    {
4668       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4669       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4670       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4671
4672          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4673          if(ulDciElem)
4674          {
4675             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4676                sizeof(fapi_ul_dci_req_t));
4677             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4678             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4679             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4680
4681             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4682             ulDciReq->slot = ulDciReqTimingInfo.slot;
4683           if(currDlSlot->dlInfo.ulGrant != NULLP)
4684           {
4685             vendorUlDciReq->sym = 0;
4686             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4687             vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4688             if(ulDciReq->numPdus > 0)
4689             {
4690                /* Fill PDCCH configuration Pdu */
4691                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4692                numPduEncoded++;
4693                /* free UL GRANT at SCH */
4694                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4695             }
4696 #ifdef ODU_SLOT_IND_DEBUG_LOG
4697                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4698 #endif
4699          }
4700                prevElem->p_next = ulDciElem;
4701       }
4702    }
4703    else
4704    {
4705        lwr_mac_procInvalidEvt(&currTimingInfo);
4706    }
4707 #endif
4708    return ROK;
4709 }
4710
4711 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4712 {
4713    {
4714       /* PHY_STATE_IDLE */
4715 #ifdef INTEL_TIMER_MODE
4716       lwr_mac_procIqSamplesReqEvt,
4717 #endif
4718       lwr_mac_procParamReqEvt,
4719       lwr_mac_procParamRspEvt,
4720       lwr_mac_procConfigReqEvt,
4721       lwr_mac_procConfigRspEvt,
4722       lwr_mac_procInvalidEvt,
4723       lwr_mac_procInvalidEvt,
4724    },
4725    {
4726       /* PHY_STATE_CONFIGURED */
4727 #ifdef INTEL_TIMER_MODE
4728       lwr_mac_procInvalidEvt,
4729 #endif
4730       lwr_mac_procParamReqEvt,
4731       lwr_mac_procParamRspEvt,
4732       lwr_mac_procConfigReqEvt,
4733       lwr_mac_procConfigRspEvt,
4734       lwr_mac_procStartReqEvt,
4735       lwr_mac_procInvalidEvt,
4736    },
4737    {
4738       /* PHY_STATE_RUNNING */
4739 #ifdef INTEL_TIMER_MODE
4740       lwr_mac_procInvalidEvt,
4741 #endif
4742       lwr_mac_procInvalidEvt,
4743       lwr_mac_procInvalidEvt,
4744       lwr_mac_procConfigReqEvt,
4745       lwr_mac_procConfigRspEvt,
4746       lwr_mac_procInvalidEvt,
4747       lwr_mac_procInvalidEvt,
4748    }
4749 };
4750
4751 /*******************************************************************
4752  *
4753  * @brief Sends message to LWR_MAC Fsm Event Handler
4754  *
4755  * @details
4756  *
4757  *    Function : sendToLowerMac
4758  *
4759  *    Functionality:
4760  *         -Sends message to LowerMac
4761  *
4762  * @params[in] Message Type
4763  *             Message Length
4764  *             Messaga Pointer
4765  *
4766  * @return void
4767  *
4768  ******************************************************************/
4769 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4770 {
4771    lwrMacCb.event = msgType;
4772    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4773 }
4774
4775 /**********************************************************************
4776   End of file
4777  **********************************************************************/