src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "nr5g_fapi_internal.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 /* Global variables */
  51 LwrMacCb lwrMacCb;
  52
  53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  54 void fapiMacConfigRsp(uint16_t cellId);
  55 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
  56 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
  57 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
  58 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
  59
  60 void lwrMacLayerInit(Region region, Pool pool)
  61 {
  62 #ifdef INTEL_WLS_MEM
  63    uint8_t idx;
  64 #endif
  65
  66    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  67    lwrMacCb.region = region;
  68    lwrMacCb.pool = pool;
  69    lwrMacCb.clCfgDone = TRUE;
  70    lwrMacCb.numCell = 0;
  71    lwrMacCb.phyState = PHY_STATE_IDLE;
  72
  73 #ifdef INTEL_WLS_MEM
  74    /* Initializing WLS free mem list */
  75    lwrMacCb.phySlotIndCntr = 1;
  76    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  77    {
  78       cmLListInit(&wlsBlockToFreeList[idx]);
  79    }
  80 #endif
  81 }
  82
  83 /*******************************************************************
  84  *
  85  * @brief Handles Invalid Request Event
  86  *
  87  * @details
  88  *
  89  *    Function : lwr_mac_procInvalidEvt
  90  *
  91  *    Functionality:
  92  *         - Displays the PHY state when the invalid event occurs
  93  *
  94  * @params[in]
  95  * @return ROK     - success
  96  *         RFAILED - failure
  97  *
  98  * ****************************************************************/
  99 uint8_t lwr_mac_procInvalidEvt(void *msg)
 100 {
 101 #ifdef CALL_FLOW_DEBUG_LOG
 102    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
 103 #endif
 104    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 105    return ROK;
 106 }
 107
 108 #ifdef INTEL_FAPI
 109 /*******************************************************************
 110  *
 111  * @brief Fills FAPI message header
 112  *
 113  * @details
 114  *
 115  *    Function : fillMsgHeader
 116  *
 117  *    Functionality:
 118  *         -Fills FAPI message header
 119  *
 120  * @params[in] Pointer to header
 121  *             Number of messages
 122  *             Messae Type
 123  *             Length of message
 124  * @return void
 125  *
 126  * ****************************************************************/
 127 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 128 {
 129    memset(hdr, 0, sizeof(fapi_msg_t));
 130    hdr->msg_id = msgType;
 131    hdr->length = msgLen;
 132 }
 133
 134 /*******************************************************************
 135  *
 136  * @brief Fills FAPI Config Request message header
 137  *
 138  * @details
 139  *
 140  *    Function : fillTlvs
 141  *
 142  *    Functionality:
 143  *         -Fills FAPI Config Request message header
 144  *
 145  * @params[in] Pointer to TLV
 146  *             Tag
 147  *             Length
 148  *             Value
 149  *             MsgLen
 150  * @return void
 151  *
 152  * ****************************************************************/
 153 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 154       uint32_t value, uint32_t *msgLen)
 155 {
 156    tlv->tl.tag    = tag;
 157    tlv->tl.length = length;
 158    tlv->value     = value;
 159    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 160 }
 161 /*******************************************************************
 162  *
 163  * @brief fills the cyclic prefix by comparing the bitmask
 164  *
 165  * @details
 166  *
 167  *    Function : fillCyclicPrefix
 168  *
 169  *    Functionality:
 170  *         -checks the value with the bitmask and
 171  *          fills the cellPtr's cyclic prefix.
 172  *
 173  * @params[in] Pointer to ClCellParam
 174  *             Value to be compared
 175  * @return void
 176  *
 177  ********************************************************************/
 178 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 179 {
 180    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 181    {
 182       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 183    }
 184    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 185    {
 186       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 187    }
 188    else
 189    {
 190       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 191    }
 192 }
 193
 194 /*******************************************************************
 195  *
 196  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 197  *
 198  * @details
 199  *
 200  *    Function : fillSubcarrierSpaceDl
 201  *
 202  *    Functionality:
 203  *         -checks the value with the bitmask and
 204  *          fills the cellPtr's subcarrier spacing in DL
 205  *
 206  * @params[in] Pointer to ClCellParam
 207  *             Value to be compared
 208  * @return void
 209  *
 210  * ****************************************************************/
 211
 212 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 213 {
 214    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 215    {
 216       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 217    }
 218    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 219    {
 220       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 221    }
 222    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 223    {
 224       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 225    }
 226    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 227    {
 228       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 229    }
 230    else
 231    {
 232       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 233    }
 234 }
 235
 236 /*******************************************************************
 237  *
 238  * @brief fills the downlink bandwidth by comparing the bitmask
 239  *
 240  * @details
 241  *
 242  *    Function : fillBandwidthDl
 243  *
 244  *    Functionality:
 245  *         -checks the value with the bitmask and
 246  *         -fills the cellPtr's DL Bandwidth
 247  *
 248  * @params[in] Pointer to ClCellParam
 249  *             Value to be compared
 250  * @return void
 251  *
 252  * ****************************************************************/
 253
 254 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 255 {
 256    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 257    {
 258       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 259    }
 260    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 261    {
 262       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 263    }
 264    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 265    {
 266       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 267    }
 268    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 269    {
 270       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 271    }
 272    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 273    {
 274       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 275    }
 276    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 277    {
 278       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 279    }
 280    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 281    {
 282       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 283    }
 284    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 285    {
 286       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 287    }
 288    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 289    {
 290       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 291    }
 292    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 293    {
 294       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 295    }
 296    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 297    {
 298       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 299    }
 300    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 301    {
 302       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 303    }
 304    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 305    {
 306       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 307    }
 308    else
 309    {
 310       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 311    }
 312 }
 313
 314 /*******************************************************************
 315  *
 316  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 317  *
 318  * @details
 319  *
 320  *    Function : fillSubcarrierSpaceUl
 321  *
 322  *    Functionality:
 323  *         -checks the value with the bitmask and
 324  *         -fills cellPtr's subcarrier spacing in UL
 325  *
 326  * @params[in] Pointer to ClCellParam
 327  *             Value to be compared
 328  * @return void
 329  *
 330  * ****************************************************************/
 331
 332 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 333 {
 334    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 335    {
 336       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 337    }
 338    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 339    {
 340       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 341    }
 342    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 343    {
 344       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 345    }
 346    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 347    {
 348       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 349    }
 350    else
 351    {
 352       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 353    }
 354 }
 355
 356 /*******************************************************************
 357  *
 358  * @brief fills the uplink bandwidth by comparing the bitmask
 359  *
 360  * @details
 361  *
 362  *    Function : fillBandwidthUl
 363  *
 364  *    Functionality:
 365  *         -checks the value with the bitmask and
 366  *          fills the cellPtr's UL Bandwidth
 367  *
 368  *
 369  *
 370  * @params[in] Pointer to ClCellParam
 371  *             Value to be compared
 372  * @return void
 373  *
 374  *
 375  * ****************************************************************/
 376
 377 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 378 {
 379    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 380    {
 381       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 382    }
 383    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 384    {
 385       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 386    }
 387    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 388    {
 389       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 390    }
 391    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 392    {
 393       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 394    }
 395    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 396    {
 397       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 398    }
 399    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 400    {
 401       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 402    }
 403    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 404    {
 405       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 406    }
 407    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 408    {
 409       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 410    }
 411    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 412    {
 413       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 414    }
 415    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 416    {
 417       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 418    }
 419    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 420    {
 421       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 422    }
 423    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 424    {
 425       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 426    }
 427    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 428    {
 429       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 430    }
 431    else
 432    {
 433       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 434    }
 435 }
 436 /*******************************************************************
 437  *
 438  * @brief fills the CCE maping by comparing the bitmask
 439  *
 440  * @details
 441  *
 442  *    Function : fillCCEmaping
 443  *
 444  *    Functionality:
 445  *         -checks the value with the bitmask and
 446  *          fills the cellPtr's CCE Mapping Type
 447  *
 448  *
 449  * @params[in] Pointer to ClCellParam
 450  *             Value to be compared
 451  * @return void
 452  *
 453  * ****************************************************************/
 454
 455 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 456 {
 457    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 458    {
 459       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 460    }
 461    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 462    {
 463       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 464    }
 465    else
 466    {
 467       (*cellPtr)->cceMappingType = INVALID_VALUE;
 468    }
 469 }
 470
 471 /*******************************************************************
 472  *
 473  * @brief fills the PUCCH format by comparing the bitmask
 474  *
 475  * @details
 476  *
 477  *    Function : fillPucchFormat
 478  *
 479  *    Functionality:
 480  *         -checks the value with the bitmask and
 481  *          fills the cellPtr's pucch format
 482  *
 483  *
 484  * @params[in] Pointer to ClCellParam
 485  *             Value to be compared
 486  * @return void
 487  *
 488  * ****************************************************************/
 489
 490 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 491 {
 492    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 493    {
 494       (*cellPtr)->pucchFormats    = FORMAT_0;
 495    }
 496    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 497    {
 498       (*cellPtr)->pucchFormats    = FORMAT_1;
 499    }
 500    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 501    {
 502       (*cellPtr)->pucchFormats    = FORMAT_2;
 503    }
 504    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 505    {
 506       (*cellPtr)->pucchFormats    = FORMAT_3;
 507    }
 508    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 509    {
 510       (*cellPtr)->pucchFormats    = FORMAT_4;
 511    }
 512    else
 513    {
 514       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 515    }
 516 }
 517
 518 /*******************************************************************
 519  *
 520  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 521  *
 522  * @details
 523  *
 524  *    Function : fillPdschMappingType
 525  *
 526  *    Functionality:
 527  *         -checks the value with the bitmask and
 528  *          fills the cellPtr's PDSCH MappingType
 529  *
 530  * @params[in] Pointer to ClCellParam
 531  *             Value to be compared
 532  * @return void
 533  *
 534  * ****************************************************************/
 535
 536 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 537 {
 538    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 539    {
 540       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 541    }
 542    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 543    {
 544       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 545    }
 546    else
 547    {
 548       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 549    }
 550 }
 551
 552 /*******************************************************************
 553  *
 554  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 555  *
 556  * @details
 557  *
 558  *    Function : fillPdschAllocationType
 559  *
 560  *    Functionality:
 561  *         -checks the value with the bitmask and
 562  *          fills the cellPtr's PDSCH AllocationType
 563  *
 564  * @params[in] Pointer to ClCellParam
 565  *             Value to be compared
 566  * @return void
 567  *
 568  * ****************************************************************/
 569
 570 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 571 {
 572    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 573    {
 574       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 575    }
 576    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 577    {
 578       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 579    }
 580    else
 581    {
 582       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 583    }
 584 }
 585
 586 /*******************************************************************
 587  *
 588  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 589  *
 590  * @details
 591  *
 592  *    Function : fillPrbMappingType
 593  *
 594  *    Functionality:
 595  *         -checks the value with the bitmask and
 596  *          fills the cellPtr's PRB Mapping Type
 597  *
 598  * @params[in] Pointer to ClCellParam
 599  *             Value to be compared
 600  * @return void
 601  *
 602  ******************************************************************/
 603 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 604 {
 605    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 606    {
 607       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 608    }
 609    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 610    {
 611       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 612    }
 613    else
 614    {
 615       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 616    }
 617 }
 618
 619 /*******************************************************************
 620  *
 621  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 622  *
 623  * @details
 624  *
 625  *    Function : fillPdschDmrsConfigType
 626  *
 627  *    Functionality:
 628  *         -checks the value with the bitmask and
 629  *          fills the cellPtr's DmrsConfig Type
 630  *
 631  * @params[in] Pointer to ClCellParam
 632  *             Value to be compared
 633  * @return void
 634  *
 635  ******************************************************************/
 636
 637 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 638 {
 639    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 640    {
 641       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 642    }
 643    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 644    {
 645       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 646    }
 647    else
 648    {
 649       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 650    }
 651 }
 652
 653 /*******************************************************************
 654  *
 655  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 656  *
 657  * @details
 658  *
 659  *    Function : fillPdschDmrsLength
 660  *
 661  *    Functionality:
 662  *         -checks the value with the bitmask and
 663  *          fills the cellPtr's PdschDmrsLength
 664  *
 665  * @params[in] Pointer to ClCellParam
 666  *             Value to be compared
 667  * @return void
 668  *
 669  ******************************************************************/
 670 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 671 {
 672    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 673    {
 674       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 675    }
 676    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 677    {
 678       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 679    }
 680    else
 681    {
 682       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 683    }
 684 }
 685
 686 /*******************************************************************
 687  *
 688  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 689  *
 690  * @details
 691  *
 692  *    Function : fillPdschDmrsAddPos
 693  *
 694  *    Functionality:
 695  *         -checks the value with the bitmask and
 696  *          fills the cellPtr's Pdsch DmrsAddPos
 697  *
 698  * @params[in] Pointer to ClCellParam
 699  *             Value to be compared
 700  * @return void
 701  *
 702  ******************************************************************/
 703
 704 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 705 {
 706    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 707    {
 708       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 709    }
 710    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 711    {
 712       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 713    }
 714    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 715    {
 716       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 717    }
 718    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 719    {
 720       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 721    }
 722    else
 723    {
 724       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 725    }
 726 }
 727
 728 /*******************************************************************
 729  *
 730  * @brief fills the Modulation Order in DL by comparing the bitmask
 731  *
 732  * @details
 733  *
 734  *    Function : fillModulationOrderDl
 735  *
 736  *    Functionality:
 737  *         -checks the value with the bitmask and
 738  *          fills the cellPtr's ModulationOrder in DL.
 739  *
 740  * @params[in] Pointer to ClCellParam
 741  *             Value to be compared
 742  * @return void
 743  *
 744  ******************************************************************/
 745 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 746 {
 747    if(value == 0 )
 748    {
 749       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 750    }
 751    else if(value == 1)
 752    {
 753       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 754    }
 755    else if(value == 2)
 756    {
 757       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 758    }
 759    else if(value == 3)
 760    {
 761       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 762    }
 763    else
 764    {
 765       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 766    }
 767 }
 768
 769 /*******************************************************************
 770  *
 771  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 772  *
 773  * @details
 774  *
 775  *    Function : fillPuschDmrsConfigType
 776  *
 777  *    Functionality:
 778  *         -checks the value with the bitmask and
 779  *          fills the cellPtr's PUSCH DmrsConfigType
 780  *
 781  * @params[in] Pointer to ClCellParam
 782  *             Value to be compared
 783  * @return void
 784  *
 785  ******************************************************************/
 786
 787 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 788 {
 789    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 790    {
 791       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 792    }
 793    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 794    {
 795       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 796    }
 797    else
 798    {
 799       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 800    }
 801 }
 802
 803 /*******************************************************************
 804  *
 805  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 806  *
 807  * @details
 808  *
 809  *    Function : fillPuschDmrsLength
 810  *
 811  *    Functionality:
 812  *         -checks the value with the bitmask and
 813  *          fills the cellPtr's PUSCH DmrsLength
 814  *
 815  * @params[in] Pointer to ClCellParam
 816  *             Value to be compared
 817  * @return void
 818  *
 819  ******************************************************************/
 820
 821 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 822 {
 823    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 824    {
 825       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 826    }
 827    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 828    {
 829       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 830    }
 831    else
 832    {
 833       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 834    }
 835 }
 836
 837 /*******************************************************************
 838  *
 839  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 840  *
 841  * @details
 842  *
 843  *    Function : fillPuschDmrsAddPos
 844  *
 845  *    Functionality:
 846  *         -checks the value with the bitmask and
 847  *          fills the cellPtr's PUSCH DmrsAddPos
 848  *
 849  * @params[in] Pointer to ClCellParam
 850  *             Value to be compared
 851  * @return void
 852  *
 853  ******************************************************************/
 854
 855 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 856 {
 857    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 858    {
 859       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 860    }
 861    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 862    {
 863       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 864    }
 865    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 866    {
 867       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 868    }
 869    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 870    {
 871       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 872    }
 873    else
 874    {
 875       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 876    }
 877 }
 878
 879 /*******************************************************************
 880  *
 881  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 882  *
 883  * @details
 884  *
 885  *    Function : fillPuschMappingType
 886  *
 887  *    Functionality:
 888  *         -checks the value with the bitmask and
 889  *          fills the cellPtr's PUSCH MappingType
 890  *
 891  * @params[in] Pointer to ClCellParam
 892  *             Value to be compared
 893  * @return void
 894  *
 895  ******************************************************************/
 896
 897 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 898 {
 899    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 900    {
 901       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 902    }
 903    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 904    {
 905       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 906    }
 907    else
 908    {
 909       (*cellPtr)->puschMappingType = INVALID_VALUE;
 910    }
 911 }
 912
 913 /*******************************************************************
 914  *
 915  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 916  *
 917  * @details
 918  *
 919  *    Function : fillPuschAllocationType
 920  *
 921  *    Functionality:
 922  *         -checks the value with the bitmask and
 923  *          fills the cellPtr's PUSCH AllocationType
 924  *
 925  * @params[in] Pointer to ClCellParam
 926  *             Value to be compared
 927  * @return void
 928  *
 929  ******************************************************************/
 930
 931 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 932 {
 933    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 934    {
 935       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 936    }
 937    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 938    {
 939       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 940    }
 941    else
 942    {
 943       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 944    }
 945 }
 946
 947 /*******************************************************************
 948  *
 949  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 950  *
 951  * @details
 952  *
 953  *    Function : fillPuschPrbMappingType
 954  *
 955  *    Functionality:
 956  *         -checks the value with the bitmask and
 957  *          fills the cellPtr's PUSCH PRB MApping Type
 958  *
 959  * @params[in] Pointer to ClCellParam
 960  *             Value to be compared
 961  * @return void
 962  *
 963  ******************************************************************/
 964
 965 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 966 {
 967    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 968    {
 969       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 970    }
 971    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 972    {
 973       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 974    }
 975    else
 976    {
 977       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 978    }
 979 }
 980
 981 /*******************************************************************
 982  *
 983  * @brief fills the Modulation Order in Ul by comparing the bitmask
 984  *
 985  * @details
 986  *
 987  *    Function : fillModulationOrderUl
 988  *
 989  *    Functionality:
 990  *         -checks the value with the bitmask and
 991  *          fills the cellPtr's Modualtsion Order in UL.
 992  *
 993  * @params[in] Pointer to ClCellParam
 994  *             Value to be compared
 995  * @return void
 996  *
 997  ******************************************************************/
 998
 999 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1000 {
1001    if(value == 0)
1002    {
1003       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1004    }
1005    else if(value == 1)
1006    {
1007       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1008    }
1009    else if(value == 2)
1010    {
1011       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1012    }
1013    else if(value == 3)
1014    {
1015       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1016    }
1017    else
1018    {
1019       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1020    }
1021 }
1022
1023 /*******************************************************************
1024  *
1025  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1026  *
1027  * @details
1028  *
1029  *    Function : fillPuschAggregationFactor
1030  *
1031  *    Functionality:
1032  *         -checks the value with the bitmask and
1033  *          fills the cellPtr's PUSCH Aggregation Factor
1034  *
1035  * @params[in] Pointer to ClCellParam
1036  *             Value to be compared
1037  * @return void
1038  *
1039  ******************************************************************/
1040
1041 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1042 {
1043    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1044    {
1045       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1046    }
1047    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1048    {
1049       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1050    }
1051    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1052    {
1053       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1054    }
1055    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1056    {
1057       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1058    }
1059    else
1060    {
1061       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1062    }
1063 }
1064
1065 /*******************************************************************
1066  *
1067  * @brief fills the PRACH Long Format by comparing the bitmask
1068  *
1069  * @details
1070  *
1071  *    Function : fillPrachLongFormat
1072  *
1073  *    Functionality:
1074  *         -checks the value with the bitmask and
1075  *          fills the cellPtr's PRACH Long Format
1076  *
1077  * @params[in] Pointer to ClCellParam
1078  *             Value to be compared
1079  * @return void
1080  *
1081  ******************************************************************/
1082
1083 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1084 {
1085    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1086    {
1087       (*cellPtr)->prachLongFormats    = FORMAT_0;
1088    }
1089    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1090    {
1091       (*cellPtr)->prachLongFormats    = FORMAT_1;
1092    }
1093    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1094    {
1095       (*cellPtr)->prachLongFormats    = FORMAT_2;
1096    }
1097    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1098    {
1099       (*cellPtr)->prachLongFormats    = FORMAT_3;
1100    }
1101    else
1102    {
1103       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1104    }
1105 }
1106
1107 /*******************************************************************
1108  *
1109  * @brief fills the PRACH Short Format by comparing the bitmask
1110  *
1111  * @details
1112  *
1113  *    Function : fillPrachShortFormat
1114  *
1115  *    Functionality:
1116  *         -checks the value with the bitmask and
1117  *          fills the cellPtr's PRACH ShortFormat
1118  *
1119  * @params[in] Pointer to ClCellParam
1120  *             Value to be compared
1121  * @return void
1122  *
1123  ******************************************************************/
1124
1125 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1126 {
1127    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1128    {
1129       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1130    }
1131    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1132    {
1133       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1134    }
1135    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1136    {
1137       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1138    }
1139    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1140    {
1141       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1142    }
1143    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1144    {
1145       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1146    }
1147    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1148    {
1149       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1150    }
1151    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1152    {
1153       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1154    }
1155    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1156    {
1157       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1158    }
1159    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1160    {
1161       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1162    }
1163    else
1164    {
1165       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1166    }
1167 }
1168
1169 /*******************************************************************
1170  *
1171  * @brief fills the Fd Occasions Type by comparing the bitmask
1172  *
1173  * @details
1174  *
1175  *    Function : fillFdOccasions
1176  *
1177  *    Functionality:
1178  *         -checks the value with the bitmask and
1179  *          fills the cellPtr's Fd Occasions
1180  *
1181  * @params[in] Pointer to ClCellParam
1182  *             Value to be compared
1183  * @return void
1184  *
1185  ******************************************************************/
1186
1187 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1188 {
1189    if(value == 0)
1190    {
1191       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1192    }
1193    else if(value == 1)
1194    {
1195       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1196    }
1197    else if(value == 3)
1198    {
1199       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1200    }
1201    else if(value == 4)
1202    {
1203       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1204    }
1205    else
1206    {
1207       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1208    }
1209 }
1210
1211 /*******************************************************************
1212  *
1213  * @brief fills the RSSI Measurement by comparing the bitmask
1214  *
1215  * @details
1216  *
1217  *    Function : fillRssiMeas
1218  *
1219  *    Functionality:
1220  *         -checks the value with the bitmask and
1221  *          fills the cellPtr's RSSI Measurement report
1222  *
1223  * @params[in] Pointer to ClCellParam
1224  *             Value to be compared
1225  * @return void
1226  *
1227  ******************************************************************/
1228
1229 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1230 {
1231    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1232    {
1233       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1234    }
1235    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1236    {
1237       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1238    }
1239    else
1240    {
1241       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1242    }
1243 }
1244
1245 /*******************************************************************
1246  *
1247  * @brief Returns the TLVs value
1248  *
1249  * @details
1250  *
1251  *    Function : getParamValue
1252  *
1253  *    Functionality:
1254  *         -return TLVs value
1255  *
1256  * @params[in]
1257  * @return ROK     - temp
1258  *         RFAILED - failure
1259  *
1260  * ****************************************************************/
1261
1262 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1263 {
1264    void *posPtr;
1265    posPtr   = &tlv->tl.tag;
1266    posPtr   += sizeof(tlv->tl.tag);
1267    posPtr   += sizeof(tlv->tl.length);
1268    /*TO DO: malloc to SSI memory */
1269    if(type == FAPI_UINT_8)
1270    {
1271       return(*(uint8_t *)posPtr);
1272    }
1273    else if(type == FAPI_UINT_16)
1274    {
1275       return(*(uint16_t *)posPtr);
1276    }
1277    else if(type == FAPI_UINT_32)
1278    {
1279       return(*(uint32_t *)posPtr);
1280    }
1281    else
1282    {
1283       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1284       return RFAILED;
1285    }
1286 }
1287 #endif /* FAPI */
1288
1289 /*******************************************************************
1290  *
1291  * @brief Modifes the received mibPdu to uint32 bit
1292  *        and stores it in MacCellCfg
1293  *
1294  * @details
1295  *
1296  *    Function : setMibPdu
1297  *
1298  *    Functionality:
1299  *         -Sets the MibPdu
1300  *
1301  * @params[in] Pointer to mibPdu
1302  *             pointer to modified value
1303  ******************************************************************/
1304 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1305 {
1306    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1307    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1308    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1309 }
1310
1311 /*******************************************************************
1312  *
1313  * @brief Sends FAPI Param req to PHY
1314  *
1315  * @details
1316  *
1317  *    Function : lwr_mac_procParamReqEvt
1318  *
1319  *    Functionality:
1320  *         -Sends FAPI Param req to PHY
1321  *
1322  * @params[in]
1323  * @return ROK     - success
1324  *         RFAILED - failure
1325  *
1326  * ****************************************************************/
1327
1328 uint8_t lwr_mac_procParamReqEvt(void *msg)
1329 {
1330 #ifdef INTEL_FAPI
1331 #ifdef CALL_FLOW_DEBUG_LOG
1332    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1333 #endif
1334
1335    /* startGuardTimer(); */
1336    fapi_param_req_t         *paramReq = NULL;
1337    fapi_msg_header_t        *msgHeader;
1338    p_fapi_api_queue_elem_t  paramReqElem;
1339    p_fapi_api_queue_elem_t  headerElem;
1340
1341    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1342    if(paramReq != NULL)
1343    {
1344       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1345          sizeof(fapi_tx_data_req_t));
1346       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1347       memset(paramReq, 0, sizeof(fapi_param_req_t));
1348       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1349
1350       /* Fill message header */
1351       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1352       if(!headerElem)
1353       {
1354          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1355          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1356          return RFAILED;
1357       }
1358       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1359          sizeof(fapi_msg_header_t));
1360       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1361       msgHeader->num_msg = 1;
1362       msgHeader->handle = 0;
1363
1364       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1365       LwrMacSendToL1(headerElem);
1366    }
1367    else
1368    {
1369       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1370       return RFAILED;
1371    }
1372 #endif
1373    return ROK;
1374 }
1375
1376 /*******************************************************************
1377  *
1378  * @brief Sends FAPI Param Response to MAC via PHY
1379  *
1380  * @details
1381  *
1382  *    Function : lwr_mac_procParamRspEvt
1383  *
1384  *    Functionality:
1385  *         -Sends FAPI Param rsp to MAC via PHY
1386  *
1387  * @params[in]
1388  * @return ROK     - success
1389  *         RFAILED - failure
1390  *
1391  * ****************************************************************/
1392
1393 uint8_t lwr_mac_procParamRspEvt(void *msg)
1394 {
1395 #ifdef INTEL_FAPI
1396    /* stopGuardTimer(); */
1397    uint8_t index;
1398    uint32_t encodedVal;
1399    fapi_param_resp_t *paramRsp;
1400    ClCellParam *cellParam = NULLP;
1401
1402    paramRsp = (fapi_param_resp_t *)msg;
1403    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1404
1405    if(paramRsp != NULLP)
1406    {
1407       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1408       if(cellParam != NULLP)
1409       {
1410          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1411          if(paramRsp->error_code == MSG_OK)
1412          {
1413             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1414             {
1415                switch(paramRsp->tlvs[index].tl.tag)
1416                {
1417                   case FAPI_RELEASE_CAPABILITY_TAG:
1418                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1419                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1420                      {
1421                         cellParam->releaseCapability = RELEASE_15;
1422                      }
1423                      break;
1424
1425                   case FAPI_PHY_STATE_TAG:
1426                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1427                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1428                      {
1429                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1430                         return RFAILED;
1431                      }
1432                      break;
1433
1434                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1435                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1436                      if(encodedVal != RFAILED && encodedVal != 0)
1437                      {
1438                         cellParam->skipBlankDlConfig = SUPPORTED;
1439                      }
1440                      else
1441                      {
1442                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1443                      }
1444                      break;
1445
1446                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1447                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1448                      if(encodedVal != RFAILED && encodedVal != 0)
1449                      {
1450                         cellParam->skipBlankUlConfig = SUPPORTED;
1451                      }
1452                      else
1453                      {
1454                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1455                      }
1456                      break;
1457
1458                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1459                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1460                      break;
1461
1462                   case FAPI_CYCLIC_PREFIX_TAG:
1463                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1464                      if(encodedVal != RFAILED)
1465                      {
1466                         fillCyclicPrefix(encodedVal, &cellParam);
1467                      }
1468                      break;
1469
1470                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1471                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1472                      if(encodedVal != RFAILED)
1473                      {
1474                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1475                      }
1476                      break;
1477
1478                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1479                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1480                      if(encodedVal != RFAILED)
1481                      {
1482                         fillBandwidthDl(encodedVal, &cellParam);
1483                      }
1484                      break;
1485
1486                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1487                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1488                      if(encodedVal != RFAILED)
1489                      {
1490                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1491                      }
1492                      break;
1493
1494                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1495                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1496                      if(encodedVal != RFAILED)
1497                      {
1498                         fillBandwidthUl(encodedVal, &cellParam);
1499                      }
1500                      break;
1501
1502                   case FAPI_CCE_MAPPING_TYPE_TAG:
1503                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1504                      if(encodedVal != RFAILED)
1505                      {
1506                         fillCCEmaping(encodedVal, &cellParam);
1507                      }
1508                      break;
1509
1510                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1511                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1512                      if(encodedVal != RFAILED && encodedVal != 0)
1513                      {
1514                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1515                      }
1516                      else
1517                      {
1518                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1519                      }
1520                      break;
1521
1522                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1523                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1524                      if(encodedVal != RFAILED && encodedVal != 0)
1525                      {
1526                         cellParam->precoderGranularityCoreset = SUPPORTED;
1527                      }
1528                      else
1529                      {
1530                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1531                      }
1532                      break;
1533
1534                   case FAPI_PDCCH_MU_MIMO_TAG:
1535                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1536                      if(encodedVal != RFAILED && encodedVal != 0)
1537                      {
1538                         cellParam->pdcchMuMimo = SUPPORTED;
1539                      }
1540                      else
1541                      {
1542                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1543                      }
1544                      break;
1545
1546                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1547                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1548                      if(encodedVal != RFAILED && encodedVal != 0)
1549                      {
1550                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1551                      }
1552                      else
1553                      {
1554                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1555                      }
1556                      break;
1557
1558                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1559                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1560                      break;
1561
1562                   case FAPI_PUCCH_FORMATS_TAG:
1563                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1564                      if(encodedVal != RFAILED)
1565                      {
1566                         fillPucchFormat(encodedVal, &cellParam);
1567                      }
1568                      break;
1569
1570                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1571                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1572                      break;
1573
1574                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1575                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1576                      if(encodedVal != RFAILED)
1577                      {
1578                         fillPdschMappingType(encodedVal, &cellParam);
1579                      }
1580                      break;
1581
1582                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1583                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1584                      if(encodedVal != RFAILED)
1585                      {
1586                         fillPdschAllocationType(encodedVal, &cellParam);
1587                      }
1588                      break;
1589
1590                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1591                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1592                      if(encodedVal != RFAILED)
1593                      {
1594                         fillPrbMappingType(encodedVal, &cellParam);
1595                      }
1596                      break;
1597
1598                   case FAPI_PDSCH_CBG_TAG:
1599                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1600                      if(encodedVal != RFAILED && encodedVal != 0)
1601                      {
1602                         cellParam->pdschCbg = SUPPORTED;
1603                      }
1604                      else
1605                      {
1606                         cellParam->pdschCbg = NOT_SUPPORTED;
1607                      }
1608                      break;
1609
1610                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1611                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1612                      if(encodedVal != RFAILED)
1613                      {
1614                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1615                      }
1616                      break;
1617
1618                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1619                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1620                      if(encodedVal != RFAILED)
1621                      {
1622                         fillPdschDmrsLength(encodedVal, &cellParam);
1623                      }
1624                      break;
1625
1626                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1627                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1628                      if(encodedVal != RFAILED)
1629                      {
1630                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1631                      }
1632                      break;
1633
1634                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1635                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1636                      break;
1637
1638                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1639                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1640                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1641                      {
1642                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1643                      }
1644                      break;
1645
1646                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1647                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1648                      if(encodedVal != RFAILED)
1649                      {
1650                         fillModulationOrderDl(encodedVal, &cellParam);
1651                      }
1652                      break;
1653
1654                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1655                      cellParam->maxMuMimoUsersDl         = \
1656                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1657                      break;
1658
1659                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1660                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1661                      if(encodedVal != RFAILED && encodedVal != 0)
1662                      {
1663                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1664                      }
1665                      else
1666                      {
1667                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1668                      }
1669                      break;
1670
1671                   case FAPI_PREMPTIONSUPPORT_TAG:
1672                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1673                      if(encodedVal != RFAILED && encodedVal != 0)
1674                      {
1675                         cellParam->premptionSupport = SUPPORTED;
1676                      }
1677                      else
1678                      {
1679                         cellParam->premptionSupport = NOT_SUPPORTED;
1680                      }
1681                      break;
1682
1683                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1684                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1685                      if(encodedVal != RFAILED && encodedVal != 0)
1686                      {
1687                         cellParam->pdschNonSlotSupport = SUPPORTED;
1688                      }
1689                      else
1690                      {
1691                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1692                      }
1693                      break;
1694
1695                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1696                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1697                      if(encodedVal != RFAILED && encodedVal != 0)
1698                      {
1699                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1700                      }
1701                      else
1702                      {
1703                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1704                      }
1705                      break;
1706
1707                   case FAPI_UCI_ONLY_PUSCH_TAG:
1708                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1709                      if(encodedVal != RFAILED && encodedVal != 0)
1710                      {
1711                         cellParam->uciOnlyPusch = SUPPORTED;
1712                      }
1713                      else
1714                      {
1715                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1716                      }
1717                      break;
1718
1719                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1720                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1721                      if(encodedVal != RFAILED && encodedVal != 0)
1722                      {
1723                         cellParam->puschFrequencyHopping = SUPPORTED;
1724                      }
1725                      else
1726                      {
1727                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1728                      }
1729                      break;
1730
1731                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1732                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1733                      if(encodedVal != RFAILED)
1734                      {
1735                         fillPuschDmrsConfig(encodedVal, &cellParam);
1736                      }
1737                      break;
1738
1739                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1740                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1741                      if(encodedVal != RFAILED)
1742                      {
1743                         fillPuschDmrsLength(encodedVal, &cellParam);
1744                      }
1745                      break;
1746
1747                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1748                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1749                      if(encodedVal != RFAILED)
1750                      {
1751                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1752                      }
1753                      break;
1754
1755                   case FAPI_PUSCH_CBG_TAG:
1756                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1757                      if(encodedVal != RFAILED && encodedVal != 0)
1758                      {
1759                         cellParam->puschCbg = SUPPORTED;
1760                      }
1761                      else
1762                      {
1763                         cellParam->puschCbg = NOT_SUPPORTED;
1764                      }
1765                      break;
1766
1767                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1768                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1769                      if(encodedVal != RFAILED)
1770                      {
1771                         fillPuschMappingType(encodedVal, &cellParam);
1772                      }
1773                      break;
1774
1775                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1776                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1777                      if(encodedVal != RFAILED)
1778                      {
1779                         fillPuschAllocationType(encodedVal, &cellParam);
1780                      }
1781                      break;
1782
1783                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1784                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1785                      if(encodedVal != RFAILED)
1786                      {
1787                         fillPuschPrbMappingType(encodedVal, &cellParam);
1788                      }
1789                      break;
1790
1791                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1792                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1793                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1794                      {
1795                         cellParam->puschMaxPtrsPorts = encodedVal;
1796                      }
1797                      break;
1798
1799                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1800                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1801                      break;
1802
1803                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1804                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1805                      break;
1806
1807                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1808                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1809                      if(encodedVal != RFAILED)
1810                      {
1811                         fillModulationOrderUl(encodedVal, &cellParam);
1812                      }
1813                      break;
1814
1815                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1816                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1817                      break;
1818
1819                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1820                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1821                      if(encodedVal != RFAILED && encodedVal != 0)
1822                      {
1823                         cellParam->dftsOfdmSupport = SUPPORTED;
1824                      }
1825                      else
1826                      {
1827                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1828                      }
1829                      break;
1830
1831                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1832                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1833                      if(encodedVal != RFAILED)
1834                      {
1835                         fillPuschAggregationFactor(encodedVal, &cellParam);
1836                      }
1837                      break;
1838
1839                   case FAPI_PRACH_LONG_FORMATS_TAG:
1840                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1841                      if(encodedVal != RFAILED)
1842                      {
1843                         fillPrachLongFormat(encodedVal, &cellParam);
1844                      }
1845                      break;
1846
1847                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1848                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1849                      if(encodedVal != RFAILED)
1850                      {
1851                         fillPrachShortFormat(encodedVal, &cellParam);
1852                      }
1853                      break;
1854
1855                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1856                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1857                      if(encodedVal != RFAILED && encodedVal != 0)
1858                      {
1859                         cellParam->prachRestrictedSets = SUPPORTED;
1860                      }
1861                      else
1862                      {
1863                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1864                      }
1865                      break;
1866
1867                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1868                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1869                      if(encodedVal != RFAILED)
1870                      {
1871                         fillFdOccasions(encodedVal, &cellParam);
1872                      }
1873                      break;
1874
1875                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1876                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1877                      if(encodedVal != RFAILED)
1878                      {
1879                         fillRssiMeas(encodedVal, &cellParam);
1880                      }
1881                      break;
1882                   default:
1883                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1884                      break;
1885                }
1886             }
1887             MAC_FREE(cellParam, sizeof(ClCellParam));
1888             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1889             return ROK;
1890          }
1891          else
1892          {
1893             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1894             return RFAILED;
1895          }
1896       }
1897       else
1898       {
1899          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1900          return RFAILED;
1901       }
1902    }
1903    else
1904    {
1905       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1906       return RFAILED;
1907    }
1908 #else
1909    return ROK;
1910 #endif
1911 }
1912
1913 #ifdef INTEL_TIMER_MODE
1914 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1915 {
1916    void * wlsHdlr = NULLP;
1917    fapi_msg_header_t *msgHeader;
1918    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1919    p_fapi_api_queue_elem_t  headerElem;
1920    p_fapi_api_queue_elem_t  iqSampleElem;
1921    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1922
1923    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1924
1925    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1926
1927    /* Fill IQ sample req */
1928    mtGetWlsHdl(&wlsHdlr);
1929    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1930       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1931    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932    if(!iqSampleElem)
1933    {
1934       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1935       return RFAILED;
1936    }
1937    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1938       sizeof(fapi_vendor_ext_iq_samples_req_t));
1939
1940    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1941    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1942    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1943       sizeof(fapi_vendor_ext_iq_samples_req_t));
1944
1945    iqSampleReq->iq_samples_info.carrNum = 0;
1946    iqSampleReq->iq_samples_info.numSubframes = 40;
1947    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1948    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1949    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1950    iqSampleReq->iq_samples_info.startFrameNum = 0;
1951    iqSampleReq->iq_samples_info.startSlotNum = 0;
1952    iqSampleReq->iq_samples_info.startSymNum = 0;
1953    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1954    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1955
1956    /* TODO : Fill remaining parameters */
1957
1958    /* Fill message header */
1959    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1960    if(!headerElem)
1961    {
1962       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1963       return RFAILED;
1964    }
1965    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1966      sizeof(fapi_msg_header_t));
1967    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1968    msgHeader->num_msg = 1;
1969    msgHeader->handle = 0;
1970
1971    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1972    LwrMacSendToL1(headerElem);
1973    return ROK;
1974 }
1975 #endif
1976
1977 /*******************************************************************
1978  *
1979  * @brief Sends FAPI Config req to PHY
1980  *
1981  * @details
1982  *
1983  *    Function : lwr_mac_procConfigReqEvt
1984  *
1985  *    Functionality:
1986  *         -Sends FAPI Config Req to PHY
1987  *
1988  * @params[in]
1989  * @return ROK     - success
1990  *         RFAILED - failure
1991  *
1992  * ****************************************************************/
1993
1994 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1995 {
1996 #ifdef INTEL_FAPI
1997 #ifdef CALL_FLOW_DEBUG_LOG
1998    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
1999 #endif
2000 #ifdef NR_TDD
2001    uint8_t slotIdx = 0;
2002    uint8_t symbolIdx =0;
2003 #endif
2004    uint16_t index = 0;
2005    uint16_t *cellId =NULLP;
2006    uint16_t cellIdx =0;
2007    uint32_t msgLen = 0;
2008    uint32_t mib = 0;
2009    MacCellCfg macCfgParams;
2010    fapi_vendor_msg_t *vendorMsg;
2011    fapi_config_req_t *configReq;
2012    fapi_msg_header_t *msgHeader;
2013    p_fapi_api_queue_elem_t  headerElem;
2014    p_fapi_api_queue_elem_t  vendorMsgQElem;
2015    p_fapi_api_queue_elem_t  cfgReqQElem;
2016
2017    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2018          lwrMacCb.phyState);
2019
2020    cellId = (uint16_t *)msg;
2021    GET_CELL_IDX(*cellId, cellIdx);
2022    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2023
2024    /* Fill Cell Configuration in lwrMacCb */
2025    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2026    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2027    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2028    lwrMacCb.numCell++;
2029
2030    /* Allocte And fill Vendor msg */
2031    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2032    if(!vendorMsgQElem)
2033    {
2034       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2035       return RFAILED;
2036    }
2037    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2038    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2039    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2040    vendorMsg->config_req_vendor.hopping_id = 0;
2041    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2042    vendorMsg->config_req_vendor.group_hop_flag = 0;
2043    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2044    vendorMsg->config_req_vendor.urllc_capable = 0;
2045    vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2046    vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2047    vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2048    vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2049    vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2050    vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2051    vendorMsg->start_req_vendor.sfn = 0;
2052    vendorMsg->start_req_vendor.slot = 0;
2053    vendorMsg->start_req_vendor.mode = 4;
2054 #ifdef DEBUG_MODE
2055    vendorMsg->start_req_vendor.count = 0;
2056    vendorMsg->start_req_vendor.period = 1;
2057 #endif
2058    /* Fill FAPI config req */
2059    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2060    if(!cfgReqQElem)
2061    {
2062       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2063       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2064       return RFAILED;
2065    }
2066    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2067          sizeof(fapi_config_req_t));
2068
2069    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2070    memset(configReq, 0, sizeof(fapi_config_req_t));
2071    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2072 #ifndef NR_TDD
2073    configReq->number_of_tlvs = 25;
2074 #else
2075    configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2076 #endif
2077
2078    msgLen = sizeof(configReq->number_of_tlvs);
2079
2080    fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2081          sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
2082    fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2083          sizeof(uint32_t), macCfgParams.carrCfg.dlFreq, &msgLen);
2084    /* Due to bug in Intel FT code, commenting TLVs that are are not
2085     * needed to avoid error. Must be uncommented when FT bug is fixed */
2086    //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2087    sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2088    //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2089    sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2090    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2091          sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2092    fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2093          sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
2094    fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2095          sizeof(uint32_t), macCfgParams.carrCfg.ulFreq, &msgLen);
2096    //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2097    sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2098    //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2099    sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2100    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2101          sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2102    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2103    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2104
2105    /* fill cell config */
2106    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2107          sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2108    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2109          sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2110
2111    /* fill SSB configuration */
2112    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2113          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2114    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2115    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2116    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2117          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2118
2119    /* fill PRACH configuration */
2120    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2121    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2122    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2123          sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2124    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2125          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2126    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2127          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2128    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2129          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2130    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2131          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2132    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2133    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2134    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2135          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2136    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2137          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2138    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2139    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2140    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2141       {
2142       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2143       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2144       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2145       &msgLen);
2146       }
2147       else
2148       {
2149       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2150       }*/
2151
2152    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2153          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2154    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2155    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2156
2157    /* fill SSB table */
2158    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2159          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2160    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2161    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2162    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2163          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2164    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2165          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2166
2167    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2168    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2169          sizeof(uint32_t), mib, &msgLen);
2170
2171    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2172          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2173    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2174          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2175    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2176    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2177    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2178    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2179
2180 #ifdef NR_TDD
2181    /* fill TDD table */
2182    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2183          sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2184
2185    for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2186    {
2187       for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2188       {
2189          /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2190          if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2191                (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2192          {
2193             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2194                   sizeof(uint8_t), DL_SYMBOL, &msgLen);
2195          }
2196
2197          /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2198          else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) ||  \
2199                (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2200                 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2201          {
2202             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2203                   sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2204          }
2205          /*Fill Partial UL symbols and Full-UL slot*/
2206          else
2207          {
2208             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2209                   sizeof(uint8_t), UL_SYMBOL, &msgLen);
2210          }
2211       }
2212    }
2213 #endif
2214
2215    /* fill measurement config */
2216    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2217    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2218
2219    /* fill DMRS Type A Pos */
2220    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2221          sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2222
2223    /* Fill message header */
2224    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2225    if(!headerElem)
2226    {
2227       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2228       LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2229       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2230       return RFAILED;
2231    }
2232    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2233          sizeof(fapi_msg_header_t));
2234    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2235    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2236    msgHeader->handle = 0;
2237
2238    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2239    LwrMacSendToL1(headerElem);
2240 #endif
2241
2242    return ROK;
2243 } /* lwr_mac_handleConfigReqEvt */
2244
2245 /*******************************************************************
2246  *
2247  * @brief Processes config response from phy
2248  *
2249  * @details
2250  *
2251  *    Function : lwr_mac_procConfigRspEvt
2252  *
2253  *    Functionality:
2254  *          Processes config response from phy
2255  *
2256  * @params[in] FAPI message pointer
2257  * @return ROK     - success
2258  *         RFAILED - failure
2259  *
2260  * ****************************************************************/
2261
2262 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2263 {
2264 #ifdef INTEL_FAPI
2265    fapi_config_resp_t *configRsp;
2266    configRsp = (fapi_config_resp_t *)msg;
2267
2268    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2269          lwrMacCb.phyState);
2270
2271    if(configRsp != NULL)
2272    {
2273       if(configRsp->error_code == MSG_OK)
2274       {
2275          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2276          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2277          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2278          /* TODO :
2279           * Store config response into an intermediate struture and send to MAC
2280           * Support LC and LWLC for sending config rsp to MAC
2281           */
2282          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2283       }
2284       else
2285       {
2286          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2287          return RFAILED;
2288       }
2289    }
2290    else
2291    {
2292       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2293       return RFAILED;
2294    }
2295 #endif
2296
2297    return ROK;
2298 } /* lwr_mac_procConfigRspEvt */
2299
2300 /*******************************************************************
2301  *
2302  * @brief Build and send start request to phy
2303  *
2304  * @details
2305  *
2306  *    Function : lwr_mac_procStartReqEvt
2307  *
2308  *    Functionality:
2309  *       Build and send start request to phy
2310  *
2311  * @params[in] FAPI message pointer
2312  * @return ROK     - success
2313  *         RFAILED - failure
2314  *
2315  * ****************************************************************/
2316 uint8_t lwr_mac_procStartReqEvt(void *msg)
2317 {
2318 #ifdef INTEL_FAPI
2319 #ifdef CALL_FLOW_DEBUG_LOG
2320    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2321 #endif
2322    fapi_msg_header_t *msgHeader;
2323    fapi_start_req_t *startReq;
2324    fapi_vendor_msg_t *vendorMsg;
2325    p_fapi_api_queue_elem_t  headerElem;
2326    p_fapi_api_queue_elem_t  startReqElem;
2327    p_fapi_api_queue_elem_t  vendorMsgElem;
2328
2329    /* Allocte And fill Vendor msg */
2330    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2331    if(!vendorMsgElem)
2332    {
2333       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2334       return RFAILED;
2335    }
2336    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2337    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2338    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2339    vendorMsg->start_req_vendor.sfn = 0;
2340    vendorMsg->start_req_vendor.slot = 0;
2341    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2342 #ifdef DEBUG_MODE
2343    vendorMsg->start_req_vendor.count = 0;
2344    vendorMsg->start_req_vendor.period = 1;
2345 #endif
2346
2347    /* Fill FAPI config req */
2348    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2349    if(!startReqElem)
2350    {
2351       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2352       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2353       return RFAILED;
2354    }
2355    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2356       sizeof(fapi_start_req_t));
2357
2358    startReq = (fapi_start_req_t *)(startReqElem + 1);
2359    memset(startReq, 0, sizeof(fapi_start_req_t));
2360    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2361
2362    /* Fill message header */
2363    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2364    if(!headerElem)
2365    {
2366       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2367       LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2368       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2369       return RFAILED;
2370    }
2371    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2372       sizeof(fapi_msg_header_t));
2373    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2374    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2375    msgHeader->handle = 0;
2376
2377    /* Send to PHY */
2378    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2379    LwrMacSendToL1(headerElem);
2380 #endif
2381    return ROK;
2382 } /* lwr_mac_procStartReqEvt */
2383
2384 /*******************************************************************
2385  *
2386  * @brief Sends FAPI Stop Req to PHY
2387  *
2388  * @details
2389  *
2390  *    Function : lwr_mac_procStopReqEvt
2391  *
2392  *    Functionality:
2393  *         -Sends FAPI Stop Req to PHY
2394  *
2395  * @params[in]
2396  * @return ROK     - success
2397  *         RFAILED - failure
2398  *
2399  ********************************************************************/
2400
2401 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2402 {
2403 #ifdef INTEL_FAPI
2404 #ifdef CALL_FLOW_DEBUG_LOG
2405    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2406 #endif
2407
2408    fapi_stop_req_t   *stopReq;
2409    p_fapi_api_queue_elem_t  stopReqElem;
2410
2411    vendorMsg->sfn = slotInfo.sfn;
2412    vendorMsg->slot = slotInfo.slot;
2413
2414    /* Fill FAPI stop req */
2415    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2416    if(!stopReqElem)
2417    {
2418       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2419       return RFAILED;
2420    }
2421    FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2422    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2423    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2424    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2425
2426    /* Send to PHY */
2427    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2428    prevElem->p_next = stopReqElem;
2429
2430 #endif
2431    return ROK;
2432 }
2433
2434 #ifdef INTEL_FAPI
2435 /*******************************************************************
2436  *
2437  * @brief fills SSB PDU required for DL TTI info in MAC
2438  *
2439  * @details
2440  *
2441  *    Function : fillSsbPdu
2442  *
2443  *    Functionality:
2444  *         -Fills the SSB PDU info
2445  *          stored in MAC
2446  *
2447  * @params[in] Pointer to FAPI DL TTI Req
2448  *             Pointer to RgCellCb
2449  *             Pointer to msgLen of DL TTI Info
2450  * @return ROK
2451  *
2452  ******************************************************************/
2453
2454 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2455       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2456 {
2457    uint32_t mibPayload = 0;
2458    if(dlTtiReqPdu != NULL)
2459    {
2460       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2461       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
2462       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2463       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2464       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
2465       /* ssbOfPdufstA to be filled in ssbCfg */
2466       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
2467       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2468       /* Bit manipulation for SFN */
2469       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2470       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2471       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2472       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2473       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2474       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2475       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2476          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2477       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2478       return ROK;
2479    }
2480    return RFAILED;
2481 }
2482
2483 /*******************************************************************
2484  *
2485  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2486  *
2487  * @details
2488  *
2489  *    Function : fillSib1DlDciPdu
2490  *
2491  *    Functionality:
2492  *         -Fills the Dl DCI PDU
2493  *
2494  * @params[in] Pointer to fapi_dl_dci_t
2495  *             Pointer to PdcchCfg
2496  * @return ROK
2497  *
2498  ******************************************************************/
2499
2500 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2501 {
2502    if(dlDciPtr != NULLP)
2503    {
2504       uint8_t numBytes=0;
2505       uint8_t bytePos=0;
2506       uint8_t bitPos=0;
2507
2508       uint16_t coreset0Size=0;
2509       uint16_t rbStart=0;
2510       uint16_t rbLen=0;
2511       uint32_t freqDomResAssign=0;
2512       uint32_t timeDomResAssign=0;
2513       uint8_t  VRB2PRBMap=0;
2514       uint32_t modNCodScheme=0;
2515       uint8_t  redundancyVer=0;
2516       uint32_t sysInfoInd=0;
2517       uint32_t reserved=0;
2518
2519       /* Size(in bits) of each field in DCI format 0_1
2520        * as mentioned in spec 38.214 */
2521       uint8_t freqDomResAssignSize = 0;
2522       uint8_t timeDomResAssignSize = 4;
2523       uint8_t VRB2PRBMapSize       = 1;
2524       uint8_t modNCodSchemeSize    = 5;
2525       uint8_t redundancyVerSize    = 2;
2526       uint8_t sysInfoIndSize       = 1;
2527       uint8_t reservedSize         = 15;
2528
2529       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2530       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2531       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2532       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2533       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2534       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2535       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2536       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2537       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2538       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2539       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2540       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2541
2542       /* Calculating freq domain resource allocation field value and size
2543        * coreset0Size = Size of coreset 0
2544        * RBStart = Starting Virtual Rsource block
2545        * RBLen = length of contiguously allocted RBs
2546        * Spec 38.214 Sec 5.1.2.2.2
2547        */
2548       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2549       rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
2550       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
2551
2552       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2553       {
2554          if((rbLen - 1) <= floor(coreset0Size / 2))
2555             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2556          else
2557             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2558                                + (coreset0Size - 1 - rbStart);
2559
2560          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2561       }
2562
2563       /* Fetching DCI field values */
2564       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2565       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2566       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2567       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2568       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2569       reserved         = 0;
2570
2571       /* Reversing bits in each DCI field */
2572       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2573       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2574       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2575       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2576       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2577       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2578
2579       /* Calulating total number of bytes in buffer */
2580       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2581                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2582                                   + sysInfoIndSize + reservedSize;
2583
2584       numBytes = dlDciPtr->payloadSizeBits / 8;
2585       if(dlDciPtr->payloadSizeBits % 8)
2586          numBytes += 1;
2587
2588       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2589       {
2590          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2591          return;
2592       }
2593
2594       /* Initialize buffer */
2595       for(bytePos = 0; bytePos < numBytes; bytePos++)
2596          dlDciPtr->payload[bytePos] = 0;
2597
2598       bytePos = numBytes - 1;
2599       bitPos = 0;
2600
2601       /* Packing DCI format fields */
2602       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2603             freqDomResAssign, freqDomResAssignSize);
2604       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2605             timeDomResAssign, timeDomResAssignSize);
2606       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2607             VRB2PRBMap, VRB2PRBMapSize);
2608       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2609             modNCodScheme, modNCodSchemeSize);
2610       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2611             redundancyVer, redundancyVerSize);
2612       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2613             sysInfoInd, sysInfoIndSize);
2614       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2615             reserved, reservedSize);
2616
2617    }
2618 } /* fillSib1DlDciPdu */
2619
2620
2621 /*******************************************************************
2622  *
2623  * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2624  *
2625  * @details
2626  *
2627  *    Function : fillPageDlDciPdu
2628  *
2629  *    Functionality:
2630  *         -Fills the Dl DCI PDU for Paging
2631  *
2632  * @params[in] Pointer to fapi_dl_dci_t
2633  *             Pointer to dlPageAlloc
2634  * @return ROK
2635  *
2636  ******************************************************************/
2637
2638 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc)
2639 {
2640    if(dlDciPtr != NULLP)
2641    {
2642       uint8_t numBytes=0;
2643       uint8_t bytePos=0;
2644       uint8_t bitPos=0;
2645
2646       uint16_t coreset0Size     = 0;
2647       uint16_t rbStart          = 0;
2648       uint16_t rbLen            = 0;
2649       uint8_t  shortMsgInd      = 0;
2650       uint8_t  shortMsg         = 0;
2651       uint32_t freqDomResAssign = 0;
2652       uint32_t timeDomResAssign = 0;
2653       uint8_t  VRB2PRBMap       = 0;
2654       uint32_t modNCodScheme    = 0;
2655       uint8_t  tbScaling        = 0;
2656       uint32_t reserved         = 0;
2657
2658       /* Size(in bits) of each field in DCI format 1_0
2659        * as mentioned in spec 38.214 */
2660       uint8_t shortMsgIndSize      = 2;
2661       uint8_t shortMsgSize         = 8;
2662       uint8_t freqDomResAssignSize = 0;
2663       uint8_t timeDomResAssignSize = 4;
2664       uint8_t VRB2PRBMapSize       = 1;
2665       uint8_t modNCodSchemeSize    = 5;
2666       uint8_t tbScalingSize        = 2;
2667       uint8_t reservedSize         = 6;
2668
2669       dlDciPtr->rnti = dlPageAlloc->pagePdcchCfg.dci.rnti;
2670       dlDciPtr->scramblingId = dlPageAlloc->pagePdcchCfg.dci.scramblingId;
2671       dlDciPtr->scramblingRnti = dlPageAlloc->pagePdcchCfg.dci.scramblingRnti;
2672       dlDciPtr->cceIndex = dlPageAlloc->pagePdcchCfg.dci.cceIndex;
2673       dlDciPtr->aggregationLevel = dlPageAlloc->pagePdcchCfg.dci.aggregLevel;
2674       dlDciPtr->pc_and_bform.numPrgs = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.numPrgs;
2675       dlDciPtr->pc_and_bform.prgSize = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prgSize;
2676       dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
2677       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
2678       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
2679       dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.beta_pdcch_1_0;
2680       dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
2681
2682       /* Calculating freq domain resource allocation field value and size
2683        * coreset0Size = Size of coreset 0
2684        * RBStart = Starting Virtual Rsource block
2685        * RBLen = length of contiguously allocted RBs
2686        * Spec 38.214 Sec 5.1.2.2.2
2687        */
2688       coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
2689       rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
2690       rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb;
2691
2692       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2693       {
2694          if((rbLen - 1) <= floor(coreset0Size / 2))
2695             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2696          else
2697             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2698                                + (coreset0Size - 1 - rbStart);
2699
2700          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2701       }
2702
2703       /*Fetching DCI field values */
2704
2705       /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2706       if(dlPageAlloc->shortMsgInd != TRUE)
2707       {
2708          /*When Short Msg is absent*/
2709          shortMsgInd = 1;
2710          shortMsg    = 0;
2711       }
2712       else
2713       {
2714          /*Short Msg is Present*/
2715          if(dlPageAlloc->dlPagePduLen == 0 || dlPageAlloc->dlPagePdu == NULLP)
2716          {
2717             /*When Paging Msg is absent*/
2718             shortMsgInd = 2;
2719          }
2720          else
2721          {
2722             /*Both Short and Paging is present*/
2723             shortMsgInd = 3;
2724          }
2725          shortMsg = dlPageAlloc->shortMsg;
2726       }
2727
2728       timeDomResAssign = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2729       VRB2PRBMap       = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2730       modNCodScheme    = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->codeword[0].mcsIndex;
2731       tbScaling        = 0;
2732       reserved         = 0;
2733
2734       /* Reversing bits in each DCI field */
2735       shortMsgInd      = reverseBits(shortMsgInd, shortMsgIndSize);
2736       shortMsg         = reverseBits(shortMsg, shortMsgSize);
2737       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2738       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2739       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2740       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2741       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2742       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2743
2744       /* Calulating total number of bytes in buffer */
2745       dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2746                                   + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2747                                   + tbScaling + reservedSize;
2748
2749       numBytes = dlDciPtr->payloadSizeBits / 8;
2750       if(dlDciPtr->payloadSizeBits % 8)
2751       {
2752          numBytes += 1;
2753       }
2754
2755       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2756       {
2757          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2758          return;
2759       }
2760
2761       /* Initialize buffer */
2762       for(bytePos = 0; bytePos < numBytes; bytePos++)
2763       {
2764          dlDciPtr->payload[bytePos] = 0;
2765       }
2766
2767       bytePos = numBytes - 1;
2768       bitPos = 0;
2769
2770       /* Packing DCI format fields */
2771       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2772             shortMsgInd, shortMsgIndSize);
2773       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2774             shortMsg, shortMsgSize);
2775       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2776             freqDomResAssign, freqDomResAssignSize);
2777       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2778             timeDomResAssign, timeDomResAssignSize);
2779       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2780             VRB2PRBMap, VRB2PRBMapSize);
2781       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2782             modNCodScheme, modNCodSchemeSize);
2783       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2784             tbScaling, tbScalingSize);
2785       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2786             reserved, reservedSize);
2787    }
2788 } /* fillPageDlDciPdu */
2789
2790 /*******************************************************************
2791  *
2792  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2793  *
2794  * @details
2795  *
2796  *    Function : fillRarDlDciPdu
2797  *
2798  *    Functionality:
2799  *         -Fills the Dl DCI PDU
2800  *
2801  * @params[in] Pointer to fapi_dl_dci_t
2802  *             Pointer to PdcchCfg
2803  * @return ROK
2804  *
2805  ******************************************************************/
2806
2807 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2808 {
2809    if(dlDciPtr != NULLP)
2810    {
2811       uint8_t numBytes =0;
2812       uint8_t bytePos =0;
2813       uint8_t bitPos =0;
2814
2815       uint16_t coreset0Size =0;
2816       uint16_t rbStart =0;
2817       uint16_t rbLen =0;
2818       uint32_t freqDomResAssign =0;
2819       uint8_t timeDomResAssign =0;
2820       uint8_t  VRB2PRBMap =0;
2821       uint8_t modNCodScheme =0;
2822       uint8_t tbScaling =0;
2823       uint32_t reserved =0;
2824
2825       /* Size(in bits) of each field in DCI format 1_0 */
2826       uint8_t freqDomResAssignSize = 0;
2827       uint8_t timeDomResAssignSize = 4;
2828       uint8_t VRB2PRBMapSize       = 1;
2829       uint8_t modNCodSchemeSize    = 5;
2830       uint8_t tbScalingSize        = 2;
2831       uint8_t reservedSize         = 16;
2832
2833       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2834       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2835       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2836       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2837       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2838       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2839       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2840       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2841       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2842       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2843       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2844       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2845
2846       /* Calculating freq domain resource allocation field value and size
2847        * coreset0Size = Size of coreset 0
2848        * RBStart = Starting Virtual Rsource block
2849        * RBLen = length of contiguously allocted RBs
2850        * Spec 38.214 Sec 5.1.2.2.2
2851        */
2852
2853       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2854       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2855       rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
2856       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
2857
2858       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2859       {
2860          if((rbLen - 1) <= floor(coreset0Size / 2))
2861             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2862          else
2863             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2864                                + (coreset0Size - 1 - rbStart);
2865
2866          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2867       }
2868
2869       /* Fetching DCI field values */
2870       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
2871       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2872       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2873       tbScaling        = 0; /* configured to 0 scaling */
2874       reserved         = 0;
2875
2876       /* Reversing bits in each DCI field */
2877       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2878       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2879       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2880       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2881       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2882
2883       /* Calulating total number of bytes in buffer */
2884       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2885                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2886
2887       numBytes = dlDciPtr->payloadSizeBits / 8;
2888       if(dlDciPtr->payloadSizeBits % 8)
2889          numBytes += 1;
2890
2891       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2892       {
2893          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2894          return;
2895       }
2896
2897       /* Initialize buffer */
2898       for(bytePos = 0; bytePos < numBytes; bytePos++)
2899          dlDciPtr->payload[bytePos] = 0;
2900
2901       bytePos = numBytes - 1;
2902       bitPos = 0;
2903
2904       /* Packing DCI format fields */
2905       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2906             freqDomResAssign, freqDomResAssignSize);
2907       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2908             timeDomResAssign, timeDomResAssignSize);
2909       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2910             VRB2PRBMap, VRB2PRBMapSize);
2911       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2912             modNCodScheme, modNCodSchemeSize);
2913       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2914             tbScaling, tbScalingSize);
2915       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2916             reserved, reservedSize);
2917    }
2918 } /* fillRarDlDciPdu */
2919
2920 /*******************************************************************
2921  *
2922  * @brief fills DL DCI PDU required for DL TTI info in MAC
2923  *
2924  * @details
2925  *
2926  *    Function : fillDlMsgDlDciPdu
2927  *
2928  *    Functionality:
2929  *         -Fills the Dl DCI PDU
2930  *
2931  * @params[in] Pointer to fapi_dl_dci_t
2932  *             Pointer to PdcchCfg
2933  * @return ROK
2934  *
2935  ******************************************************************/
2936 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2937       DlMsgInfo *dlMsgInfo)
2938 {
2939    if(dlDciPtr != NULLP)
2940    {
2941       uint8_t numBytes;
2942       uint8_t bytePos;
2943       uint8_t bitPos;
2944
2945       uint16_t coresetSize = 0;
2946       uint16_t rbStart = 0;
2947       uint16_t rbLen = 0;
2948       uint8_t  dciFormatId;
2949       uint32_t freqDomResAssign;
2950       uint8_t  timeDomResAssign;
2951       uint8_t  VRB2PRBMap;
2952       uint8_t  modNCodScheme;
2953       uint8_t  ndi = 0;
2954       uint8_t  redundancyVer = 0;
2955       uint8_t  harqProcessNum = 0;
2956       uint8_t  dlAssignmentIdx = 0;
2957       uint8_t  pucchTpc = 0;
2958       uint8_t  pucchResoInd = 0;
2959       uint8_t  harqFeedbackInd = 0;
2960
2961       /* Size(in bits) of each field in DCI format 1_0 */
2962       uint8_t dciFormatIdSize    = 1;
2963       uint8_t freqDomResAssignSize = 0;
2964       uint8_t timeDomResAssignSize = 4;
2965       uint8_t VRB2PRBMapSize       = 1;
2966       uint8_t modNCodSchemeSize    = 5;
2967       uint8_t ndiSize              = 1;
2968       uint8_t redundancyVerSize    = 2;
2969       uint8_t harqProcessNumSize   = 4;
2970       uint8_t dlAssignmentIdxSize  = 2;
2971       uint8_t pucchTpcSize         = 2;
2972       uint8_t pucchResoIndSize     = 3;
2973       uint8_t harqFeedbackIndSize  = 3;
2974
2975       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2976       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2977       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2978       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2979       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2980       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2981       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2982       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2983       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2984       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2985       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2986       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2987
2988       /* Calculating freq domain resource allocation field value and size
2989        * coreset0Size = Size of coreset 0
2990        * RBStart = Starting Virtual Rsource block
2991        * RBLen = length of contiguously allocted RBs
2992        * Spec 38.214 Sec 5.1.2.2.2
2993        */
2994       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2995       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
2996       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
2997
2998       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2999       {
3000          if((rbLen - 1) <= floor(coresetSize / 2))
3001             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3002          else
3003             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3004                                + (coresetSize - 1 - rbStart);
3005
3006          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3007       }
3008
3009       /* Fetching DCI field values */
3010       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
3011       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
3012       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
3013       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
3014       ndi              = dlMsgInfo->ndi;
3015       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
3016       harqProcessNum   = dlMsgInfo->harqProcNum;
3017       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
3018       pucchTpc         = dlMsgInfo->pucchTpc;
3019       pucchResoInd     = dlMsgInfo->pucchResInd;
3020       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
3021
3022       /* Reversing bits in each DCI field */
3023       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
3024       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3025       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3026       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3027       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
3028       ndi              = reverseBits(ndi, ndiSize);
3029       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
3030       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
3031       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3032       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
3033       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
3034       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3035
3036
3037       /* Calulating total number of bytes in buffer */
3038       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3039             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3040             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3041             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3042
3043       numBytes = dlDciPtr->payloadSizeBits / 8;
3044       if(dlDciPtr->payloadSizeBits % 8)
3045          numBytes += 1;
3046
3047       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3048       {
3049          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
3050          return;
3051       }
3052
3053       /* Initialize buffer */
3054       for(bytePos = 0; bytePos < numBytes; bytePos++)
3055          dlDciPtr->payload[bytePos] = 0;
3056
3057       bytePos = numBytes - 1;
3058       bitPos = 0;
3059
3060       /* Packing DCI format fields */
3061       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3062             dciFormatId, dciFormatIdSize);
3063       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3064             freqDomResAssign, freqDomResAssignSize);
3065       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3066             timeDomResAssign, timeDomResAssignSize);
3067       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3068             VRB2PRBMap, VRB2PRBMapSize);
3069       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3070             modNCodScheme, modNCodSchemeSize);
3071       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3072             ndi, ndiSize);
3073       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3074             redundancyVer, redundancyVerSize);
3075       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3076             redundancyVer, redundancyVerSize);
3077       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3078             harqProcessNum, harqProcessNumSize);
3079       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3080             dlAssignmentIdx, dlAssignmentIdxSize);
3081       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3082             pucchTpc, pucchTpcSize);
3083       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3084             pucchResoInd, pucchResoIndSize);
3085       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3086             harqFeedbackInd, harqFeedbackIndSize);
3087    }
3088 }
3089
3090 /*******************************************************************
3091  *
3092  * @brief fills PDCCH PDU required for DL TTI info in MAC
3093  *
3094  * @details
3095  *
3096  *    Function : fillPdcchPdu
3097  *
3098  *    Functionality:
3099  *         -Fills the Pdcch PDU info
3100  *          stored in MAC
3101  *
3102  * @params[in] Pointer to FAPI DL TTI Req
3103  *             Pointer to PdcchCfg
3104  * @return ROK
3105  *
3106  ******************************************************************/
3107 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3108       RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3109 {
3110    if(dlTtiReqPdu != NULLP)
3111    {
3112       PdcchCfg *pdcchInfo = NULLP;
3113       BwpCfg *bwp = NULLP;
3114
3115       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3116       if(rntiType == SI_RNTI_TYPE)
3117       {
3118          pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3119          bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3120          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3121       }
3122       else if(rntiType == P_RNTI_TYPE)
3123       {
3124          pdcchInfo = &dlSlot->pageAllocInfo->pagePdcchCfg;
3125          bwp = &dlSlot->pageAllocInfo->bwp;
3126          fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, dlSlot->pageAllocInfo);
3127       }
3128       else if(rntiType == RA_RNTI_TYPE)
3129       {
3130          pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3131          bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3132          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3133       }
3134       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3135       {
3136          pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
3137          bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
3138          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3139                &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
3140       }
3141       else
3142       {
3143          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
3144          return RFAILED;
3145       }
3146       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3147       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3148       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3149       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3150       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3151       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3152       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3153       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
3154       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3155       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3156       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3157       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
3158       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3159       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3160       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3161
3162       /* Calculating PDU length. Considering only one dl dci pdu for now */
3163       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3164
3165       /* Filling Vendor message PDU */
3166       dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3167       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3168       dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3169       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3170       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3171    }
3172
3173    return ROK;
3174 }
3175
3176 /*******************************************************************
3177  *
3178  * @brief fills PDSCH PDU required for DL TTI info in MAC
3179  *
3180  * @details
3181  *
3182  *    Function : fillPdschPdu
3183  *
3184  *    Functionality:
3185  *         -Fills the Pdsch PDU info
3186  *          stored in MAC
3187  *
3188  * @params[in] Pointer to FAPI DL TTI Req
3189  *             Pointer to PdschCfg
3190  *             Pointer to msgLen of DL TTI Info
3191  * @return ROK
3192  *
3193  ******************************************************************/
3194
3195 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3196       BwpCfg bwp, uint16_t pduIndex)
3197 {
3198    uint8_t idx;
3199
3200    if(dlTtiReqPdu != NULLP)
3201    {
3202       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3203       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3204       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3205       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3206       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3207       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3208       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3209       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3210       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3211       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3212       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3213       {
3214          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3215          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3216          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3217          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3218          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3219          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3220       }
3221       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3222       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3223       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3224       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3225       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3226       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3227       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3228       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3229       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3230       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3231       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3232       /* since we are using type-1, hence rbBitmap excluded */
3233       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
3234       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
3235       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3236       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
3237       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
3238       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3239       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3240       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3241       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3242          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3243       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3244          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3245       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3246       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3247       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3248       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3249       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3250
3251       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3252
3253       /* DL TTI Request vendor message */
3254       dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3255       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3256       dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3257       for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3258       {
3259               dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3260       }
3261    }
3262 }
3263
3264 /***********************************************************************
3265  *
3266  * @brief calculates the total size to be allocated for DL TTI Req
3267  *
3268  * @details
3269  *
3270  *    Function : calcDlTtiReqPduCount
3271  *
3272  *    Functionality:
3273  *         -calculates the total pdu count to be allocated for DL TTI Req
3274  *
3275  * @params[in]   MacDlSlot *dlSlot
3276  * @return count
3277  *
3278  * ********************************************************************/
3279 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3280 {
3281    uint8_t count = 0;
3282    uint8_t idx = 0, ueIdx=0;
3283
3284    if(dlSlot->dlInfo.isBroadcastPres)
3285    {
3286       if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3287       {
3288          for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3289          {
3290             /* SSB PDU is filled */
3291             count++;
3292          }
3293       }
3294       if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3295       {
3296          /* PDCCH and PDSCH PDU is filled */
3297          count += 2;
3298       }
3299    }
3300
3301    if(dlSlot->pageAllocInfo)
3302    {
3303       /* PDCCH and PDSCH PDU is filled */
3304       count += 2;
3305    }
3306
3307    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3308    {
3309       if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3310       {
3311          /* PDCCH and PDSCH PDU is filled */
3312          if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
3313             count += 2;
3314          else
3315             count += 1;
3316       }
3317
3318       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3319       {
3320          for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3321          {
3322             /* PDCCH and PDSCH PDU is filled */
3323             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
3324                count += 2;
3325             else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
3326                count += 1;
3327          }
3328       }
3329    }
3330    return count;
3331 }
3332
3333 /***********************************************************************
3334  *
3335  * @brief calculates the total size to be allocated for DL TTI Req
3336  *
3337  * @details
3338  *
3339  *    Function : calcTxDataReqPduCount
3340  *
3341  *    Functionality:
3342  *         -calculates the total pdu count to be allocated for DL TTI Req
3343  *
3344  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3345  * @return count
3346  *
3347  * ********************************************************************/
3348 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3349 {
3350    uint8_t idx = 0, count = 0, ueIdx=0;
3351
3352    if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3353    {
3354       count++;
3355    }
3356    if(dlSlot->pageAllocInfo)
3357    {
3358       count++;
3359    }
3360
3361    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3362    {
3363       if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
3364             ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
3365          count++;
3366
3367       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3368       {
3369          for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3370          {
3371             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
3372                   dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
3373                count++;
3374          }
3375       }
3376    }
3377    return count;
3378 }
3379
3380 /***********************************************************************
3381  *
3382  * @brief fills the SIB1 TX-DATA request message
3383  *
3384  * @details
3385  *
3386  *    Function : fillSib1TxDataReq
3387  *
3388  *    Functionality:
3389  *         - fills the SIB1 TX-DATA request message
3390  *
3391  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3392  * @params[in]    macCellCfg consist of SIB1 pdu
3393  * @params[in]    uint32_t *msgLen
3394  * @params[in]    uint16_t pduIndex
3395  * @return ROK
3396  *
3397  * ********************************************************************/
3398 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3399       PdschCfg *pdschCfg)
3400 {
3401    uint32_t payloadSize = 0;
3402    uint8_t *sib1Payload = NULLP;
3403    fapi_api_queue_elem_t *payloadElem = NULLP;
3404 #ifdef INTEL_WLS_MEM
3405    void * wlsHdlr = NULLP;
3406 #endif
3407
3408    pduDesc[pduIndex].pdu_index = pduIndex;
3409    pduDesc[pduIndex].num_tlvs = 1;
3410
3411    /* fill the TLV */
3412    payloadSize = pdschCfg->codeword[0].tbSize;
3413    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3414    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3415    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3416    if(sib1Payload == NULLP)
3417    {
3418       return RFAILED;
3419    }
3420    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3421    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3422       macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3423    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3424
3425 #ifdef INTEL_WLS_MEM
3426    mtGetWlsHdl(&wlsHdlr);
3427    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3428 #else
3429    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3430 #endif
3431    pduDesc[pduIndex].pdu_length = payloadSize;
3432
3433 #ifdef INTEL_WLS_MEM
3434    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3435 #else
3436    LWR_MAC_FREE(sib1Payload, payloadSize);
3437 #endif
3438
3439    return ROK;
3440 }
3441
3442 /***********************************************************************
3443  *
3444  * @brief fills the PAGE TX-DATA request message
3445  *
3446  * @details
3447  *
3448  *    Function : fillPageTxDataReq
3449  *
3450  *    Functionality:
3451  *         - fills the Page TX-DATA request message
3452  *
3453  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3454  * @params[in]    macCellCfg consist of SIB1 pdu
3455  * @params[in]    uint32_t *msgLen
3456  * @params[in]    uint16_t pduIndex
3457  * @return ROK
3458  *
3459  * ********************************************************************/
3460 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo,
3461                            PdschCfg pdschCfg)
3462 {
3463    uint32_t payloadSize = 0;
3464    uint8_t *pagePayload = NULLP;
3465    fapi_api_queue_elem_t *payloadElem = NULLP;
3466 #ifdef INTEL_WLS_MEM
3467    void * wlsHdlr = NULLP;
3468 #endif
3469
3470    pduDesc[pduIndex].pdu_index = pduIndex;
3471    pduDesc[pduIndex].num_tlvs = 1;
3472
3473    /* fill the TLV */
3474    payloadSize = pdschCfg.codeword[0].tbSize;
3475    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3476    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3477    LWR_MAC_ALLOC(pagePayload, payloadSize);
3478    if(pagePayload == NULLP)
3479    {
3480       return RFAILED;
3481    }
3482    payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3483    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3484          pageAllocInfo->dlPagePduLen);
3485    memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->dlPagePdu, pageAllocInfo->dlPagePduLen);
3486
3487 #ifdef INTEL_WLS_MEM
3488    mtGetWlsHdl(&wlsHdlr);
3489    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3490 #else
3491    pduDesc[pduIndex].tlvs[0].value = pagePayload;
3492 #endif
3493    pduDesc[pduIndex].pdu_length = payloadSize;
3494
3495 #ifdef INTEL_WLS_MEM
3496    addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3497 #else
3498    LWR_MAC_FREE(pagePayload, payloadSize);
3499 #endif
3500
3501    return ROK;
3502 }
3503
3504 /***********************************************************************
3505  *
3506  * @brief fills the RAR TX-DATA request message
3507  *
3508  * @details
3509  *
3510  *    Function : fillRarTxDataReq
3511  *
3512  *    Functionality:
3513  *         - fills the RAR TX-DATA request message
3514  *
3515  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3516  * @params[in]    RarInfo *rarInfo
3517  * @params[in]    uint32_t *msgLen
3518  * @params[in]    uint16_t pduIndex
3519  * @return ROK
3520  *
3521  * ********************************************************************/
3522 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3523 {
3524    uint16_t payloadSize;
3525    uint8_t  *rarPayload = NULLP;
3526    fapi_api_queue_elem_t *payloadElem = NULLP;
3527 #ifdef INTEL_WLS_MEM
3528    void * wlsHdlr = NULLP;
3529 #endif
3530
3531    pduDesc[pduIndex].pdu_index = pduIndex;
3532    pduDesc[pduIndex].num_tlvs = 1;
3533
3534    /* fill the TLV */
3535    payloadSize = pdschCfg.codeword[0].tbSize;
3536    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3537    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3538    LWR_MAC_ALLOC(rarPayload, payloadSize);
3539    if(rarPayload == NULLP)
3540    {
3541       return RFAILED;
3542    }
3543    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3544    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3545    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3546
3547 #ifdef INTEL_WLS_MEM
3548    mtGetWlsHdl(&wlsHdlr);
3549    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3550 #else
3551    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3552 #endif
3553    pduDesc[pduIndex].pdu_length = payloadSize;
3554
3555 #ifdef INTEL_WLS_MEM
3556    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3557 #else
3558    LWR_MAC_FREE(rarPayload, payloadSize);
3559 #endif
3560    return ROK;
3561 }
3562
3563 /***********************************************************************
3564  *
3565  * @brief fills the DL dedicated Msg TX-DATA request message
3566  *
3567  * @details
3568  *
3569  *    Function : fillDlMsgTxDataReq
3570  *
3571  *    Functionality:
3572  *         - fills the Dl Dedicated Msg TX-DATA request message
3573  *
3574  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3575  * @params[in]    DlMsgInfo *dlMsgInfo
3576  * @params[in]    uint32_t *msgLen
3577  * @params[in]    uint16_t pduIndex
3578  * @return ROK
3579  *
3580  * ********************************************************************/
3581 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3582 {
3583    uint16_t payloadSize;
3584    uint8_t  *dlMsgPayload = NULLP;
3585    fapi_api_queue_elem_t *payloadElem = NULLP;
3586 #ifdef INTEL_WLS_MEM
3587    void * wlsHdlr = NULLP;
3588 #endif
3589
3590    pduDesc[pduIndex].pdu_index = pduIndex;
3591    pduDesc[pduIndex].num_tlvs = 1;
3592
3593    /* fill the TLV */
3594    payloadSize = pdschCfg.codeword[0].tbSize;
3595    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3596    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3597    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3598    if(dlMsgPayload == NULLP)
3599    {
3600       return RFAILED;
3601    }
3602    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3603    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3604    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3605
3606 #ifdef INTEL_WLS_MEM
3607    mtGetWlsHdl(&wlsHdlr);
3608    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3609 #else
3610    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3611 #endif
3612    pduDesc[pduIndex].pdu_length = payloadSize;
3613
3614 #ifdef INTEL_WLS_MEM
3615    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3616 #else
3617    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3618 #endif
3619    return ROK;
3620 }
3621
3622 #endif /* FAPI */
3623
3624 /*******************************************************************
3625  *
3626  * @brief Sends DL TTI Request to PHY
3627  *
3628  * @details
3629  *
3630  *    Function : fillDlTtiReq
3631  *
3632  *    Functionality:
3633  *         -Sends FAPI DL TTI req to PHY
3634  *
3635  * @params[in]    timing info
3636  * @return ROK     - success
3637  *         RFAILED - failure
3638  *
3639  * ****************************************************************/
3640 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3641 {
3642 #ifdef CALL_FLOW_DEBUG_LOG
3643    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3644 #endif
3645
3646 #ifdef INTEL_FAPI
3647    uint8_t idx =0;
3648    uint8_t nPdu = 0;
3649    uint8_t numPduEncoded = 0;
3650    uint8_t  ueIdx;
3651    uint16_t cellIdx =0;
3652    uint16_t pduIndex = 0;
3653
3654    SlotTimingInfo dlTtiReqTimingInfo;
3655    MacDlSlot *currDlSlot = NULLP;
3656    MacCellCfg macCellCfg;
3657    RntiType rntiType;
3658    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3659    fapi_msg_header_t *msgHeader = NULLP;
3660    p_fapi_api_queue_elem_t dlTtiElem;
3661    p_fapi_api_queue_elem_t headerElem;
3662    p_fapi_api_queue_elem_t prevElem;
3663    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3664    {
3665            GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3666            /* consider phy delay */
3667            ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL, macCb.macCell[cellIdx]->numOfSlots);
3668            dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3669
3670            macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3671
3672            currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3673
3674            /* Vendor Message */
3675            fapi_vendor_msg_t *vendorMsg;
3676            p_fapi_api_queue_elem_t  vendorMsgQElem;
3677            /* Allocte And fill Vendor msg */
3678            LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3679            if(!vendorMsgQElem)
3680            {
3681                    DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
3682                    return RFAILED;
3683            }
3684            FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3685            vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3686            fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3687
3688            LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3689            if(dlTtiElem)
3690            {
3691                    FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3692                                    sizeof(fapi_dl_tti_req_t));
3693                    /* Fill message header */
3694                    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3695                    if(!headerElem)
3696                    {
3697                            DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3698                            LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3699                            return RFAILED;
3700                    }
3701
3702                    FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3703                                    sizeof(fapi_msg_header_t));
3704                    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3705                    msgHeader->num_msg = 2;
3706                    msgHeader->handle = 0;
3707
3708                    /* Fill Dl TTI Request */
3709                    dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3710                    memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3711                    fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3712
3713                    dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3714                    dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3715                    dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot);  /* get total Pdus */
3716                    nPdu = dlTtiReq->nPdus;
3717
3718                    vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3719                    vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3720
3721                    dlTtiReq->nGroup = 0;
3722                    if(dlTtiReq->nPdus > 0)
3723                    {
3724                            if(currDlSlot->dlInfo.isBroadcastPres)
3725                            {
3726                                    if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3727                                    {
3728                                            if(dlTtiReq->pdus != NULLP)
3729                                            {
3730                                                    for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3731                                                    {
3732                                                            fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3733                                                                            currDlSlot, idx, dlTtiReq->sfn);
3734                                                            numPduEncoded++;
3735                                                    }
3736                                            }
3737                                            DU_LOG("\033[1;31m");
3738                                            DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3739                                            DU_LOG("\033[0m");
3740                                    }
3741
3742                                    if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3743                                    {
3744                                            /* Filling SIB1 param */
3745                                            if(numPduEncoded != nPdu)
3746                                            {
3747                      if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
3748                         rntiType = SI_RNTI_TYPE;
3749
3750                                                    /* PDCCH PDU */
3751                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3752                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3753                                                    numPduEncoded++;
3754
3755                                                    /* PDSCH PDU */
3756                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3757                                                                    currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg,
3758                                                                    currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3759                                                                    pduIndex);
3760                                                    dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3761                                                    pduIndex++;
3762                                                    numPduEncoded++;
3763                                            }
3764                                            DU_LOG("\033[1;34m");
3765                                            DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3766                                            DU_LOG("\033[0m");
3767                                    }
3768                            }
3769
3770                            if(currDlSlot->pageAllocInfo != NULLP)
3771                            {
3772                                    /* Filling DL Paging Alloc param */
3773                                    if(numPduEncoded != nPdu)
3774                                    {
3775                                            rntiType = P_RNTI_TYPE;
3776                                            fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], currDlSlot, -1, \
3777                                                            rntiType, CORESET_TYPE0, MAX_NUM_UE);
3778                                            numPduEncoded++;
3779                                            fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3780                                                            &currDlSlot->pageAllocInfo->pagePdschCfg,
3781                                                            currDlSlot->pageAllocInfo->bwp,
3782                                                            pduIndex);
3783                                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3784                                            pduIndex++;
3785                                            numPduEncoded++;
3786                                    }
3787                                    DU_LOG("\033[1;34m");
3788                                    DU_LOG("\nDEBUG  -->  LWR_MAC: PAGE sent...");
3789                                    DU_LOG("\033[0m");
3790                            }
3791
3792                            for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3793                            {
3794                                    if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3795                                    {
3796                                            /* Filling RAR param */
3797                                            rntiType = RA_RNTI_TYPE;
3798                                            if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3799                                                            (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
3800                                            {
3801                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3802                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3803                                                    numPduEncoded++;
3804                                            }
3805                                            if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3806                                                            (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3807                                            {
3808                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3809                                                                    &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3810                                                                    currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3811                                                                    pduIndex);
3812                                                    numPduEncoded++;
3813                                                    pduIndex++;
3814
3815                                                    DU_LOG("\033[1;32m");
3816                                                    DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3817                                                    DU_LOG("\033[0m");
3818                                            }
3819                                    }
3820
3821                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3822                                    {
3823                                            for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3824                                            {
3825                                                    /* Filling Msg4 param */
3826                                                    if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3827                                                                    (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
3828                                                    {
3829                                                            if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3830                                                            {
3831                                                                    rntiType = TC_RNTI_TYPE;
3832                                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3833                                                                                    currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
3834                                                            }
3835                                                            else
3836                                                            {
3837                                                                    /* Filling other DL msg params */
3838                                                                    rntiType = C_RNTI_TYPE;
3839                                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3840                                                                                    currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
3841                                                            }
3842                                                            numPduEncoded++;
3843                                                    }
3844
3845                                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
3846                                                    {
3847                                                            if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3848                                                                            (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
3849                                                            {
3850                                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3851                                                                                    &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
3852                                                                                    currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
3853                                                                    numPduEncoded++;
3854                                                                    pduIndex++;
3855
3856                                                                    DU_LOG("\033[1;32m");
3857                                                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3858                                                                    {
3859                                                                            DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3860                                                                    }
3861                                                                    else
3862                                                                    {
3863                                                                            DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3864                                                                    }
3865                                                                    DU_LOG("\033[0m");
3866                                                            }
3867
3868                                                    }
3869                                                    /*   else
3870                                                         {
3871                                                         MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3872                                                         currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3873                                                         }
3874                                                         */
3875                                            }
3876                                    }
3877                            }
3878
3879                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3880                            dlTtiReq->nGroup++;
3881
3882 #ifdef ODU_SLOT_IND_DEBUG_LOG
3883                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3884 #endif
3885
3886                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3887                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
3888                            msgHeader->num_msg++;
3889
3890                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3891                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
3892                            msgHeader->num_msg++;
3893
3894                            /* send Tx-DATA req message */
3895                            sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
3896                            if(dlTtiElem->p_next->p_next->p_next)
3897                            {
3898                                    msgHeader->num_msg++;
3899                                    prevElem = dlTtiElem->p_next->p_next->p_next;
3900                            }
3901                            else
3902                                    prevElem = dlTtiElem->p_next->p_next;
3903                    }
3904                    else
3905                    {
3906 #ifdef ODU_SLOT_IND_DEBUG_LOG
3907                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3908 #endif
3909                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3910                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
3911                            msgHeader->num_msg++;
3912
3913                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3914                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
3915                            msgHeader->num_msg++;
3916
3917                            prevElem = dlTtiElem->p_next->p_next;
3918                    }
3919
3920                    if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
3921                    {
3922                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3923                            lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
3924                            msgHeader->num_msg++;
3925                            macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
3926             prevElem = prevElem->p_next;
3927                    }
3928                    prevElem->p_next = vendorMsgQElem;
3929                    LwrMacSendToL1(headerElem);
3930                    memset(currDlSlot, 0, sizeof(MacDlSlot));
3931                    return ROK;
3932            }
3933            else
3934            {
3935                    DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
3936                    memset(currDlSlot, 0, sizeof(MacDlSlot));
3937                    return RFAILED;
3938            }
3939    }
3940    else
3941    {
3942            lwr_mac_procInvalidEvt(&currTimingInfo);
3943            return RFAILED;
3944    }
3945 #endif
3946    return ROK;
3947 }
3948
3949 /*******************************************************************
3950  *
3951  * @brief Sends TX data Request to PHY
3952  *
3953  * @details
3954  *
3955  *    Function : sendTxDataReq
3956  *
3957  *    Functionality:
3958  *         -Sends FAPI TX data req to PHY
3959  *
3960  * @params[in]    timing info
3961  * @return ROK     - success
3962  *         RFAILED - failure
3963  *
3964  * ****************************************************************/
3965 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
3966 {
3967 #ifdef INTEL_FAPI
3968 #ifdef CALL_FLOW_DEBUG_LOG
3969    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
3970 #endif
3971
3972    uint8_t  nPdu = 0;
3973    uint8_t  ueIdx=0;
3974    uint8_t  schInfoIdx = 0;
3975    uint16_t cellIdx=0;
3976    uint16_t pduIndex = 0;
3977    fapi_tx_data_req_t       *txDataReq =NULLP;
3978    p_fapi_api_queue_elem_t  txDataElem = 0;
3979
3980    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3981
3982    /* send TX_Data request message */
3983    nPdu = calcTxDataReqPduCount(dlSlot);
3984    if(nPdu > 0)
3985    {
3986       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3987       if(txDataElem == NULLP)
3988       {
3989          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
3990          return RFAILED;
3991       }
3992
3993       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3994             sizeof(fapi_tx_data_req_t));
3995       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3996       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3997       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3998
3999       vendorTxDataReq->sym = 0;
4000
4001       txDataReq->sfn  = currTimingInfo.sfn;
4002       txDataReq->slot = currTimingInfo.slot;
4003       if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4004       {
4005          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4006                dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg);
4007          pduIndex++;
4008          txDataReq->num_pdus++;
4009       }
4010       if(dlSlot->pageAllocInfo != NULLP)
4011       {
4012          fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo, \
4013                dlSlot->pageAllocInfo->pagePdschCfg);
4014          pduIndex++;
4015          txDataReq->num_pdus++;
4016          MAC_FREE(dlSlot->pageAllocInfo->dlPagePdu, sizeof(dlSlot->pageAllocInfo->dlPagePduLen));
4017          MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4018       }
4019
4020       for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4021       {
4022          if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4023          {
4024             if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
4025             {
4026                fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4027                      dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4028                pduIndex++;
4029                txDataReq->num_pdus++;
4030             }
4031             MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4032          }
4033
4034          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4035          {
4036             for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
4037             {
4038                if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
4039                      (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
4040                {
4041                   fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4042                         &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
4043                         dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
4044                   pduIndex++;
4045                   txDataReq->num_pdus++;
4046                }
4047                MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
4048                      dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
4049                dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
4050             }
4051             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
4052          }
4053       }
4054
4055       /* Fill message header */
4056       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
4057       prevElem->p_next = txDataElem;
4058    }
4059 #endif
4060    return ROK;
4061 }
4062
4063 /***********************************************************************
4064  *
4065  * @brief calculates the total size to be allocated for UL TTI Req
4066  *
4067  * @details
4068  *
4069  *    Function : getnPdus
4070  *
4071  *    Functionality:
4072  *         -calculates the total pdu count to be allocated for UL TTI Req
4073  *
4074  * @params[in] Pointer to fapi Ul TTI Req
4075  *             Pointer to CurrUlSlot
4076  * @return count
4077  * ********************************************************************/
4078 #ifdef INTEL_FAPI
4079 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4080 {
4081    uint8_t pduCount = 0;
4082
4083    if(ulTtiReq && currUlSlot)
4084    {
4085       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4086       {
4087          pduCount++;
4088          ulTtiReq->rachPresent++;
4089       }
4090       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4091       {
4092          pduCount++;
4093          ulTtiReq->nUlsch++;
4094       }
4095       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4096       {
4097          pduCount++;
4098          ulTtiReq->nUlsch++;
4099       }
4100       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4101       {
4102          pduCount++;
4103          ulTtiReq->nUlcch++;
4104       }
4105       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
4106       {
4107          pduCount++;
4108       }
4109    }
4110    return pduCount;
4111 }
4112 #endif
4113
4114 /***********************************************************************
4115  *
4116  * @brief Set the value of zero correlation config in PRACH PDU
4117  *
4118  * @details
4119  *
4120  *    Function : setNumCs
4121  *
4122  *    Functionality:
4123  *         -Set the value of zero correlation config in PRACH PDU
4124  *
4125  * @params[in] Pointer to zero correlation config
4126  *             Pointer to MacCellCfg
4127  * ********************************************************************/
4128
4129 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4130 {
4131 #ifdef INTEL_FAPI
4132    uint8_t idx;
4133    if(macCellCfg != NULLP)
4134    {
4135       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4136       *numCs = UnrestrictedSetNcsTable[idx];
4137    }
4138 #endif
4139 }
4140
4141 /***********************************************************************
4142  *
4143  * @brief Fills the PRACH PDU in UL TTI Request
4144  *
4145  * @details
4146  *
4147  *    Function : fillPrachPdu
4148  *
4149  *    Functionality:
4150  *         -Fills the PRACH PDU in UL TTI Request
4151  *
4152  * @params[in] Pointer to Prach Pdu
4153  *             Pointer to CurrUlSlot
4154  *             Pointer to macCellCfg
4155  *             Pointer to msgLen
4156  * ********************************************************************/
4157
4158 #ifdef INTEL_FAPI
4159 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4160 {
4161    if(ulTtiReqPdu != NULLP)
4162    {
4163       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4164       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
4165       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4166          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
4167       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4168          currUlSlot->ulInfo.prachSchInfo.prachFormat;
4169       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
4170       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4171          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
4172       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4173       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4174       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4175       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4176       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4177       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4178    }
4179 }
4180
4181 /*******************************************************************
4182  *
4183  * @brief Filling PUSCH PDU in UL TTI Request
4184  *
4185  * @details
4186  *
4187  *    Function : fillPuschPdu
4188  *
4189  *    Functionality: Filling PUSCH PDU in UL TTI Request
4190  *
4191  * @params[in]
4192  * @return ROK     - success
4193  *         RFAILED - failure
4194  *
4195  * ****************************************************************/
4196 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4197 {
4198    if(ulTtiReqPdu != NULLP)
4199    {
4200       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4201       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4202       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4203       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
4204       /* TODO : Fill handle in raCb when scheduling pusch and access here */
4205       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4206       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
4207       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
4208       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4209          macCellCfg->initialUlBwp.bwp.scs;
4210       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4211          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4212       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4213       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
4214       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
4215       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
4216       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4217       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
4218       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4219       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4220       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4221       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
4222       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4223       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4224       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4225       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4226          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAllocType;
4227       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4228          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.startPrb;
4229       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4230          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.numPrb;
4231       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4232       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4233       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4234       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4235       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4236          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
4237       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4238          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
4239 #ifdef INTEL_FAPI
4240       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4241          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
4242       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4243          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
4244       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4245          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
4246 #endif
4247       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4248          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
4249       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4250          currUlSlot->ulInfo.schPuschInfo.harqProcId;
4251       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4252          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
4253       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4254          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
4255       /* numCb is 0 for new transmission */
4256       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4257
4258       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4259
4260       /* UL TTI Vendor PDU */
4261       ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4262       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4263       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4264       for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4265       {
4266               ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4267       }
4268    }
4269 }
4270
4271 /*******************************************************************
4272  *
4273  * @brief Fill PUCCH PDU in Ul TTI Request
4274  *
4275  * @details
4276  *
4277  *    Function : fillPucchPdu
4278  *
4279  *    Functionality: Fill PUCCH PDU in Ul TTI Request
4280  *
4281  * @params[in]
4282  * @return ROK     - success
4283  *         RFAILED - failure
4284  *
4285  * ****************************************************************/
4286 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4287       MacUlSlot *currUlSlot)
4288 {
4289    if(ulTtiReqPdu != NULLP)
4290    {
4291       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
4292       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4293       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.crnti;
4294       /* TODO : Fill handle in raCb when scheduling pucch and access here */
4295       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
4296       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
4297       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
4298       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
4299       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4300       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
4301       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4302
4303       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.startPrb;
4304       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.numPrb;
4305       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
4306       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
4307       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
4308       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
4309       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4310       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4311       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
4312
4313       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
4314
4315       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4316       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
4317       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
4318       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
4319       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.pi2BPSK;
4320       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.addDmrs;/* Valid for Format 3, 4 only */
4321       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4322       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
4323       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
4324       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.harqInfo.harqBitLength;
4325       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
4326       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
4327       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.numPrgs;
4328       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prgSize;
4329       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.digBfInterfaces;
4330       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prg[0].beamIdx[0];
4331
4332       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4333
4334       /* UL TTI Vendor PDU */
4335       ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4336       ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4337       ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4338       for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4339       {
4340               ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4341       }
4342    }
4343 }
4344
4345 #endif
4346
4347 /*******************************************************************
4348  *
4349  * @brief Sends UL TTI Request to PHY
4350  *
4351  * @details
4352  *
4353  *    Function : fillUlTtiReq
4354  *
4355  *    Functionality:
4356  *         -Sends FAPI Param req to PHY
4357  *
4358  * @params[in]  Pointer to CmLteTimingInfo
4359  * @return ROK     - success
4360  *         RFAILED - failure
4361  *
4362  ******************************************************************/
4363 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4364 {
4365 #ifdef CALL_FLOW_DEBUG_LOG
4366    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4367 #endif
4368
4369 #ifdef INTEL_FAPI
4370    uint16_t   cellIdx =0;
4371    uint8_t    pduIdx = -1;
4372    SlotTimingInfo ulTtiReqTimingInfo;
4373    MacUlSlot *currUlSlot = NULLP;
4374    MacCellCfg macCellCfg;
4375    fapi_ul_tti_req_t *ulTtiReq = NULLP;
4376    p_fapi_api_queue_elem_t ulTtiElem;
4377
4378    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4379    {
4380       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4381       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4382
4383       /* add PHY delta */
4384       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL, macCb.macCell[cellIdx]->numOfSlots);
4385       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4386
4387       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4388       if(ulTtiElem)
4389       {
4390               FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4391                               sizeof(fapi_ul_tti_req_t));
4392               ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4393               memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4394               fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4395               ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
4396               ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4397               ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4398               vendorUlTti->num_ul_pdu =  ulTtiReq->nPdus;
4399               vendorUlTti->sym = 0;
4400               ulTtiReq->nGroup = 0;
4401               if(ulTtiReq->nPdus > 0)
4402               {
4403                       /* Fill Prach Pdu */
4404                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4405                       {
4406                               pduIdx++;
4407                               fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4408                               ulTtiReq->rachPresent++;
4409                       }
4410
4411                       /* Fill PUSCH PDU */
4412                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4413                       {
4414                               pduIdx++;
4415                               fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4416                               ulTtiReq->nUlsch++;
4417                       }
4418                       /* Fill PUCCH PDU */
4419                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4420                       {
4421                               pduIdx++;
4422                               fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4423                               ulTtiReq->nUlcch++;
4424                       }
4425               }
4426
4427 #ifdef ODU_SLOT_IND_DEBUG_LOG
4428               DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
4429 #endif
4430               prevElem->p_next = ulTtiElem;
4431
4432               memset(currUlSlot, 0, sizeof(MacUlSlot));
4433               return ROK;
4434       }
4435       else
4436       {
4437               DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
4438               memset(currUlSlot, 0, sizeof(MacUlSlot));
4439               return RFAILED;
4440       }
4441    }
4442    else
4443    {
4444            lwr_mac_procInvalidEvt(&currTimingInfo);
4445    }
4446 #endif
4447    return ROK;
4448 }
4449
4450 #ifdef INTEL_FAPI
4451 /*******************************************************************
4452  *
4453  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4454  *
4455  * @details
4456  *
4457  *    Function : fillUlDciPdu
4458  *
4459  *    Functionality:
4460  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4461  *
4462  * @params[in] Pointer to fapi_dl_dci_t
4463  *             Pointer to DciInfo
4464  * @return ROK
4465  *
4466  ******************************************************************/
4467 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4468 {
4469 #ifdef CALL_FLOW_DEBUG_LOG
4470    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4471 #endif
4472    if(ulDciPtr != NULLP)
4473    {
4474       uint8_t numBytes =0;
4475       uint8_t bytePos =0;
4476       uint8_t bitPos =0;
4477
4478       uint8_t  coreset1Size = 0;
4479       uint16_t rbStart = 0;
4480       uint16_t rbLen = 0;
4481       uint8_t  dciFormatId = 0;
4482       uint32_t freqDomResAssign =0;
4483       uint8_t  timeDomResAssign =0;
4484       uint8_t  freqHopFlag =0;
4485       uint8_t  modNCodScheme =0;
4486       uint8_t  ndi =0;
4487       uint8_t  redundancyVer = 0;
4488       uint8_t  harqProcessNum = 0;
4489       uint8_t  puschTpc = 0;
4490       uint8_t  ul_SlInd = 0;
4491
4492       /* Size(in bits) of each field in DCI format 0_0 */
4493       uint8_t dciFormatIdSize      = 1;
4494       uint8_t freqDomResAssignSize = 0;
4495       uint8_t timeDomResAssignSize = 4;
4496       uint8_t freqHopFlagSize      = 1;
4497       uint8_t modNCodSchemeSize    = 5;
4498       uint8_t ndiSize              = 1;
4499       uint8_t redundancyVerSize    = 2;
4500       uint8_t harqProcessNumSize   = 4;
4501       uint8_t puschTpcSize         = 2;
4502       uint8_t ul_SlIndSize         = 1;
4503
4504       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4505       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4506       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4507       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4508       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4509       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4510       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4511       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4512       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4513       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4514       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
4515       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4516
4517       /* Calculating freq domain resource allocation field value and size
4518        * coreset1Size = Size of coreset 1
4519        * RBStart = Starting Virtual Rsource block
4520        * RBLen = length of contiguously allocted RBs
4521        * Spec 38.214 Sec 5.1.2.2.2
4522        */
4523       if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
4524       {
4525          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4526          rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
4527          rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
4528
4529          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4530          {
4531             if((rbLen - 1) <= floor(coreset1Size / 2))
4532                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4533             else
4534                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4535                                   + (coreset1Size - 1 - rbStart);
4536
4537             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4538          }
4539          /* Fetching DCI field values */
4540          dciFormatId      = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
4541          timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
4542          freqHopFlag      = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
4543          modNCodScheme    = schDciInfo->dciFormatInfo.format.format0_0.mcs;
4544          ndi              = schDciInfo->dciFormatInfo.format.format0_0.ndi;
4545          redundancyVer    = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
4546          harqProcessNum   = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
4547          puschTpc         = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
4548          ul_SlInd         = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
4549
4550          /* Reversing bits in each DCI field */
4551          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4552          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4553          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4554          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4555          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4556          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4557          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4558          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4559       }
4560       /* Calulating total number of bytes in buffer */
4561       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4562       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4563       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4564
4565       numBytes = ulDciPtr->payloadSizeBits / 8;
4566       if(ulDciPtr->payloadSizeBits % 8)
4567          numBytes += 1;
4568
4569       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4570       {
4571          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4572          return;
4573       }
4574
4575       /* Initialize buffer */
4576       for(bytePos = 0; bytePos < numBytes; bytePos++)
4577          ulDciPtr->payload[bytePos] = 0;
4578
4579       bytePos = numBytes - 1;
4580       bitPos = 0;
4581
4582       /* Packing DCI format fields */
4583       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4584             dciFormatId, dciFormatIdSize);
4585       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4586             freqDomResAssign, freqDomResAssignSize);
4587       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4588             timeDomResAssign, timeDomResAssignSize);
4589       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4590             freqHopFlag, freqHopFlagSize);
4591       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4592             modNCodScheme, modNCodSchemeSize);
4593       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4594             ndi, ndiSize);
4595       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4596             redundancyVer, redundancyVerSize);
4597       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4598             harqProcessNum, harqProcessNumSize);
4599       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4600             puschTpc, puschTpcSize);
4601       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4602             ul_SlInd, ul_SlIndSize);
4603    }
4604 } /* fillUlDciPdu */
4605
4606 /*******************************************************************
4607  *
4608  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4609  *
4610  * @details
4611  *
4612  *    Function : fillUlDciPdcchPdu
4613  *
4614  *    Functionality:
4615  *         -Fills the Pdcch PDU info
4616  *
4617  * @params[in] Pointer to FAPI DL TTI Req
4618  *             Pointer to PdcchCfg
4619  * @return ROK
4620  *
4621  ******************************************************************/
4622 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4623 {
4624    if(ulDciReqPdu != NULLP)
4625    {
4626       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4627       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4628       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4629       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4630       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4631       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4632       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4633       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4634       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4635       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4636       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4637       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4638       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4639       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4640       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4641       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4642       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4643
4644       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4645       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4646
4647       /* Vendor UL DCI PDU */
4648       vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4649       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4650       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4651    }
4652    return ROK;
4653 }
4654 #endif
4655 /*******************************************************************
4656  *
4657  * @brief Sends UL DCI Request to PHY
4658  *
4659  * @details
4660  *
4661  *    Function : fillUlDciReq
4662  *
4663  *    Functionality:
4664  *         -Sends FAPI Ul Dci req to PHY
4665  *
4666  * @params[in]  Pointer to CmLteTimingInfo
4667  * @return ROK     - success
4668  *         RFAILED - failure
4669  *
4670  ******************************************************************/
4671 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4672 {
4673 #ifdef INTEL_FAPI
4674    uint8_t      cellIdx =0;
4675    uint8_t      numPduEncoded = 0;
4676    SlotTimingInfo  ulDciReqTimingInfo ={0};
4677    MacDlSlot    *currDlSlot = NULLP;
4678    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4679    p_fapi_api_queue_elem_t  ulDciElem;
4680
4681    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4682    {
4683       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4684       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4685       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4686
4687          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4688          if(ulDciElem)
4689          {
4690             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4691                sizeof(fapi_ul_dci_req_t));
4692             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4693             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4694             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4695
4696             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4697             ulDciReq->slot = ulDciReqTimingInfo.slot;
4698           if(currDlSlot->dlInfo.ulGrant != NULLP)
4699           {
4700             vendorUlDciReq->sym = 0;
4701             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4702             vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4703             if(ulDciReq->numPdus > 0)
4704             {
4705                /* Fill PDCCH configuration Pdu */
4706                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4707                numPduEncoded++;
4708                /* free UL GRANT at SCH */
4709                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4710             }
4711 #ifdef ODU_SLOT_IND_DEBUG_LOG
4712                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4713 #endif
4714          }
4715                prevElem->p_next = ulDciElem;
4716       }
4717    }
4718    else
4719    {
4720        lwr_mac_procInvalidEvt(&currTimingInfo);
4721    }
4722 #endif
4723    return ROK;
4724 }
4725
4726 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4727 {
4728    {
4729       /* PHY_STATE_IDLE */
4730 #ifdef INTEL_TIMER_MODE
4731       lwr_mac_procIqSamplesReqEvt,
4732 #endif
4733       lwr_mac_procParamReqEvt,
4734       lwr_mac_procParamRspEvt,
4735       lwr_mac_procConfigReqEvt,
4736       lwr_mac_procConfigRspEvt,
4737       lwr_mac_procInvalidEvt,
4738       lwr_mac_procInvalidEvt,
4739    },
4740    {
4741       /* PHY_STATE_CONFIGURED */
4742 #ifdef INTEL_TIMER_MODE
4743       lwr_mac_procInvalidEvt,
4744 #endif
4745       lwr_mac_procParamReqEvt,
4746       lwr_mac_procParamRspEvt,
4747       lwr_mac_procConfigReqEvt,
4748       lwr_mac_procConfigRspEvt,
4749       lwr_mac_procStartReqEvt,
4750       lwr_mac_procInvalidEvt,
4751    },
4752    {
4753       /* PHY_STATE_RUNNING */
4754 #ifdef INTEL_TIMER_MODE
4755       lwr_mac_procInvalidEvt,
4756 #endif
4757       lwr_mac_procInvalidEvt,
4758       lwr_mac_procInvalidEvt,
4759       lwr_mac_procConfigReqEvt,
4760       lwr_mac_procConfigRspEvt,
4761       lwr_mac_procInvalidEvt,
4762       lwr_mac_procInvalidEvt,
4763    }
4764 };
4765
4766 /*******************************************************************
4767  *
4768  * @brief Sends message to LWR_MAC Fsm Event Handler
4769  *
4770  * @details
4771  *
4772  *    Function : sendToLowerMac
4773  *
4774  *    Functionality:
4775  *         -Sends message to LowerMac
4776  *
4777  * @params[in] Message Type
4778  *             Message Length
4779  *             Messaga Pointer
4780  *
4781  * @return void
4782  *
4783  ******************************************************************/
4784 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4785 {
4786    lwrMacCb.event = msgType;
4787    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4788 }
4789
4790 /**********************************************************************
4791   End of file
4792  **********************************************************************/