src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "nr5g_fapi_internal.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 /* Global variables */
  51 LwrMacCb lwrMacCb;
  52
  53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  54 void fapiMacConfigRsp(uint16_t cellId);
  55 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem);
  56 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
  57 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
  58 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem);
  59
  60 void lwrMacLayerInit(Region region, Pool pool)
  61 {
  62 #ifdef INTEL_WLS_MEM
  63    uint8_t idx;
  64 #endif
  65
  66    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  67    lwrMacCb.region = region;
  68    lwrMacCb.pool = pool;
  69    lwrMacCb.clCfgDone = TRUE;
  70    lwrMacCb.numCell = 0;
  71    lwrMacCb.phyState = PHY_STATE_IDLE;
  72
  73 #ifdef INTEL_WLS_MEM
  74    /* Initializing WLS free mem list */
  75    lwrMacCb.phySlotIndCntr = 1;
  76    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  77    {
  78       cmLListInit(&wlsBlockToFreeList[idx]);
  79    }
  80 #endif
  81 }
  82
  83 /*******************************************************************
  84  *
  85  * @brief Handles Invalid Request Event
  86  *
  87  * @details
  88  *
  89  *    Function : lwr_mac_procInvalidEvt
  90  *
  91  *    Functionality:
  92  *         - Displays the PHY state when the invalid event occurs
  93  *
  94  * @params[in]
  95  * @return ROK     - success
  96  *         RFAILED - failure
  97  *
  98  * ****************************************************************/
  99 uint8_t lwr_mac_procInvalidEvt(void *msg)
 100 {
 101 #ifdef CALL_FLOW_DEBUG_LOG
 102    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
 103 #endif
 104    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 105    return ROK;
 106 }
 107
 108 #ifdef INTEL_FAPI
 109 /*******************************************************************
 110  *
 111  * @brief Fills FAPI message header
 112  *
 113  * @details
 114  *
 115  *    Function : fillMsgHeader
 116  *
 117  *    Functionality:
 118  *         -Fills FAPI message header
 119  *
 120  * @params[in] Pointer to header
 121  *             Number of messages
 122  *             Messae Type
 123  *             Length of message
 124  * @return void
 125  *
 126  * ****************************************************************/
 127 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 128 {
 129    memset(hdr, 0, sizeof(fapi_msg_t));
 130    hdr->msg_id = msgType;
 131    hdr->length = msgLen;
 132 }
 133
 134 /*******************************************************************
 135  *
 136  * @brief Fills FAPI Config Request message header
 137  *
 138  * @details
 139  *
 140  *    Function : fillTlvs
 141  *
 142  *    Functionality:
 143  *         -Fills FAPI Config Request message header
 144  *
 145  * @params[in] Pointer to TLV
 146  *             Tag
 147  *             Length
 148  *             Value
 149  *             MsgLen
 150  * @return void
 151  *
 152  * ****************************************************************/
 153 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 154       uint32_t value, uint32_t *msgLen)
 155 {
 156    tlv->tl.tag    = tag;
 157    tlv->tl.length = length;
 158    tlv->value     = value;
 159    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 160 }
 161 /*******************************************************************
 162  *
 163  * @brief fills the cyclic prefix by comparing the bitmask
 164  *
 165  * @details
 166  *
 167  *    Function : fillCyclicPrefix
 168  *
 169  *    Functionality:
 170  *         -checks the value with the bitmask and
 171  *          fills the cellPtr's cyclic prefix.
 172  *
 173  * @params[in] Pointer to ClCellParam
 174  *             Value to be compared
 175  * @return void
 176  *
 177  ********************************************************************/
 178 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 179 {
 180    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 181    {
 182       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 183    }
 184    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 185    {
 186       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 187    }
 188    else
 189    {
 190       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 191    }
 192 }
 193
 194 /*******************************************************************
 195  *
 196  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 197  *
 198  * @details
 199  *
 200  *    Function : fillSubcarrierSpaceDl
 201  *
 202  *    Functionality:
 203  *         -checks the value with the bitmask and
 204  *          fills the cellPtr's subcarrier spacing in DL
 205  *
 206  * @params[in] Pointer to ClCellParam
 207  *             Value to be compared
 208  * @return void
 209  *
 210  * ****************************************************************/
 211
 212 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 213 {
 214    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 215    {
 216       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 217    }
 218    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 219    {
 220       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 221    }
 222    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 223    {
 224       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 225    }
 226    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 227    {
 228       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 229    }
 230    else
 231    {
 232       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 233    }
 234 }
 235
 236 /*******************************************************************
 237  *
 238  * @brief fills the downlink bandwidth by comparing the bitmask
 239  *
 240  * @details
 241  *
 242  *    Function : fillBandwidthDl
 243  *
 244  *    Functionality:
 245  *         -checks the value with the bitmask and
 246  *         -fills the cellPtr's DL Bandwidth
 247  *
 248  * @params[in] Pointer to ClCellParam
 249  *             Value to be compared
 250  * @return void
 251  *
 252  * ****************************************************************/
 253
 254 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 255 {
 256    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 257    {
 258       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 259    }
 260    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 261    {
 262       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 263    }
 264    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 265    {
 266       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 267    }
 268    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 269    {
 270       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 271    }
 272    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 273    {
 274       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 275    }
 276    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 277    {
 278       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 279    }
 280    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 281    {
 282       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 283    }
 284    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 285    {
 286       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 287    }
 288    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 289    {
 290       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 291    }
 292    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 293    {
 294       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 295    }
 296    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 297    {
 298       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 299    }
 300    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 301    {
 302       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 303    }
 304    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 305    {
 306       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 307    }
 308    else
 309    {
 310       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 311    }
 312 }
 313
 314 /*******************************************************************
 315  *
 316  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 317  *
 318  * @details
 319  *
 320  *    Function : fillSubcarrierSpaceUl
 321  *
 322  *    Functionality:
 323  *         -checks the value with the bitmask and
 324  *         -fills cellPtr's subcarrier spacing in UL
 325  *
 326  * @params[in] Pointer to ClCellParam
 327  *             Value to be compared
 328  * @return void
 329  *
 330  * ****************************************************************/
 331
 332 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 333 {
 334    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 335    {
 336       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 337    }
 338    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 339    {
 340       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 341    }
 342    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 343    {
 344       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 345    }
 346    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 347    {
 348       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 349    }
 350    else
 351    {
 352       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 353    }
 354 }
 355
 356 /*******************************************************************
 357  *
 358  * @brief fills the uplink bandwidth by comparing the bitmask
 359  *
 360  * @details
 361  *
 362  *    Function : fillBandwidthUl
 363  *
 364  *    Functionality:
 365  *         -checks the value with the bitmask and
 366  *          fills the cellPtr's UL Bandwidth
 367  *
 368  *
 369  *
 370  * @params[in] Pointer to ClCellParam
 371  *             Value to be compared
 372  * @return void
 373  *
 374  *
 375  * ****************************************************************/
 376
 377 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 378 {
 379    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 380    {
 381       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 382    }
 383    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 384    {
 385       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 386    }
 387    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 388    {
 389       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 390    }
 391    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 392    {
 393       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 394    }
 395    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 396    {
 397       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 398    }
 399    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 400    {
 401       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 402    }
 403    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 404    {
 405       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 406    }
 407    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 408    {
 409       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 410    }
 411    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 412    {
 413       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 414    }
 415    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 416    {
 417       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 418    }
 419    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 420    {
 421       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 422    }
 423    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 424    {
 425       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 426    }
 427    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 428    {
 429       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 430    }
 431    else
 432    {
 433       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 434    }
 435 }
 436 /*******************************************************************
 437  *
 438  * @brief fills the CCE maping by comparing the bitmask
 439  *
 440  * @details
 441  *
 442  *    Function : fillCCEmaping
 443  *
 444  *    Functionality:
 445  *         -checks the value with the bitmask and
 446  *          fills the cellPtr's CCE Mapping Type
 447  *
 448  *
 449  * @params[in] Pointer to ClCellParam
 450  *             Value to be compared
 451  * @return void
 452  *
 453  * ****************************************************************/
 454
 455 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 456 {
 457    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 458    {
 459       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 460    }
 461    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 462    {
 463       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 464    }
 465    else
 466    {
 467       (*cellPtr)->cceMappingType = INVALID_VALUE;
 468    }
 469 }
 470
 471 /*******************************************************************
 472  *
 473  * @brief fills the PUCCH format by comparing the bitmask
 474  *
 475  * @details
 476  *
 477  *    Function : fillPucchFormat
 478  *
 479  *    Functionality:
 480  *         -checks the value with the bitmask and
 481  *          fills the cellPtr's pucch format
 482  *
 483  *
 484  * @params[in] Pointer to ClCellParam
 485  *             Value to be compared
 486  * @return void
 487  *
 488  * ****************************************************************/
 489
 490 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 491 {
 492    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 493    {
 494       (*cellPtr)->pucchFormats    = FORMAT_0;
 495    }
 496    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 497    {
 498       (*cellPtr)->pucchFormats    = FORMAT_1;
 499    }
 500    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 501    {
 502       (*cellPtr)->pucchFormats    = FORMAT_2;
 503    }
 504    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 505    {
 506       (*cellPtr)->pucchFormats    = FORMAT_3;
 507    }
 508    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 509    {
 510       (*cellPtr)->pucchFormats    = FORMAT_4;
 511    }
 512    else
 513    {
 514       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 515    }
 516 }
 517
 518 /*******************************************************************
 519  *
 520  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 521  *
 522  * @details
 523  *
 524  *    Function : fillPdschMappingType
 525  *
 526  *    Functionality:
 527  *         -checks the value with the bitmask and
 528  *          fills the cellPtr's PDSCH MappingType
 529  *
 530  * @params[in] Pointer to ClCellParam
 531  *             Value to be compared
 532  * @return void
 533  *
 534  * ****************************************************************/
 535
 536 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 537 {
 538    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 539    {
 540       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 541    }
 542    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 543    {
 544       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 545    }
 546    else
 547    {
 548       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 549    }
 550 }
 551
 552 /*******************************************************************
 553  *
 554  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 555  *
 556  * @details
 557  *
 558  *    Function : fillPdschAllocationType
 559  *
 560  *    Functionality:
 561  *         -checks the value with the bitmask and
 562  *          fills the cellPtr's PDSCH AllocationType
 563  *
 564  * @params[in] Pointer to ClCellParam
 565  *             Value to be compared
 566  * @return void
 567  *
 568  * ****************************************************************/
 569
 570 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 571 {
 572    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 573    {
 574       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 575    }
 576    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 577    {
 578       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 579    }
 580    else
 581    {
 582       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 583    }
 584 }
 585
 586 /*******************************************************************
 587  *
 588  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 589  *
 590  * @details
 591  *
 592  *    Function : fillPrbMappingType
 593  *
 594  *    Functionality:
 595  *         -checks the value with the bitmask and
 596  *          fills the cellPtr's PRB Mapping Type
 597  *
 598  * @params[in] Pointer to ClCellParam
 599  *             Value to be compared
 600  * @return void
 601  *
 602  ******************************************************************/
 603 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 604 {
 605    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 606    {
 607       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 608    }
 609    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 610    {
 611       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 612    }
 613    else
 614    {
 615       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 616    }
 617 }
 618
 619 /*******************************************************************
 620  *
 621  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 622  *
 623  * @details
 624  *
 625  *    Function : fillPdschDmrsConfigType
 626  *
 627  *    Functionality:
 628  *         -checks the value with the bitmask and
 629  *          fills the cellPtr's DmrsConfig Type
 630  *
 631  * @params[in] Pointer to ClCellParam
 632  *             Value to be compared
 633  * @return void
 634  *
 635  ******************************************************************/
 636
 637 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 638 {
 639    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 640    {
 641       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 642    }
 643    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 644    {
 645       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 646    }
 647    else
 648    {
 649       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 650    }
 651 }
 652
 653 /*******************************************************************
 654  *
 655  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 656  *
 657  * @details
 658  *
 659  *    Function : fillPdschDmrsLength
 660  *
 661  *    Functionality:
 662  *         -checks the value with the bitmask and
 663  *          fills the cellPtr's PdschDmrsLength
 664  *
 665  * @params[in] Pointer to ClCellParam
 666  *             Value to be compared
 667  * @return void
 668  *
 669  ******************************************************************/
 670 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 671 {
 672    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 673    {
 674       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 675    }
 676    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 677    {
 678       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 679    }
 680    else
 681    {
 682       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 683    }
 684 }
 685
 686 /*******************************************************************
 687  *
 688  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 689  *
 690  * @details
 691  *
 692  *    Function : fillPdschDmrsAddPos
 693  *
 694  *    Functionality:
 695  *         -checks the value with the bitmask and
 696  *          fills the cellPtr's Pdsch DmrsAddPos
 697  *
 698  * @params[in] Pointer to ClCellParam
 699  *             Value to be compared
 700  * @return void
 701  *
 702  ******************************************************************/
 703
 704 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 705 {
 706    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 707    {
 708       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 709    }
 710    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 711    {
 712       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 713    }
 714    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 715    {
 716       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 717    }
 718    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 719    {
 720       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 721    }
 722    else
 723    {
 724       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 725    }
 726 }
 727
 728 /*******************************************************************
 729  *
 730  * @brief fills the Modulation Order in DL by comparing the bitmask
 731  *
 732  * @details
 733  *
 734  *    Function : fillModulationOrderDl
 735  *
 736  *    Functionality:
 737  *         -checks the value with the bitmask and
 738  *          fills the cellPtr's ModulationOrder in DL.
 739  *
 740  * @params[in] Pointer to ClCellParam
 741  *             Value to be compared
 742  * @return void
 743  *
 744  ******************************************************************/
 745 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 746 {
 747    if(value == 0 )
 748    {
 749       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 750    }
 751    else if(value == 1)
 752    {
 753       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 754    }
 755    else if(value == 2)
 756    {
 757       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 758    }
 759    else if(value == 3)
 760    {
 761       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 762    }
 763    else
 764    {
 765       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 766    }
 767 }
 768
 769 /*******************************************************************
 770  *
 771  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 772  *
 773  * @details
 774  *
 775  *    Function : fillPuschDmrsConfigType
 776  *
 777  *    Functionality:
 778  *         -checks the value with the bitmask and
 779  *          fills the cellPtr's PUSCH DmrsConfigType
 780  *
 781  * @params[in] Pointer to ClCellParam
 782  *             Value to be compared
 783  * @return void
 784  *
 785  ******************************************************************/
 786
 787 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 788 {
 789    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 790    {
 791       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 792    }
 793    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 794    {
 795       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 796    }
 797    else
 798    {
 799       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 800    }
 801 }
 802
 803 /*******************************************************************
 804  *
 805  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 806  *
 807  * @details
 808  *
 809  *    Function : fillPuschDmrsLength
 810  *
 811  *    Functionality:
 812  *         -checks the value with the bitmask and
 813  *          fills the cellPtr's PUSCH DmrsLength
 814  *
 815  * @params[in] Pointer to ClCellParam
 816  *             Value to be compared
 817  * @return void
 818  *
 819  ******************************************************************/
 820
 821 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 822 {
 823    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 824    {
 825       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 826    }
 827    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 828    {
 829       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 830    }
 831    else
 832    {
 833       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 834    }
 835 }
 836
 837 /*******************************************************************
 838  *
 839  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 840  *
 841  * @details
 842  *
 843  *    Function : fillPuschDmrsAddPos
 844  *
 845  *    Functionality:
 846  *         -checks the value with the bitmask and
 847  *          fills the cellPtr's PUSCH DmrsAddPos
 848  *
 849  * @params[in] Pointer to ClCellParam
 850  *             Value to be compared
 851  * @return void
 852  *
 853  ******************************************************************/
 854
 855 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 856 {
 857    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 858    {
 859       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 860    }
 861    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 862    {
 863       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 864    }
 865    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 866    {
 867       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 868    }
 869    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 870    {
 871       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 872    }
 873    else
 874    {
 875       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 876    }
 877 }
 878
 879 /*******************************************************************
 880  *
 881  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 882  *
 883  * @details
 884  *
 885  *    Function : fillPuschMappingType
 886  *
 887  *    Functionality:
 888  *         -checks the value with the bitmask and
 889  *          fills the cellPtr's PUSCH MappingType
 890  *
 891  * @params[in] Pointer to ClCellParam
 892  *             Value to be compared
 893  * @return void
 894  *
 895  ******************************************************************/
 896
 897 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 898 {
 899    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 900    {
 901       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 902    }
 903    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 904    {
 905       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 906    }
 907    else
 908    {
 909       (*cellPtr)->puschMappingType = INVALID_VALUE;
 910    }
 911 }
 912
 913 /*******************************************************************
 914  *
 915  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 916  *
 917  * @details
 918  *
 919  *    Function : fillPuschAllocationType
 920  *
 921  *    Functionality:
 922  *         -checks the value with the bitmask and
 923  *          fills the cellPtr's PUSCH AllocationType
 924  *
 925  * @params[in] Pointer to ClCellParam
 926  *             Value to be compared
 927  * @return void
 928  *
 929  ******************************************************************/
 930
 931 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 932 {
 933    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 934    {
 935       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 936    }
 937    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 938    {
 939       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 940    }
 941    else
 942    {
 943       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 944    }
 945 }
 946
 947 /*******************************************************************
 948  *
 949  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 950  *
 951  * @details
 952  *
 953  *    Function : fillPuschPrbMappingType
 954  *
 955  *    Functionality:
 956  *         -checks the value with the bitmask and
 957  *          fills the cellPtr's PUSCH PRB MApping Type
 958  *
 959  * @params[in] Pointer to ClCellParam
 960  *             Value to be compared
 961  * @return void
 962  *
 963  ******************************************************************/
 964
 965 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 966 {
 967    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 968    {
 969       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 970    }
 971    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 972    {
 973       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 974    }
 975    else
 976    {
 977       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 978    }
 979 }
 980
 981 /*******************************************************************
 982  *
 983  * @brief fills the Modulation Order in Ul by comparing the bitmask
 984  *
 985  * @details
 986  *
 987  *    Function : fillModulationOrderUl
 988  *
 989  *    Functionality:
 990  *         -checks the value with the bitmask and
 991  *          fills the cellPtr's Modualtsion Order in UL.
 992  *
 993  * @params[in] Pointer to ClCellParam
 994  *             Value to be compared
 995  * @return void
 996  *
 997  ******************************************************************/
 998
 999 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1000 {
1001    if(value == 0)
1002    {
1003       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1004    }
1005    else if(value == 1)
1006    {
1007       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1008    }
1009    else if(value == 2)
1010    {
1011       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1012    }
1013    else if(value == 3)
1014    {
1015       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1016    }
1017    else
1018    {
1019       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1020    }
1021 }
1022
1023 /*******************************************************************
1024  *
1025  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1026  *
1027  * @details
1028  *
1029  *    Function : fillPuschAggregationFactor
1030  *
1031  *    Functionality:
1032  *         -checks the value with the bitmask and
1033  *          fills the cellPtr's PUSCH Aggregation Factor
1034  *
1035  * @params[in] Pointer to ClCellParam
1036  *             Value to be compared
1037  * @return void
1038  *
1039  ******************************************************************/
1040
1041 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1042 {
1043    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1044    {
1045       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1046    }
1047    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1048    {
1049       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1050    }
1051    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1052    {
1053       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1054    }
1055    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1056    {
1057       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1058    }
1059    else
1060    {
1061       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1062    }
1063 }
1064
1065 /*******************************************************************
1066  *
1067  * @brief fills the PRACH Long Format by comparing the bitmask
1068  *
1069  * @details
1070  *
1071  *    Function : fillPrachLongFormat
1072  *
1073  *    Functionality:
1074  *         -checks the value with the bitmask and
1075  *          fills the cellPtr's PRACH Long Format
1076  *
1077  * @params[in] Pointer to ClCellParam
1078  *             Value to be compared
1079  * @return void
1080  *
1081  ******************************************************************/
1082
1083 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1084 {
1085    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1086    {
1087       (*cellPtr)->prachLongFormats    = FORMAT_0;
1088    }
1089    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1090    {
1091       (*cellPtr)->prachLongFormats    = FORMAT_1;
1092    }
1093    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1094    {
1095       (*cellPtr)->prachLongFormats    = FORMAT_2;
1096    }
1097    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1098    {
1099       (*cellPtr)->prachLongFormats    = FORMAT_3;
1100    }
1101    else
1102    {
1103       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1104    }
1105 }
1106
1107 /*******************************************************************
1108  *
1109  * @brief fills the PRACH Short Format by comparing the bitmask
1110  *
1111  * @details
1112  *
1113  *    Function : fillPrachShortFormat
1114  *
1115  *    Functionality:
1116  *         -checks the value with the bitmask and
1117  *          fills the cellPtr's PRACH ShortFormat
1118  *
1119  * @params[in] Pointer to ClCellParam
1120  *             Value to be compared
1121  * @return void
1122  *
1123  ******************************************************************/
1124
1125 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1126 {
1127    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1128    {
1129       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1130    }
1131    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1132    {
1133       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1134    }
1135    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1136    {
1137       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1138    }
1139    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1140    {
1141       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1142    }
1143    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1144    {
1145       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1146    }
1147    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1148    {
1149       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1150    }
1151    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1152    {
1153       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1154    }
1155    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1156    {
1157       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1158    }
1159    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1160    {
1161       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1162    }
1163    else
1164    {
1165       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1166    }
1167 }
1168
1169 /*******************************************************************
1170  *
1171  * @brief fills the Fd Occasions Type by comparing the bitmask
1172  *
1173  * @details
1174  *
1175  *    Function : fillFdOccasions
1176  *
1177  *    Functionality:
1178  *         -checks the value with the bitmask and
1179  *          fills the cellPtr's Fd Occasions
1180  *
1181  * @params[in] Pointer to ClCellParam
1182  *             Value to be compared
1183  * @return void
1184  *
1185  ******************************************************************/
1186
1187 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1188 {
1189    if(value == 0)
1190    {
1191       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1192    }
1193    else if(value == 1)
1194    {
1195       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1196    }
1197    else if(value == 3)
1198    {
1199       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1200    }
1201    else if(value == 4)
1202    {
1203       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1204    }
1205    else
1206    {
1207       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1208    }
1209 }
1210
1211 /*******************************************************************
1212  *
1213  * @brief fills the RSSI Measurement by comparing the bitmask
1214  *
1215  * @details
1216  *
1217  *    Function : fillRssiMeas
1218  *
1219  *    Functionality:
1220  *         -checks the value with the bitmask and
1221  *          fills the cellPtr's RSSI Measurement report
1222  *
1223  * @params[in] Pointer to ClCellParam
1224  *             Value to be compared
1225  * @return void
1226  *
1227  ******************************************************************/
1228
1229 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1230 {
1231    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1232    {
1233       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1234    }
1235    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1236    {
1237       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1238    }
1239    else
1240    {
1241       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1242    }
1243 }
1244
1245 /*******************************************************************
1246  *
1247  * @brief Returns the TLVs value
1248  *
1249  * @details
1250  *
1251  *    Function : getParamValue
1252  *
1253  *    Functionality:
1254  *         -return TLVs value
1255  *
1256  * @params[in]
1257  * @return ROK     - temp
1258  *         RFAILED - failure
1259  *
1260  * ****************************************************************/
1261
1262 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1263 {
1264    void *posPtr;
1265    posPtr   = &tlv->tl.tag;
1266    posPtr   += sizeof(tlv->tl.tag);
1267    posPtr   += sizeof(tlv->tl.length);
1268    /*TO DO: malloc to SSI memory */
1269    if(type == FAPI_UINT_8)
1270    {
1271       return(*(uint8_t *)posPtr);
1272    }
1273    else if(type == FAPI_UINT_16)
1274    {
1275       return(*(uint16_t *)posPtr);
1276    }
1277    else if(type == FAPI_UINT_32)
1278    {
1279       return(*(uint32_t *)posPtr);
1280    }
1281    else
1282    {
1283       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1284       return RFAILED;
1285    }
1286 }
1287 #endif /* FAPI */
1288
1289 /*******************************************************************
1290  *
1291  * @brief Modifes the received mibPdu to uint32 bit
1292  *        and stores it in MacCellCfg
1293  *
1294  * @details
1295  *
1296  *    Function : setMibPdu
1297  *
1298  *    Functionality:
1299  *         -Sets the MibPdu
1300  *
1301  * @params[in] Pointer to mibPdu
1302  *             pointer to modified value
1303  ******************************************************************/
1304 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1305 {
1306    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1307    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1308    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1309 }
1310
1311 /*******************************************************************
1312  *
1313  * @brief Sends FAPI Param req to PHY
1314  *
1315  * @details
1316  *
1317  *    Function : lwr_mac_procParamReqEvt
1318  *
1319  *    Functionality:
1320  *         -Sends FAPI Param req to PHY
1321  *
1322  * @params[in]
1323  * @return ROK     - success
1324  *         RFAILED - failure
1325  *
1326  * ****************************************************************/
1327
1328 uint8_t lwr_mac_procParamReqEvt(void *msg)
1329 {
1330 #ifdef INTEL_FAPI
1331 #ifdef CALL_FLOW_DEBUG_LOG
1332    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1333 #endif
1334
1335    /* startGuardTimer(); */
1336    fapi_param_req_t         *paramReq = NULL;
1337    fapi_msg_header_t        *msgHeader;
1338    p_fapi_api_queue_elem_t  paramReqElem;
1339    p_fapi_api_queue_elem_t  headerElem;
1340
1341    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1342    if(paramReq != NULL)
1343    {
1344       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1345          sizeof(fapi_tx_data_req_t));
1346       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1347       memset(paramReq, 0, sizeof(fapi_param_req_t));
1348       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1349
1350       /* Fill message header */
1351       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1352       if(!headerElem)
1353       {
1354          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1355          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1356          return RFAILED;
1357       }
1358       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1359          sizeof(fapi_msg_header_t));
1360       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1361       msgHeader->num_msg = 1;
1362       msgHeader->handle = 0;
1363
1364       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1365       LwrMacSendToL1(headerElem);
1366    }
1367    else
1368    {
1369       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1370       return RFAILED;
1371    }
1372 #endif
1373    return ROK;
1374 }
1375
1376 /*******************************************************************
1377  *
1378  * @brief Sends FAPI Param Response to MAC via PHY
1379  *
1380  * @details
1381  *
1382  *    Function : lwr_mac_procParamRspEvt
1383  *
1384  *    Functionality:
1385  *         -Sends FAPI Param rsp to MAC via PHY
1386  *
1387  * @params[in]
1388  * @return ROK     - success
1389  *         RFAILED - failure
1390  *
1391  * ****************************************************************/
1392
1393 uint8_t lwr_mac_procParamRspEvt(void *msg)
1394 {
1395 #ifdef INTEL_FAPI
1396    /* stopGuardTimer(); */
1397    uint8_t index;
1398    uint32_t encodedVal;
1399    fapi_param_resp_t *paramRsp;
1400    ClCellParam *cellParam = NULLP;
1401
1402    paramRsp = (fapi_param_resp_t *)msg;
1403    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1404
1405    if(paramRsp != NULLP)
1406    {
1407       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1408       if(cellParam != NULLP)
1409       {
1410          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1411          if(paramRsp->error_code == MSG_OK)
1412          {
1413             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1414             {
1415                switch(paramRsp->tlvs[index].tl.tag)
1416                {
1417                   case FAPI_RELEASE_CAPABILITY_TAG:
1418                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1419                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1420                      {
1421                         cellParam->releaseCapability = RELEASE_15;
1422                      }
1423                      break;
1424
1425                   case FAPI_PHY_STATE_TAG:
1426                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1427                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1428                      {
1429                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1430                         return RFAILED;
1431                      }
1432                      break;
1433
1434                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1435                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1436                      if(encodedVal != RFAILED && encodedVal != 0)
1437                      {
1438                         cellParam->skipBlankDlConfig = SUPPORTED;
1439                      }
1440                      else
1441                      {
1442                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1443                      }
1444                      break;
1445
1446                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1447                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1448                      if(encodedVal != RFAILED && encodedVal != 0)
1449                      {
1450                         cellParam->skipBlankUlConfig = SUPPORTED;
1451                      }
1452                      else
1453                      {
1454                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1455                      }
1456                      break;
1457
1458                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1459                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1460                      break;
1461
1462                   case FAPI_CYCLIC_PREFIX_TAG:
1463                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1464                      if(encodedVal != RFAILED)
1465                      {
1466                         fillCyclicPrefix(encodedVal, &cellParam);
1467                      }
1468                      break;
1469
1470                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1471                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1472                      if(encodedVal != RFAILED)
1473                      {
1474                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1475                      }
1476                      break;
1477
1478                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1479                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1480                      if(encodedVal != RFAILED)
1481                      {
1482                         fillBandwidthDl(encodedVal, &cellParam);
1483                      }
1484                      break;
1485
1486                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1487                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1488                      if(encodedVal != RFAILED)
1489                      {
1490                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1491                      }
1492                      break;
1493
1494                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1495                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1496                      if(encodedVal != RFAILED)
1497                      {
1498                         fillBandwidthUl(encodedVal, &cellParam);
1499                      }
1500                      break;
1501
1502                   case FAPI_CCE_MAPPING_TYPE_TAG:
1503                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1504                      if(encodedVal != RFAILED)
1505                      {
1506                         fillCCEmaping(encodedVal, &cellParam);
1507                      }
1508                      break;
1509
1510                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1511                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1512                      if(encodedVal != RFAILED && encodedVal != 0)
1513                      {
1514                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1515                      }
1516                      else
1517                      {
1518                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1519                      }
1520                      break;
1521
1522                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1523                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1524                      if(encodedVal != RFAILED && encodedVal != 0)
1525                      {
1526                         cellParam->precoderGranularityCoreset = SUPPORTED;
1527                      }
1528                      else
1529                      {
1530                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1531                      }
1532                      break;
1533
1534                   case FAPI_PDCCH_MU_MIMO_TAG:
1535                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1536                      if(encodedVal != RFAILED && encodedVal != 0)
1537                      {
1538                         cellParam->pdcchMuMimo = SUPPORTED;
1539                      }
1540                      else
1541                      {
1542                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1543                      }
1544                      break;
1545
1546                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1547                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1548                      if(encodedVal != RFAILED && encodedVal != 0)
1549                      {
1550                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1551                      }
1552                      else
1553                      {
1554                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1555                      }
1556                      break;
1557
1558                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1559                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1560                      break;
1561
1562                   case FAPI_PUCCH_FORMATS_TAG:
1563                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1564                      if(encodedVal != RFAILED)
1565                      {
1566                         fillPucchFormat(encodedVal, &cellParam);
1567                      }
1568                      break;
1569
1570                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1571                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1572                      break;
1573
1574                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1575                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1576                      if(encodedVal != RFAILED)
1577                      {
1578                         fillPdschMappingType(encodedVal, &cellParam);
1579                      }
1580                      break;
1581
1582                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1583                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1584                      if(encodedVal != RFAILED)
1585                      {
1586                         fillPdschAllocationType(encodedVal, &cellParam);
1587                      }
1588                      break;
1589
1590                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1591                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1592                      if(encodedVal != RFAILED)
1593                      {
1594                         fillPrbMappingType(encodedVal, &cellParam);
1595                      }
1596                      break;
1597
1598                   case FAPI_PDSCH_CBG_TAG:
1599                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1600                      if(encodedVal != RFAILED && encodedVal != 0)
1601                      {
1602                         cellParam->pdschCbg = SUPPORTED;
1603                      }
1604                      else
1605                      {
1606                         cellParam->pdschCbg = NOT_SUPPORTED;
1607                      }
1608                      break;
1609
1610                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1611                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1612                      if(encodedVal != RFAILED)
1613                      {
1614                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1615                      }
1616                      break;
1617
1618                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1619                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1620                      if(encodedVal != RFAILED)
1621                      {
1622                         fillPdschDmrsLength(encodedVal, &cellParam);
1623                      }
1624                      break;
1625
1626                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1627                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1628                      if(encodedVal != RFAILED)
1629                      {
1630                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1631                      }
1632                      break;
1633
1634                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1635                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1636                      break;
1637
1638                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1639                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1640                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1641                      {
1642                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1643                      }
1644                      break;
1645
1646                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1647                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1648                      if(encodedVal != RFAILED)
1649                      {
1650                         fillModulationOrderDl(encodedVal, &cellParam);
1651                      }
1652                      break;
1653
1654                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1655                      cellParam->maxMuMimoUsersDl         = \
1656                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1657                      break;
1658
1659                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1660                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1661                      if(encodedVal != RFAILED && encodedVal != 0)
1662                      {
1663                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1664                      }
1665                      else
1666                      {
1667                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1668                      }
1669                      break;
1670
1671                   case FAPI_PREMPTIONSUPPORT_TAG:
1672                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1673                      if(encodedVal != RFAILED && encodedVal != 0)
1674                      {
1675                         cellParam->premptionSupport = SUPPORTED;
1676                      }
1677                      else
1678                      {
1679                         cellParam->premptionSupport = NOT_SUPPORTED;
1680                      }
1681                      break;
1682
1683                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1684                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1685                      if(encodedVal != RFAILED && encodedVal != 0)
1686                      {
1687                         cellParam->pdschNonSlotSupport = SUPPORTED;
1688                      }
1689                      else
1690                      {
1691                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1692                      }
1693                      break;
1694
1695                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1696                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1697                      if(encodedVal != RFAILED && encodedVal != 0)
1698                      {
1699                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1700                      }
1701                      else
1702                      {
1703                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1704                      }
1705                      break;
1706
1707                   case FAPI_UCI_ONLY_PUSCH_TAG:
1708                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1709                      if(encodedVal != RFAILED && encodedVal != 0)
1710                      {
1711                         cellParam->uciOnlyPusch = SUPPORTED;
1712                      }
1713                      else
1714                      {
1715                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1716                      }
1717                      break;
1718
1719                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1720                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1721                      if(encodedVal != RFAILED && encodedVal != 0)
1722                      {
1723                         cellParam->puschFrequencyHopping = SUPPORTED;
1724                      }
1725                      else
1726                      {
1727                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1728                      }
1729                      break;
1730
1731                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1732                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1733                      if(encodedVal != RFAILED)
1734                      {
1735                         fillPuschDmrsConfig(encodedVal, &cellParam);
1736                      }
1737                      break;
1738
1739                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1740                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1741                      if(encodedVal != RFAILED)
1742                      {
1743                         fillPuschDmrsLength(encodedVal, &cellParam);
1744                      }
1745                      break;
1746
1747                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1748                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1749                      if(encodedVal != RFAILED)
1750                      {
1751                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1752                      }
1753                      break;
1754
1755                   case FAPI_PUSCH_CBG_TAG:
1756                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1757                      if(encodedVal != RFAILED && encodedVal != 0)
1758                      {
1759                         cellParam->puschCbg = SUPPORTED;
1760                      }
1761                      else
1762                      {
1763                         cellParam->puschCbg = NOT_SUPPORTED;
1764                      }
1765                      break;
1766
1767                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1768                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1769                      if(encodedVal != RFAILED)
1770                      {
1771                         fillPuschMappingType(encodedVal, &cellParam);
1772                      }
1773                      break;
1774
1775                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1776                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1777                      if(encodedVal != RFAILED)
1778                      {
1779                         fillPuschAllocationType(encodedVal, &cellParam);
1780                      }
1781                      break;
1782
1783                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1784                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1785                      if(encodedVal != RFAILED)
1786                      {
1787                         fillPuschPrbMappingType(encodedVal, &cellParam);
1788                      }
1789                      break;
1790
1791                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1792                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1793                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1794                      {
1795                         cellParam->puschMaxPtrsPorts = encodedVal;
1796                      }
1797                      break;
1798
1799                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1800                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1801                      break;
1802
1803                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1804                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1805                      break;
1806
1807                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1808                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1809                      if(encodedVal != RFAILED)
1810                      {
1811                         fillModulationOrderUl(encodedVal, &cellParam);
1812                      }
1813                      break;
1814
1815                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1816                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1817                      break;
1818
1819                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1820                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1821                      if(encodedVal != RFAILED && encodedVal != 0)
1822                      {
1823                         cellParam->dftsOfdmSupport = SUPPORTED;
1824                      }
1825                      else
1826                      {
1827                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1828                      }
1829                      break;
1830
1831                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1832                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1833                      if(encodedVal != RFAILED)
1834                      {
1835                         fillPuschAggregationFactor(encodedVal, &cellParam);
1836                      }
1837                      break;
1838
1839                   case FAPI_PRACH_LONG_FORMATS_TAG:
1840                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1841                      if(encodedVal != RFAILED)
1842                      {
1843                         fillPrachLongFormat(encodedVal, &cellParam);
1844                      }
1845                      break;
1846
1847                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1848                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1849                      if(encodedVal != RFAILED)
1850                      {
1851                         fillPrachShortFormat(encodedVal, &cellParam);
1852                      }
1853                      break;
1854
1855                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1856                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1857                      if(encodedVal != RFAILED && encodedVal != 0)
1858                      {
1859                         cellParam->prachRestrictedSets = SUPPORTED;
1860                      }
1861                      else
1862                      {
1863                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1864                      }
1865                      break;
1866
1867                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1868                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1869                      if(encodedVal != RFAILED)
1870                      {
1871                         fillFdOccasions(encodedVal, &cellParam);
1872                      }
1873                      break;
1874
1875                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1876                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1877                      if(encodedVal != RFAILED)
1878                      {
1879                         fillRssiMeas(encodedVal, &cellParam);
1880                      }
1881                      break;
1882                   default:
1883                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1884                      break;
1885                }
1886             }
1887             MAC_FREE(cellParam, sizeof(ClCellParam));
1888             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1889             return ROK;
1890          }
1891          else
1892          {
1893             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1894             return RFAILED;
1895          }
1896       }
1897       else
1898       {
1899          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1900          return RFAILED;
1901       }
1902    }
1903    else
1904    {
1905       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1906       return RFAILED;
1907    }
1908 #else
1909    return ROK;
1910 #endif
1911 }
1912
1913 #ifdef INTEL_TIMER_MODE
1914 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1915 {
1916    void * wlsHdlr = NULLP;
1917    fapi_msg_header_t *msgHeader;
1918    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1919    p_fapi_api_queue_elem_t  headerElem;
1920    p_fapi_api_queue_elem_t  iqSampleElem;
1921    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1922
1923    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1924
1925    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1926
1927    /* Fill IQ sample req */
1928    mtGetWlsHdl(&wlsHdlr);
1929    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1930       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1931    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932    if(!iqSampleElem)
1933    {
1934       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1935       return RFAILED;
1936    }
1937    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1938       sizeof(fapi_vendor_ext_iq_samples_req_t));
1939
1940    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1941    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1942    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1943       sizeof(fapi_vendor_ext_iq_samples_req_t));
1944
1945    iqSampleReq->iq_samples_info.carrNum = 0;
1946    iqSampleReq->iq_samples_info.numSubframes = 40;
1947    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1948    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1949    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1950    iqSampleReq->iq_samples_info.startFrameNum = 0;
1951    iqSampleReq->iq_samples_info.startSlotNum = 0;
1952    iqSampleReq->iq_samples_info.startSymNum = 0;
1953    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1954    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1955
1956    /* TODO : Fill remaining parameters */
1957
1958    /* Fill message header */
1959    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1960    if(!headerElem)
1961    {
1962       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1963       return RFAILED;
1964    }
1965    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1966      sizeof(fapi_msg_header_t));
1967    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1968    msgHeader->num_msg = 1;
1969    msgHeader->handle = 0;
1970
1971    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1972    LwrMacSendToL1(headerElem);
1973    return ROK;
1974 }
1975 #endif
1976
1977 /*******************************************************************
1978  *
1979  * @brief Sends FAPI Config req to PHY
1980  *
1981  * @details
1982  *
1983  *    Function : lwr_mac_procConfigReqEvt
1984  *
1985  *    Functionality:
1986  *         -Sends FAPI Config Req to PHY
1987  *
1988  * @params[in]
1989  * @return ROK     - success
1990  *         RFAILED - failure
1991  *
1992  * ****************************************************************/
1993
1994 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1995 {
1996 #ifdef INTEL_FAPI
1997 #ifdef CALL_FLOW_DEBUG_LOG
1998    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
1999 #endif
2000 #ifdef NR_TDD
2001    uint8_t slotIdx = 0;
2002    uint8_t symbolIdx =0;
2003 #endif
2004    uint16_t index = 0;
2005    uint16_t *cellId =NULLP;
2006    uint16_t cellIdx =0;
2007    uint32_t msgLen = 0;
2008    uint32_t mib = 0;
2009    MacCellCfg macCfgParams;
2010    fapi_vendor_msg_t *vendorMsg;
2011    fapi_config_req_t *configReq;
2012    fapi_msg_header_t *msgHeader;
2013    p_fapi_api_queue_elem_t  headerElem;
2014    p_fapi_api_queue_elem_t  vendorMsgQElem;
2015    p_fapi_api_queue_elem_t  cfgReqQElem;
2016
2017    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2018          lwrMacCb.phyState);
2019
2020    cellId = (uint16_t *)msg;
2021    GET_CELL_IDX(*cellId, cellIdx);
2022    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2023
2024    /* Fill Cell Configuration in lwrMacCb */
2025    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2026    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2027    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2028    lwrMacCb.numCell++;
2029
2030    /* Allocte And fill Vendor msg */
2031    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2032    if(!vendorMsgQElem)
2033    {
2034       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2035       return RFAILED;
2036    }
2037    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2038    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2039    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2040    vendorMsg->config_req_vendor.hopping_id = 0;
2041    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2042    vendorMsg->config_req_vendor.group_hop_flag = 0;
2043    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2044    vendorMsg->start_req_vendor.sfn = 0;
2045    vendorMsg->start_req_vendor.slot = 0;
2046    vendorMsg->start_req_vendor.mode = 4;
2047 #ifdef DEBUG_MODE
2048    vendorMsg->start_req_vendor.count = 0;
2049    vendorMsg->start_req_vendor.period = 1;
2050 #endif
2051    /* Fill FAPI config req */
2052    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2053    if(!cfgReqQElem)
2054    {
2055       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2056       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2057       return RFAILED;
2058    }
2059    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2060       sizeof(fapi_config_req_t));
2061
2062    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2063    memset(configReq, 0, sizeof(fapi_config_req_t));
2064    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2065 #ifdef NR_TDD
2066    configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2067 #else
2068    configReq->number_of_tlvs = 25;
2069 #endif
2070    msgLen = sizeof(configReq->number_of_tlvs);
2071
2072    if(macCfgParams.dlCarrCfg.pres)
2073    {
2074       fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2075          sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2076       fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2077          sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2078       /* Due to bug in Intel FT code, commenting TLVs that are are not
2079        * needed to avoid error. Must be uncommented when FT bug is fixed */
2080       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2081          sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2082       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2083          sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2084       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2085          sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2086    }
2087    if(macCfgParams.ulCarrCfg.pres)
2088    {
2089       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2090             sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2091       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2092             sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2093       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2094       sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2095       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2096       sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2097       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2098             sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2099    }
2100    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2101    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2102
2103    /* fill cell config */
2104    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2105          sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2106    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2107          sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2108
2109    /* fill SSB configuration */
2110    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2111          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2112    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2113    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2114    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2115          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2116
2117    /* fill PRACH configuration */
2118    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2119    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2120    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2121          sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2122    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2123          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2124    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2125          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2126    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2127          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2128    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2129          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2130    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2131    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2132    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2133          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2134    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2135          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2136    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2137    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2138    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2139       {
2140       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2141       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2142       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2143       &msgLen);
2144       }
2145       else
2146       {
2147       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2148       }*/
2149
2150    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2151          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2152    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2153    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2154
2155    /* fill SSB table */
2156    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2157          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2158    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2159    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2160    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2161          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2162    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2163          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2164
2165    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2166    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2167          sizeof(uint32_t), mib, &msgLen);
2168
2169    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2170          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2171    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2172          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2173    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2174    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2175    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2176    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2177
2178 #ifdef NR_TDD
2179    /* fill TDD table */
2180    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2181    sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2182    for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2183    {
2184       for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2185       {
2186          fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2187                sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2188       }
2189    }
2190 #endif
2191
2192    /* fill measurement config */
2193    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2194    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2195
2196    /* fill DMRS Type A Pos */
2197    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2198          sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2199
2200    /* Fill message header */
2201    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2202    if(!headerElem)
2203    {
2204       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2205       LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2206       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2207       return RFAILED;
2208    }
2209    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2210          sizeof(fapi_msg_header_t));
2211    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2212    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2213    msgHeader->handle = 0;
2214
2215    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2216    LwrMacSendToL1(headerElem);
2217 #endif
2218
2219    return ROK;
2220 } /* lwr_mac_handleConfigReqEvt */
2221
2222 /*******************************************************************
2223  *
2224  * @brief Processes config response from phy
2225  *
2226  * @details
2227  *
2228  *    Function : lwr_mac_procConfigRspEvt
2229  *
2230  *    Functionality:
2231  *          Processes config response from phy
2232  *
2233  * @params[in] FAPI message pointer
2234  * @return ROK     - success
2235  *         RFAILED - failure
2236  *
2237  * ****************************************************************/
2238
2239 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2240 {
2241 #ifdef INTEL_FAPI
2242    fapi_config_resp_t *configRsp;
2243    configRsp = (fapi_config_resp_t *)msg;
2244
2245    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2246          lwrMacCb.phyState);
2247
2248    if(configRsp != NULL)
2249    {
2250       if(configRsp->error_code == MSG_OK)
2251       {
2252          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2253          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2254          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2255          /* TODO :
2256           * Store config response into an intermediate struture and send to MAC
2257           * Support LC and LWLC for sending config rsp to MAC
2258           */
2259          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2260       }
2261       else
2262       {
2263          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2264          return RFAILED;
2265       }
2266    }
2267    else
2268    {
2269       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2270       return RFAILED;
2271    }
2272 #endif
2273
2274    return ROK;
2275 } /* lwr_mac_procConfigRspEvt */
2276
2277 /*******************************************************************
2278  *
2279  * @brief Build and send start request to phy
2280  *
2281  * @details
2282  *
2283  *    Function : lwr_mac_procStartReqEvt
2284  *
2285  *    Functionality:
2286  *       Build and send start request to phy
2287  *
2288  * @params[in] FAPI message pointer
2289  * @return ROK     - success
2290  *         RFAILED - failure
2291  *
2292  * ****************************************************************/
2293 uint8_t lwr_mac_procStartReqEvt(void *msg)
2294 {
2295 #ifdef INTEL_FAPI
2296 #ifdef CALL_FLOW_DEBUG_LOG
2297    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2298 #endif
2299    fapi_msg_header_t *msgHeader;
2300    fapi_start_req_t *startReq;
2301    fapi_vendor_msg_t *vendorMsg;
2302    p_fapi_api_queue_elem_t  headerElem;
2303    p_fapi_api_queue_elem_t  startReqElem;
2304    p_fapi_api_queue_elem_t  vendorMsgElem;
2305
2306    /* Allocte And fill Vendor msg */
2307    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2308    if(!vendorMsgElem)
2309    {
2310       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2311       return RFAILED;
2312    }
2313    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2314    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2315    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2316    vendorMsg->start_req_vendor.sfn = 0;
2317    vendorMsg->start_req_vendor.slot = 0;
2318    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2319 #ifdef DEBUG_MODE
2320    vendorMsg->start_req_vendor.count = 0;
2321    vendorMsg->start_req_vendor.period = 1;
2322 #endif
2323
2324    /* Fill FAPI config req */
2325    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2326    if(!startReqElem)
2327    {
2328       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2329       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2330       return RFAILED;
2331    }
2332    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2333       sizeof(fapi_start_req_t));
2334
2335    startReq = (fapi_start_req_t *)(startReqElem + 1);
2336    memset(startReq, 0, sizeof(fapi_start_req_t));
2337    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2338
2339    /* Fill message header */
2340    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2341    if(!headerElem)
2342    {
2343       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2344       LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2345       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2346       return RFAILED;
2347    }
2348    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2349       sizeof(fapi_msg_header_t));
2350    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2351    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2352    msgHeader->handle = 0;
2353
2354    /* Send to PHY */
2355    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2356    LwrMacSendToL1(headerElem);
2357 #endif
2358    return ROK;
2359 } /* lwr_mac_procStartReqEvt */
2360
2361 /*******************************************************************
2362  *
2363  * @brief Sends FAPI Stop Req to PHY
2364  *
2365  * @details
2366  *
2367  *    Function : lwr_mac_procStopReqEvt
2368  *
2369  *    Functionality:
2370  *         -Sends FAPI Stop Req to PHY
2371  *
2372  * @params[in]
2373  * @return ROK     - success
2374  *         RFAILED - failure
2375  *
2376  ********************************************************************/
2377
2378 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem)
2379 {
2380 #ifdef INTEL_FAPI
2381 #ifdef CALL_FLOW_DEBUG_LOG
2382    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2383 #endif
2384
2385    fapi_stop_req_t   *stopReq;
2386    fapi_vendor_msg_t *vendorMsg;
2387    p_fapi_api_queue_elem_t  stopReqElem;
2388    p_fapi_api_queue_elem_t  vendorMsgElem;
2389
2390    /* Allocte And fill Vendor msg */
2391    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2392    if(!vendorMsgElem)
2393    {
2394       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in stop req");
2395       return RFAILED;
2396    }
2397    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2398    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2399    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2400    vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
2401    vendorMsg->stop_req_vendor.slot = slotInfo.slot;
2402
2403    /* Fill FAPI stop req */
2404    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2405    if(!stopReqElem)
2406    {
2407       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2408       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2409       return RFAILED;
2410    }
2411    FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2412       sizeof(fapi_stop_req_t));
2413    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2414    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2415    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2416
2417    /* Send to PHY */
2418    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2419    prevElem->p_next = stopReqElem;
2420
2421 #endif
2422    return ROK;
2423 }
2424
2425 #ifdef INTEL_FAPI
2426 /*******************************************************************
2427  *
2428  * @brief fills SSB PDU required for DL TTI info in MAC
2429  *
2430  * @details
2431  *
2432  *    Function : fillSsbPdu
2433  *
2434  *    Functionality:
2435  *         -Fills the SSB PDU info
2436  *          stored in MAC
2437  *
2438  * @params[in] Pointer to FAPI DL TTI Req
2439  *             Pointer to RgCellCb
2440  *             Pointer to msgLen of DL TTI Info
2441  * @return ROK
2442  *
2443  ******************************************************************/
2444
2445 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2446       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2447 {
2448    uint32_t mibPayload = 0;
2449    if(dlTtiReqPdu != NULL)
2450    {
2451       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2452       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2453       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2454       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2455       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2456       /* ssbOfPdufstA to be filled in ssbCfg */
2457       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2458       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2459       /* Bit manipulation for SFN */
2460       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2461       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2462       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2463       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2464       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2465       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2466       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2467          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2468       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2469
2470       return ROK;
2471    }
2472    return RFAILED;
2473 }
2474
2475 /*******************************************************************
2476  *
2477  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2478  *
2479  * @details
2480  *
2481  *    Function : fillSib1DlDciPdu
2482  *
2483  *    Functionality:
2484  *         -Fills the Dl DCI PDU
2485  *
2486  * @params[in] Pointer to fapi_dl_dci_t
2487  *             Pointer to PdcchCfg
2488  * @return ROK
2489  *
2490  ******************************************************************/
2491
2492 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2493 {
2494    if(dlDciPtr != NULLP)
2495    {
2496       uint8_t numBytes=0;
2497       uint8_t bytePos=0;
2498       uint8_t bitPos=0;
2499
2500       uint16_t coreset0Size=0;
2501       uint16_t rbStart=0;
2502       uint16_t rbLen=0;
2503       uint32_t freqDomResAssign=0;
2504       uint32_t timeDomResAssign=0;
2505       uint8_t  VRB2PRBMap=0;
2506       uint32_t modNCodScheme=0;
2507       uint8_t  redundancyVer=0;
2508       uint32_t sysInfoInd=0;
2509       uint32_t reserved=0;
2510
2511       /* Size(in bits) of each field in DCI format 0_1
2512        * as mentioned in spec 38.214 */
2513       uint8_t freqDomResAssignSize = 0;
2514       uint8_t timeDomResAssignSize = 4;
2515       uint8_t VRB2PRBMapSize       = 1;
2516       uint8_t modNCodSchemeSize    = 5;
2517       uint8_t redundancyVerSize    = 2;
2518       uint8_t sysInfoIndSize       = 1;
2519       uint8_t reservedSize         = 15;
2520
2521       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2522       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2523       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2524       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2525       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2526       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2527       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2528       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2529       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2530       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2531       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2532       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2533
2534       /* Calculating freq domain resource allocation field value and size
2535        * coreset0Size = Size of coreset 0
2536        * RBStart = Starting Virtual Rsource block
2537        * RBLen = length of contiguously allocted RBs
2538        * Spec 38.214 Sec 5.1.2.2.2
2539        */
2540       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2541       rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2542       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2543
2544       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2545       {
2546          if((rbLen - 1) <= floor(coreset0Size / 2))
2547             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2548          else
2549             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2550                                + (coreset0Size - 1 - rbStart);
2551
2552          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2553       }
2554
2555       /* Fetching DCI field values */
2556       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2557       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2558       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2559       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2560       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2561       reserved         = 0;
2562
2563       /* Reversing bits in each DCI field */
2564       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2565       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2566       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2567       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2568       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2569       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2570
2571       /* Calulating total number of bytes in buffer */
2572       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2573                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2574                                   + sysInfoIndSize + reservedSize;
2575
2576       numBytes = dlDciPtr->payloadSizeBits / 8;
2577       if(dlDciPtr->payloadSizeBits % 8)
2578          numBytes += 1;
2579
2580       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2581       {
2582          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2583          return;
2584       }
2585
2586       /* Initialize buffer */
2587       for(bytePos = 0; bytePos < numBytes; bytePos++)
2588          dlDciPtr->payload[bytePos] = 0;
2589
2590       bytePos = numBytes - 1;
2591       bitPos = 0;
2592
2593       /* Packing DCI format fields */
2594       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2595             freqDomResAssign, freqDomResAssignSize);
2596       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2597             timeDomResAssign, timeDomResAssignSize);
2598       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2599             VRB2PRBMap, VRB2PRBMapSize);
2600       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2601             modNCodScheme, modNCodSchemeSize);
2602       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2603             redundancyVer, redundancyVerSize);
2604       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2605             sysInfoInd, sysInfoIndSize);
2606       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2607             reserved, reservedSize);
2608
2609    }
2610 } /* fillSib1DlDciPdu */
2611
2612
2613 /*******************************************************************
2614  *
2615  * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2616  *
2617  * @details
2618  *
2619  *    Function : fillPageDlDciPdu
2620  *
2621  *    Functionality:
2622  *         -Fills the Dl DCI PDU for Paging
2623  *
2624  * @params[in] Pointer to fapi_dl_dci_t
2625  *             Pointer to dlPageAlloc
2626  * @return ROK
2627  *
2628  ******************************************************************/
2629
2630 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc)
2631 {
2632    if(dlDciPtr != NULLP)
2633    {
2634       uint8_t numBytes=0;
2635       uint8_t bytePos=0;
2636       uint8_t bitPos=0;
2637
2638       uint16_t coreset0Size     = 0;
2639       uint16_t rbStart          = 0;
2640       uint16_t rbLen            = 0;
2641       uint8_t  shortMsgInd      = 0;
2642       uint8_t  shortMsg         = 0;
2643       uint32_t freqDomResAssign = 0;
2644       uint32_t timeDomResAssign = 0;
2645       uint8_t  VRB2PRBMap       = 0;
2646       uint32_t modNCodScheme    = 0;
2647       uint8_t  tbScaling        = 0;
2648       uint32_t reserved         = 0;
2649
2650       /* Size(in bits) of each field in DCI format 1_0
2651        * as mentioned in spec 38.214 */
2652       uint8_t shortMsgIndSize      = 2;
2653       uint8_t shortMsgSize         = 8;
2654       uint8_t freqDomResAssignSize = 0;
2655       uint8_t timeDomResAssignSize = 4;
2656       uint8_t VRB2PRBMapSize       = 1;
2657       uint8_t modNCodSchemeSize    = 5;
2658       uint8_t tbScalingSize        = 2;
2659       uint8_t reservedSize         = 6;
2660
2661       dlDciPtr->rnti = dlPageAlloc->pagePdcchCfg.dci.rnti;
2662       dlDciPtr->scramblingId = dlPageAlloc->pagePdcchCfg.dci.scramblingId;
2663       dlDciPtr->scramblingRnti = dlPageAlloc->pagePdcchCfg.dci.scramblingRnti;
2664       dlDciPtr->cceIndex = dlPageAlloc->pagePdcchCfg.dci.cceIndex;
2665       dlDciPtr->aggregationLevel = dlPageAlloc->pagePdcchCfg.dci.aggregLevel;
2666       dlDciPtr->pc_and_bform.numPrgs = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.numPrgs;
2667       dlDciPtr->pc_and_bform.prgSize = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prgSize;
2668       dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
2669       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
2670       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
2671       dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerValue;
2672       dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
2673
2674       /* Calculating freq domain resource allocation field value and size
2675        * coreset0Size = Size of coreset 0
2676        * RBStart = Starting Virtual Rsource block
2677        * RBLen = length of contiguously allocted RBs
2678        * Spec 38.214 Sec 5.1.2.2.2
2679        */
2680       coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
2681       rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2682       rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2683
2684       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2685       {
2686          if((rbLen - 1) <= floor(coreset0Size / 2))
2687             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2688          else
2689             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2690                                + (coreset0Size - 1 - rbStart);
2691
2692          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2693       }
2694
2695       /*Fetching DCI field values */
2696
2697       /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2698       if(dlPageAlloc->shortMsgInd != TRUE)
2699       {
2700          /*When Short Msg is absent*/
2701          shortMsgInd = 1;
2702          shortMsg    = 0;
2703       }
2704       else
2705       {
2706          /*Short Msg is Present*/
2707          if(dlPageAlloc->dlPagePduLen == 0 || dlPageAlloc->dlPagePdu == NULLP)
2708          {
2709             /*When Paging Msg is absent*/
2710             shortMsgInd = 2;
2711          }
2712          else
2713          {
2714             /*Both Short and Paging is present*/
2715             shortMsgInd = 3;
2716          }
2717          shortMsg = dlPageAlloc->shortMsg;
2718       }
2719
2720       timeDomResAssign = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2721       VRB2PRBMap       = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2722       modNCodScheme    = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->codeword[0].mcsIndex;
2723       tbScaling        = 0;
2724       reserved         = 0;
2725
2726       /* Reversing bits in each DCI field */
2727       shortMsgInd      = reverseBits(shortMsgInd, shortMsgIndSize);
2728       shortMsg         = reverseBits(shortMsg, shortMsgSize);
2729       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2730       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2731       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2732       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2733       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2734       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2735
2736       /* Calulating total number of bytes in buffer */
2737       dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2738                                   + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2739                                   + tbScaling + reservedSize;
2740
2741       numBytes = dlDciPtr->payloadSizeBits / 8;
2742       if(dlDciPtr->payloadSizeBits % 8)
2743       {
2744          numBytes += 1;
2745       }
2746
2747       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2748       {
2749          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2750          return;
2751       }
2752
2753       /* Initialize buffer */
2754       for(bytePos = 0; bytePos < numBytes; bytePos++)
2755       {
2756          dlDciPtr->payload[bytePos] = 0;
2757       }
2758
2759       bytePos = numBytes - 1;
2760       bitPos = 0;
2761
2762       /* Packing DCI format fields */
2763       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2764             shortMsgInd, shortMsgIndSize);
2765       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2766             shortMsg, shortMsgSize);
2767       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2768             freqDomResAssign, freqDomResAssignSize);
2769       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2770             timeDomResAssign, timeDomResAssignSize);
2771       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2772             VRB2PRBMap, VRB2PRBMapSize);
2773       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2774             modNCodScheme, modNCodSchemeSize);
2775       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2776             tbScaling, tbScalingSize);
2777       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2778             reserved, reservedSize);
2779    }
2780 } /* fillPageDlDciPdu */
2781
2782 /*******************************************************************
2783  *
2784  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2785  *
2786  * @details
2787  *
2788  *    Function : fillRarDlDciPdu
2789  *
2790  *    Functionality:
2791  *         -Fills the Dl DCI PDU
2792  *
2793  * @params[in] Pointer to fapi_dl_dci_t
2794  *             Pointer to PdcchCfg
2795  * @return ROK
2796  *
2797  ******************************************************************/
2798
2799 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2800 {
2801    if(dlDciPtr != NULLP)
2802    {
2803       uint8_t numBytes =0;
2804       uint8_t bytePos =0;
2805       uint8_t bitPos =0;
2806
2807       uint16_t coreset0Size =0;
2808       uint16_t rbStart =0;
2809       uint16_t rbLen =0;
2810       uint32_t freqDomResAssign =0;
2811       uint8_t timeDomResAssign =0;
2812       uint8_t  VRB2PRBMap =0;
2813       uint8_t modNCodScheme =0;
2814       uint8_t tbScaling =0;
2815       uint32_t reserved =0;
2816
2817       /* Size(in bits) of each field in DCI format 1_0 */
2818       uint8_t freqDomResAssignSize = 0;
2819       uint8_t timeDomResAssignSize = 4;
2820       uint8_t VRB2PRBMapSize       = 1;
2821       uint8_t modNCodSchemeSize    = 5;
2822       uint8_t tbScalingSize        = 2;
2823       uint8_t reservedSize         = 16;
2824
2825       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2826       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2827       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2828       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2829       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2830       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2831       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2832       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2833       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2834       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2835       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2836       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2837
2838       /* Calculating freq domain resource allocation field value and size
2839        * coreset0Size = Size of coreset 0
2840        * RBStart = Starting Virtual Rsource block
2841        * RBLen = length of contiguously allocted RBs
2842        * Spec 38.214 Sec 5.1.2.2.2
2843        */
2844
2845       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2846       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2847       rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2848       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2849
2850       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2851       {
2852          if((rbLen - 1) <= floor(coreset0Size / 2))
2853             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2854          else
2855             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2856                                + (coreset0Size - 1 - rbStart);
2857
2858          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2859       }
2860
2861       /* Fetching DCI field values */
2862       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
2863       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2864       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2865       tbScaling        = 0; /* configured to 0 scaling */
2866       reserved         = 0;
2867
2868       /* Reversing bits in each DCI field */
2869       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2870       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2871       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2872       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2873       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2874
2875       /* Calulating total number of bytes in buffer */
2876       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2877                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2878
2879       numBytes = dlDciPtr->payloadSizeBits / 8;
2880       if(dlDciPtr->payloadSizeBits % 8)
2881          numBytes += 1;
2882
2883       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2884       {
2885          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2886          return;
2887       }
2888
2889       /* Initialize buffer */
2890       for(bytePos = 0; bytePos < numBytes; bytePos++)
2891          dlDciPtr->payload[bytePos] = 0;
2892
2893       bytePos = numBytes - 1;
2894       bitPos = 0;
2895
2896       /* Packing DCI format fields */
2897       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2898             freqDomResAssign, freqDomResAssignSize);
2899       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2900             timeDomResAssign, timeDomResAssignSize);
2901       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2902             VRB2PRBMap, VRB2PRBMapSize);
2903       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2904             modNCodScheme, modNCodSchemeSize);
2905       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2906             tbScaling, tbScalingSize);
2907       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2908             reserved, reservedSize);
2909    }
2910 } /* fillRarDlDciPdu */
2911
2912 /*******************************************************************
2913  *
2914  * @brief fills DL DCI PDU required for DL TTI info in MAC
2915  *
2916  * @details
2917  *
2918  *    Function : fillDlMsgDlDciPdu
2919  *
2920  *    Functionality:
2921  *         -Fills the Dl DCI PDU
2922  *
2923  * @params[in] Pointer to fapi_dl_dci_t
2924  *             Pointer to PdcchCfg
2925  * @return ROK
2926  *
2927  ******************************************************************/
2928 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2929       DlMsgInfo *dlMsgInfo)
2930 {
2931    if(dlDciPtr != NULLP)
2932    {
2933       uint8_t numBytes;
2934       uint8_t bytePos;
2935       uint8_t bitPos;
2936
2937       uint16_t coresetSize = 0;
2938       uint16_t rbStart = 0;
2939       uint16_t rbLen = 0;
2940       uint8_t  dciFormatId;
2941       uint32_t freqDomResAssign;
2942       uint8_t  timeDomResAssign;
2943       uint8_t  VRB2PRBMap;
2944       uint8_t  modNCodScheme;
2945       uint8_t  ndi = 0;
2946       uint8_t  redundancyVer = 0;
2947       uint8_t  harqProcessNum = 0;
2948       uint8_t  dlAssignmentIdx = 0;
2949       uint8_t  pucchTpc = 0;
2950       uint8_t  pucchResoInd = 0;
2951       uint8_t  harqFeedbackInd = 0;
2952
2953       /* Size(in bits) of each field in DCI format 1_0 */
2954       uint8_t dciFormatIdSize    = 1;
2955       uint8_t freqDomResAssignSize = 0;
2956       uint8_t timeDomResAssignSize = 4;
2957       uint8_t VRB2PRBMapSize       = 1;
2958       uint8_t modNCodSchemeSize    = 5;
2959       uint8_t ndiSize              = 1;
2960       uint8_t redundancyVerSize    = 2;
2961       uint8_t harqProcessNumSize   = 4;
2962       uint8_t dlAssignmentIdxSize  = 2;
2963       uint8_t pucchTpcSize         = 2;
2964       uint8_t pucchResoIndSize     = 3;
2965       uint8_t harqFeedbackIndSize  = 3;
2966
2967       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2968       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2969       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2970       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2971       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2972       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2973       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2974       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2975       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2976       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2977       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2978       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2979
2980       /* Calculating freq domain resource allocation field value and size
2981        * coreset0Size = Size of coreset 0
2982        * RBStart = Starting Virtual Rsource block
2983        * RBLen = length of contiguously allocted RBs
2984        * Spec 38.214 Sec 5.1.2.2.2
2985        */
2986       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2987       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2988       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2989
2990       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2991       {
2992          if((rbLen - 1) <= floor(coresetSize / 2))
2993             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2994          else
2995             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2996                                + (coresetSize - 1 - rbStart);
2997
2998          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2999       }
3000
3001       /* Fetching DCI field values */
3002       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
3003       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
3004       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
3005       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
3006       ndi              = dlMsgInfo->ndi;
3007       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
3008       harqProcessNum   = dlMsgInfo->harqProcNum;
3009       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
3010       pucchTpc         = dlMsgInfo->pucchTpc;
3011       pucchResoInd     = dlMsgInfo->pucchResInd;
3012       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
3013
3014       /* Reversing bits in each DCI field */
3015       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
3016       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3017       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3018       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3019       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
3020       ndi              = reverseBits(ndi, ndiSize);
3021       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
3022       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
3023       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3024       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
3025       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
3026       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3027
3028
3029       /* Calulating total number of bytes in buffer */
3030       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3031             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3032             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3033             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3034
3035       numBytes = dlDciPtr->payloadSizeBits / 8;
3036       if(dlDciPtr->payloadSizeBits % 8)
3037          numBytes += 1;
3038
3039       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3040       {
3041          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
3042          return;
3043       }
3044
3045       /* Initialize buffer */
3046       for(bytePos = 0; bytePos < numBytes; bytePos++)
3047          dlDciPtr->payload[bytePos] = 0;
3048
3049       bytePos = numBytes - 1;
3050       bitPos = 0;
3051
3052       /* Packing DCI format fields */
3053       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3054             dciFormatId, dciFormatIdSize);
3055       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3056             freqDomResAssign, freqDomResAssignSize);
3057       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3058             timeDomResAssign, timeDomResAssignSize);
3059       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3060             VRB2PRBMap, VRB2PRBMapSize);
3061       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3062             modNCodScheme, modNCodSchemeSize);
3063       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3064             ndi, ndiSize);
3065       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3066             redundancyVer, redundancyVerSize);
3067       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3068             redundancyVer, redundancyVerSize);
3069       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3070             harqProcessNum, harqProcessNumSize);
3071       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3072             dlAssignmentIdx, dlAssignmentIdxSize);
3073       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3074             pucchTpc, pucchTpcSize);
3075       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3076             pucchResoInd, pucchResoIndSize);
3077       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3078             harqFeedbackInd, harqFeedbackIndSize);
3079    }
3080 }
3081
3082 /*******************************************************************
3083  *
3084  * @brief fills PDCCH PDU required for DL TTI info in MAC
3085  *
3086  * @details
3087  *
3088  *    Function : fillPdcchPdu
3089  *
3090  *    Functionality:
3091  *         -Fills the Pdcch PDU info
3092  *          stored in MAC
3093  *
3094  * @params[in] Pointer to FAPI DL TTI Req
3095  *             Pointer to PdcchCfg
3096  * @return ROK
3097  *
3098  ******************************************************************/
3099 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3100       RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3101 {
3102    if(dlTtiReqPdu != NULLP)
3103    {
3104       PdcchCfg *pdcchInfo = NULLP;
3105       BwpCfg *bwp = NULLP;
3106
3107       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3108       if(rntiType == SI_RNTI_TYPE)
3109       {
3110          pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3111          bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3112          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3113       }
3114       else if(rntiType == P_RNTI_TYPE)
3115       {
3116          pdcchInfo = &dlSlot->pageAllocInfo->pagePdcchCfg;
3117          bwp = &dlSlot->pageAllocInfo->bwp;
3118          fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, dlSlot->pageAllocInfo);
3119       }
3120       else if(rntiType == RA_RNTI_TYPE)
3121       {
3122          pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3123          bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3124          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3125       }
3126       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3127       {
3128          pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
3129          bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
3130          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3131                &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
3132       }
3133       else
3134       {
3135          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
3136          return RFAILED;
3137       }
3138       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3139       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3140       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3141       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3142       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3143       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3144       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3145       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
3146       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3147       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3148       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3149       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
3150       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3151       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3152       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3153
3154       /* Calculating PDU length. Considering only one dl dci pdu for now */
3155       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3156    }
3157
3158    return ROK;
3159 }
3160
3161 /*******************************************************************
3162  *
3163  * @brief fills PDSCH PDU required for DL TTI info in MAC
3164  *
3165  * @details
3166  *
3167  *    Function : fillPdschPdu
3168  *
3169  *    Functionality:
3170  *         -Fills the Pdsch PDU info
3171  *          stored in MAC
3172  *
3173  * @params[in] Pointer to FAPI DL TTI Req
3174  *             Pointer to PdschCfg
3175  *             Pointer to msgLen of DL TTI Info
3176  * @return ROK
3177  *
3178  ******************************************************************/
3179
3180 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
3181       BwpCfg bwp, uint16_t pduIndex)
3182 {
3183    uint8_t idx;
3184
3185    if(dlTtiReqPdu != NULLP)
3186    {
3187       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3188       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3189       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3190       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3191       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3192       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3193       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3194       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3195       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3196       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3197       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3198       {
3199          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3200          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3201          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3202          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3203          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3204          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3205       }
3206       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3207       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3208       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3209       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3210       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3211       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3212       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3213       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3214       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3215       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3216       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3217       /* since we are using type-1, hence rbBitmap excluded */
3218       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3219       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3220       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3221       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3222       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3223       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3224       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3225       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3226       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3227          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3228       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3229          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3230       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3231       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3232       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3233       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3234       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3235
3236       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3237    }
3238 }
3239
3240 /***********************************************************************
3241  *
3242  * @brief calculates the total size to be allocated for DL TTI Req
3243  *
3244  * @details
3245  *
3246  *    Function : calcDlTtiReqPduCount
3247  *
3248  *    Functionality:
3249  *         -calculates the total pdu count to be allocated for DL TTI Req
3250  *
3251  * @params[in]   MacDlSlot *dlSlot
3252  * @return count
3253  *
3254  * ********************************************************************/
3255 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3256 {
3257    uint8_t count = 0;
3258    uint8_t idx = 0, ueIdx=0;
3259
3260    if(dlSlot->dlInfo.isBroadcastPres)
3261    {
3262       if(dlSlot->dlInfo.brdcstAlloc.ssbTrans)
3263       {
3264          for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3265          {
3266             /* SSB PDU is filled */
3267             count++;
3268          }
3269       }
3270       if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3271       {
3272          /* PDCCH and PDSCH PDU is filled */
3273          count += 2;
3274       }
3275    }
3276
3277    if(dlSlot->pageAllocInfo)
3278    {
3279       /* PDCCH and PDSCH PDU is filled */
3280       count += 2;
3281    }
3282
3283    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3284    {
3285       if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3286       {
3287          /* PDCCH and PDSCH PDU is filled */
3288          if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
3289             count += 2;
3290          else
3291             count += 1;
3292       }
3293
3294       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3295       {
3296          for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3297          {
3298             /* PDCCH and PDSCH PDU is filled */
3299             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
3300                count += 2;
3301             else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
3302                count += 1;
3303          }
3304       }
3305    }
3306    return count;
3307 }
3308
3309 /***********************************************************************
3310  *
3311  * @brief calculates the total size to be allocated for DL TTI Req
3312  *
3313  * @details
3314  *
3315  *    Function : calcTxDataReqPduCount
3316  *
3317  *    Functionality:
3318  *         -calculates the total pdu count to be allocated for DL TTI Req
3319  *
3320  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3321  * @return count
3322  *
3323  * ********************************************************************/
3324 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3325 {
3326    uint8_t idx = 0, count = 0, ueIdx=0;
3327
3328    if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3329    {
3330       count++;
3331    }
3332    if(dlSlot->pageAllocInfo)
3333    {
3334       count++;
3335    }
3336
3337    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3338    {
3339       if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
3340             ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
3341          count++;
3342
3343       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3344       {
3345          for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3346          {
3347             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
3348                   dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
3349                count++;
3350          }
3351       }
3352    }
3353    return count;
3354 }
3355
3356 /***********************************************************************
3357  *
3358  * @brief fills the SIB1 TX-DATA request message
3359  *
3360  * @details
3361  *
3362  *    Function : fillSib1TxDataReq
3363  *
3364  *    Functionality:
3365  *         - fills the SIB1 TX-DATA request message
3366  *
3367  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3368  * @params[in]    macCellCfg consist of SIB1 pdu
3369  * @params[in]    uint32_t *msgLen
3370  * @params[in]    uint16_t pduIndex
3371  * @return ROK
3372  *
3373  * ********************************************************************/
3374 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3375       PdschCfg pdschCfg)
3376 {
3377    uint32_t payloadSize = 0;
3378    uint8_t *sib1Payload = NULLP;
3379    fapi_api_queue_elem_t *payloadElem = NULLP;
3380 #ifdef INTEL_WLS_MEM
3381    void * wlsHdlr = NULLP;
3382 #endif
3383
3384    pduDesc[pduIndex].pdu_index = pduIndex;
3385    pduDesc[pduIndex].num_tlvs = 1;
3386
3387    /* fill the TLV */
3388    payloadSize = pdschCfg.codeword[0].tbSize;
3389    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3390    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3391    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3392    if(sib1Payload == NULLP)
3393    {
3394       return RFAILED;
3395    }
3396    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3397    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3398       macCellCfg->sib1Cfg.sib1PduLen);
3399    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
3400
3401 #ifdef INTEL_WLS_MEM
3402    mtGetWlsHdl(&wlsHdlr);
3403    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3404 #else
3405    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3406 #endif
3407    pduDesc[pduIndex].pdu_length = payloadSize;
3408
3409 #ifdef INTEL_WLS_MEM
3410    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3411 #else
3412    LWR_MAC_FREE(sib1Payload, payloadSize);
3413 #endif
3414
3415    return ROK;
3416 }
3417
3418 /***********************************************************************
3419  *
3420  * @brief fills the PAGE TX-DATA request message
3421  *
3422  * @details
3423  *
3424  *    Function : fillPageTxDataReq
3425  *
3426  *    Functionality:
3427  *         - fills the Page TX-DATA request message
3428  *
3429  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3430  * @params[in]    macCellCfg consist of SIB1 pdu
3431  * @params[in]    uint32_t *msgLen
3432  * @params[in]    uint16_t pduIndex
3433  * @return ROK
3434  *
3435  * ********************************************************************/
3436 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo,
3437                            PdschCfg pdschCfg)
3438 {
3439    uint32_t payloadSize = 0;
3440    uint8_t *pagePayload = NULLP;
3441    fapi_api_queue_elem_t *payloadElem = NULLP;
3442 #ifdef INTEL_WLS_MEM
3443    void * wlsHdlr = NULLP;
3444 #endif
3445
3446    pduDesc[pduIndex].pdu_index = pduIndex;
3447    pduDesc[pduIndex].num_tlvs = 1;
3448
3449    /* fill the TLV */
3450    payloadSize = pdschCfg.codeword[0].tbSize;
3451    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3452    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3453    LWR_MAC_ALLOC(pagePayload, payloadSize);
3454    if(pagePayload == NULLP)
3455    {
3456       return RFAILED;
3457    }
3458    payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3459    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3460          pageAllocInfo->dlPagePduLen);
3461    memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->dlPagePdu, pageAllocInfo->dlPagePduLen);
3462
3463 #ifdef INTEL_WLS_MEM
3464    mtGetWlsHdl(&wlsHdlr);
3465    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3466 #else
3467    pduDesc[pduIndex].tlvs[0].value = pagePayload;
3468 #endif
3469    pduDesc[pduIndex].pdu_length = payloadSize;
3470
3471 #ifdef INTEL_WLS_MEM
3472    addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3473 #else
3474    LWR_MAC_FREE(pagePayload, payloadSize);
3475 #endif
3476
3477    return ROK;
3478 }
3479
3480 /***********************************************************************
3481  *
3482  * @brief fills the RAR TX-DATA request message
3483  *
3484  * @details
3485  *
3486  *    Function : fillRarTxDataReq
3487  *
3488  *    Functionality:
3489  *         - fills the RAR TX-DATA request message
3490  *
3491  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3492  * @params[in]    RarInfo *rarInfo
3493  * @params[in]    uint32_t *msgLen
3494  * @params[in]    uint16_t pduIndex
3495  * @return ROK
3496  *
3497  * ********************************************************************/
3498 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3499 {
3500    uint16_t payloadSize;
3501    uint8_t  *rarPayload = NULLP;
3502    fapi_api_queue_elem_t *payloadElem = NULLP;
3503 #ifdef INTEL_WLS_MEM
3504    void * wlsHdlr = NULLP;
3505 #endif
3506
3507    pduDesc[pduIndex].pdu_index = pduIndex;
3508    pduDesc[pduIndex].num_tlvs = 1;
3509
3510    /* fill the TLV */
3511    payloadSize = pdschCfg.codeword[0].tbSize;
3512    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3513    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3514    LWR_MAC_ALLOC(rarPayload, payloadSize);
3515    if(rarPayload == NULLP)
3516    {
3517       return RFAILED;
3518    }
3519    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3520    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3521    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3522
3523 #ifdef INTEL_WLS_MEM
3524    mtGetWlsHdl(&wlsHdlr);
3525    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3526 #else
3527    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3528 #endif
3529    pduDesc[pduIndex].pdu_length = payloadSize;
3530
3531 #ifdef INTEL_WLS_MEM
3532    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3533 #else
3534    LWR_MAC_FREE(rarPayload, payloadSize);
3535 #endif
3536    return ROK;
3537 }
3538
3539 /***********************************************************************
3540  *
3541  * @brief fills the DL dedicated Msg TX-DATA request message
3542  *
3543  * @details
3544  *
3545  *    Function : fillDlMsgTxDataReq
3546  *
3547  *    Functionality:
3548  *         - fills the Dl Dedicated Msg TX-DATA request message
3549  *
3550  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3551  * @params[in]    DlMsgInfo *dlMsgInfo
3552  * @params[in]    uint32_t *msgLen
3553  * @params[in]    uint16_t pduIndex
3554  * @return ROK
3555  *
3556  * ********************************************************************/
3557 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3558 {
3559    uint16_t payloadSize;
3560    uint8_t  *dlMsgPayload = NULLP;
3561    fapi_api_queue_elem_t *payloadElem = NULLP;
3562 #ifdef INTEL_WLS_MEM
3563    void * wlsHdlr = NULLP;
3564 #endif
3565
3566    pduDesc[pduIndex].pdu_index = pduIndex;
3567    pduDesc[pduIndex].num_tlvs = 1;
3568
3569    /* fill the TLV */
3570    payloadSize = pdschCfg.codeword[0].tbSize;
3571    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3572    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3573    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3574    if(dlMsgPayload == NULLP)
3575    {
3576       return RFAILED;
3577    }
3578    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3579    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3580    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3581
3582 #ifdef INTEL_WLS_MEM
3583    mtGetWlsHdl(&wlsHdlr);
3584    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3585 #else
3586    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3587 #endif
3588    pduDesc[pduIndex].pdu_length = payloadSize;
3589
3590 #ifdef INTEL_WLS_MEM
3591    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3592 #else
3593    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3594 #endif
3595    return ROK;
3596 }
3597
3598 #endif /* FAPI */
3599
3600 /*******************************************************************
3601  *
3602  * @brief Sends DL TTI Request to PHY
3603  *
3604  * @details
3605  *
3606  *    Function : fillDlTtiReq
3607  *
3608  *    Functionality:
3609  *         -Sends FAPI DL TTI req to PHY
3610  *
3611  * @params[in]    timing info
3612  * @return ROK     - success
3613  *         RFAILED - failure
3614  *
3615  * ****************************************************************/
3616 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3617 {
3618 #ifdef CALL_FLOW_DEBUG_LOG
3619    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3620 #endif
3621
3622 #ifdef INTEL_FAPI
3623    uint8_t idx =0;
3624    uint8_t nPdu = 0;
3625    uint8_t numPduEncoded = 0;
3626    uint8_t  ueIdx;
3627    uint16_t cellIdx =0;
3628    uint16_t pduIndex = 0;
3629
3630    SlotTimingInfo dlTtiReqTimingInfo;
3631    MacDlSlot *currDlSlot = NULLP;
3632    MacCellCfg macCellCfg;
3633    RntiType rntiType;
3634    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3635    fapi_msg_header_t *msgHeader = NULLP;
3636    p_fapi_api_queue_elem_t dlTtiElem;
3637    p_fapi_api_queue_elem_t headerElem;
3638    p_fapi_api_queue_elem_t prevElem;
3639
3640    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3641    {
3642       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3643       /* consider phy delay */
3644       ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
3645       dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3646
3647       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3648
3649       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3650
3651       LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3652       if(dlTtiElem)
3653       {
3654          FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3655                sizeof(fapi_dl_tti_req_t));
3656
3657          /* Fill message header */
3658          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3659          if(!headerElem)
3660          {
3661             DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3662             LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3663             return RFAILED;
3664          }
3665          FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3666                sizeof(fapi_msg_header_t));
3667          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3668          msgHeader->num_msg = 1;
3669          msgHeader->handle = 0;
3670
3671          /* Fill Dl TTI Request */
3672          dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3673          memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3674          fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3675
3676          dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3677          dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3678          dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot);  /* get total Pdus */
3679          nPdu = dlTtiReq->nPdus;
3680          dlTtiReq->nGroup = 0;
3681          if(dlTtiReq->nPdus > 0)
3682          {
3683             if(currDlSlot->dlInfo.isBroadcastPres)
3684             {
3685                if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3686                {
3687                   if(dlTtiReq->pdus != NULLP)
3688                   {
3689                      for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3690                      {
3691                         fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3692                               currDlSlot, idx, dlTtiReq->sfn);
3693                         numPduEncoded++;
3694                      }
3695                   }
3696                   DU_LOG("\033[1;31m");
3697                   DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3698                   DU_LOG("\033[0m");
3699                }
3700
3701                if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3702                {
3703                   /* Filling SIB1 param */
3704                   if(numPduEncoded != nPdu)
3705                   {
3706                      rntiType = SI_RNTI_TYPE;
3707                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], currDlSlot, -1, \
3708                            rntiType, CORESET_TYPE0, MAX_NUM_UE);
3709                      numPduEncoded++;
3710                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3711                            &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3712                            currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3713                            pduIndex);
3714                      dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3715                      pduIndex++;
3716                      numPduEncoded++;
3717                   }
3718                   DU_LOG("\033[1;34m");
3719                   DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3720                   DU_LOG("\033[0m");
3721                }
3722             }
3723
3724             if(currDlSlot->pageAllocInfo != NULLP)
3725             {
3726                /* Filling DL Paging Alloc param */
3727                if(numPduEncoded != nPdu)
3728                {
3729                   rntiType = P_RNTI_TYPE;
3730                   fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], currDlSlot, -1, \
3731                         rntiType, CORESET_TYPE0, MAX_NUM_UE);
3732                   numPduEncoded++;
3733                   fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3734                         &currDlSlot->pageAllocInfo->pagePdschCfg,
3735                         currDlSlot->pageAllocInfo->bwp,
3736                         pduIndex);
3737                   dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3738                   pduIndex++;
3739                   numPduEncoded++;
3740                }
3741                DU_LOG("\033[1;34m");
3742                DU_LOG("\nDEBUG  -->  LWR_MAC: PAGE sent...");
3743                DU_LOG("\033[0m");
3744             }
3745
3746             for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3747             {
3748                if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3749                {
3750                   /* Filling RAR param */
3751                   rntiType = RA_RNTI_TYPE;
3752                   if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3753                         (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
3754                   {
3755                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3756                            currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3757                      numPduEncoded++;
3758                   }
3759                   if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3760                         (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3761                   {
3762                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3763                            &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3764                            currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3765                            pduIndex);
3766                      numPduEncoded++;
3767                      pduIndex++;
3768
3769                      DU_LOG("\033[1;32m");
3770                      DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3771                      DU_LOG("\033[0m");
3772                   }
3773                }
3774
3775                if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3776                {
3777                   for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3778                   {
3779                      /* Filling Msg4 param */
3780                      if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3781                            (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
3782                      {
3783                         if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3784                         {
3785                            rntiType = TC_RNTI_TYPE;
3786                            fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3787                                  currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
3788                         }
3789                         else
3790                         {
3791                            /* Filling other DL msg params */
3792                            rntiType = C_RNTI_TYPE;
3793                            fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3794                                  currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
3795                         }
3796                         numPduEncoded++;
3797                      }
3798
3799                      if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
3800                      {
3801                         if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3802                               (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
3803                         {
3804                            fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], \
3805                                  &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
3806                                  currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
3807                            numPduEncoded++;
3808                            pduIndex++;
3809
3810                            DU_LOG("\033[1;32m");
3811                            if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3812                            {
3813                               DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3814                            }
3815                            else
3816                            {
3817                               DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3818                            }
3819                            DU_LOG("\033[0m");
3820                         }
3821
3822                      }
3823                      /*   else
3824                           {
3825                           MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3826                           currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3827                           }
3828                           */
3829                   }
3830                }
3831             }
3832
3833             dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3834             dlTtiReq->nGroup++;
3835
3836 #ifdef ODU_SLOT_IND_DEBUG_LOG
3837             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3838 #endif
3839
3840             /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3841             fillUlTtiReq(currTimingInfo, dlTtiElem);
3842             msgHeader->num_msg++;
3843
3844             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3845             fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
3846             msgHeader->num_msg++;
3847
3848             /* send Tx-DATA req message */
3849             sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next);
3850             if(dlTtiElem->p_next->p_next->p_next)
3851             {
3852                msgHeader->num_msg++;
3853                prevElem = dlTtiElem->p_next->p_next->p_next;
3854             }
3855             else
3856                prevElem = dlTtiElem->p_next->p_next;
3857          }
3858          else
3859          {
3860 #ifdef ODU_SLOT_IND_DEBUG_LOG
3861             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3862 #endif
3863
3864             /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3865             fillUlTtiReq(currTimingInfo, dlTtiElem);
3866             msgHeader->num_msg++;
3867
3868             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3869             fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
3870             msgHeader->num_msg++;
3871
3872             prevElem = dlTtiElem->p_next->p_next;
3873          }
3874
3875          if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
3876          {
3877             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3878             lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
3879             msgHeader->num_msg++;
3880             macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
3881          }
3882          LwrMacSendToL1(headerElem);
3883          memset(currDlSlot, 0, sizeof(MacDlSlot));
3884          return ROK;
3885       }
3886       else
3887       {
3888          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
3889          memset(currDlSlot, 0, sizeof(MacDlSlot));
3890          return RFAILED;
3891       }
3892    }
3893    else
3894    {
3895       lwr_mac_procInvalidEvt(&currTimingInfo);
3896       return RFAILED;
3897    }
3898 #endif
3899    return ROK;
3900 }
3901
3902 /*******************************************************************
3903  *
3904  * @brief Sends TX data Request to PHY
3905  *
3906  * @details
3907  *
3908  *    Function : sendTxDataReq
3909  *
3910  *    Functionality:
3911  *         -Sends FAPI TX data req to PHY
3912  *
3913  * @params[in]    timing info
3914  * @return ROK     - success
3915  *         RFAILED - failure
3916  *
3917  * ****************************************************************/
3918 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem)
3919 {
3920 #ifdef INTEL_FAPI
3921 #ifdef CALL_FLOW_DEBUG_LOG
3922    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
3923 #endif
3924
3925    uint8_t  nPdu = 0;
3926    uint8_t  ueIdx=0;
3927    uint8_t  schInfoIdx = 0;
3928    uint16_t cellIdx=0;
3929    uint16_t pduIndex = 0;
3930    fapi_tx_data_req_t       *txDataReq =NULLP;
3931    p_fapi_api_queue_elem_t  txDataElem = 0;
3932
3933    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3934
3935    /* send TX_Data request message */
3936    nPdu = calcTxDataReqPduCount(dlSlot);
3937    if(nPdu > 0)
3938    {
3939       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3940       if(txDataElem == NULLP)
3941       {
3942          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
3943          return RFAILED;
3944       }
3945
3946       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3947             sizeof(fapi_tx_data_req_t));
3948       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3949       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3950       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3951
3952       txDataReq->sfn  = currTimingInfo.sfn;
3953       txDataReq->slot = currTimingInfo.slot;
3954       if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3955       {
3956          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
3957                dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg);
3958          pduIndex++;
3959          txDataReq->num_pdus++;
3960       }
3961       if(dlSlot->pageAllocInfo != NULLP)
3962       {
3963          fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo, \
3964                dlSlot->pageAllocInfo->pagePdschCfg);
3965          pduIndex++;
3966          txDataReq->num_pdus++;
3967          MAC_FREE(dlSlot->pageAllocInfo->dlPagePdu, sizeof(dlSlot->pageAllocInfo->dlPagePduLen));
3968          MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
3969       }
3970
3971       for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3972       {
3973          if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3974          {
3975             if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3976             {
3977                fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
3978                      dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
3979                pduIndex++;
3980                txDataReq->num_pdus++;
3981             }
3982             MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
3983          }
3984
3985          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3986          {
3987             for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
3988             {
3989                if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
3990                      (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
3991                {
3992                   fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
3993                         &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
3994                         dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
3995                   pduIndex++;
3996                   txDataReq->num_pdus++;
3997                }
3998                MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
3999                      dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
4000                dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
4001             }
4002             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
4003          }
4004       }
4005
4006       /* Fill message header */
4007       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
4008       prevElem->p_next = txDataElem;
4009    }
4010 #endif
4011    return ROK;
4012 }
4013
4014 /***********************************************************************
4015  *
4016  * @brief calculates the total size to be allocated for UL TTI Req
4017  *
4018  * @details
4019  *
4020  *    Function : getnPdus
4021  *
4022  *    Functionality:
4023  *         -calculates the total pdu count to be allocated for UL TTI Req
4024  *
4025  * @params[in] Pointer to fapi Ul TTI Req
4026  *             Pointer to CurrUlSlot
4027  * @return count
4028  * ********************************************************************/
4029 #ifdef INTEL_FAPI
4030 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4031 {
4032    uint8_t pduCount = 0;
4033
4034    if(ulTtiReq && currUlSlot)
4035    {
4036       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4037       {
4038          pduCount++;
4039          ulTtiReq->rachPresent++;
4040       }
4041       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4042       {
4043          pduCount++;
4044          ulTtiReq->nUlsch++;
4045       }
4046       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4047       {
4048          pduCount++;
4049          ulTtiReq->nUlsch++;
4050       }
4051       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4052       {
4053          pduCount++;
4054          ulTtiReq->nUlcch++;
4055       }
4056       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
4057       {
4058          pduCount++;
4059       }
4060    }
4061    return pduCount;
4062 }
4063 #endif
4064
4065 /***********************************************************************
4066  *
4067  * @brief Set the value of zero correlation config in PRACH PDU
4068  *
4069  * @details
4070  *
4071  *    Function : setNumCs
4072  *
4073  *    Functionality:
4074  *         -Set the value of zero correlation config in PRACH PDU
4075  *
4076  * @params[in] Pointer to zero correlation config
4077  *             Pointer to MacCellCfg
4078  * ********************************************************************/
4079
4080 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4081 {
4082 #ifdef INTEL_FAPI
4083    uint8_t idx;
4084    if(macCellCfg != NULLP)
4085    {
4086       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4087       *numCs = UnrestrictedSetNcsTable[idx];
4088    }
4089 #endif
4090 }
4091
4092 /***********************************************************************
4093  *
4094  * @brief Fills the PRACH PDU in UL TTI Request
4095  *
4096  * @details
4097  *
4098  *    Function : fillPrachPdu
4099  *
4100  *    Functionality:
4101  *         -Fills the PRACH PDU in UL TTI Request
4102  *
4103  * @params[in] Pointer to Prach Pdu
4104  *             Pointer to CurrUlSlot
4105  *             Pointer to macCellCfg
4106  *             Pointer to msgLen
4107  * ********************************************************************/
4108
4109 #ifdef INTEL_FAPI
4110 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4111 {
4112    if(ulTtiReqPdu != NULLP)
4113    {
4114       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4115       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
4116       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4117          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
4118       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4119          currUlSlot->ulInfo.prachSchInfo.prachFormat;
4120       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
4121       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4122          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
4123       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4124       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4125       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4126       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4127       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4128       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4129    }
4130 }
4131
4132 /*******************************************************************
4133  *
4134  * @brief Filling PUSCH PDU in UL TTI Request
4135  *
4136  * @details
4137  *
4138  *    Function : fillPuschPdu
4139  *
4140  *    Functionality: Filling PUSCH PDU in UL TTI Request
4141  *
4142  * @params[in]
4143  * @return ROK     - success
4144  *         RFAILED - failure
4145  *
4146  * ****************************************************************/
4147 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4148 {
4149    if(ulTtiReqPdu != NULLP)
4150    {
4151       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4152       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4153       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4154       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
4155       /* TODO : Fill handle in raCb when scheduling pusch and access here */
4156       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4157       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
4158       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
4159       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4160          macCellCfg->initialUlBwp.bwp.scs;
4161       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4162          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4163       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4164       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
4165       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
4166       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
4167       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4168       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
4169       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4170       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4171       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4172       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
4173       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4174       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4175       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4176       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4177          currUlSlot->ulInfo.schPuschInfo.resAllocType;
4178       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4179          currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
4180       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4181          currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
4182       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4183       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4184       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4185       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4186       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4187          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
4188       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4189          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
4190       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4191          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
4192       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4193          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
4194       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4195          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
4196       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4197          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
4198       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4199          currUlSlot->ulInfo.schPuschInfo.harqProcId;
4200       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4201          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
4202       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4203          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
4204       /* numCb is 0 for new transmission */
4205       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4206
4207       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4208    }
4209 }
4210
4211 /*******************************************************************
4212  *
4213  * @brief Fill PUCCH PDU in Ul TTI Request
4214  *
4215  * @details
4216  *
4217  *    Function : fillPucchPdu
4218  *
4219  *    Functionality: Fill PUCCH PDU in Ul TTI Request
4220  *
4221  * @params[in]
4222  * @return ROK     - success
4223  *         RFAILED - failure
4224  *
4225  * ****************************************************************/
4226 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
4227       MacUlSlot *currUlSlot)
4228 {
4229    if(ulTtiReqPdu != NULLP)
4230    {
4231       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
4232       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4233       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.schPucchInfo.rnti;
4234       /* TODO : Fill handle in raCb when scheduling pucch and access here */
4235       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
4236       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
4237       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
4238       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
4239       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4240       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
4241       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4242
4243       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
4244       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
4245       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
4246       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
4247       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
4248       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
4249       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4250       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4251       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
4252
4253       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
4254
4255       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4256       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
4257       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
4258       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
4259       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
4260       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
4261       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4262       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
4263       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
4264       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
4265       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
4266       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
4267       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
4268       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
4269       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
4270       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4271
4272       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4273    }
4274 }
4275
4276 #endif
4277
4278 /*******************************************************************
4279  *
4280  * @brief Sends UL TTI Request to PHY
4281  *
4282  * @details
4283  *
4284  *    Function : fillUlTtiReq
4285  *
4286  *    Functionality:
4287  *         -Sends FAPI Param req to PHY
4288  *
4289  * @params[in]  Pointer to CmLteTimingInfo
4290  * @return ROK     - success
4291  *         RFAILED - failure
4292  *
4293  ******************************************************************/
4294 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
4295 {
4296 #ifdef CALL_FLOW_DEBUG_LOG
4297    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4298 #endif
4299
4300 #ifdef INTEL_FAPI
4301    uint16_t   cellIdx =0;
4302    uint8_t    pduIdx = -1;
4303    SlotTimingInfo ulTtiReqTimingInfo;
4304    MacUlSlot *currUlSlot = NULLP;
4305    MacCellCfg macCellCfg;
4306    fapi_ul_tti_req_t *ulTtiReq = NULLP;
4307    p_fapi_api_queue_elem_t ulTtiElem;
4308
4309    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4310    {
4311       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4312       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4313
4314       /* add PHY delta */
4315       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
4316       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
4317
4318       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4319       if(ulTtiElem)
4320       {
4321          FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4322             sizeof(fapi_ul_tti_req_t));
4323          ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4324          memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4325          fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4326          ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
4327          ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4328          ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4329          ulTtiReq->nGroup = 0;
4330          if(ulTtiReq->nPdus > 0)
4331          {
4332             /* Fill Prach Pdu */
4333             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4334             {
4335                pduIdx++;
4336                fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4337             }
4338
4339             /* Fill PUSCH PDU */
4340             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4341             {
4342                pduIdx++;
4343                fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4344             }
4345             /* Fill PUCCH PDU */
4346             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4347             {
4348                pduIdx++;
4349                fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4350             }
4351          }
4352
4353 #ifdef ODU_SLOT_IND_DEBUG_LOG
4354          DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
4355 #endif
4356          prevElem->p_next = ulTtiElem;
4357
4358          memset(currUlSlot, 0, sizeof(MacUlSlot));
4359          return ROK;
4360       }
4361       else
4362       {
4363          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
4364          memset(currUlSlot, 0, sizeof(MacUlSlot));
4365          return RFAILED;
4366       }
4367    }
4368    else
4369    {
4370       lwr_mac_procInvalidEvt(&currTimingInfo);
4371    }
4372 #endif
4373    return ROK;
4374 }
4375
4376 #ifdef INTEL_FAPI
4377 /*******************************************************************
4378  *
4379  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4380  *
4381  * @details
4382  *
4383  *    Function : fillUlDciPdu
4384  *
4385  *    Functionality:
4386  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4387  *
4388  * @params[in] Pointer to fapi_dl_dci_t
4389  *             Pointer to DciInfo
4390  * @return ROK
4391  *
4392  ******************************************************************/
4393 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4394 {
4395 #ifdef CALL_FLOW_DEBUG_LOG
4396    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4397 #endif
4398    if(ulDciPtr != NULLP)
4399    {
4400       uint8_t numBytes =0;
4401       uint8_t bytePos =0;
4402       uint8_t bitPos =0;
4403
4404       uint8_t  coreset1Size = 0;
4405       uint16_t rbStart = 0;
4406       uint16_t rbLen = 0;
4407       uint8_t  dciFormatId = 0;
4408       uint32_t freqDomResAssign =0;
4409       uint8_t  timeDomResAssign =0;
4410       uint8_t  freqHopFlag =0;
4411       uint8_t  modNCodScheme =0;
4412       uint8_t  ndi =0;
4413       uint8_t  redundancyVer = 0;
4414       uint8_t  harqProcessNum = 0;
4415       uint8_t  puschTpc = 0;
4416       uint8_t  ul_SlInd = 0;
4417
4418       /* Size(in bits) of each field in DCI format 0_0 */
4419       uint8_t dciFormatIdSize      = 1;
4420       uint8_t freqDomResAssignSize = 0;
4421       uint8_t timeDomResAssignSize = 4;
4422       uint8_t freqHopFlagSize      = 1;
4423       uint8_t modNCodSchemeSize    = 5;
4424       uint8_t ndiSize              = 1;
4425       uint8_t redundancyVerSize    = 2;
4426       uint8_t harqProcessNumSize   = 4;
4427       uint8_t puschTpcSize         = 2;
4428       uint8_t ul_SlIndSize         = 1;
4429
4430       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4431       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4432       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4433       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4434       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4435       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4436       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4437       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4438       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4439       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4440       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.powerValue;
4441       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4442
4443       /* Calculating freq domain resource allocation field value and size
4444        * coreset1Size = Size of coreset 1
4445        * RBStart = Starting Virtual Rsource block
4446        * RBLen = length of contiguously allocted RBs
4447        * Spec 38.214 Sec 5.1.2.2.2
4448        */
4449       if(schDciInfo->formatType == FORMAT0_0)
4450       {
4451          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4452          rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4453          rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4454
4455          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4456          {
4457             if((rbLen - 1) <= floor(coreset1Size / 2))
4458                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4459             else
4460                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4461                                   + (coreset1Size - 1 - rbStart);
4462
4463             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4464          }
4465          /* Fetching DCI field values */
4466          dciFormatId      = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4467          timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4468          freqHopFlag      = schDciInfo->format.format0_0.freqHopFlag;
4469          modNCodScheme    = schDciInfo->format.format0_0.mcs;
4470          ndi              = schDciInfo->format.format0_0.ndi;
4471          redundancyVer    = schDciInfo->format.format0_0.rv;
4472          harqProcessNum   = schDciInfo->format.format0_0.harqProcId;
4473          puschTpc         = schDciInfo->format.format0_0.tpcCmd;
4474          ul_SlInd         = schDciInfo->format.format0_0.sUlCfgd;
4475
4476          /* Reversing bits in each DCI field */
4477          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4478          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4479          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4480          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4481          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4482          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4483          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4484          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4485       }
4486       /* Calulating total number of bytes in buffer */
4487       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4488       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4489       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4490
4491       numBytes = ulDciPtr->payloadSizeBits / 8;
4492       if(ulDciPtr->payloadSizeBits % 8)
4493          numBytes += 1;
4494
4495       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4496       {
4497          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4498          return;
4499       }
4500
4501       /* Initialize buffer */
4502       for(bytePos = 0; bytePos < numBytes; bytePos++)
4503          ulDciPtr->payload[bytePos] = 0;
4504
4505       bytePos = numBytes - 1;
4506       bitPos = 0;
4507
4508       /* Packing DCI format fields */
4509       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4510             dciFormatId, dciFormatIdSize);
4511       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4512             freqDomResAssign, freqDomResAssignSize);
4513       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4514             timeDomResAssign, timeDomResAssignSize);
4515       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4516             freqHopFlag, freqHopFlagSize);
4517       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4518             modNCodScheme, modNCodSchemeSize);
4519       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4520             ndi, ndiSize);
4521       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4522             redundancyVer, redundancyVerSize);
4523       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4524             harqProcessNum, harqProcessNumSize);
4525       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4526             puschTpc, puschTpcSize);
4527       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4528             ul_SlInd, ul_SlIndSize);
4529    }
4530 } /* fillUlDciPdu */
4531
4532 /*******************************************************************
4533  *
4534  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4535  *
4536  * @details
4537  *
4538  *    Function : fillUlDciPdcchPdu
4539  *
4540  *    Functionality:
4541  *         -Fills the Pdcch PDU info
4542  *
4543  * @params[in] Pointer to FAPI DL TTI Req
4544  *             Pointer to PdcchCfg
4545  * @return ROK
4546  *
4547  ******************************************************************/
4548 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4549 {
4550    if(ulDciReqPdu != NULLP)
4551    {
4552       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4553       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4554       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4555       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4556       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4557       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4558       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4559       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4560       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4561       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4562       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4563       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4564       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4565       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4566       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4567       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4568       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4569
4570       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4571       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4572    }
4573    return ROK;
4574 }
4575 #endif
4576 /*******************************************************************
4577  *
4578  * @brief Sends UL DCI Request to PHY
4579  *
4580  * @details
4581  *
4582  *    Function : fillUlDciReq
4583  *
4584  *    Functionality:
4585  *         -Sends FAPI Ul Dci req to PHY
4586  *
4587  * @params[in]  Pointer to CmLteTimingInfo
4588  * @return ROK     - success
4589  *         RFAILED - failure
4590  *
4591  ******************************************************************/
4592 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
4593 {
4594 #ifdef INTEL_FAPI
4595    uint8_t      cellIdx =0;
4596    uint8_t      numPduEncoded = 0;
4597    SlotTimingInfo  ulDciReqTimingInfo ={0};
4598    MacDlSlot    *currDlSlot = NULLP;
4599    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4600    p_fapi_api_queue_elem_t  ulDciElem;
4601
4602    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4603    {
4604       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4605       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4606       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4607
4608          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4609          if(ulDciElem)
4610          {
4611             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4612                sizeof(fapi_ul_dci_req_t));
4613             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4614             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4615             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4616
4617             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4618             ulDciReq->slot = ulDciReqTimingInfo.slot;
4619           if(currDlSlot->dlInfo.ulGrant != NULLP)
4620           {
4621             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4622             if(ulDciReq->numPdus > 0)
4623             {
4624                /* Fill PDCCH configuration Pdu */
4625                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4626                numPduEncoded++;
4627                /* free UL GRANT at SCH */
4628                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4629             }
4630 #ifdef ODU_SLOT_IND_DEBUG_LOG
4631                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4632 #endif
4633          }
4634                prevElem->p_next = ulDciElem;
4635       }
4636    }
4637    else
4638    {
4639        lwr_mac_procInvalidEvt(&currTimingInfo);
4640    }
4641 #endif
4642    return ROK;
4643 }
4644
4645 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4646 {
4647    {
4648       /* PHY_STATE_IDLE */
4649 #ifdef INTEL_TIMER_MODE
4650       lwr_mac_procIqSamplesReqEvt,
4651 #endif
4652       lwr_mac_procParamReqEvt,
4653       lwr_mac_procParamRspEvt,
4654       lwr_mac_procConfigReqEvt,
4655       lwr_mac_procConfigRspEvt,
4656       lwr_mac_procInvalidEvt,
4657       lwr_mac_procInvalidEvt,
4658    },
4659    {
4660       /* PHY_STATE_CONFIGURED */
4661 #ifdef INTEL_TIMER_MODE
4662       lwr_mac_procInvalidEvt,
4663 #endif
4664       lwr_mac_procParamReqEvt,
4665       lwr_mac_procParamRspEvt,
4666       lwr_mac_procConfigReqEvt,
4667       lwr_mac_procConfigRspEvt,
4668       lwr_mac_procStartReqEvt,
4669       lwr_mac_procInvalidEvt,
4670    },
4671    {
4672       /* PHY_STATE_RUNNING */
4673 #ifdef INTEL_TIMER_MODE
4674       lwr_mac_procInvalidEvt,
4675 #endif
4676       lwr_mac_procInvalidEvt,
4677       lwr_mac_procInvalidEvt,
4678       lwr_mac_procConfigReqEvt,
4679       lwr_mac_procConfigRspEvt,
4680       lwr_mac_procInvalidEvt,
4681       lwr_mac_procInvalidEvt,
4682    }
4683 };
4684
4685 /*******************************************************************
4686  *
4687  * @brief Sends message to LWR_MAC Fsm Event Handler
4688  *
4689  * @details
4690  *
4691  *    Function : sendToLowerMac
4692  *
4693  *    Functionality:
4694  *         -Sends message to LowerMac
4695  *
4696  * @params[in] Message Type
4697  *             Message Length
4698  *             Messaga Pointer
4699  *
4700  * @return void
4701  *
4702  ******************************************************************/
4703 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4704 {
4705    lwrMacCb.event = msgType;
4706    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4707 }
4708 /**********************************************************************
4709   End of file
4710  **********************************************************************/