src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "fapi.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 /* Global variables */
  51 LwrMacCb lwrMacCb;
  52
  53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  54 void fapiMacConfigRsp(uint16_t cellId);
  55 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem);
  56 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
  57 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
  58 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem);
  59
  60 void lwrMacLayerInit(Region region, Pool pool)
  61 {
  62 #ifdef INTEL_WLS_MEM
  63    uint8_t idx;
  64 #endif
  65
  66    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  67    lwrMacCb.region = region;
  68    lwrMacCb.pool = pool;
  69    lwrMacCb.clCfgDone = TRUE;
  70    lwrMacCb.numCell = 0;
  71    lwrMacCb.phyState = PHY_STATE_IDLE;
  72
  73 #ifdef INTEL_WLS_MEM
  74    /* Initializing WLS free mem list */
  75    lwrMacCb.phySlotIndCntr = 1;
  76    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  77    {
  78       cmLListInit(&wlsBlockToFreeList[idx]);
  79    }
  80 #endif
  81 }
  82
  83 /*******************************************************************
  84  *
  85  * @brief Handles Invalid Request Event
  86  *
  87  * @details
  88  *
  89  *    Function : lwr_mac_procInvalidEvt
  90  *
  91  *    Functionality:
  92  *         - Displays the PHY state when the invalid event occurs
  93  *
  94  * @params[in]
  95  * @return ROK     - success
  96  *         RFAILED - failure
  97  *
  98  * ****************************************************************/
  99 uint8_t lwr_mac_procInvalidEvt(void *msg)
 100 {
 101 #ifdef CALL_FLOW_DEBUG_LOG
 102    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
 103 #endif
 104    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 105    return ROK;
 106 }
 107
 108 #ifdef INTEL_FAPI
 109 /*******************************************************************
 110  *
 111  * @brief Fills FAPI message header
 112  *
 113  * @details
 114  *
 115  *    Function : fillMsgHeader
 116  *
 117  *    Functionality:
 118  *         -Fills FAPI message header
 119  *
 120  * @params[in] Pointer to header
 121  *             Number of messages
 122  *             Messae Type
 123  *             Length of message
 124  * @return void
 125  *
 126  * ****************************************************************/
 127 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 128 {
 129    memset(hdr, 0, sizeof(fapi_msg_t));
 130    hdr->msg_id = msgType;
 131    hdr->length = msgLen;
 132 }
 133
 134 /*******************************************************************
 135  *
 136  * @brief Fills FAPI Config Request message header
 137  *
 138  * @details
 139  *
 140  *    Function : fillTlvs
 141  *
 142  *    Functionality:
 143  *         -Fills FAPI Config Request message header
 144  *
 145  * @params[in] Pointer to TLV
 146  *             Tag
 147  *             Length
 148  *             Value
 149  *             MsgLen
 150  * @return void
 151  *
 152  * ****************************************************************/
 153 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 154       uint32_t value, uint32_t *msgLen)
 155 {
 156    tlv->tl.tag    = tag;
 157    tlv->tl.length = length;
 158    tlv->value     = value;
 159    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 160 }
 161 /*******************************************************************
 162  *
 163  * @brief fills the cyclic prefix by comparing the bitmask
 164  *
 165  * @details
 166  *
 167  *    Function : fillCyclicPrefix
 168  *
 169  *    Functionality:
 170  *         -checks the value with the bitmask and
 171  *          fills the cellPtr's cyclic prefix.
 172  *
 173  * @params[in] Pointer to ClCellParam
 174  *             Value to be compared
 175  * @return void
 176  *
 177  ********************************************************************/
 178 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 179 {
 180    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 181    {
 182       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 183    }
 184    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 185    {
 186       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 187    }
 188    else
 189    {
 190       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 191    }
 192 }
 193
 194 /*******************************************************************
 195  *
 196  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 197  *
 198  * @details
 199  *
 200  *    Function : fillSubcarrierSpaceDl
 201  *
 202  *    Functionality:
 203  *         -checks the value with the bitmask and
 204  *          fills the cellPtr's subcarrier spacing in DL
 205  *
 206  * @params[in] Pointer to ClCellParam
 207  *             Value to be compared
 208  * @return void
 209  *
 210  * ****************************************************************/
 211
 212 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 213 {
 214    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 215    {
 216       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 217    }
 218    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 219    {
 220       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 221    }
 222    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 223    {
 224       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 225    }
 226    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 227    {
 228       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 229    }
 230    else
 231    {
 232       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 233    }
 234 }
 235
 236 /*******************************************************************
 237  *
 238  * @brief fills the downlink bandwidth by comparing the bitmask
 239  *
 240  * @details
 241  *
 242  *    Function : fillBandwidthDl
 243  *
 244  *    Functionality:
 245  *         -checks the value with the bitmask and
 246  *         -fills the cellPtr's DL Bandwidth
 247  *
 248  * @params[in] Pointer to ClCellParam
 249  *             Value to be compared
 250  * @return void
 251  *
 252  * ****************************************************************/
 253
 254 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 255 {
 256    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 257    {
 258       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 259    }
 260    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 261    {
 262       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 263    }
 264    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 265    {
 266       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 267    }
 268    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 269    {
 270       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 271    }
 272    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 273    {
 274       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 275    }
 276    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 277    {
 278       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 279    }
 280    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 281    {
 282       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 283    }
 284    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 285    {
 286       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 287    }
 288    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 289    {
 290       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 291    }
 292    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 293    {
 294       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 295    }
 296    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 297    {
 298       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 299    }
 300    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 301    {
 302       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 303    }
 304    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 305    {
 306       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 307    }
 308    else
 309    {
 310       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 311    }
 312 }
 313
 314 /*******************************************************************
 315  *
 316  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 317  *
 318  * @details
 319  *
 320  *    Function : fillSubcarrierSpaceUl
 321  *
 322  *    Functionality:
 323  *         -checks the value with the bitmask and
 324  *         -fills cellPtr's subcarrier spacing in UL
 325  *
 326  * @params[in] Pointer to ClCellParam
 327  *             Value to be compared
 328  * @return void
 329  *
 330  * ****************************************************************/
 331
 332 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 333 {
 334    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 335    {
 336       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 337    }
 338    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 339    {
 340       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 341    }
 342    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 343    {
 344       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 345    }
 346    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 347    {
 348       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 349    }
 350    else
 351    {
 352       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 353    }
 354 }
 355
 356 /*******************************************************************
 357  *
 358  * @brief fills the uplink bandwidth by comparing the bitmask
 359  *
 360  * @details
 361  *
 362  *    Function : fillBandwidthUl
 363  *
 364  *    Functionality:
 365  *         -checks the value with the bitmask and
 366  *          fills the cellPtr's UL Bandwidth
 367  *
 368  *
 369  *
 370  * @params[in] Pointer to ClCellParam
 371  *             Value to be compared
 372  * @return void
 373  *
 374  *
 375  * ****************************************************************/
 376
 377 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 378 {
 379    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 380    {
 381       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 382    }
 383    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 384    {
 385       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 386    }
 387    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 388    {
 389       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 390    }
 391    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 392    {
 393       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 394    }
 395    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 396    {
 397       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 398    }
 399    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 400    {
 401       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 402    }
 403    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 404    {
 405       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 406    }
 407    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 408    {
 409       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 410    }
 411    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 412    {
 413       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 414    }
 415    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 416    {
 417       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 418    }
 419    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 420    {
 421       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 422    }
 423    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 424    {
 425       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 426    }
 427    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 428    {
 429       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 430    }
 431    else
 432    {
 433       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 434    }
 435 }
 436 /*******************************************************************
 437  *
 438  * @brief fills the CCE maping by comparing the bitmask
 439  *
 440  * @details
 441  *
 442  *    Function : fillCCEmaping
 443  *
 444  *    Functionality:
 445  *         -checks the value with the bitmask and
 446  *          fills the cellPtr's CCE Mapping Type
 447  *
 448  *
 449  * @params[in] Pointer to ClCellParam
 450  *             Value to be compared
 451  * @return void
 452  *
 453  * ****************************************************************/
 454
 455 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 456 {
 457    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 458    {
 459       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 460    }
 461    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 462    {
 463       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 464    }
 465    else
 466    {
 467       (*cellPtr)->cceMappingType = INVALID_VALUE;
 468    }
 469 }
 470
 471 /*******************************************************************
 472  *
 473  * @brief fills the PUCCH format by comparing the bitmask
 474  *
 475  * @details
 476  *
 477  *    Function : fillPucchFormat
 478  *
 479  *    Functionality:
 480  *         -checks the value with the bitmask and
 481  *          fills the cellPtr's pucch format
 482  *
 483  *
 484  * @params[in] Pointer to ClCellParam
 485  *             Value to be compared
 486  * @return void
 487  *
 488  * ****************************************************************/
 489
 490 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 491 {
 492    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 493    {
 494       (*cellPtr)->pucchFormats    = FORMAT_0;
 495    }
 496    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 497    {
 498       (*cellPtr)->pucchFormats    = FORMAT_1;
 499    }
 500    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 501    {
 502       (*cellPtr)->pucchFormats    = FORMAT_2;
 503    }
 504    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 505    {
 506       (*cellPtr)->pucchFormats    = FORMAT_3;
 507    }
 508    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 509    {
 510       (*cellPtr)->pucchFormats    = FORMAT_4;
 511    }
 512    else
 513    {
 514       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 515    }
 516 }
 517
 518 /*******************************************************************
 519  *
 520  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 521  *
 522  * @details
 523  *
 524  *    Function : fillPdschMappingType
 525  *
 526  *    Functionality:
 527  *         -checks the value with the bitmask and
 528  *          fills the cellPtr's PDSCH MappingType
 529  *
 530  * @params[in] Pointer to ClCellParam
 531  *             Value to be compared
 532  * @return void
 533  *
 534  * ****************************************************************/
 535
 536 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 537 {
 538    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 539    {
 540       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 541    }
 542    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 543    {
 544       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 545    }
 546    else
 547    {
 548       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 549    }
 550 }
 551
 552 /*******************************************************************
 553  *
 554  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 555  *
 556  * @details
 557  *
 558  *    Function : fillPdschAllocationType
 559  *
 560  *    Functionality:
 561  *         -checks the value with the bitmask and
 562  *          fills the cellPtr's PDSCH AllocationType
 563  *
 564  * @params[in] Pointer to ClCellParam
 565  *             Value to be compared
 566  * @return void
 567  *
 568  * ****************************************************************/
 569
 570 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 571 {
 572    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 573    {
 574       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 575    }
 576    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 577    {
 578       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 579    }
 580    else
 581    {
 582       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 583    }
 584 }
 585
 586 /*******************************************************************
 587  *
 588  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 589  *
 590  * @details
 591  *
 592  *    Function : fillPrbMappingType
 593  *
 594  *    Functionality:
 595  *         -checks the value with the bitmask and
 596  *          fills the cellPtr's PRB Mapping Type
 597  *
 598  * @params[in] Pointer to ClCellParam
 599  *             Value to be compared
 600  * @return void
 601  *
 602  ******************************************************************/
 603 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 604 {
 605    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 606    {
 607       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 608    }
 609    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 610    {
 611       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 612    }
 613    else
 614    {
 615       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 616    }
 617 }
 618
 619 /*******************************************************************
 620  *
 621  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 622  *
 623  * @details
 624  *
 625  *    Function : fillPdschDmrsConfigType
 626  *
 627  *    Functionality:
 628  *         -checks the value with the bitmask and
 629  *          fills the cellPtr's DmrsConfig Type
 630  *
 631  * @params[in] Pointer to ClCellParam
 632  *             Value to be compared
 633  * @return void
 634  *
 635  ******************************************************************/
 636
 637 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 638 {
 639    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 640    {
 641       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 642    }
 643    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 644    {
 645       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 646    }
 647    else
 648    {
 649       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 650    }
 651 }
 652
 653 /*******************************************************************
 654  *
 655  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 656  *
 657  * @details
 658  *
 659  *    Function : fillPdschDmrsLength
 660  *
 661  *    Functionality:
 662  *         -checks the value with the bitmask and
 663  *          fills the cellPtr's PdschDmrsLength
 664  *
 665  * @params[in] Pointer to ClCellParam
 666  *             Value to be compared
 667  * @return void
 668  *
 669  ******************************************************************/
 670 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 671 {
 672    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 673    {
 674       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 675    }
 676    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 677    {
 678       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 679    }
 680    else
 681    {
 682       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 683    }
 684 }
 685
 686 /*******************************************************************
 687  *
 688  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 689  *
 690  * @details
 691  *
 692  *    Function : fillPdschDmrsAddPos
 693  *
 694  *    Functionality:
 695  *         -checks the value with the bitmask and
 696  *          fills the cellPtr's Pdsch DmrsAddPos
 697  *
 698  * @params[in] Pointer to ClCellParam
 699  *             Value to be compared
 700  * @return void
 701  *
 702  ******************************************************************/
 703
 704 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 705 {
 706    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 707    {
 708       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 709    }
 710    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 711    {
 712       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 713    }
 714    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 715    {
 716       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 717    }
 718    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 719    {
 720       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 721    }
 722    else
 723    {
 724       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 725    }
 726 }
 727
 728 /*******************************************************************
 729  *
 730  * @brief fills the Modulation Order in DL by comparing the bitmask
 731  *
 732  * @details
 733  *
 734  *    Function : fillModulationOrderDl
 735  *
 736  *    Functionality:
 737  *         -checks the value with the bitmask and
 738  *          fills the cellPtr's ModulationOrder in DL.
 739  *
 740  * @params[in] Pointer to ClCellParam
 741  *             Value to be compared
 742  * @return void
 743  *
 744  ******************************************************************/
 745 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 746 {
 747    if(value == 0 )
 748    {
 749       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 750    }
 751    else if(value == 1)
 752    {
 753       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 754    }
 755    else if(value == 2)
 756    {
 757       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 758    }
 759    else if(value == 3)
 760    {
 761       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 762    }
 763    else
 764    {
 765       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 766    }
 767 }
 768
 769 /*******************************************************************
 770  *
 771  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 772  *
 773  * @details
 774  *
 775  *    Function : fillPuschDmrsConfigType
 776  *
 777  *    Functionality:
 778  *         -checks the value with the bitmask and
 779  *          fills the cellPtr's PUSCH DmrsConfigType
 780  *
 781  * @params[in] Pointer to ClCellParam
 782  *             Value to be compared
 783  * @return void
 784  *
 785  ******************************************************************/
 786
 787 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 788 {
 789    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 790    {
 791       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 792    }
 793    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 794    {
 795       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 796    }
 797    else
 798    {
 799       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 800    }
 801 }
 802
 803 /*******************************************************************
 804  *
 805  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 806  *
 807  * @details
 808  *
 809  *    Function : fillPuschDmrsLength
 810  *
 811  *    Functionality:
 812  *         -checks the value with the bitmask and
 813  *          fills the cellPtr's PUSCH DmrsLength
 814  *
 815  * @params[in] Pointer to ClCellParam
 816  *             Value to be compared
 817  * @return void
 818  *
 819  ******************************************************************/
 820
 821 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 822 {
 823    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 824    {
 825       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 826    }
 827    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 828    {
 829       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 830    }
 831    else
 832    {
 833       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 834    }
 835 }
 836
 837 /*******************************************************************
 838  *
 839  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 840  *
 841  * @details
 842  *
 843  *    Function : fillPuschDmrsAddPos
 844  *
 845  *    Functionality:
 846  *         -checks the value with the bitmask and
 847  *          fills the cellPtr's PUSCH DmrsAddPos
 848  *
 849  * @params[in] Pointer to ClCellParam
 850  *             Value to be compared
 851  * @return void
 852  *
 853  ******************************************************************/
 854
 855 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 856 {
 857    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 858    {
 859       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 860    }
 861    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 862    {
 863       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 864    }
 865    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 866    {
 867       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 868    }
 869    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 870    {
 871       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 872    }
 873    else
 874    {
 875       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 876    }
 877 }
 878
 879 /*******************************************************************
 880  *
 881  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 882  *
 883  * @details
 884  *
 885  *    Function : fillPuschMappingType
 886  *
 887  *    Functionality:
 888  *         -checks the value with the bitmask and
 889  *          fills the cellPtr's PUSCH MappingType
 890  *
 891  * @params[in] Pointer to ClCellParam
 892  *             Value to be compared
 893  * @return void
 894  *
 895  ******************************************************************/
 896
 897 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 898 {
 899    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 900    {
 901       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 902    }
 903    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 904    {
 905       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 906    }
 907    else
 908    {
 909       (*cellPtr)->puschMappingType = INVALID_VALUE;
 910    }
 911 }
 912
 913 /*******************************************************************
 914  *
 915  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 916  *
 917  * @details
 918  *
 919  *    Function : fillPuschAllocationType
 920  *
 921  *    Functionality:
 922  *         -checks the value with the bitmask and
 923  *          fills the cellPtr's PUSCH AllocationType
 924  *
 925  * @params[in] Pointer to ClCellParam
 926  *             Value to be compared
 927  * @return void
 928  *
 929  ******************************************************************/
 930
 931 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 932 {
 933    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 934    {
 935       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 936    }
 937    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 938    {
 939       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 940    }
 941    else
 942    {
 943       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 944    }
 945 }
 946
 947 /*******************************************************************
 948  *
 949  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 950  *
 951  * @details
 952  *
 953  *    Function : fillPuschPrbMappingType
 954  *
 955  *    Functionality:
 956  *         -checks the value with the bitmask and
 957  *          fills the cellPtr's PUSCH PRB MApping Type
 958  *
 959  * @params[in] Pointer to ClCellParam
 960  *             Value to be compared
 961  * @return void
 962  *
 963  ******************************************************************/
 964
 965 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 966 {
 967    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 968    {
 969       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 970    }
 971    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 972    {
 973       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 974    }
 975    else
 976    {
 977       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 978    }
 979 }
 980
 981 /*******************************************************************
 982  *
 983  * @brief fills the Modulation Order in Ul by comparing the bitmask
 984  *
 985  * @details
 986  *
 987  *    Function : fillModulationOrderUl
 988  *
 989  *    Functionality:
 990  *         -checks the value with the bitmask and
 991  *          fills the cellPtr's Modualtsion Order in UL.
 992  *
 993  * @params[in] Pointer to ClCellParam
 994  *             Value to be compared
 995  * @return void
 996  *
 997  ******************************************************************/
 998
 999 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1000 {
1001    if(value == 0)
1002    {
1003       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1004    }
1005    else if(value == 1)
1006    {
1007       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1008    }
1009    else if(value == 2)
1010    {
1011       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1012    }
1013    else if(value == 3)
1014    {
1015       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1016    }
1017    else
1018    {
1019       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1020    }
1021 }
1022
1023 /*******************************************************************
1024  *
1025  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1026  *
1027  * @details
1028  *
1029  *    Function : fillPuschAggregationFactor
1030  *
1031  *    Functionality:
1032  *         -checks the value with the bitmask and
1033  *          fills the cellPtr's PUSCH Aggregation Factor
1034  *
1035  * @params[in] Pointer to ClCellParam
1036  *             Value to be compared
1037  * @return void
1038  *
1039  ******************************************************************/
1040
1041 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1042 {
1043    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1044    {
1045       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1046    }
1047    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1048    {
1049       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1050    }
1051    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1052    {
1053       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1054    }
1055    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1056    {
1057       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1058    }
1059    else
1060    {
1061       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1062    }
1063 }
1064
1065 /*******************************************************************
1066  *
1067  * @brief fills the PRACH Long Format by comparing the bitmask
1068  *
1069  * @details
1070  *
1071  *    Function : fillPrachLongFormat
1072  *
1073  *    Functionality:
1074  *         -checks the value with the bitmask and
1075  *          fills the cellPtr's PRACH Long Format
1076  *
1077  * @params[in] Pointer to ClCellParam
1078  *             Value to be compared
1079  * @return void
1080  *
1081  ******************************************************************/
1082
1083 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1084 {
1085    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1086    {
1087       (*cellPtr)->prachLongFormats    = FORMAT_0;
1088    }
1089    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1090    {
1091       (*cellPtr)->prachLongFormats    = FORMAT_1;
1092    }
1093    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1094    {
1095       (*cellPtr)->prachLongFormats    = FORMAT_2;
1096    }
1097    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1098    {
1099       (*cellPtr)->prachLongFormats    = FORMAT_3;
1100    }
1101    else
1102    {
1103       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1104    }
1105 }
1106
1107 /*******************************************************************
1108  *
1109  * @brief fills the PRACH Short Format by comparing the bitmask
1110  *
1111  * @details
1112  *
1113  *    Function : fillPrachShortFormat
1114  *
1115  *    Functionality:
1116  *         -checks the value with the bitmask and
1117  *          fills the cellPtr's PRACH ShortFormat
1118  *
1119  * @params[in] Pointer to ClCellParam
1120  *             Value to be compared
1121  * @return void
1122  *
1123  ******************************************************************/
1124
1125 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1126 {
1127    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1128    {
1129       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1130    }
1131    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1132    {
1133       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1134    }
1135    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1136    {
1137       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1138    }
1139    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1140    {
1141       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1142    }
1143    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1144    {
1145       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1146    }
1147    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1148    {
1149       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1150    }
1151    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1152    {
1153       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1154    }
1155    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1156    {
1157       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1158    }
1159    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1160    {
1161       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1162    }
1163    else
1164    {
1165       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1166    }
1167 }
1168
1169 /*******************************************************************
1170  *
1171  * @brief fills the Fd Occasions Type by comparing the bitmask
1172  *
1173  * @details
1174  *
1175  *    Function : fillFdOccasions
1176  *
1177  *    Functionality:
1178  *         -checks the value with the bitmask and
1179  *          fills the cellPtr's Fd Occasions
1180  *
1181  * @params[in] Pointer to ClCellParam
1182  *             Value to be compared
1183  * @return void
1184  *
1185  ******************************************************************/
1186
1187 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1188 {
1189    if(value == 0)
1190    {
1191       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1192    }
1193    else if(value == 1)
1194    {
1195       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1196    }
1197    else if(value == 3)
1198    {
1199       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1200    }
1201    else if(value == 4)
1202    {
1203       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1204    }
1205    else
1206    {
1207       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1208    }
1209 }
1210
1211 /*******************************************************************
1212  *
1213  * @brief fills the RSSI Measurement by comparing the bitmask
1214  *
1215  * @details
1216  *
1217  *    Function : fillRssiMeas
1218  *
1219  *    Functionality:
1220  *         -checks the value with the bitmask and
1221  *          fills the cellPtr's RSSI Measurement report
1222  *
1223  * @params[in] Pointer to ClCellParam
1224  *             Value to be compared
1225  * @return void
1226  *
1227  ******************************************************************/
1228
1229 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1230 {
1231    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1232    {
1233       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1234    }
1235    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1236    {
1237       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1238    }
1239    else
1240    {
1241       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1242    }
1243 }
1244
1245 /*******************************************************************
1246  *
1247  * @brief Returns the TLVs value
1248  *
1249  * @details
1250  *
1251  *    Function : getParamValue
1252  *
1253  *    Functionality:
1254  *         -return TLVs value
1255  *
1256  * @params[in]
1257  * @return ROK     - temp
1258  *         RFAILED - failure
1259  *
1260  * ****************************************************************/
1261
1262 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1263 {
1264    void *posPtr;
1265    posPtr   = &tlv->tl.tag;
1266    posPtr   += sizeof(tlv->tl.tag);
1267    posPtr   += sizeof(tlv->tl.length);
1268    /*TO DO: malloc to SSI memory */
1269    if(type == FAPI_UINT_8)
1270    {
1271       return(*(uint8_t *)posPtr);
1272    }
1273    else if(type == FAPI_UINT_16)
1274    {
1275       return(*(uint16_t *)posPtr);
1276    }
1277    else if(type == FAPI_UINT_32)
1278    {
1279       return(*(uint32_t *)posPtr);
1280    }
1281    else
1282    {
1283       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1284       return RFAILED;
1285    }
1286 }
1287 #endif /* FAPI */
1288
1289 /*******************************************************************
1290  *
1291  * @brief Modifes the received mibPdu to uint32 bit
1292  *        and stores it in MacCellCfg
1293  *
1294  * @details
1295  *
1296  *    Function : setMibPdu
1297  *
1298  *    Functionality:
1299  *         -Sets the MibPdu
1300  *
1301  * @params[in] Pointer to mibPdu
1302  *             pointer to modified value
1303  ******************************************************************/
1304 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1305 {
1306    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1307    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1308    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1309 }
1310
1311 /*******************************************************************
1312  *
1313  * @brief Sends FAPI Param req to PHY
1314  *
1315  * @details
1316  *
1317  *    Function : lwr_mac_procParamReqEvt
1318  *
1319  *    Functionality:
1320  *         -Sends FAPI Param req to PHY
1321  *
1322  * @params[in]
1323  * @return ROK     - success
1324  *         RFAILED - failure
1325  *
1326  * ****************************************************************/
1327
1328 uint8_t lwr_mac_procParamReqEvt(void *msg)
1329 {
1330 #ifdef INTEL_FAPI
1331 #ifdef CALL_FLOW_DEBUG_LOG
1332    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1333 #endif
1334
1335    /* startGuardTimer(); */
1336    fapi_param_req_t         *paramReq = NULL;
1337    fapi_msg_header_t        *msgHeader;
1338    p_fapi_api_queue_elem_t  paramReqElem;
1339    p_fapi_api_queue_elem_t  headerElem;
1340
1341    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1342    if(paramReq != NULL)
1343    {
1344       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1345          sizeof(fapi_tx_data_req_t));
1346       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1347       memset(paramReq, 0, sizeof(fapi_param_req_t));
1348       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1349
1350       /* Fill message header */
1351       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1352       if(!headerElem)
1353       {
1354          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1355          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1356          return RFAILED;
1357       }
1358       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1359          sizeof(fapi_msg_header_t));
1360       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1361       msgHeader->num_msg = 1;
1362       msgHeader->handle = 0;
1363
1364       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1365       LwrMacSendToL1(headerElem);
1366    }
1367    else
1368    {
1369       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1370       return RFAILED;
1371    }
1372 #endif
1373    return ROK;
1374 }
1375
1376 /*******************************************************************
1377  *
1378  * @brief Sends FAPI Param Response to MAC via PHY
1379  *
1380  * @details
1381  *
1382  *    Function : lwr_mac_procParamRspEvt
1383  *
1384  *    Functionality:
1385  *         -Sends FAPI Param rsp to MAC via PHY
1386  *
1387  * @params[in]
1388  * @return ROK     - success
1389  *         RFAILED - failure
1390  *
1391  * ****************************************************************/
1392
1393 uint8_t lwr_mac_procParamRspEvt(void *msg)
1394 {
1395 #ifdef INTEL_FAPI
1396    /* stopGuardTimer(); */
1397    uint8_t index;
1398    uint32_t encodedVal;
1399    fapi_param_resp_t *paramRsp;
1400    ClCellParam *cellParam = NULLP;
1401
1402    paramRsp = (fapi_param_resp_t *)msg;
1403    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1404
1405    if(paramRsp != NULLP)
1406    {
1407       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1408       if(cellParam != NULLP)
1409       {
1410          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1411          if(paramRsp->error_code == MSG_OK)
1412          {
1413             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1414             {
1415                switch(paramRsp->tlvs[index].tl.tag)
1416                {
1417                   case FAPI_RELEASE_CAPABILITY_TAG:
1418                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1419                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1420                      {
1421                         cellParam->releaseCapability = RELEASE_15;
1422                      }
1423                      break;
1424
1425                   case FAPI_PHY_STATE_TAG:
1426                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1427                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1428                      {
1429                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1430                         return RFAILED;
1431                      }
1432                      break;
1433
1434                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1435                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1436                      if(encodedVal != RFAILED && encodedVal != 0)
1437                      {
1438                         cellParam->skipBlankDlConfig = SUPPORTED;
1439                      }
1440                      else
1441                      {
1442                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1443                      }
1444                      break;
1445
1446                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1447                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1448                      if(encodedVal != RFAILED && encodedVal != 0)
1449                      {
1450                         cellParam->skipBlankUlConfig = SUPPORTED;
1451                      }
1452                      else
1453                      {
1454                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1455                      }
1456                      break;
1457
1458                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1459                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1460                      break;
1461
1462                   case FAPI_CYCLIC_PREFIX_TAG:
1463                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1464                      if(encodedVal != RFAILED)
1465                      {
1466                         fillCyclicPrefix(encodedVal, &cellParam);
1467                      }
1468                      break;
1469
1470                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1471                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1472                      if(encodedVal != RFAILED)
1473                      {
1474                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1475                      }
1476                      break;
1477
1478                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1479                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1480                      if(encodedVal != RFAILED)
1481                      {
1482                         fillBandwidthDl(encodedVal, &cellParam);
1483                      }
1484                      break;
1485
1486                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1487                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1488                      if(encodedVal != RFAILED)
1489                      {
1490                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1491                      }
1492                      break;
1493
1494                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1495                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1496                      if(encodedVal != RFAILED)
1497                      {
1498                         fillBandwidthUl(encodedVal, &cellParam);
1499                      }
1500                      break;
1501
1502                   case FAPI_CCE_MAPPING_TYPE_TAG:
1503                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1504                      if(encodedVal != RFAILED)
1505                      {
1506                         fillCCEmaping(encodedVal, &cellParam);
1507                      }
1508                      break;
1509
1510                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1511                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1512                      if(encodedVal != RFAILED && encodedVal != 0)
1513                      {
1514                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1515                      }
1516                      else
1517                      {
1518                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1519                      }
1520                      break;
1521
1522                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1523                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1524                      if(encodedVal != RFAILED && encodedVal != 0)
1525                      {
1526                         cellParam->precoderGranularityCoreset = SUPPORTED;
1527                      }
1528                      else
1529                      {
1530                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1531                      }
1532                      break;
1533
1534                   case FAPI_PDCCH_MU_MIMO_TAG:
1535                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1536                      if(encodedVal != RFAILED && encodedVal != 0)
1537                      {
1538                         cellParam->pdcchMuMimo = SUPPORTED;
1539                      }
1540                      else
1541                      {
1542                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1543                      }
1544                      break;
1545
1546                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1547                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1548                      if(encodedVal != RFAILED && encodedVal != 0)
1549                      {
1550                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1551                      }
1552                      else
1553                      {
1554                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1555                      }
1556                      break;
1557
1558                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1559                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1560                      break;
1561
1562                   case FAPI_PUCCH_FORMATS_TAG:
1563                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1564                      if(encodedVal != RFAILED)
1565                      {
1566                         fillPucchFormat(encodedVal, &cellParam);
1567                      }
1568                      break;
1569
1570                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1571                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1572                      break;
1573
1574                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1575                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1576                      if(encodedVal != RFAILED)
1577                      {
1578                         fillPdschMappingType(encodedVal, &cellParam);
1579                      }
1580                      break;
1581
1582                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1583                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1584                      if(encodedVal != RFAILED)
1585                      {
1586                         fillPdschAllocationType(encodedVal, &cellParam);
1587                      }
1588                      break;
1589
1590                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1591                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1592                      if(encodedVal != RFAILED)
1593                      {
1594                         fillPrbMappingType(encodedVal, &cellParam);
1595                      }
1596                      break;
1597
1598                   case FAPI_PDSCH_CBG_TAG:
1599                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1600                      if(encodedVal != RFAILED && encodedVal != 0)
1601                      {
1602                         cellParam->pdschCbg = SUPPORTED;
1603                      }
1604                      else
1605                      {
1606                         cellParam->pdschCbg = NOT_SUPPORTED;
1607                      }
1608                      break;
1609
1610                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1611                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1612                      if(encodedVal != RFAILED)
1613                      {
1614                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1615                      }
1616                      break;
1617
1618                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1619                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1620                      if(encodedVal != RFAILED)
1621                      {
1622                         fillPdschDmrsLength(encodedVal, &cellParam);
1623                      }
1624                      break;
1625
1626                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1627                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1628                      if(encodedVal != RFAILED)
1629                      {
1630                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1631                      }
1632                      break;
1633
1634                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1635                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1636                      break;
1637
1638                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1639                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1640                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1641                      {
1642                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1643                      }
1644                      break;
1645
1646                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1647                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1648                      if(encodedVal != RFAILED)
1649                      {
1650                         fillModulationOrderDl(encodedVal, &cellParam);
1651                      }
1652                      break;
1653
1654                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1655                      cellParam->maxMuMimoUsersDl         = \
1656                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1657                      break;
1658
1659                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1660                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1661                      if(encodedVal != RFAILED && encodedVal != 0)
1662                      {
1663                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1664                      }
1665                      else
1666                      {
1667                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1668                      }
1669                      break;
1670
1671                   case FAPI_PREMPTIONSUPPORT_TAG:
1672                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1673                      if(encodedVal != RFAILED && encodedVal != 0)
1674                      {
1675                         cellParam->premptionSupport = SUPPORTED;
1676                      }
1677                      else
1678                      {
1679                         cellParam->premptionSupport = NOT_SUPPORTED;
1680                      }
1681                      break;
1682
1683                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1684                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1685                      if(encodedVal != RFAILED && encodedVal != 0)
1686                      {
1687                         cellParam->pdschNonSlotSupport = SUPPORTED;
1688                      }
1689                      else
1690                      {
1691                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1692                      }
1693                      break;
1694
1695                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1696                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1697                      if(encodedVal != RFAILED && encodedVal != 0)
1698                      {
1699                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1700                      }
1701                      else
1702                      {
1703                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1704                      }
1705                      break;
1706
1707                   case FAPI_UCI_ONLY_PUSCH_TAG:
1708                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1709                      if(encodedVal != RFAILED && encodedVal != 0)
1710                      {
1711                         cellParam->uciOnlyPusch = SUPPORTED;
1712                      }
1713                      else
1714                      {
1715                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1716                      }
1717                      break;
1718
1719                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1720                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1721                      if(encodedVal != RFAILED && encodedVal != 0)
1722                      {
1723                         cellParam->puschFrequencyHopping = SUPPORTED;
1724                      }
1725                      else
1726                      {
1727                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1728                      }
1729                      break;
1730
1731                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1732                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1733                      if(encodedVal != RFAILED)
1734                      {
1735                         fillPuschDmrsConfig(encodedVal, &cellParam);
1736                      }
1737                      break;
1738
1739                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1740                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1741                      if(encodedVal != RFAILED)
1742                      {
1743                         fillPuschDmrsLength(encodedVal, &cellParam);
1744                      }
1745                      break;
1746
1747                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1748                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1749                      if(encodedVal != RFAILED)
1750                      {
1751                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1752                      }
1753                      break;
1754
1755                   case FAPI_PUSCH_CBG_TAG:
1756                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1757                      if(encodedVal != RFAILED && encodedVal != 0)
1758                      {
1759                         cellParam->puschCbg = SUPPORTED;
1760                      }
1761                      else
1762                      {
1763                         cellParam->puschCbg = NOT_SUPPORTED;
1764                      }
1765                      break;
1766
1767                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1768                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1769                      if(encodedVal != RFAILED)
1770                      {
1771                         fillPuschMappingType(encodedVal, &cellParam);
1772                      }
1773                      break;
1774
1775                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1776                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1777                      if(encodedVal != RFAILED)
1778                      {
1779                         fillPuschAllocationType(encodedVal, &cellParam);
1780                      }
1781                      break;
1782
1783                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1784                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1785                      if(encodedVal != RFAILED)
1786                      {
1787                         fillPuschPrbMappingType(encodedVal, &cellParam);
1788                      }
1789                      break;
1790
1791                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1792                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1793                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1794                      {
1795                         cellParam->puschMaxPtrsPorts = encodedVal;
1796                      }
1797                      break;
1798
1799                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1800                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1801                      break;
1802
1803                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1804                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1805                      break;
1806
1807                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1808                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1809                      if(encodedVal != RFAILED)
1810                      {
1811                         fillModulationOrderUl(encodedVal, &cellParam);
1812                      }
1813                      break;
1814
1815                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1816                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1817                      break;
1818
1819                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1820                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1821                      if(encodedVal != RFAILED && encodedVal != 0)
1822                      {
1823                         cellParam->dftsOfdmSupport = SUPPORTED;
1824                      }
1825                      else
1826                      {
1827                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1828                      }
1829                      break;
1830
1831                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1832                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1833                      if(encodedVal != RFAILED)
1834                      {
1835                         fillPuschAggregationFactor(encodedVal, &cellParam);
1836                      }
1837                      break;
1838
1839                   case FAPI_PRACH_LONG_FORMATS_TAG:
1840                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1841                      if(encodedVal != RFAILED)
1842                      {
1843                         fillPrachLongFormat(encodedVal, &cellParam);
1844                      }
1845                      break;
1846
1847                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1848                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1849                      if(encodedVal != RFAILED)
1850                      {
1851                         fillPrachShortFormat(encodedVal, &cellParam);
1852                      }
1853                      break;
1854
1855                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1856                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1857                      if(encodedVal != RFAILED && encodedVal != 0)
1858                      {
1859                         cellParam->prachRestrictedSets = SUPPORTED;
1860                      }
1861                      else
1862                      {
1863                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1864                      }
1865                      break;
1866
1867                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1868                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1869                      if(encodedVal != RFAILED)
1870                      {
1871                         fillFdOccasions(encodedVal, &cellParam);
1872                      }
1873                      break;
1874
1875                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1876                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1877                      if(encodedVal != RFAILED)
1878                      {
1879                         fillRssiMeas(encodedVal, &cellParam);
1880                      }
1881                      break;
1882                   default:
1883                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1884                      break;
1885                }
1886             }
1887             MAC_FREE(cellParam, sizeof(ClCellParam));
1888             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1889             return ROK;
1890          }
1891          else
1892          {
1893             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1894             return RFAILED;
1895          }
1896       }
1897       else
1898       {
1899          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1900          return RFAILED;
1901       }
1902    }
1903    else
1904    {
1905       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1906       return RFAILED;
1907    }
1908 #else
1909    return ROK;
1910 #endif
1911 }
1912
1913 #ifdef INTEL_TIMER_MODE
1914 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1915 {
1916    void * wlsHdlr = NULLP;
1917    fapi_msg_header_t *msgHeader;
1918    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1919    p_fapi_api_queue_elem_t  headerElem;
1920    p_fapi_api_queue_elem_t  iqSampleElem;
1921    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1922
1923    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1924
1925    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1926
1927    /* Fill IQ sample req */
1928    mtGetWlsHdl(&wlsHdlr);
1929    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1930       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1931    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932    if(!iqSampleElem)
1933    {
1934       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1935       return RFAILED;
1936    }
1937    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1938       sizeof(fapi_vendor_ext_iq_samples_req_t));
1939
1940    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1941    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1942    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1943       sizeof(fapi_vendor_ext_iq_samples_req_t));
1944
1945    iqSampleReq->iq_samples_info.carrNum = 0;
1946    iqSampleReq->iq_samples_info.numSubframes = 40;
1947    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1948    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1949    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1950    iqSampleReq->iq_samples_info.startFrameNum = 0;
1951    iqSampleReq->iq_samples_info.startSlotNum = 0;
1952    iqSampleReq->iq_samples_info.startSymNum = 0;
1953    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1954    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1955
1956    /* TODO : Fill remaining parameters */
1957
1958    /* Fill message header */
1959    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1960    if(!headerElem)
1961    {
1962       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1963       return RFAILED;
1964    }
1965    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1966      sizeof(fapi_msg_header_t));
1967    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1968    msgHeader->num_msg = 1;
1969    msgHeader->handle = 0;
1970
1971    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1972    LwrMacSendToL1(headerElem);
1973    return ROK;
1974 }
1975 #endif
1976
1977 /*******************************************************************
1978  *
1979  * @brief Sends FAPI Config req to PHY
1980  *
1981  * @details
1982  *
1983  *    Function : lwr_mac_procConfigReqEvt
1984  *
1985  *    Functionality:
1986  *         -Sends FAPI Config Req to PHY
1987  *
1988  * @params[in]
1989  * @return ROK     - success
1990  *         RFAILED - failure
1991  *
1992  * ****************************************************************/
1993
1994 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1995 {
1996 #ifdef INTEL_FAPI
1997 #ifdef CALL_FLOW_DEBUG_LOG
1998    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
1999 #endif
2000 #ifdef NR_TDD
2001    uint8_t slotIdx = 0;
2002    uint8_t symbolIdx =0;
2003 #endif
2004    uint8_t index = 0;
2005    uint16_t *cellId =NULLP;
2006    uint16_t cellIdx =0;
2007    uint32_t msgLen = 0;
2008    uint32_t mib = 0;
2009    MacCellCfg macCfgParams;
2010    fapi_vendor_msg_t *vendorMsg;
2011    fapi_config_req_t *configReq;
2012    fapi_msg_header_t *msgHeader;
2013    p_fapi_api_queue_elem_t  headerElem;
2014    p_fapi_api_queue_elem_t  vendorMsgQElem;
2015    p_fapi_api_queue_elem_t  cfgReqQElem;
2016
2017    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2018          lwrMacCb.phyState);
2019
2020    cellId = (uint16_t *)msg;
2021    GET_CELL_IDX(*cellId, cellIdx);
2022    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2023
2024    /* Fill Cell Configuration in lwrMacCb */
2025    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2026    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2027    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2028    lwrMacCb.numCell++;
2029
2030    /* Allocte And fill Vendor msg */
2031    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2032    if(!vendorMsgQElem)
2033    {
2034       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2035       return RFAILED;
2036    }
2037    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2038    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2039    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2040    vendorMsg->config_req_vendor.hopping_id = 0;
2041    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2042    vendorMsg->config_req_vendor.group_hop_flag = 0;
2043    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2044    vendorMsg->start_req_vendor.sfn = 0;
2045    vendorMsg->start_req_vendor.slot = 0;
2046    vendorMsg->start_req_vendor.mode = 4;
2047 #ifdef DEBUG_MODE
2048    vendorMsg->start_req_vendor.count = 0;
2049    vendorMsg->start_req_vendor.period = 1;
2050 #endif
2051    /* Fill FAPI config req */
2052    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2053    if(!cfgReqQElem)
2054    {
2055       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2056       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2057       return RFAILED;
2058    }
2059    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2060       sizeof(fapi_config_req_t));
2061
2062    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2063    memset(configReq, 0, sizeof(fapi_config_req_t));
2064    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2065    configReq->number_of_tlvs = 25;
2066    msgLen = sizeof(configReq->number_of_tlvs);
2067
2068    if(macCfgParams.dlCarrCfg.pres)
2069    {
2070       fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2071          sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2072       fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2073          sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2074       /* Due to bug in Intel FT code, commenting TLVs that are are not
2075        * needed to avoid error. Must be uncommented when FT bug is fixed */
2076       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2077          sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2078       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2079          sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2080       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2081          sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2082    }
2083    if(macCfgParams.ulCarrCfg.pres)
2084    {
2085       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2086             sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2087       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2088             sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2089       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2090       sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2091       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2092       sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2093       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2094             sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2095    }
2096    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2097    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2098
2099    /* fill cell config */
2100    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2101          sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2102    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2103          sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2104
2105    /* fill SSB configuration */
2106    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2107          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2108    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2109    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2110    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2111          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2112
2113    /* fill PRACH configuration */
2114    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2115    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2116    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2117          sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2118    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2119          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2120    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2121          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2122    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2123          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2124    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2125          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2126    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2127    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2128    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2129          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2130    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2131          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2132    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2133    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2134    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2135       {
2136       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2137       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2138       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2139       &msgLen);
2140       }
2141       else
2142       {
2143       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2144       }*/
2145
2146    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2147          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2148    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2149    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2150
2151    /* fill SSB table */
2152    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2153          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2154    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2155    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2156    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2157          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2158    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2159          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2160
2161    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2162    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2163          sizeof(uint32_t), mib, &msgLen);
2164
2165    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2166          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2167    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2168          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2169    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2170    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2171    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2172    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2173
2174 #ifdef NR_TDD
2175    /* fill TDD table */
2176    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2177    sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2178    for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2179    {
2180       for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2181       {
2182          fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2183                sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2184       }
2185    }
2186 #endif
2187
2188    /* fill measurement config */
2189    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2190    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2191
2192    /* fill DMRS Type A Pos */
2193    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2194          sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2195
2196    /* Fill message header */
2197    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2198    if(!headerElem)
2199    {
2200       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2201       LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2202       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2203       return RFAILED;
2204    }
2205    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2206          sizeof(fapi_msg_header_t));
2207    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2208    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2209    msgHeader->handle = 0;
2210
2211    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2212    LwrMacSendToL1(headerElem);
2213 #endif
2214
2215    return ROK;
2216 } /* lwr_mac_handleConfigReqEvt */
2217
2218 /*******************************************************************
2219  *
2220  * @brief Processes config response from phy
2221  *
2222  * @details
2223  *
2224  *    Function : lwr_mac_procConfigRspEvt
2225  *
2226  *    Functionality:
2227  *          Processes config response from phy
2228  *
2229  * @params[in] FAPI message pointer
2230  * @return ROK     - success
2231  *         RFAILED - failure
2232  *
2233  * ****************************************************************/
2234
2235 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2236 {
2237 #ifdef INTEL_FAPI
2238    fapi_config_resp_t *configRsp;
2239    configRsp = (fapi_config_resp_t *)msg;
2240
2241    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2242          lwrMacCb.phyState);
2243
2244    if(configRsp != NULL)
2245    {
2246       if(configRsp->error_code == MSG_OK)
2247       {
2248          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2249          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2250          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2251          /* TODO :
2252           * Store config response into an intermediate struture and send to MAC
2253           * Support LC and LWLC for sending config rsp to MAC
2254           */
2255          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2256       }
2257       else
2258       {
2259          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2260          return RFAILED;
2261       }
2262    }
2263    else
2264    {
2265       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2266       return RFAILED;
2267    }
2268 #endif
2269
2270    return ROK;
2271 } /* lwr_mac_procConfigRspEvt */
2272
2273 /*******************************************************************
2274  *
2275  * @brief Build and send start request to phy
2276  *
2277  * @details
2278  *
2279  *    Function : lwr_mac_procStartReqEvt
2280  *
2281  *    Functionality:
2282  *       Build and send start request to phy
2283  *
2284  * @params[in] FAPI message pointer
2285  * @return ROK     - success
2286  *         RFAILED - failure
2287  *
2288  * ****************************************************************/
2289 uint8_t lwr_mac_procStartReqEvt(void *msg)
2290 {
2291 #ifdef INTEL_FAPI
2292 #ifdef CALL_FLOW_DEBUG_LOG
2293    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2294 #endif
2295    fapi_msg_header_t *msgHeader;
2296    fapi_start_req_t *startReq;
2297    fapi_vendor_msg_t *vendorMsg;
2298    p_fapi_api_queue_elem_t  headerElem;
2299    p_fapi_api_queue_elem_t  startReqElem;
2300    p_fapi_api_queue_elem_t  vendorMsgElem;
2301
2302    /* Allocte And fill Vendor msg */
2303    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2304    if(!vendorMsgElem)
2305    {
2306       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2307       return RFAILED;
2308    }
2309    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2310    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2311    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2312    vendorMsg->start_req_vendor.sfn = 0;
2313    vendorMsg->start_req_vendor.slot = 0;
2314    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2315 #ifdef DEBUG_MODE
2316    vendorMsg->start_req_vendor.count = 0;
2317    vendorMsg->start_req_vendor.period = 1;
2318 #endif
2319
2320    /* Fill FAPI config req */
2321    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2322    if(!startReqElem)
2323    {
2324       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2325       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2326       return RFAILED;
2327    }
2328    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2329       sizeof(fapi_start_req_t));
2330
2331    startReq = (fapi_start_req_t *)(startReqElem + 1);
2332    memset(startReq, 0, sizeof(fapi_start_req_t));
2333    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2334
2335    /* Fill message header */
2336    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2337    if(!headerElem)
2338    {
2339       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2340       LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2341       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2342       return RFAILED;
2343    }
2344    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2345       sizeof(fapi_msg_header_t));
2346    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2347    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2348    msgHeader->handle = 0;
2349
2350    /* Send to PHY */
2351    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2352    LwrMacSendToL1(headerElem);
2353 #endif
2354    return ROK;
2355 } /* lwr_mac_procStartReqEvt */
2356
2357 /*******************************************************************
2358  *
2359  * @brief Sends FAPI Stop Req to PHY
2360  *
2361  * @details
2362  *
2363  *    Function : lwr_mac_procStopReqEvt
2364  *
2365  *    Functionality:
2366  *         -Sends FAPI Stop Req to PHY
2367  *
2368  * @params[in]
2369  * @return ROK     - success
2370  *         RFAILED - failure
2371  *
2372  ********************************************************************/
2373
2374 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem)
2375 {
2376 #ifdef INTEL_FAPI
2377 #ifdef CALL_FLOW_DEBUG_LOG
2378    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2379 #endif
2380
2381    fapi_stop_req_t   *stopReq;
2382    fapi_vendor_msg_t *vendorMsg;
2383    p_fapi_api_queue_elem_t  stopReqElem;
2384    p_fapi_api_queue_elem_t  vendorMsgElem;
2385
2386    /* Allocte And fill Vendor msg */
2387    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2388    if(!vendorMsgElem)
2389    {
2390       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in stop req");
2391       return RFAILED;
2392    }
2393    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2394    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2395    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2396    vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
2397    vendorMsg->stop_req_vendor.slot = slotInfo.slot;
2398
2399    /* Fill FAPI stop req */
2400    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2401    if(!stopReqElem)
2402    {
2403       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2404       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2405       return RFAILED;
2406    }
2407    FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2408       sizeof(fapi_stop_req_t));
2409    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2410    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2411    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2412
2413    /* Send to PHY */
2414    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2415    prevElem->p_next = stopReqElem;
2416
2417 #endif
2418    return ROK;
2419 }
2420
2421 #ifdef INTEL_FAPI
2422 /*******************************************************************
2423  *
2424  * @brief fills SSB PDU required for DL TTI info in MAC
2425  *
2426  * @details
2427  *
2428  *    Function : fillSsbPdu
2429  *
2430  *    Functionality:
2431  *         -Fills the SSB PDU info
2432  *          stored in MAC
2433  *
2434  * @params[in] Pointer to FAPI DL TTI Req
2435  *             Pointer to RgCellCb
2436  *             Pointer to msgLen of DL TTI Info
2437  * @return ROK
2438  *
2439  ******************************************************************/
2440
2441 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2442       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2443 {
2444    uint32_t mibPayload = 0;
2445    if(dlTtiReqPdu != NULL)
2446    {
2447       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2448       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2449       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2450       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2451       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2452       /* ssbOfPdufstA to be filled in ssbCfg */
2453       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2454       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2455       /* Bit manipulation for SFN */
2456       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2457       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2458       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2459       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2460       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2461       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2462       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2463          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2464       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2465
2466       return ROK;
2467    }
2468    return RFAILED;
2469 }
2470
2471 /*******************************************************************
2472  *
2473  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2474  *
2475  * @details
2476  *
2477  *    Function : fillSib1DlDciPdu
2478  *
2479  *    Functionality:
2480  *         -Fills the Dl DCI PDU
2481  *
2482  * @params[in] Pointer to fapi_dl_dci_t
2483  *             Pointer to PdcchCfg
2484  * @return ROK
2485  *
2486  ******************************************************************/
2487
2488 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2489 {
2490    if(dlDciPtr != NULLP)
2491    {
2492       uint8_t numBytes=0;
2493       uint8_t bytePos=0;
2494       uint8_t bitPos=0;
2495
2496       uint16_t coreset0Size=0;
2497       uint16_t rbStart=0;
2498       uint16_t rbLen=0;
2499       uint32_t freqDomResAssign=0;
2500       uint32_t timeDomResAssign=0;
2501       uint8_t  VRB2PRBMap=0;
2502       uint32_t modNCodScheme=0;
2503       uint8_t  redundancyVer=0;
2504       uint32_t sysInfoInd=0;
2505       uint32_t reserved=0;
2506
2507       /* Size(in bits) of each field in DCI format 0_1
2508        * as mentioned in spec 38.214 */
2509       uint8_t freqDomResAssignSize = 0;
2510       uint8_t timeDomResAssignSize = 4;
2511       uint8_t VRB2PRBMapSize       = 1;
2512       uint8_t modNCodSchemeSize    = 5;
2513       uint8_t redundancyVerSize    = 2;
2514       uint8_t sysInfoIndSize       = 1;
2515       uint8_t reservedSize         = 15;
2516
2517       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2518       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2519       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2520       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2521       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2522       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2523       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2524       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2525       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2526       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2527       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2528       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2529
2530       /* Calculating freq domain resource allocation field value and size
2531        * coreset0Size = Size of coreset 0
2532        * RBStart = Starting Virtual Rsource block
2533        * RBLen = length of contiguously allocted RBs
2534        * Spec 38.214 Sec 5.1.2.2.2
2535        */
2536       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2537       rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2538       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2539
2540       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2541       {
2542          if((rbLen - 1) <= floor(coreset0Size / 2))
2543             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2544          else
2545             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2546                                + (coreset0Size - 1 - rbStart);
2547
2548          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2549       }
2550
2551       /* Fetching DCI field values */
2552       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2553       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2554       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2555       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2556       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2557       reserved         = 0;
2558
2559       /* Reversing bits in each DCI field */
2560       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2561       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2562       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2563       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2564       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2565       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2566
2567       /* Calulating total number of bytes in buffer */
2568       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2569                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2570                                   + sysInfoIndSize + reservedSize;
2571
2572       numBytes = dlDciPtr->payloadSizeBits / 8;
2573       if(dlDciPtr->payloadSizeBits % 8)
2574          numBytes += 1;
2575
2576       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2577       {
2578          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2579          return;
2580       }
2581
2582       /* Initialize buffer */
2583       for(bytePos = 0; bytePos < numBytes; bytePos++)
2584          dlDciPtr->payload[bytePos] = 0;
2585
2586       bytePos = numBytes - 1;
2587       bitPos = 0;
2588
2589       /* Packing DCI format fields */
2590       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2591             freqDomResAssign, freqDomResAssignSize);
2592       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2593             timeDomResAssign, timeDomResAssignSize);
2594       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2595             VRB2PRBMap, VRB2PRBMapSize);
2596       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2597             modNCodScheme, modNCodSchemeSize);
2598       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2599             redundancyVer, redundancyVerSize);
2600       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2601             sysInfoInd, sysInfoIndSize);
2602       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2603             reserved, reservedSize);
2604
2605    }
2606 } /* fillSib1DlDciPdu */
2607
2608 /*******************************************************************
2609  *
2610  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2611  *
2612  * @details
2613  *
2614  *    Function : fillRarDlDciPdu
2615  *
2616  *    Functionality:
2617  *         -Fills the Dl DCI PDU
2618  *
2619  * @params[in] Pointer to fapi_dl_dci_t
2620  *             Pointer to PdcchCfg
2621  * @return ROK
2622  *
2623  ******************************************************************/
2624
2625 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2626 {
2627    if(dlDciPtr != NULLP)
2628    {
2629       uint8_t numBytes =0;
2630       uint8_t bytePos =0;
2631       uint8_t bitPos =0;
2632
2633       uint16_t coreset0Size =0;
2634       uint16_t rbStart =0;
2635       uint16_t rbLen =0;
2636       uint32_t freqDomResAssign =0;
2637       uint8_t timeDomResAssign =0;
2638       uint8_t  VRB2PRBMap =0;
2639       uint8_t modNCodScheme =0;
2640       uint8_t tbScaling =0;
2641       uint32_t reserved =0;
2642
2643       /* Size(in bits) of each field in DCI format 1_0 */
2644       uint8_t freqDomResAssignSize = 0;
2645       uint8_t timeDomResAssignSize = 4;
2646       uint8_t VRB2PRBMapSize       = 1;
2647       uint8_t modNCodSchemeSize    = 5;
2648       uint8_t tbScalingSize        = 2;
2649       uint8_t reservedSize         = 16;
2650
2651       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2652       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2653       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2654       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2655       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2656       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2657       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2658       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2659       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2660       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2661       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2662       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2663
2664       /* Calculating freq domain resource allocation field value and size
2665        * coreset0Size = Size of coreset 0
2666        * RBStart = Starting Virtual Rsource block
2667        * RBLen = length of contiguously allocted RBs
2668        * Spec 38.214 Sec 5.1.2.2.2
2669        */
2670
2671       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2672       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2673       rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2674       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2675
2676       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2677       {
2678          if((rbLen - 1) <= floor(coreset0Size / 2))
2679             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2680          else
2681             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2682                                + (coreset0Size - 1 - rbStart);
2683
2684          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2685       }
2686
2687       /* Fetching DCI field values */
2688       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
2689       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2690       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2691       tbScaling        = 0; /* configured to 0 scaling */
2692       reserved         = 0;
2693
2694       /* Reversing bits in each DCI field */
2695       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2696       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2697       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2698       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2699       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2700
2701       /* Calulating total number of bytes in buffer */
2702       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2703                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2704
2705       numBytes = dlDciPtr->payloadSizeBits / 8;
2706       if(dlDciPtr->payloadSizeBits % 8)
2707          numBytes += 1;
2708
2709       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2710       {
2711          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2712          return;
2713       }
2714
2715       /* Initialize buffer */
2716       for(bytePos = 0; bytePos < numBytes; bytePos++)
2717          dlDciPtr->payload[bytePos] = 0;
2718
2719       bytePos = numBytes - 1;
2720       bitPos = 0;
2721
2722       /* Packing DCI format fields */
2723       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2724             freqDomResAssign, freqDomResAssignSize);
2725       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2726             timeDomResAssign, timeDomResAssignSize);
2727       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2728             VRB2PRBMap, VRB2PRBMapSize);
2729       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2730             modNCodScheme, modNCodSchemeSize);
2731       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2732             tbScaling, tbScalingSize);
2733       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2734             reserved, reservedSize);
2735    }
2736 } /* fillRarDlDciPdu */
2737
2738 /*******************************************************************
2739  *
2740  * @brief fills DL DCI PDU required for DL TTI info in MAC
2741  *
2742  * @details
2743  *
2744  *    Function : fillDlMsgDlDciPdu
2745  *
2746  *    Functionality:
2747  *         -Fills the Dl DCI PDU
2748  *
2749  * @params[in] Pointer to fapi_dl_dci_t
2750  *             Pointer to PdcchCfg
2751  * @return ROK
2752  *
2753  ******************************************************************/
2754 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2755       DlMsgInfo *dlMsgInfo)
2756 {
2757    if(dlDciPtr != NULLP)
2758    {
2759       uint8_t numBytes;
2760       uint8_t bytePos;
2761       uint8_t bitPos;
2762
2763       uint16_t coresetSize = 0;
2764       uint16_t rbStart = 0;
2765       uint16_t rbLen = 0;
2766       uint8_t  dciFormatId;
2767       uint32_t freqDomResAssign;
2768       uint8_t  timeDomResAssign;
2769       uint8_t  VRB2PRBMap;
2770       uint8_t  modNCodScheme;
2771       uint8_t  ndi = 0;
2772       uint8_t  redundancyVer = 0;
2773       uint8_t  harqProcessNum = 0;
2774       uint8_t  dlAssignmentIdx = 0;
2775       uint8_t  pucchTpc = 0;
2776       uint8_t  pucchResoInd = 0;
2777       uint8_t  harqFeedbackInd = 0;
2778
2779       /* Size(in bits) of each field in DCI format 1_0 */
2780       uint8_t dciFormatIdSize    = 1;
2781       uint8_t freqDomResAssignSize = 0;
2782       uint8_t timeDomResAssignSize = 4;
2783       uint8_t VRB2PRBMapSize       = 1;
2784       uint8_t modNCodSchemeSize    = 5;
2785       uint8_t ndiSize              = 1;
2786       uint8_t redundancyVerSize    = 2;
2787       uint8_t harqProcessNumSize   = 4;
2788       uint8_t dlAssignmentIdxSize  = 2;
2789       uint8_t pucchTpcSize         = 2;
2790       uint8_t pucchResoIndSize     = 3;
2791       uint8_t harqFeedbackIndSize  = 3;
2792
2793       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2794       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2795       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2796       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2797       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2798       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2799       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2800       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2801       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2802       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2803       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2804       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2805
2806       /* Calculating freq domain resource allocation field value and size
2807        * coreset0Size = Size of coreset 0
2808        * RBStart = Starting Virtual Rsource block
2809        * RBLen = length of contiguously allocted RBs
2810        * Spec 38.214 Sec 5.1.2.2.2
2811        */
2812       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2813       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2814       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2815
2816       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2817       {
2818          if((rbLen - 1) <= floor(coresetSize / 2))
2819             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2820          else
2821             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2822                                + (coresetSize - 1 - rbStart);
2823
2824          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2825       }
2826
2827       /* Fetching DCI field values */
2828       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
2829       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2830       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2831       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2832       ndi              = dlMsgInfo->ndi;
2833       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2834       harqProcessNum   = dlMsgInfo->harqProcNum;
2835       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
2836       pucchTpc         = dlMsgInfo->pucchTpc;
2837       pucchResoInd     = dlMsgInfo->pucchResInd;
2838       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
2839
2840       /* Reversing bits in each DCI field */
2841       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
2842       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2843       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2844       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2845       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2846       ndi              = reverseBits(ndi, ndiSize);
2847       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2848       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
2849       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2850       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
2851       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
2852       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2853
2854
2855       /* Calulating total number of bytes in buffer */
2856       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2857             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2858             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2859             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2860
2861       numBytes = dlDciPtr->payloadSizeBits / 8;
2862       if(dlDciPtr->payloadSizeBits % 8)
2863          numBytes += 1;
2864
2865       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2866       {
2867          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2868          return;
2869       }
2870
2871       /* Initialize buffer */
2872       for(bytePos = 0; bytePos < numBytes; bytePos++)
2873          dlDciPtr->payload[bytePos] = 0;
2874
2875       bytePos = numBytes - 1;
2876       bitPos = 0;
2877
2878       /* Packing DCI format fields */
2879       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2880             dciFormatId, dciFormatIdSize);
2881       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2882             freqDomResAssign, freqDomResAssignSize);
2883       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2884             timeDomResAssign, timeDomResAssignSize);
2885       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2886             VRB2PRBMap, VRB2PRBMapSize);
2887       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2888             modNCodScheme, modNCodSchemeSize);
2889       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2890             ndi, ndiSize);
2891       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2892             redundancyVer, redundancyVerSize);
2893       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2894             redundancyVer, redundancyVerSize);
2895       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2896             harqProcessNum, harqProcessNumSize);
2897       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2898             dlAssignmentIdx, dlAssignmentIdxSize);
2899       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2900             pucchTpc, pucchTpcSize);
2901       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2902             pucchResoInd, pucchResoIndSize);
2903       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2904             harqFeedbackInd, harqFeedbackIndSize);
2905    }
2906 }
2907
2908 /*******************************************************************
2909  *
2910  * @brief fills PDCCH PDU required for DL TTI info in MAC
2911  *
2912  * @details
2913  *
2914  *    Function : fillPdcchPdu
2915  *
2916  *    Functionality:
2917  *         -Fills the Pdcch PDU info
2918  *          stored in MAC
2919  *
2920  * @params[in] Pointer to FAPI DL TTI Req
2921  *             Pointer to PdcchCfg
2922  * @return ROK
2923  *
2924  ******************************************************************/
2925 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, int8_t dlMsgSchInfoIdx, \
2926       RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
2927 {
2928    if(dlTtiReqPdu != NULLP)
2929    {
2930       PdcchCfg *pdcchInfo = NULLP;
2931       BwpCfg *bwp = NULLP;
2932
2933       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2934       if(rntiType == SI_RNTI_TYPE)
2935       {
2936          pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2937          bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2938          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2939       }
2940       else if(rntiType == RA_RNTI_TYPE)
2941       {
2942          pdcchInfo = &dlInfo->rarAlloc[ueIdx]->rarPdcchCfg;
2943          bwp = &dlInfo->rarAlloc[ueIdx]->bwp;
2944          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2945       }
2946       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2947       {
2948          pdcchInfo = &dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
2949          bwp = &dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
2950          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2951                &dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
2952       }
2953       else
2954       {
2955          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
2956          return RFAILED;
2957       }
2958       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2959       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2960       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2961       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2962       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2963       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2964       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2965       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2966       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2967       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2968       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2969       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
2970       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2971       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2972       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2973
2974       /* Calculating PDU length. Considering only one dl dci pdu for now */
2975       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2976    }
2977
2978    return ROK;
2979 }
2980
2981 /*******************************************************************
2982  *
2983  * @brief fills PDSCH PDU required for DL TTI info in MAC
2984  *
2985  * @details
2986  *
2987  *    Function : fillPdschPdu
2988  *
2989  *    Functionality:
2990  *         -Fills the Pdsch PDU info
2991  *          stored in MAC
2992  *
2993  * @params[in] Pointer to FAPI DL TTI Req
2994  *             Pointer to PdschCfg
2995  *             Pointer to msgLen of DL TTI Info
2996  * @return ROK
2997  *
2998  ******************************************************************/
2999
3000 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
3001       BwpCfg bwp, uint16_t pduIndex)
3002 {
3003    uint8_t idx;
3004
3005    if(dlTtiReqPdu != NULLP)
3006    {
3007       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3008       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3009       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3010       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3011       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3012       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3013       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3014       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3015       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3016       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3017       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3018       {
3019          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3020          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3021          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3022          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3023          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3024          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3025       }
3026       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3027       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3028       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3029       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3030       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3031       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3032       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3033       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3034       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3035       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3036       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3037       /* since we are using type-1, hence rbBitmap excluded */
3038       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3039       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3040       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3041       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3042       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3043       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3044       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3045       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3046       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3047          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3048       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3049          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3050       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3051       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3052       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3053       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3054       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3055
3056       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3057    }
3058 }
3059
3060 /***********************************************************************
3061  *
3062  * @brief calculates the total size to be allocated for DL TTI Req
3063  *
3064  * @details
3065  *
3066  *    Function : calcDlTtiReqPduCount
3067  *
3068  *    Functionality:
3069  *         -calculates the total pdu count to be allocated for DL TTI Req
3070  *
3071  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3072  * @return count
3073  *
3074  * ********************************************************************/
3075 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3076 {
3077    uint8_t count = 0;
3078    uint8_t idx = 0, ueIdx=0;
3079
3080    if(dlInfo->isBroadcastPres)
3081    {
3082       if(dlInfo->brdcstAlloc.ssbTrans)
3083       {
3084          for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3085          {
3086             /* SSB PDU is filled */
3087             count++;
3088          }
3089       }
3090       if(dlInfo->brdcstAlloc.sib1Trans)
3091       {
3092          /* PDCCH and PDSCH PDU is filled */
3093          count += 2;
3094       }
3095    }
3096
3097    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3098    {
3099       if(dlInfo->rarAlloc[ueIdx] != NULLP)
3100       {
3101          /* PDCCH and PDSCH PDU is filled */
3102          if(dlInfo->rarAlloc[ueIdx]->pduPres == BOTH)
3103             count += 2;
3104          else
3105             count += 1;
3106       }
3107
3108       if(dlInfo->dlMsgAlloc[ueIdx] != NULLP)
3109       {
3110          for(idx=0; idx<dlInfo->dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3111          {
3112          /* PDCCH and PDSCH PDU is filled */
3113          if(dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
3114             count += 2;
3115          else if(dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
3116             count += 1;
3117          }
3118       }
3119    }
3120    return count;
3121 }
3122
3123 /***********************************************************************
3124  *
3125  * @brief calculates the total size to be allocated for DL TTI Req
3126  *
3127  * @details
3128  *
3129  *    Function : calcTxDataReqPduCount
3130  *
3131  *    Functionality:
3132  *         -calculates the total pdu count to be allocated for DL TTI Req
3133  *
3134  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3135  * @return count
3136  *
3137  * ********************************************************************/
3138 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3139 {
3140    uint8_t idx = 0, count = 0, ueIdx=0;
3141
3142    if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3143    {
3144       count++;
3145    }
3146
3147    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3148    {
3149       if((dlInfo->rarAlloc[ueIdx] != NULLP) && \
3150             ((dlInfo->rarAlloc[ueIdx]->pduPres == BOTH) || (dlInfo->rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
3151          count++;
3152
3153       if(dlInfo->dlMsgAlloc[ueIdx] != NULLP)
3154       {
3155          for(idx=0; idx<dlInfo->dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3156          {
3157             if(dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
3158                   dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
3159                count++;
3160          }
3161       }
3162    }
3163    return count;
3164 }
3165
3166 /***********************************************************************
3167  *
3168  * @brief fills the SIB1 TX-DATA request message
3169  *
3170  * @details
3171  *
3172  *    Function : fillSib1TxDataReq
3173  *
3174  *    Functionality:
3175  *         - fills the SIB1 TX-DATA request message
3176  *
3177  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3178  * @params[in]    macCellCfg consist of SIB1 pdu
3179  * @params[in]    uint32_t *msgLen
3180  * @params[in]    uint16_t pduIndex
3181  * @return ROK
3182  *
3183  * ********************************************************************/
3184 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3185       PdschCfg pdschCfg)
3186 {
3187    uint32_t payloadSize = 0;
3188    uint8_t *sib1Payload = NULLP;
3189    fapi_api_queue_elem_t *payloadElem = NULLP;
3190 #ifdef INTEL_WLS_MEM
3191    void * wlsHdlr = NULLP;
3192 #endif
3193
3194    pduDesc[pduIndex].pdu_index = pduIndex;
3195    pduDesc[pduIndex].num_tlvs = 1;
3196
3197    /* fill the TLV */
3198    payloadSize = pdschCfg.codeword[0].tbSize;
3199    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3200    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3201    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3202    if(sib1Payload == NULLP)
3203    {
3204       return RFAILED;
3205    }
3206    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3207    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3208       macCellCfg->sib1Cfg.sib1PduLen);
3209    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
3210
3211 #ifdef INTEL_WLS_MEM
3212    mtGetWlsHdl(&wlsHdlr);
3213    pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, sib1Payload);
3214 #else
3215    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3216 #endif
3217    pduDesc[pduIndex].pdu_length = payloadSize;
3218
3219 #ifdef INTEL_WLS_MEM
3220    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3221 #else
3222    LWR_MAC_FREE(sib1Payload, payloadSize);
3223 #endif
3224
3225    return ROK;
3226 }
3227
3228 /***********************************************************************
3229  *
3230  * @brief fills the RAR TX-DATA request message
3231  *
3232  * @details
3233  *
3234  *    Function : fillRarTxDataReq
3235  *
3236  *    Functionality:
3237  *         - fills the RAR TX-DATA request message
3238  *
3239  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3240  * @params[in]    RarInfo *rarInfo
3241  * @params[in]    uint32_t *msgLen
3242  * @params[in]    uint16_t pduIndex
3243  * @return ROK
3244  *
3245  * ********************************************************************/
3246 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3247 {
3248    uint16_t payloadSize;
3249    uint8_t  *rarPayload = NULLP;
3250    fapi_api_queue_elem_t *payloadElem = NULLP;
3251 #ifdef INTEL_WLS_MEM
3252    void * wlsHdlr = NULLP;
3253 #endif
3254
3255    pduDesc[pduIndex].pdu_index = pduIndex;
3256    pduDesc[pduIndex].num_tlvs = 1;
3257
3258    /* fill the TLV */
3259    payloadSize = pdschCfg.codeword[0].tbSize;
3260    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3261    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3262    LWR_MAC_ALLOC(rarPayload, payloadSize);
3263    if(rarPayload == NULLP)
3264    {
3265       return RFAILED;
3266    }
3267    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3268    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3269    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3270
3271 #ifdef INTEL_WLS_MEM
3272    mtGetWlsHdl(&wlsHdlr);
3273    pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, rarPayload);
3274 #else
3275    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3276 #endif
3277    pduDesc[pduIndex].pdu_length = payloadSize;
3278
3279 #ifdef INTEL_WLS_MEM
3280    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3281 #else
3282    LWR_MAC_FREE(rarPayload, payloadSize);
3283 #endif
3284    return ROK;
3285 }
3286
3287 /***********************************************************************
3288  *
3289  * @brief fills the DL dedicated Msg TX-DATA request message
3290  *
3291  * @details
3292  *
3293  *    Function : fillDlMsgTxDataReq
3294  *
3295  *    Functionality:
3296  *         - fills the Dl Dedicated Msg TX-DATA request message
3297  *
3298  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3299  * @params[in]    DlMsgInfo *dlMsgInfo
3300  * @params[in]    uint32_t *msgLen
3301  * @params[in]    uint16_t pduIndex
3302  * @return ROK
3303  *
3304  * ********************************************************************/
3305 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3306 {
3307    uint16_t payloadSize;
3308    uint8_t  *dlMsgPayload = NULLP;
3309    fapi_api_queue_elem_t *payloadElem = NULLP;
3310 #ifdef INTEL_WLS_MEM
3311    void * wlsHdlr = NULLP;
3312 #endif
3313
3314    pduDesc[pduIndex].pdu_index = pduIndex;
3315    pduDesc[pduIndex].num_tlvs = 1;
3316
3317    /* fill the TLV */
3318    payloadSize = pdschCfg.codeword[0].tbSize;
3319    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3320    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3321    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3322    if(dlMsgPayload == NULLP)
3323    {
3324       return RFAILED;
3325    }
3326    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3327    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3328    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3329
3330 #ifdef INTEL_WLS_MEM
3331    mtGetWlsHdl(&wlsHdlr);
3332    pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, dlMsgPayload);
3333 #else
3334    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3335 #endif
3336    pduDesc[pduIndex].pdu_length = payloadSize;
3337
3338 #ifdef INTEL_WLS_MEM
3339    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3340 #else
3341    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3342 #endif
3343    return ROK;
3344 }
3345
3346 #endif /* FAPI */
3347
3348 /*******************************************************************
3349  *
3350  * @brief Sends DL TTI Request to PHY
3351  *
3352  * @details
3353  *
3354  *    Function : fillDlTtiReq
3355  *
3356  *    Functionality:
3357  *         -Sends FAPI DL TTI req to PHY
3358  *
3359  * @params[in]    timing info
3360  * @return ROK     - success
3361  *         RFAILED - failure
3362  *
3363  * ****************************************************************/
3364 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3365 {
3366 #ifdef CALL_FLOW_DEBUG_LOG
3367    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3368 #endif
3369
3370 #ifdef INTEL_FAPI
3371    uint8_t idx =0;
3372    uint8_t nPdu = 0;
3373    uint8_t numPduEncoded = 0;
3374    uint8_t  ueIdx;
3375    uint16_t cellIdx =0;
3376    uint16_t pduIndex = 0;
3377
3378    SlotTimingInfo dlTtiReqTimingInfo;
3379    MacDlSlot *currDlSlot = NULLP;
3380    MacCellCfg macCellCfg;
3381    RntiType rntiType;
3382    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3383    fapi_msg_header_t *msgHeader = NULLP;
3384    p_fapi_api_queue_elem_t dlTtiElem;
3385    p_fapi_api_queue_elem_t headerElem;
3386    p_fapi_api_queue_elem_t prevElem;
3387
3388    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3389    {
3390       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3391       /* consider phy delay */
3392       ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
3393       dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3394
3395       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3396
3397       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3398
3399       LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3400       if(dlTtiElem)
3401       {
3402          FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3403                sizeof(fapi_dl_tti_req_t));
3404
3405          /* Fill message header */
3406          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3407          if(!headerElem)
3408          {
3409             DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3410             LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3411             return RFAILED;
3412          }
3413          FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3414                sizeof(fapi_msg_header_t));
3415          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3416          msgHeader->num_msg = 1;
3417          msgHeader->handle = 0;
3418
3419          /* Fill Dl TTI Request */
3420          dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3421          memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3422          fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3423
3424          dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3425          dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3426          dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo);  /* get total Pdus */
3427          nPdu = dlTtiReq->nPdus;
3428          dlTtiReq->nGroup = 0;
3429          if(dlTtiReq->nPdus > 0)
3430          {
3431             if(currDlSlot->dlInfo.isBroadcastPres)
3432             {
3433                if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3434                {
3435                   if(dlTtiReq->pdus != NULLP)
3436                   {
3437                      for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3438                      {
3439                         fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3440                               currDlSlot, idx, dlTtiReq->sfn);
3441                         numPduEncoded++;
3442                      }
3443                   }
3444                   DU_LOG("\033[1;31m");
3445                   DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3446                   DU_LOG("\033[0m");
3447                }
3448
3449                if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3450                {
3451                   /* Filling SIB1 param */
3452                   if(numPduEncoded != nPdu)
3453                   {
3454                      rntiType = SI_RNTI_TYPE;
3455                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &currDlSlot->dlInfo, -1, \
3456                            rntiType, CORESET_TYPE0, MAX_NUM_UE);
3457                      numPduEncoded++;
3458                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3459                            &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3460                            currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3461                            pduIndex);
3462                      dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3463                      pduIndex++;
3464                      numPduEncoded++;
3465                   }
3466                   DU_LOG("\033[1;34m");
3467                   DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3468                   DU_LOG("\033[0m");
3469                }
3470             }
3471
3472             for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3473             {
3474                if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3475                {
3476                   /* Filling RAR param */
3477                   rntiType = RA_RNTI_TYPE;
3478                   if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3479                         (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
3480                   {
3481                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3482                            &currDlSlot->dlInfo, -1, rntiType, CORESET_TYPE0, ueIdx);
3483                      numPduEncoded++;
3484                   }
3485                   if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3486                         (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3487                   {
3488                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3489                            &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3490                            currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3491                            pduIndex);
3492                      numPduEncoded++;
3493                      pduIndex++;
3494
3495                      DU_LOG("\033[1;32m");
3496                      DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3497                      DU_LOG("\033[0m");
3498                   }
3499                }
3500
3501                if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3502                {
3503                   for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3504                   {
3505                      /* Filling Msg4 param */
3506                      if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3507                            (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
3508                      {
3509                         if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3510                         {
3511                            rntiType = TC_RNTI_TYPE;
3512                            fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3513                                  &currDlSlot->dlInfo, idx, rntiType, CORESET_TYPE0, ueIdx);
3514                         }
3515                         else
3516                         {
3517                            /* Filling other DL msg params */
3518                            rntiType = C_RNTI_TYPE;
3519                            fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3520                                  &currDlSlot->dlInfo, idx, rntiType, CORESET_TYPE1, ueIdx);
3521                         }
3522                         numPduEncoded++;
3523                      }
3524
3525                      if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
3526                      {
3527                         if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3528                               (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
3529                         {
3530                            fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], \
3531                                  &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
3532                                  currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
3533                            numPduEncoded++;
3534                            pduIndex++;
3535
3536                            DU_LOG("\033[1;32m");
3537                            if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3538                            {
3539                               DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3540                            }
3541                            else
3542                            {
3543                               DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3544                            }
3545                            DU_LOG("\033[0m");
3546                         }
3547
3548                      }
3549                   /*   else
3550                      {
3551                         MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3552                         currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3553                      }
3554                      */
3555                   }
3556                }
3557             }
3558
3559             dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3560             dlTtiReq->nGroup++;
3561
3562 #ifdef ODU_SLOT_IND_DEBUG_LOG
3563             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3564 #endif
3565
3566             /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3567             fillUlTtiReq(currTimingInfo, dlTtiElem);
3568             msgHeader->num_msg++;
3569
3570             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3571             fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
3572             msgHeader->num_msg++;
3573
3574             /* send Tx-DATA req message */
3575             sendTxDataReq(dlTtiReqTimingInfo, &currDlSlot->dlInfo, dlTtiElem->p_next->p_next);
3576             if(dlTtiElem->p_next->p_next->p_next)
3577             {
3578                msgHeader->num_msg++;
3579                prevElem = dlTtiElem->p_next->p_next->p_next;
3580             }
3581             else
3582                prevElem = dlTtiElem->p_next->p_next;
3583          }
3584          else
3585          {
3586 #ifdef ODU_SLOT_IND_DEBUG_LOG
3587             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3588 #endif
3589
3590             /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3591             fillUlTtiReq(currTimingInfo, dlTtiElem);
3592             msgHeader->num_msg++;
3593
3594             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3595             fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
3596             msgHeader->num_msg++;
3597
3598             prevElem = dlTtiElem->p_next->p_next;
3599          }
3600
3601          if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
3602          {
3603             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3604             lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
3605             msgHeader->num_msg++;
3606             macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
3607          }
3608          LwrMacSendToL1(headerElem);
3609          memset(currDlSlot, 0, sizeof(MacDlSlot));
3610          return ROK;
3611       }
3612       else
3613       {
3614          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
3615          memset(currDlSlot, 0, sizeof(MacDlSlot));
3616          return RFAILED;
3617       }
3618    }
3619    else
3620    {
3621       lwr_mac_procInvalidEvt(&currTimingInfo);
3622       return RFAILED;
3623    }
3624 #endif
3625    return ROK;
3626 }
3627
3628 /*******************************************************************
3629  *
3630  * @brief Sends TX data Request to PHY
3631  *
3632  * @details
3633  *
3634  *    Function : sendTxDataReq
3635  *
3636  *    Functionality:
3637  *         -Sends FAPI TX data req to PHY
3638  *
3639  * @params[in]    timing info
3640  * @return ROK     - success
3641  *         RFAILED - failure
3642  *
3643  * ****************************************************************/
3644 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem)
3645 {
3646 #ifdef INTEL_FAPI
3647 #ifdef CALL_FLOW_DEBUG_LOG
3648    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
3649 #endif
3650
3651    uint8_t  nPdu = 0;
3652    uint8_t  ueIdx=0;
3653    uint8_t  schInfoIdx = 0;
3654    uint16_t cellIdx=0;
3655    uint16_t pduIndex = 0;
3656    fapi_tx_data_req_t       *txDataReq =NULLP;
3657    p_fapi_api_queue_elem_t  txDataElem = 0;
3658
3659    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3660
3661    /* send TX_Data request message */
3662    nPdu = calcTxDataReqPduCount(dlInfo);
3663    if(nPdu > 0)
3664    {
3665       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3666       if(txDataElem == NULLP)
3667       {
3668          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
3669          return RFAILED;
3670       }
3671
3672       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3673             sizeof(fapi_tx_data_req_t));
3674       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3675       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3676       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3677
3678       txDataReq->sfn  = currTimingInfo.sfn;
3679       txDataReq->slot = currTimingInfo.slot;
3680       if(dlInfo->brdcstAlloc.sib1Trans)
3681       {
3682          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
3683                dlInfo->brdcstAlloc.sib1Alloc.sib1PdschCfg);
3684          pduIndex++;
3685          txDataReq->num_pdus++;
3686       }
3687
3688       for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3689       {
3690          if(dlInfo->rarAlloc[ueIdx] != NULLP)
3691          {
3692             if((dlInfo->rarAlloc[ueIdx]->pduPres == BOTH) || (dlInfo->rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3693             {
3694                fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->rarAlloc[ueIdx]->rarInfo,\
3695                      dlInfo->rarAlloc[ueIdx]->rarPdschCfg);
3696                pduIndex++;
3697                txDataReq->num_pdus++;
3698             }
3699             MAC_FREE(dlInfo->rarAlloc[ueIdx],sizeof(RarAlloc));
3700          }
3701
3702          if(dlInfo->dlMsgAlloc[ueIdx] != NULLP)
3703          {
3704             for(schInfoIdx=0; schInfoIdx < dlInfo->dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
3705             {
3706                if((dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
3707                      (dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
3708                {
3709                   fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
3710                         &dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
3711                         dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
3712                   pduIndex++;
3713                   txDataReq->num_pdus++;
3714                }
3715                MAC_FREE(dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
3716                      dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
3717                dlInfo->dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
3718             }
3719             MAC_FREE(dlInfo->dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3720          }
3721       }
3722
3723       /* Fill message header */
3724       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
3725       prevElem->p_next = txDataElem;
3726    }
3727 #endif
3728    return ROK;
3729 }
3730
3731 /***********************************************************************
3732  *
3733  * @brief calculates the total size to be allocated for UL TTI Req
3734  *
3735  * @details
3736  *
3737  *    Function : getnPdus
3738  *
3739  *    Functionality:
3740  *         -calculates the total pdu count to be allocated for UL TTI Req
3741  *
3742  * @params[in] Pointer to fapi Ul TTI Req
3743  *             Pointer to CurrUlSlot
3744  * @return count
3745  * ********************************************************************/
3746 #ifdef INTEL_FAPI
3747 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3748 {
3749    uint8_t pduCount = 0;
3750
3751    if(ulTtiReq && currUlSlot)
3752    {
3753       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3754       {
3755          pduCount++;
3756          ulTtiReq->rachPresent++;
3757       }
3758       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3759       {
3760          pduCount++;
3761          ulTtiReq->nUlsch++;
3762       }
3763       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3764       {
3765          pduCount++;
3766          ulTtiReq->nUlsch++;
3767       }
3768       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3769       {
3770          pduCount++;
3771          ulTtiReq->nUlcch++;
3772       }
3773       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3774       {
3775          pduCount++;
3776       }
3777    }
3778    return pduCount;
3779 }
3780 #endif
3781
3782 /***********************************************************************
3783  *
3784  * @brief Set the value of zero correlation config in PRACH PDU
3785  *
3786  * @details
3787  *
3788  *    Function : setNumCs
3789  *
3790  *    Functionality:
3791  *         -Set the value of zero correlation config in PRACH PDU
3792  *
3793  * @params[in] Pointer to zero correlation config
3794  *             Pointer to MacCellCfg
3795  * ********************************************************************/
3796
3797 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3798 {
3799 #ifdef INTEL_FAPI
3800    uint8_t idx;
3801    if(macCellCfg != NULLP)
3802    {
3803       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3804       *numCs = UnrestrictedSetNcsTable[idx];
3805    }
3806 #endif
3807 }
3808
3809 /***********************************************************************
3810  *
3811  * @brief Fills the PRACH PDU in UL TTI Request
3812  *
3813  * @details
3814  *
3815  *    Function : fillPrachPdu
3816  *
3817  *    Functionality:
3818  *         -Fills the PRACH PDU in UL TTI Request
3819  *
3820  * @params[in] Pointer to Prach Pdu
3821  *             Pointer to CurrUlSlot
3822  *             Pointer to macCellCfg
3823  *             Pointer to msgLen
3824  * ********************************************************************/
3825
3826 #ifdef INTEL_FAPI
3827 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3828 {
3829    if(ulTtiReqPdu != NULLP)
3830    {
3831       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3832       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3833       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3834          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3835       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3836          currUlSlot->ulInfo.prachSchInfo.prachFormat;
3837       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3838       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3839          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3840       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3841       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3842       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3843       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3844       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3845       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3846    }
3847 }
3848
3849 /*******************************************************************
3850  *
3851  * @brief Filling PUSCH PDU in UL TTI Request
3852  *
3853  * @details
3854  *
3855  *    Function : fillPuschPdu
3856  *
3857  *    Functionality: Filling PUSCH PDU in UL TTI Request
3858  *
3859  * @params[in]
3860  * @return ROK     - success
3861  *         RFAILED - failure
3862  *
3863  * ****************************************************************/
3864 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3865 {
3866    if(ulTtiReqPdu != NULLP)
3867    {
3868       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3869       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3870       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3871       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3872       /* TODO : Fill handle in raCb when scheduling pusch and access here */
3873       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3874       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3875       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3876       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3877          macCellCfg->initialUlBwp.bwp.scs;
3878       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3879          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3880       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3881       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3882       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3883       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3884       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3885       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3886       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3887       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3888       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3889       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3890       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3891       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3892       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3893       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3894          currUlSlot->ulInfo.schPuschInfo.resAllocType;
3895       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3896          currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3897       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3898          currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3899       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3900       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3901       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3902       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3903       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3904          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3905       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3906          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3907       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3908          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3909       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3910          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3911       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3912          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3913       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3914          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3915       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3916          currUlSlot->ulInfo.schPuschInfo.harqProcId;
3917       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3918          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3919       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3920          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3921       /* numCb is 0 for new transmission */
3922       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3923
3924       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3925    }
3926 }
3927
3928 /*******************************************************************
3929  *
3930  * @brief Fill PUCCH PDU in Ul TTI Request
3931  *
3932  * @details
3933  *
3934  *    Function : fillPucchPdu
3935  *
3936  *    Functionality: Fill PUCCH PDU in Ul TTI Request
3937  *
3938  * @params[in]
3939  * @return ROK     - success
3940  *         RFAILED - failure
3941  *
3942  * ****************************************************************/
3943 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3944       MacUlSlot *currUlSlot)
3945 {
3946    if(ulTtiReqPdu != NULLP)
3947    {
3948       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
3949       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3950       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.schPucchInfo.rnti;
3951       /* TODO : Fill handle in raCb when scheduling pucch and access here */
3952       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
3953       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
3954       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
3955       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3956       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3957       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3958       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3959
3960       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3961       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3962       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3963       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3964       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
3965       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
3966       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3967       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3968       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
3969
3970       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
3971
3972       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3973       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
3974       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
3975       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
3976       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
3977       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
3978       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3979       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
3980       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
3981       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3982       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
3983       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
3984       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3985       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3986       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3987       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3988
3989       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3990    }
3991 }
3992
3993 #endif
3994
3995 /*******************************************************************
3996  *
3997  * @brief Sends UL TTI Request to PHY
3998  *
3999  * @details
4000  *
4001  *    Function : fillUlTtiReq
4002  *
4003  *    Functionality:
4004  *         -Sends FAPI Param req to PHY
4005  *
4006  * @params[in]  Pointer to CmLteTimingInfo
4007  * @return ROK     - success
4008  *         RFAILED - failure
4009  *
4010  ******************************************************************/
4011 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
4012 {
4013 #ifdef CALL_FLOW_DEBUG_LOG
4014    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4015 #endif
4016
4017 #ifdef INTEL_FAPI
4018    uint16_t   cellIdx =0;
4019    uint8_t    pduIdx = -1;
4020    SlotTimingInfo ulTtiReqTimingInfo;
4021    MacUlSlot *currUlSlot = NULLP;
4022    MacCellCfg macCellCfg;
4023    fapi_ul_tti_req_t *ulTtiReq = NULLP;
4024    p_fapi_api_queue_elem_t ulTtiElem;
4025
4026    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4027    {
4028       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4029       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4030
4031       /* add PHY delta */
4032       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
4033       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
4034
4035       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4036       if(ulTtiElem)
4037       {
4038          FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4039             sizeof(fapi_ul_tti_req_t));
4040          ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4041          memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4042          fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4043          ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
4044          ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4045          ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4046          ulTtiReq->nGroup = 0;
4047          if(ulTtiReq->nPdus > 0)
4048          {
4049             /* Fill Prach Pdu */
4050             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4051             {
4052                pduIdx++;
4053                fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4054             }
4055
4056             /* Fill PUSCH PDU */
4057             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4058             {
4059                pduIdx++;
4060                fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4061             }
4062             /* Fill PUCCH PDU */
4063             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4064             {
4065                pduIdx++;
4066                fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4067             }
4068          }
4069
4070 #ifdef ODU_SLOT_IND_DEBUG_LOG
4071          DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
4072 #endif
4073          prevElem->p_next = ulTtiElem;
4074
4075          memset(currUlSlot, 0, sizeof(MacUlSlot));
4076          return ROK;
4077       }
4078       else
4079       {
4080          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
4081          memset(currUlSlot, 0, sizeof(MacUlSlot));
4082          return RFAILED;
4083       }
4084    }
4085    else
4086    {
4087       lwr_mac_procInvalidEvt(&currTimingInfo);
4088    }
4089 #endif
4090    return ROK;
4091 }
4092
4093 #ifdef INTEL_FAPI
4094 /*******************************************************************
4095  *
4096  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4097  *
4098  * @details
4099  *
4100  *    Function : fillUlDciPdu
4101  *
4102  *    Functionality:
4103  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4104  *
4105  * @params[in] Pointer to fapi_dl_dci_t
4106  *             Pointer to DciInfo
4107  * @return ROK
4108  *
4109  ******************************************************************/
4110 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4111 {
4112 #ifdef CALL_FLOW_DEBUG_LOG
4113    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4114 #endif
4115    if(ulDciPtr != NULLP)
4116    {
4117       uint8_t numBytes =0;
4118       uint8_t bytePos =0;
4119       uint8_t bitPos =0;
4120
4121       uint8_t  coreset1Size = 0;
4122       uint16_t rbStart = 0;
4123       uint16_t rbLen = 0;
4124       uint8_t  dciFormatId = 0;
4125       uint32_t freqDomResAssign =0;
4126       uint8_t  timeDomResAssign =0;
4127       uint8_t  freqHopFlag =0;
4128       uint8_t  modNCodScheme =0;
4129       uint8_t  ndi =0;
4130       uint8_t  redundancyVer = 0;
4131       uint8_t  harqProcessNum = 0;
4132       uint8_t  puschTpc = 0;
4133       uint8_t  ul_SlInd = 0;
4134
4135       /* Size(in bits) of each field in DCI format 0_0 */
4136       uint8_t dciFormatIdSize      = 1;
4137       uint8_t freqDomResAssignSize = 0;
4138       uint8_t timeDomResAssignSize = 4;
4139       uint8_t freqHopFlagSize      = 1;
4140       uint8_t modNCodSchemeSize    = 5;
4141       uint8_t ndiSize              = 1;
4142       uint8_t redundancyVerSize    = 2;
4143       uint8_t harqProcessNumSize   = 4;
4144       uint8_t puschTpcSize         = 2;
4145       uint8_t ul_SlIndSize         = 1;
4146
4147       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4148       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4149       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4150       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4151       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4152       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4153       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4154       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4155       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4156       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4157       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.powerValue;
4158       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4159
4160       /* Calculating freq domain resource allocation field value and size
4161        * coreset1Size = Size of coreset 1
4162        * RBStart = Starting Virtual Rsource block
4163        * RBLen = length of contiguously allocted RBs
4164        * Spec 38.214 Sec 5.1.2.2.2
4165        */
4166       if(schDciInfo->formatType == FORMAT0_0)
4167       {
4168          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4169          rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4170          rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4171
4172          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4173          {
4174             if((rbLen - 1) <= floor(coreset1Size / 2))
4175                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4176             else
4177                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4178                                   + (coreset1Size - 1 - rbStart);
4179
4180             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4181          }
4182          /* Fetching DCI field values */
4183          dciFormatId      = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4184          timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4185          freqHopFlag      = schDciInfo->format.format0_0.freqHopFlag;
4186          modNCodScheme    = schDciInfo->format.format0_0.mcs;
4187          ndi              = schDciInfo->format.format0_0.ndi;
4188          redundancyVer    = schDciInfo->format.format0_0.rv;
4189          harqProcessNum   = schDciInfo->format.format0_0.harqProcId;
4190          puschTpc         = schDciInfo->format.format0_0.tpcCmd;
4191          ul_SlInd         = schDciInfo->format.format0_0.sUlCfgd;
4192
4193          /* Reversing bits in each DCI field */
4194          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4195          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4196          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4197          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4198          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4199          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4200          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4201          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4202       }
4203       /* Calulating total number of bytes in buffer */
4204       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4205       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4206       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4207
4208       numBytes = ulDciPtr->payloadSizeBits / 8;
4209       if(ulDciPtr->payloadSizeBits % 8)
4210          numBytes += 1;
4211
4212       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4213       {
4214          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4215          return;
4216       }
4217
4218       /* Initialize buffer */
4219       for(bytePos = 0; bytePos < numBytes; bytePos++)
4220          ulDciPtr->payload[bytePos] = 0;
4221
4222       bytePos = numBytes - 1;
4223       bitPos = 0;
4224
4225       /* Packing DCI format fields */
4226       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4227             dciFormatId, dciFormatIdSize);
4228       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4229             freqDomResAssign, freqDomResAssignSize);
4230       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4231             timeDomResAssign, timeDomResAssignSize);
4232       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4233             freqHopFlag, freqHopFlagSize);
4234       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4235             modNCodScheme, modNCodSchemeSize);
4236       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4237             ndi, ndiSize);
4238       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4239             redundancyVer, redundancyVerSize);
4240       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4241             harqProcessNum, harqProcessNumSize);
4242       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4243             puschTpc, puschTpcSize);
4244       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4245             ul_SlInd, ul_SlIndSize);
4246    }
4247 } /* fillUlDciPdu */
4248
4249 /*******************************************************************
4250  *
4251  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4252  *
4253  * @details
4254  *
4255  *    Function : fillUlDciPdcchPdu
4256  *
4257  *    Functionality:
4258  *         -Fills the Pdcch PDU info
4259  *
4260  * @params[in] Pointer to FAPI DL TTI Req
4261  *             Pointer to PdcchCfg
4262  * @return ROK
4263  *
4264  ******************************************************************/
4265 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4266 {
4267    if(ulDciReqPdu != NULLP)
4268    {
4269       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4270       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4271       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4272       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4273       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4274       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4275       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4276       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4277       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4278       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4279       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4280       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4281       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4282       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4283       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4284       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4285       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4286
4287       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4288       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4289    }
4290    return ROK;
4291 }
4292 #endif
4293 /*******************************************************************
4294  *
4295  * @brief Sends UL DCI Request to PHY
4296  *
4297  * @details
4298  *
4299  *    Function : fillUlDciReq
4300  *
4301  *    Functionality:
4302  *         -Sends FAPI Ul Dci req to PHY
4303  *
4304  * @params[in]  Pointer to CmLteTimingInfo
4305  * @return ROK     - success
4306  *         RFAILED - failure
4307  *
4308  ******************************************************************/
4309 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
4310 {
4311 #ifdef INTEL_FAPI
4312    uint8_t      cellIdx =0;
4313    uint8_t      numPduEncoded = 0;
4314    SlotTimingInfo  ulDciReqTimingInfo ={0};
4315    MacDlSlot    *currDlSlot = NULLP;
4316    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4317    p_fapi_api_queue_elem_t  ulDciElem;
4318
4319    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4320    {
4321       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4322       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4323       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4324
4325          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4326          if(ulDciElem)
4327          {
4328             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4329                sizeof(fapi_ul_dci_req_t));
4330             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4331             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4332             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4333
4334             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4335             ulDciReq->slot = ulDciReqTimingInfo.slot;
4336           if(currDlSlot->dlInfo.ulGrant != NULLP)
4337           {
4338             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4339             if(ulDciReq->numPdus > 0)
4340             {
4341                /* Fill PDCCH configuration Pdu */
4342                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4343                numPduEncoded++;
4344                /* free UL GRANT at SCH */
4345                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4346             }
4347 #ifdef ODU_SLOT_IND_DEBUG_LOG
4348                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4349 #endif
4350          }
4351                prevElem->p_next = ulDciElem;
4352       }
4353    }
4354    else
4355    {
4356        lwr_mac_procInvalidEvt(&currTimingInfo);
4357    }
4358 #endif
4359    return ROK;
4360 }
4361
4362 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4363 {
4364    {
4365       /* PHY_STATE_IDLE */
4366 #ifdef INTEL_TIMER_MODE
4367       lwr_mac_procIqSamplesReqEvt,
4368 #endif
4369       lwr_mac_procParamReqEvt,
4370       lwr_mac_procParamRspEvt,
4371       lwr_mac_procConfigReqEvt,
4372       lwr_mac_procConfigRspEvt,
4373       lwr_mac_procInvalidEvt,
4374       lwr_mac_procInvalidEvt,
4375    },
4376    {
4377       /* PHY_STATE_CONFIGURED */
4378 #ifdef INTEL_TIMER_MODE
4379       lwr_mac_procInvalidEvt,
4380 #endif
4381       lwr_mac_procParamReqEvt,
4382       lwr_mac_procParamRspEvt,
4383       lwr_mac_procConfigReqEvt,
4384       lwr_mac_procConfigRspEvt,
4385       lwr_mac_procStartReqEvt,
4386       lwr_mac_procInvalidEvt,
4387    },
4388    {
4389       /* PHY_STATE_RUNNING */
4390 #ifdef INTEL_TIMER_MODE
4391       lwr_mac_procInvalidEvt,
4392 #endif
4393       lwr_mac_procInvalidEvt,
4394       lwr_mac_procInvalidEvt,
4395       lwr_mac_procConfigReqEvt,
4396       lwr_mac_procConfigRspEvt,
4397       lwr_mac_procInvalidEvt,
4398       lwr_mac_procInvalidEvt,
4399    }
4400 };
4401
4402 /*******************************************************************
4403  *
4404  * @brief Sends message to LWR_MAC Fsm Event Handler
4405  *
4406  * @details
4407  *
4408  *    Function : sendToLowerMac
4409  *
4410  *    Functionality:
4411  *         -Sends message to LowerMac
4412  *
4413  * @params[in] Message Type
4414  *             Message Length
4415  *             Messaga Pointer
4416  *
4417  * @return void
4418  *
4419  ******************************************************************/
4420 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4421 {
4422    lwrMacCb.event = msgType;
4423    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4424 }
4425 /**********************************************************************
4426   End of file
4427  **********************************************************************/