#include "mac_sch_interface.h"
#include "lwr_mac_upr_inf.h"
#include "mac.h"
-#include "lwr_mac_phy.h"
#include "lwr_mac.h"
#ifdef INTEL_FAPI
-#include "fapi.h"
+#include "nr5g_fapi_internal.h"
+#include "fapi_vendor_extension.h"
+#endif
+#ifdef INTEL_WLS_MEM
+#include "wls_lib.h"
#endif
#include "lwr_mac_fsm.h"
+#include "lwr_mac_phy.h"
#include "mac_utils.h"
#define MIB_SFN_BITMASK 0xFC
#define PDU_PRESENT 1
#define SET_MSG_LEN(x, size) x += size
-extern void fapiMacConfigRsp(uint16_t cellId);
-extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
-
/* Global variables */
-uint8_t slotIndIdx;
-uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
+LwrMacCb lwrMacCb;
-void lwrMacInit()
+uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
+void fapiMacConfigRsp(uint16_t cellId);
+uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem);
+uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
+uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
+uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem);
+
+void lwrMacLayerInit(Region region, Pool pool)
{
-#ifdef INTEL_WLS
- uint8_t idx;
+#ifdef INTEL_WLS_MEM
+ uint8_t idx;
+#endif
+
+ memset(&lwrMacCb, 0, sizeof(LwrMacCb));
+ lwrMacCb.region = region;
+ lwrMacCb.pool = pool;
+ lwrMacCb.clCfgDone = TRUE;
+ lwrMacCb.numCell = 0;
+ lwrMacCb.phyState = PHY_STATE_IDLE;
+#ifdef INTEL_WLS_MEM
/* Initializing WLS free mem list */
- slotIndIdx = 1;
+ lwrMacCb.phySlotIndCntr = 1;
for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
{
cmLListInit(&wlsBlockToFreeList[idx]);
* ****************************************************************/
uint8_t lwr_mac_procInvalidEvt(void *msg)
{
- printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
+#endif
+ DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
return ROK;
}
* @return void
*
* ****************************************************************/
-PUBLIC void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
+void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
{
memset(hdr, 0, sizeof(fapi_msg_t));
hdr->msg_id = msgType;
* @return void
*
* ****************************************************************/
-PUBLIC void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
- uint16_t value, uint32_t *msgLen)
+void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
+ uint32_t value, uint32_t *msgLen)
{
tlv->tl.tag = tag;
tlv->tl.length = length;
* @return void
*
********************************************************************/
-PUBLIC void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
+void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
+void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
+void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
{
if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
+void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
+void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
{
if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
+void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
{
if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
+void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
+void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
{
* @return void
*
******************************************************************/
-PUBLIC void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
{
*
******************************************************************/
-PUBLIC void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
+void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
{
* @return void
*
******************************************************************/
-PUBLIC void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
+void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
{
if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
{
*
******************************************************************/
-PUBLIC void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
+void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
{
* @return void
*
******************************************************************/
-PUBLIC void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
+void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
{
if(value == 0 )
{
*
******************************************************************/
-PUBLIC void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
+void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
+void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
{
if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
{
*
******************************************************************/
-PUBLIC void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
+void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
+void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
{
*
******************************************************************/
-PUBLIC void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
+void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
{
if(value == 0)
{
*
******************************************************************/
-PUBLIC void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
+void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
+void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
+void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
{
*
******************************************************************/
-PUBLIC void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
+void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
{
if(value == 0)
{
*
******************************************************************/
-PUBLIC void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
+void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
{
uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
{
- //uint16_t valueLen;
void *posPtr;
- //valueLen = tlv->tl.length;
posPtr = &tlv->tl.tag;
posPtr += sizeof(tlv->tl.tag);
posPtr += sizeof(tlv->tl.length);
/*TO DO: malloc to SSI memory */
if(type == FAPI_UINT_8)
{
- //temp = (uint8_t *)malloc(valueLen * sizeof(U8));
- //memcpy(temp, posPtr, valueLen);
return(*(uint8_t *)posPtr);
}
else if(type == FAPI_UINT_16)
}
else
{
- DU_LOG("\nLWR_MAC: Value Extraction failed" );
+ DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
return RFAILED;
}
}
#endif /* FAPI */
+
+/*******************************************************************
+ *
+ * @brief Modifes the received mibPdu to uint32 bit
+ * and stores it in MacCellCfg
+ *
+ * @details
+ *
+ * Function : setMibPdu
+ *
+ * Functionality:
+ * -Sets the MibPdu
+ *
+ * @params[in] Pointer to mibPdu
+ * pointer to modified value
+ ******************************************************************/
+void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
+{
+ *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
+ *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
+ DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
+}
+
/*******************************************************************
*
* @brief Sends FAPI Param req to PHY
uint8_t lwr_mac_procParamReqEvt(void *msg)
{
#ifdef INTEL_FAPI
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
+#endif
+
/* startGuardTimer(); */
- uint32_t msgLen = 0; //Length of message Body
- fapi_param_req_t *paramReq = NULL;
+ fapi_param_req_t *paramReq = NULL;
+ fapi_msg_header_t *msgHeader;
+ p_fapi_api_queue_elem_t paramReqElem;
+ p_fapi_api_queue_elem_t headerElem;
- LWR_MAC_ALLOC(paramReq, sizeof(fapi_param_req_t));
+ LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
if(paramReq != NULL)
{
- fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, msgLen);
+ FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
+ sizeof(fapi_tx_data_req_t));
+ paramReq = (fapi_param_req_t *)(paramReqElem +1);
+ memset(paramReq, 0, sizeof(fapi_param_req_t));
+ fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
+ LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 1;
+ msgHeader->handle = 0;
- DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
- LwrMacSendToPhy(paramReq->header.msg_id, \
- sizeof(fapi_param_req_t), (void *)paramReq);
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
+ LwrMacSendToL1(headerElem);
}
else
{
- DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
return RFAILED;
}
#endif
ClCellParam *cellParam = NULLP;
paramRsp = (fapi_param_resp_t *)msg;
- DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
+ DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
if(paramRsp != NULLP)
{
MAC_ALLOC(cellParam, sizeof(ClCellParam));
if(cellParam != NULLP)
{
- DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
+ DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
if(paramRsp->error_code == MSG_OK)
{
for(index = 0; index < paramRsp->number_of_tlvs; index++)
encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
{
- printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
+ DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
return RFAILED;
}
break;
}
break;
default:
- //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
+ //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
break;
}
}
}
else
{
- DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
+ DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
return RFAILED;
}
}
else
{
- DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
return RFAILED;
}
}
else
{
- DU_LOG("\nLWR_MAC: Param Response received from PHY is NULL");
+ DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
return RFAILED;
}
#else
#endif
}
+#ifdef INTEL_TIMER_MODE
+uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
+{
+ void * wlsHdlr = NULLP;
+ fapi_msg_header_t *msgHeader;
+ fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t iqSampleElem;
+ char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
+
+ uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
+
+ size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
+
+ /* Fill IQ sample req */
+ mtGetWlsHdl(&wlsHdlr);
+ //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
+ (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
+ LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
+ if(!iqSampleElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
+ sizeof(fapi_vendor_ext_iq_samples_req_t));
+
+ iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
+ memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
+ fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
+ sizeof(fapi_vendor_ext_iq_samples_req_t));
+
+ iqSampleReq->iq_samples_info.carrNum = 0;
+ iqSampleReq->iq_samples_info.numSubframes = 40;
+ iqSampleReq->iq_samples_info.nIsRadioMode = 0;
+ iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
+ iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
+ iqSampleReq->iq_samples_info.startFrameNum = 0;
+ iqSampleReq->iq_samples_info.startSlotNum = 0;
+ iqSampleReq->iq_samples_info.startSymNum = 0;
+ strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
+ memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
+
+ /* TODO : Fill remaining parameters */
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 1;
+ msgHeader->handle = 0;
+
+ DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
+ LwrMacSendToL1(headerElem);
+ return ROK;
+}
+#endif
+
/*******************************************************************
*
* @brief Sends FAPI Config req to PHY
uint8_t lwr_mac_procConfigReqEvt(void *msg)
{
#ifdef INTEL_FAPI
- uint8_t idx = 0;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
+#endif
+#ifdef NR_TDD
+ uint8_t slotIdx = 0;
+ uint8_t symbolIdx =0;
+#endif
uint8_t index = 0;
- uint16_t *cellId;
- uint16_t cellIdx;
+ uint16_t *cellId =NULLP;
+ uint16_t cellIdx =0;
uint32_t msgLen = 0;
+ uint32_t mib = 0;
MacCellCfg macCfgParams;
+ fapi_vendor_msg_t *vendorMsg;
fapi_config_req_t *configReq;
+ fapi_msg_header_t *msgHeader;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t vendorMsgQElem;
+ p_fapi_api_queue_elem_t cfgReqQElem;
- DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
+ DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
lwrMacCb.phyState);
cellId = (uint16_t *)msg;
lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
lwrMacCb.numCell++;
+ /* Allocte And fill Vendor msg */
+ LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ if(!vendorMsgQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
+ vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
+ fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
+ vendorMsg->config_req_vendor.hopping_id = 0;
+ vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
+ vendorMsg->config_req_vendor.group_hop_flag = 0;
+ vendorMsg->config_req_vendor.sequence_hop_flag = 0;
+ vendorMsg->start_req_vendor.sfn = 0;
+ vendorMsg->start_req_vendor.slot = 0;
+ vendorMsg->start_req_vendor.mode = 4;
+#ifdef DEBUG_MODE
+ vendorMsg->start_req_vendor.count = 0;
+ vendorMsg->start_req_vendor.period = 1;
+#endif
/* Fill FAPI config req */
- LWR_MAC_ALLOC(configReq, sizeof(fapi_config_req_t));
- if(configReq != NULL)
+ LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
+ if(!cfgReqQElem)
{
- memset(configReq, 0, sizeof(fapi_config_req_t));
- msgLen = sizeof(macCfgParams.numTlv);
- configReq->number_of_tlvs = macCfgParams.numTlv;
-
- if(macCfgParams.dlCarrCfg.pres)
- {
- fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
- sizeof(uint16_t), macCfgParams.dlCarrCfg.bw, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
- sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
- sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
- sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
- sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
- }
- if(macCfgParams.ulCarrCfg.pres)
- {
- fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
- sizeof(uint16_t), macCfgParams.ulCarrCfg.bw, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
- sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
- sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
- sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
- sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
- }
- fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
- sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
-
- /* fill cell config */
- fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
- sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
- sizeof(uint8_t), macCfgParams.dupType, &msgLen);
-
- /* fill SSB configuration */
- fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
- sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
-
- /* fill PRACH configuration */
- fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
- sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
- sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
- sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
- sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
- if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
+ LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
+ sizeof(fapi_config_req_t));
+
+ configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
+ memset(configReq, 0, sizeof(fapi_config_req_t));
+ fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
+ configReq->number_of_tlvs = 25;
+ msgLen = sizeof(configReq->number_of_tlvs);
+
+ if(macCfgParams.dlCarrCfg.pres)
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
+ sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
+ sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
+ /* Due to bug in Intel FT code, commenting TLVs that are are not
+ * needed to avoid error. Must be uncommented when FT bug is fixed */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
+ }
+ if(macCfgParams.ulCarrCfg.pres)
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
+ sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
+ sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
+ }
+ //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
+ sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
+
+ /* fill cell config */
+ fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
+ sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
+ sizeof(uint8_t), macCfgParams.dupType, &msgLen);
+
+ /* fill SSB configuration */
+ fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
+
+ /* fill PRACH configuration */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
+ sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
+ sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
+ /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
{
- for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
- fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
- &msgLen);
+ for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
+ fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
+ &msgLen);
}
else
{
- macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
+ macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
+ }*/
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
+
+ /* fill SSB table */
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
+ sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
+
+ setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
+ fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
+ sizeof(uint32_t), mib, &msgLen);
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
+
+#ifdef NR_TDD
+ /* fill TDD table */
+ fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
+ sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
+ for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
+ {
+ for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
}
-
- fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
-
- /* fill SSB table */
- fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
- sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
- sizeof(uint32_t), macCfgParams.ssbCfg.mibPdu[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
- sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
- sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
-
- /* fill TDD table */
- fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
- sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
- fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
- sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
-
- /* fill measurement config */
- fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
- sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
-
- /* fill DMRS Type A Pos */
- fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
- sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
-
- fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, \
- (sizeof(fapi_config_req_t) - sizeof(fapi_msg_t)));
-
- DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
- LwrMacSendToPhy(configReq->header.msg_id, sizeof(fapi_config_req_t), (void *)configReq);
}
- else
+#endif
+
+ /* fill measurement config */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
+ sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
+
+ /* fill DMRS Type A Pos */
+ fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
+ sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
{
- DU_LOG("\nLWR_MAC: Failed to allocate memory for config Request");
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
+ LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
+ FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
+ msgHeader->handle = 0;
+
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
+ LwrMacSendToL1(headerElem);
#endif
return ROK;
fapi_config_resp_t *configRsp;
configRsp = (fapi_config_resp_t *)msg;
- DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
+ DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
lwrMacCb.phyState);
if(configRsp != NULL)
{
if(configRsp->error_code == MSG_OK)
{
- DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
+ DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
lwrMacCb.phyState = PHY_STATE_CONFIGURED;
lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
/* TODO :
}
else
{
- DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
+ DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
return RFAILED;
}
}
else
{
- DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
+ DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
return RFAILED;
}
#endif
uint8_t lwr_mac_procStartReqEvt(void *msg)
{
#ifdef INTEL_FAPI
- uint32_t msgLen = 0;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
+#endif
+ fapi_msg_header_t *msgHeader;
fapi_start_req_t *startReq;
+ fapi_vendor_msg_t *vendorMsg;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t startReqElem;
+ p_fapi_api_queue_elem_t vendorMsgElem;
- LWR_MAC_ALLOC(startReq, sizeof(fapi_start_req_t));
- if(startReq != NULL)
+ /* Allocte And fill Vendor msg */
+ LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ if(!vendorMsgElem)
{
- memset(startReq, 0, sizeof(fapi_start_req_t));
- fillMsgHeader(&startReq->header, FAPI_START_REQUEST, msgLen);
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
+ vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
+ fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
+ vendorMsg->start_req_vendor.sfn = 0;
+ vendorMsg->start_req_vendor.slot = 0;
+ vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
+#ifdef DEBUG_MODE
+ vendorMsg->start_req_vendor.count = 0;
+ vendorMsg->start_req_vendor.period = 1;
+#endif
- DU_LOG("\nLWR_MAC: Sending Start Request to PHY");
- LwrMacSendToPhy(startReq->header.msg_id, sizeof(fapi_start_req_t),\
- (void *)startReq);
+ /* Fill FAPI config req */
+ LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
+ if(!startReqElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
+ LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ return RFAILED;
}
- else
+ FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
+ sizeof(fapi_start_req_t));
+
+ startReq = (fapi_start_req_t *)(startReqElem + 1);
+ memset(startReq, 0, sizeof(fapi_start_req_t));
+ fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
{
- DU_LOG("\nLWR_MAC: Failed to allocate memory for Start Request");
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
+ LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
+ FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
+ msgHeader->handle = 0;
+
+ /* Send to PHY */
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
+ LwrMacSendToL1(headerElem);
#endif
return ROK;
} /* lwr_mac_procStartReqEvt */
*
********************************************************************/
-uint8_t lwr_mac_procStopReqEvt(void *msg)
+uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem)
{
#ifdef INTEL_FAPI
- uint32_t msgLen = 0;
- fapi_stop_req_t *stopReq = NULLP;
- LWR_MAC_ALLOC(stopReq, sizeof(fapi_stop_req_t));
- if(stopReq != NULLP)
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
+#endif
+
+ fapi_stop_req_t *stopReq;
+ fapi_vendor_msg_t *vendorMsg;
+ p_fapi_api_queue_elem_t stopReqElem;
+ p_fapi_api_queue_elem_t vendorMsgElem;
+
+ /* Allocte And fill Vendor msg */
+ LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ if(!vendorMsgElem)
{
- memset(stopReq, 0, sizeof(fapi_stop_req_t));
- fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, msgLen);
- DU_LOG("\nLOWER MAC: Sending Stop Request to PHY");
- LwrMacSendToPhy(stopReq->header.msg_id, sizeof(fapi_stop_req_t), (void *)stopReq);
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in stop req");
+ return RFAILED;
}
- else
+ FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
+ vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
+ fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
+ vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
+ vendorMsg->stop_req_vendor.slot = slotInfo.slot;
+
+ /* Fill FAPI stop req */
+ LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
+ if(!stopReqElem)
{
- DU_LOG("\nLOWER MAC: Failed to allocate memory for Stop Request");
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
+ LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
-#endif
- return ROK;
-}
+ FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
+ sizeof(fapi_stop_req_t));
+ stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
+ memset(stopReq, 0, sizeof(fapi_stop_req_t));
+ fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
-/*******************************************************************
- *
- * @brief Modifes the received mibPdu to uint32 bit
- * and stores it in MacCellCfg
- *
- * @details
- *
- * Function : setMibPdu
- *
- * Functionality:
- * -Sets the MibPdu
- *
- * @params[in] Pointer to mibPdu
- * pointer to modified value
- ******************************************************************/
+ /* Send to PHY */
+ DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
+ prevElem->p_next = stopReqElem;
-PUBLIC void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
-{
- *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
- *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
- DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
+#endif
+ return ROK;
}
#ifdef INTEL_FAPI
{
if(dlDciPtr != NULLP)
{
- uint8_t numBytes;
- uint8_t bytePos;
- uint8_t bitPos;
-
- uint16_t coreset0Size;
- uint16_t rbStart;
- uint16_t rbLen;
- uint32_t freqDomResAssign;
- uint32_t timeDomResAssign;
- uint8_t VRB2PRBMap;
- uint32_t modNCodScheme;
- uint8_t redundancyVer;
- uint32_t sysInfoInd;
- uint32_t reserved;
+ uint8_t numBytes=0;
+ uint8_t bytePos=0;
+ uint8_t bitPos=0;
+
+ uint16_t coreset0Size=0;
+ uint16_t rbStart=0;
+ uint16_t rbLen=0;
+ uint32_t freqDomResAssign=0;
+ uint32_t timeDomResAssign=0;
+ uint8_t VRB2PRBMap=0;
+ uint32_t modNCodScheme=0;
+ uint8_t redundancyVer=0;
+ uint32_t sysInfoInd=0;
+ uint32_t reserved=0;
/* Size(in bits) of each field in DCI format 0_1
* as mentioned in spec 38.214 */
- uint8_t freqDomResAssignSize;
+ uint8_t freqDomResAssignSize = 0;
uint8_t timeDomResAssignSize = 4;
uint8_t VRB2PRBMapSize = 1;
uint8_t modNCodSchemeSize = 5;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
- dlDciPtr->powerControlOfssetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+ dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
* RBLen = length of contiguously allocted RBs
* Spec 38.214 Sec 5.1.2.2.2
*/
- coreset0Size= sib1PdcchInfo->coreset0Cfg.coreSet0Size;
- rbStart = 0; /* For SIB1 */
- //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
+ coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
+ rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
}
/* Fetching DCI field values */
- timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
- rowIndex -1;
- VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
- vrbPrbMapping;
+ timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
- DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
return;
}
}
} /* fillSib1DlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillPageDlDciPdu
+ *
+ * Functionality:
+ * -Fills the Dl DCI PDU for Paging
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to dlPageAlloc
+ * @return ROK
+ *
+ ******************************************************************/
+
+void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc)
+{
+ if(dlDciPtr != NULLP)
+ {
+ uint8_t numBytes=0;
+ uint8_t bytePos=0;
+ uint8_t bitPos=0;
+
+ uint16_t coreset0Size = 0;
+ uint16_t rbStart = 0;
+ uint16_t rbLen = 0;
+ uint8_t shortMsgInd = 0;
+ uint8_t shortMsg = 0;
+ uint32_t freqDomResAssign = 0;
+ uint32_t timeDomResAssign = 0;
+ uint8_t VRB2PRBMap = 0;
+ uint32_t modNCodScheme = 0;
+ uint8_t tbScaling = 0;
+ uint32_t reserved = 0;
+
+ /* Size(in bits) of each field in DCI format 1_0
+ * as mentioned in spec 38.214 */
+ uint8_t shortMsgIndSize = 2;
+ uint8_t shortMsgSize = 8;
+ uint8_t freqDomResAssignSize = 0;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t VRB2PRBMapSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t tbScalingSize = 2;
+ uint8_t reservedSize = 6;
+
+ dlDciPtr->rnti = dlPageAlloc->pagePdcchCfg.dci.rnti;
+ dlDciPtr->scramblingId = dlPageAlloc->pagePdcchCfg.dci.scramblingId;
+ dlDciPtr->scramblingRnti = dlPageAlloc->pagePdcchCfg.dci.scramblingRnti;
+ dlDciPtr->cceIndex = dlPageAlloc->pagePdcchCfg.dci.cceIndex;
+ dlDciPtr->aggregationLevel = dlPageAlloc->pagePdcchCfg.dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerValue;
+ dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset0Size = Size of coreset 0
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
+ rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
+ rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+
+ if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset0Size / 2))
+ freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
+ + (coreset0Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ }
+
+ /*Fetching DCI field values */
+
+ /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
+ if(dlPageAlloc->shortMsgInd != TRUE)
+ {
+ /*When Short Msg is absent*/
+ shortMsgInd = 1;
+ shortMsg = 0;
+ }
+ else
+ {
+ /*Short Msg is Present*/
+ if(dlPageAlloc->dlPagePduLen == 0 || dlPageAlloc->dlPagePdu == NULLP)
+ {
+ /*When Paging Msg is absent*/
+ shortMsgInd = 2;
+ }
+ else
+ {
+ /*Both Short and Paging is present*/
+ shortMsgInd = 3;
+ }
+ shortMsg = dlPageAlloc->shortMsg;
+ }
+
+ timeDomResAssign = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->codeword[0].mcsIndex;
+ tbScaling = 0;
+ reserved = 0;
+
+ /* Reversing bits in each DCI field */
+ shortMsgInd = reverseBits(shortMsgInd, shortMsgIndSize);
+ shortMsg = reverseBits(shortMsg, shortMsgSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ tbScaling = reverseBits(tbScaling, tbScalingSize);
+
+ /* Calulating total number of bytes in buffer */
+ dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
+ + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ + tbScaling + reservedSize;
+
+ numBytes = dlDciPtr->payloadSizeBits / 8;
+ if(dlDciPtr->payloadSizeBits % 8)
+ {
+ numBytes += 1;
+ }
+
+ if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ {
+ dlDciPtr->payload[bytePos] = 0;
+ }
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ shortMsgInd, shortMsgIndSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ shortMsg, shortMsgSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ VRB2PRBMap, VRB2PRBMapSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ tbScaling, tbScalingSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ reserved, reservedSize);
+ }
+} /* fillPageDlDciPdu */
+
/*******************************************************************
*
* @brief fills Dl DCI PDU required for DL TTI info in MAC
{
if(dlDciPtr != NULLP)
{
- uint8_t numBytes;
- uint8_t bytePos;
- uint8_t bitPos;
+ uint8_t numBytes =0;
+ uint8_t bytePos =0;
+ uint8_t bitPos =0;
- uint16_t coreset0Size;
- uint16_t rbStart;
- uint16_t rbLen;
- uint32_t freqDomResAssign;
- uint8_t timeDomResAssign;
- uint8_t VRB2PRBMap;
- uint8_t modNCodScheme;
- uint8_t tbScaling;
- uint32_t reserved;
+ uint16_t coreset0Size =0;
+ uint16_t rbStart =0;
+ uint16_t rbLen =0;
+ uint32_t freqDomResAssign =0;
+ uint8_t timeDomResAssign =0;
+ uint8_t VRB2PRBMap =0;
+ uint8_t modNCodScheme =0;
+ uint8_t tbScaling =0;
+ uint32_t reserved =0;
/* Size(in bits) of each field in DCI format 1_0 */
- uint8_t freqDomResAssignSize;
+ uint8_t freqDomResAssignSize = 0;
uint8_t timeDomResAssignSize = 4;
uint8_t VRB2PRBMapSize = 1;
uint8_t modNCodSchemeSize = 5;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
- dlDciPtr->powerControlOfssetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+ dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
*/
/* TODO: Fill values of coreset0Size, rbStart and rbLen */
- coreset0Size= rarPdcchInfo->coreset0Cfg.coreSet0Size;
- rbStart = 0; /* For SIB1 */
- //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
+ coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
+ rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
}
/* Fetching DCI field values */
- timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
tbScaling = 0; /* configured to 0 scaling */
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
- DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
return;
}
/*******************************************************************
*
- * @brief fills msg4 Dl DCI PDU required for DL TTI info in MAC
+ * @brief fills DL DCI PDU required for DL TTI info in MAC
*
* @details
*
- * Function : fillMsg4DlDciPdu
+ * Function : fillDlMsgDlDciPdu
*
* Functionality:
- * -Fills the Msg4 Dl DCI PDU
+ * -Fills the Dl DCI PDU
*
* @params[in] Pointer to fapi_dl_dci_t
* Pointer to PdcchCfg
* @return ROK
*
******************************************************************/
-void fillMsg4DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *msg4PdcchInfo,\
- Msg4Info *msg4Info)
+void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
+ DlMsgInfo *dlMsgInfo)
{
if(dlDciPtr != NULLP)
{
uint8_t bytePos;
uint8_t bitPos;
- uint16_t coreset0Size = 0;
+ uint16_t coresetSize = 0;
uint16_t rbStart = 0;
uint16_t rbLen = 0;
uint8_t dciFormatId;
/* Size(in bits) of each field in DCI format 1_0 */
uint8_t dciFormatIdSize = 1;
- uint8_t freqDomResAssignSize;
+ uint8_t freqDomResAssignSize = 0;
uint8_t timeDomResAssignSize = 4;
uint8_t VRB2PRBMapSize = 1;
uint8_t modNCodSchemeSize = 5;
uint8_t pucchResoIndSize = 3;
uint8_t harqFeedbackIndSize = 3;
- dlDciPtr->rnti = msg4PdcchInfo->dci.rnti;
- dlDciPtr->scramblingId = msg4PdcchInfo->dci.scramblingId;
- dlDciPtr->scramblingRnti = msg4PdcchInfo->dci.scramblingRnti;
- dlDciPtr->cceIndex = msg4PdcchInfo->dci.cceIndex;
- dlDciPtr->aggregationLevel = msg4PdcchInfo->dci.aggregLevel;
- dlDciPtr->pc_and_bform.numPrgs = msg4PdcchInfo->dci.beamPdcchInfo.numPrgs;
- dlDciPtr->pc_and_bform.prgSize = msg4PdcchInfo->dci.beamPdcchInfo.prgSize;
- dlDciPtr->pc_and_bform.digBfInterfaces = msg4PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
- dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
- dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = msg4PdcchInfo->dci.txPdcchPower.powerValue;
- dlDciPtr->powerControlOfssetSS = msg4PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+ dlDciPtr->rnti = pdcchInfo->dci.rnti;
+ dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
+ dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
+ dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
+ dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
* RBLen = length of contiguously allocted RBs
* Spec 38.214 Sec 5.1.2.2.2
*/
+ coresetSize = pdcchInfo->coresetCfg.coreSetSize;
+ rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
+ rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
- /* TODO: Fill values of coreset0Size, rbStart and rbLen */
- coreset0Size = msg4PdcchInfo->coreset0Cfg.coreSet0Size;
- //rbStart = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
- rbLen = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
-
- if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
{
- if((rbLen - 1) <= floor(coreset0Size / 2))
- freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
- else
- freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
- + (coreset0Size - 1 - rbStart);
+ if((rbLen - 1) <= floor(coresetSize / 2))
+ freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
+ + (coresetSize - 1 - rbStart);
- freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
}
/* Fetching DCI field values */
- dciFormatId = msg4Info->dciFormatId; /* DCI indentifier for DL */
- timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
- VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
- modNCodScheme = msg4PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
- ndi = msg4Info->ndi;
- redundancyVer = msg4PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
- harqProcessNum = msg4Info->harqProcNum;
- dlAssignmentIdx = msg4Info->dlAssignIdx;
- pucchTpc = msg4Info->pucchTpc;
- pucchResoInd = msg4Info->pucchResInd;
- harqFeedbackInd = msg4Info->harqFeedbackInd;
+ dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
+ timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
+ ndi = dlMsgInfo->ndi;
+ redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
+ harqProcessNum = dlMsgInfo->harqProcNum;
+ dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
+ pucchTpc = dlMsgInfo->pucchTpc;
+ pucchResoInd = dlMsgInfo->pucchResInd;
+ harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
/* Reversing bits in each DCI field */
dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
/* Calulating total number of bytes in buffer */
dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
- + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
- + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
- + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
+ + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
+ + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
numBytes = dlDciPtr->payloadSizeBits / 8;
if(dlDciPtr->payloadSizeBits % 8)
- numBytes += 1;
+ numBytes += 1;
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
- DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
- return;
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
}
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
- dlDciPtr->payload[bytePos] = 0;
+ dlDciPtr->payload[bytePos] = 0;
bytePos = numBytes - 1;
bitPos = 0;
/* Packing DCI format fields */
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- dciFormatId, dciFormatIdSize);
+ dciFormatId, dciFormatIdSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- freqDomResAssign, freqDomResAssignSize);
+ freqDomResAssign, freqDomResAssignSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- timeDomResAssign, timeDomResAssignSize);
+ timeDomResAssign, timeDomResAssignSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- VRB2PRBMap, VRB2PRBMapSize);
+ VRB2PRBMap, VRB2PRBMapSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- modNCodScheme, modNCodSchemeSize);
+ modNCodScheme, modNCodSchemeSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- ndi, ndiSize);
+ ndi, ndiSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- redundancyVer, redundancyVerSize);
+ redundancyVer, redundancyVerSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- redundancyVer, redundancyVerSize);
+ redundancyVer, redundancyVerSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- harqProcessNum, harqProcessNumSize);
+ harqProcessNum, harqProcessNumSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- dlAssignmentIdx, dlAssignmentIdxSize);
+ dlAssignmentIdx, dlAssignmentIdxSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- pucchTpc, pucchTpcSize);
+ pucchTpc, pucchTpcSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- pucchResoInd, pucchResoIndSize);
+ pucchResoInd, pucchResoIndSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- harqFeedbackInd, harqFeedbackIndSize);
+ harqFeedbackInd, harqFeedbackIndSize);
}
-} /* fillMsg4DlDciPdu */
+}
/*******************************************************************
*
* @return ROK
*
******************************************************************/
-uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
- RntiType rntiType, uint8_t coreSetType)
+uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
+ RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
{
if(dlTtiReqPdu != NULLP)
{
memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
if(rntiType == SI_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
- bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
- fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
+ pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
+ bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
+ fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
+ }
+ else if(rntiType == P_RNTI_TYPE)
+ {
+ pdcchInfo = &dlSlot->pageAllocInfo->pagePdcchCfg;
+ bwp = &dlSlot->pageAllocInfo->bwp;
+ fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, dlSlot->pageAllocInfo);
}
else if(rntiType == RA_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
- bwp = &dlInfo->rarAlloc->bwp;
- fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
+ pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
+ bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
+ fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
}
- else if(rntiType == TC_RNTI_TYPE)
+ else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->msg4Alloc->msg4PdcchCfg;
- bwp = &dlInfo->msg4Alloc->bwp;
- fillMsg4DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
- &dlInfo->msg4Alloc->msg4Info);
+ pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
+ bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
+ fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
+ &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
}
else
{
- DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
- return RFAILED;;
+ DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
+ return RFAILED;
}
dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
- dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coreset0Cfg.startSymbolIndex;
- dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coreset0Cfg.durationSymbols;
- memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coreset0Cfg.freqDomainResource, 6);
- dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coreset0Cfg.cceRegMappingType;
- dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coreset0Cfg.regBundleSize;
- dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coreset0Cfg.interleaverSize;
- dlTtiReqPdu->pdu.pdcch_pdu.coreSetSize = pdcchInfo->coreset0Cfg.coreSetType;
- dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coreset0Cfg.shiftIndex;
- dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coreset0Cfg.precoderGranularity;
+ dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
+ dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
+ memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
+ dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
+ dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
+ dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
+ dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
+ dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
for(idx = 0; idx < MAX_CODEWORDS ; idx++)
{
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
}
dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
- pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
+ pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
- beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
+ beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
* Functionality:
* -calculates the total pdu count to be allocated for DL TTI Req
*
- * @params[in] DlBrdcstAlloc *cellBroadcastInfo
+ * @params[in] MacDlSlot *dlSlot
* @return count
*
* ********************************************************************/
-uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
+uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
{
uint8_t count = 0;
- uint8_t idx = 0;
+ uint8_t idx = 0, ueIdx=0;
- if(dlInfo->isBroadcastPres)
+ if(dlSlot->dlInfo.isBroadcastPres)
{
- if(dlInfo->brdcstAlloc.ssbTrans)
+ if(dlSlot->dlInfo.brdcstAlloc.ssbTrans)
{
- for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
- {
- /* SSB PDU is filled */
- count++;
- }
+ for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ /* SSB PDU is filled */
+ count++;
+ }
}
- if(dlInfo->brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
{
- /* PDCCH and PDSCH PDU is filled */
- count += 2;
+ /* PDCCH and PDSCH PDU is filled */
+ count += 2;
}
}
- if(dlInfo->rarAlloc != NULLP)
+
+ if(dlSlot->pageAllocInfo)
{
/* PDCCH and PDSCH PDU is filled */
count += 2;
}
- if(dlInfo->msg4Alloc != NULLP)
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
{
- /* PDCCH and PDSCH PDU is filled */
- count += 2;
- }
+ if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ /* PDCCH and PDSCH PDU is filled */
+ if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
+ count += 2;
+ else
+ count += 1;
+ }
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
+ {
+ /* PDCCH and PDSCH PDU is filled */
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
+ count += 2;
+ else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
+ count += 1;
+ }
+ }
+ }
return count;
}
* @return count
*
* ********************************************************************/
-uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
+uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
{
- uint8_t count = 0;
+ uint8_t idx = 0, count = 0, ueIdx=0;
- if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1Trans)
{
count++;
}
- if(dlInfo->rarAlloc != NULLP)
+ if(dlSlot->pageAllocInfo)
{
count++;
}
- if(dlInfo->msg4Alloc != NULLP)
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
{
- count++;
- }
+ if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
+ ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
+ count++;
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
+ {
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
+ count++;
+ }
+ }
+ }
return count;
}
+
/***********************************************************************
*
* @brief fills the SIB1 TX-DATA request message
* @return ROK
*
* ********************************************************************/
-uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
- uint16_t pduIndex)
+uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
+ PdschCfg pdschCfg)
+{
+ uint32_t payloadSize = 0;
+ uint8_t *sib1Payload = NULLP;
+ fapi_api_queue_elem_t *payloadElem = NULLP;
+#ifdef INTEL_WLS_MEM
+ void * wlsHdlr = NULLP;
+#endif
+
+ pduDesc[pduIndex].pdu_index = pduIndex;
+ pduDesc[pduIndex].num_tlvs = 1;
+
+ /* fill the TLV */
+ payloadSize = pdschCfg.codeword[0].tbSize;
+ pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
+ pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
+ LWR_MAC_ALLOC(sib1Payload, payloadSize);
+ if(sib1Payload == NULLP)
+ {
+ return RFAILED;
+ }
+ payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
+ macCellCfg->sib1Cfg.sib1PduLen);
+ memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
+
+#ifdef INTEL_WLS_MEM
+ mtGetWlsHdl(&wlsHdlr);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
+#else
+ pduDesc[pduIndex].tlvs[0].value = sib1Payload;
+#endif
+ pduDesc[pduIndex].pdu_length = payloadSize;
+
+#ifdef INTEL_WLS_MEM
+ addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
+#else
+ LWR_MAC_FREE(sib1Payload, payloadSize);
+#endif
+
+ return ROK;
+}
+
+/***********************************************************************
+ *
+ * @brief fills the PAGE TX-DATA request message
+ *
+ * @details
+ *
+ * Function : fillPageTxDataReq
+ *
+ * Functionality:
+ * - fills the Page TX-DATA request message
+ *
+ * @params[in] fapi_tx_pdu_desc_t *pduDesc
+ * @params[in] macCellCfg consist of SIB1 pdu
+ * @params[in] uint32_t *msgLen
+ * @params[in] uint16_t pduIndex
+ * @return ROK
+ *
+ * ********************************************************************/
+uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo,
+ PdschCfg pdschCfg)
{
- uint32_t pduLen = 0;
- uint8_t *sib1TxdataValue = NULLP;
+ uint32_t payloadSize = 0;
+ uint8_t *pagePayload = NULLP;
+ fapi_api_queue_elem_t *payloadElem = NULLP;
+#ifdef INTEL_WLS_MEM
+ void * wlsHdlr = NULLP;
+#endif
pduDesc[pduIndex].pdu_index = pduIndex;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
- pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
- pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
- LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
- if(sib1TxdataValue == NULLP)
+ payloadSize = pdschCfg.codeword[0].tbSize;
+ pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
+ pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
+ LWR_MAC_ALLOC(pagePayload, payloadSize);
+ if(pagePayload == NULLP)
{
return RFAILED;
}
- memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
- macCellCfg->sib1Cfg.sib1PduLen);
- pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
+ payloadElem = (fapi_api_queue_elem_t *)pagePayload;
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
+ pageAllocInfo->dlPagePduLen);
+ memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->dlPagePdu, pageAllocInfo->dlPagePduLen);
- /* The total length of the PDU description and PDU data */
- pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
- pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
- pduDesc[pduIndex].pdu_length = pduLen;
+#ifdef INTEL_WLS_MEM
+ mtGetWlsHdl(&wlsHdlr);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
+#else
+ pduDesc[pduIndex].tlvs[0].value = pagePayload;
+#endif
+ pduDesc[pduIndex].pdu_length = payloadSize;
-#ifndef INTEL_WLS
- MAC_FREE(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
+#ifdef INTEL_WLS_MEM
+ addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
+#else
+ LWR_MAC_FREE(pagePayload, payloadSize);
#endif
return ROK;
* @return ROK
*
* ********************************************************************/
-uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
- uint16_t pduIndex)
+uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
{
- uint32_t pduLen = 0;
- uint8_t *rarTxdataValue = NULLP;
+ uint16_t payloadSize;
+ uint8_t *rarPayload = NULLP;
+ fapi_api_queue_elem_t *payloadElem = NULLP;
+#ifdef INTEL_WLS_MEM
+ void * wlsHdlr = NULLP;
+#endif
pduDesc[pduIndex].pdu_index = pduIndex;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
- pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
- pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
- LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
- if(rarTxdataValue == NULLP)
+ payloadSize = pdschCfg.codeword[0].tbSize;
+ pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
+ pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
+ LWR_MAC_ALLOC(rarPayload, payloadSize);
+ if(rarPayload == NULLP)
{
return RFAILED;
}
- memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
- pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
-
- /* The total length of the PDU description and PDU data */
- pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
- pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
- pduDesc[pduIndex].pdu_length = pduLen;
+ payloadElem = (fapi_api_queue_elem_t *)rarPayload;
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
+ memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
- /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
- * But since we did not implement WLS, this has to be done here
- */
-#ifndef INTEL_WLS
- MAC_FREE(rarTxdataValue,rarInfo->rarPduLen);
+#ifdef INTEL_WLS_MEM
+ mtGetWlsHdl(&wlsHdlr);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
+#else
+ pduDesc[pduIndex].tlvs[0].value = rarPayload;
#endif
+ pduDesc[pduIndex].pdu_length = payloadSize;
+#ifdef INTEL_WLS_MEM
+ addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
+#else
+ LWR_MAC_FREE(rarPayload, payloadSize);
+#endif
return ROK;
}
/***********************************************************************
*
- * @brief fills the Msg4 TX-DATA request message
+ * @brief fills the DL dedicated Msg TX-DATA request message
*
* @details
*
- * Function : fillMsg4TxDataReq
+ * Function : fillDlMsgTxDataReq
*
* Functionality:
- * - fills the Msg4 TX-DATA request message
+ * - fills the Dl Dedicated Msg TX-DATA request message
*
* @params[in] fapi_tx_pdu_desc_t *pduDesc
- * @params[in] Msg4Info *msg4Info
+ * @params[in] DlMsgInfo *dlMsgInfo
* @params[in] uint32_t *msgLen
* @params[in] uint16_t pduIndex
* @return ROK
*
* ********************************************************************/
-uint8_t fillMsg4TxDataReq(fapi_tx_pdu_desc_t *pduDesc, Msg4Info *msg4Info,
- uint16_t pduIndex)
+uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
{
- uint32_t pduLen = 0;
- uint8_t *msg4TxDataValue = NULLP;
+ uint16_t payloadSize;
+ uint8_t *dlMsgPayload = NULLP;
+ fapi_api_queue_elem_t *payloadElem = NULLP;
+#ifdef INTEL_WLS_MEM
+ void * wlsHdlr = NULLP;
+#endif
pduDesc[pduIndex].pdu_index = pduIndex;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
- pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
- pduDesc[pduIndex].tlvs[0].tl.length = msg4Info->msg4PduLen;
- LWR_MAC_ALLOC(msg4TxDataValue, msg4Info->msg4PduLen);
- if(msg4TxDataValue == NULLP)
+ payloadSize = pdschCfg.codeword[0].tbSize;
+ pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
+ pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
+ LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
+ if(dlMsgPayload == NULLP)
{
return RFAILED;
}
- memcpy(msg4TxDataValue, msg4Info->msg4Pdu, msg4Info->msg4PduLen);
- pduDesc[pduIndex].tlvs[0].value = msg4TxDataValue;
+ payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
+ memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
- /* The total length of the PDU description and PDU data */
- pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
- pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
- pduDesc[pduIndex].pdu_length = pduLen;
-
- /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
- * But since we did not implement WLS, this has to be done here
- */
-#ifndef INTEL_WLS
- MAC_FREE(msg4TxDataValue, msg4Info->msg4PduLen);
+#ifdef INTEL_WLS_MEM
+ mtGetWlsHdl(&wlsHdlr);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
+#else
+ pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
#endif
+ pduDesc[pduIndex].pdu_length = payloadSize;
+#ifdef INTEL_WLS_MEM
+ addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
+#else
+ LWR_MAC_FREE(dlMsgPayload, payloadSize);
+#endif
return ROK;
}
#endif /* FAPI */
+
/*******************************************************************
*
* @brief Sends DL TTI Request to PHY
* RFAILED - failure
*
* ****************************************************************/
-uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
+uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
+#endif
+
#ifdef INTEL_FAPI
- uint8_t idx;
+ uint8_t idx =0;
uint8_t nPdu = 0;
uint8_t numPduEncoded = 0;
- uint16_t cellIdx;
+ uint8_t ueIdx;
+ uint16_t cellIdx =0;
uint16_t pduIndex = 0;
- uint32_t msgLen = 0;
-
- fapi_dl_tti_req_t *dlTtiReq = NULLP;
- SlotIndInfo dlTtiReqTimingInfo;
+ SlotTimingInfo dlTtiReqTimingInfo;
MacDlSlot *currDlSlot = NULLP;
MacCellCfg macCellCfg;
- memset(&macCellCfg, 0, sizeof(MacCellCfg));
RntiType rntiType;
+ fapi_dl_tti_req_t *dlTtiReq = NULLP;
+ fapi_msg_header_t *msgHeader = NULLP;
+ p_fapi_api_queue_elem_t dlTtiElem;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t prevElem;
if(lwrMacCb.phyState == PHY_STATE_RUNNING)
{
GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
/* consider phy delay */
- ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
+ ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
+ dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
- nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
- LWR_MAC_ALLOC(dlTtiReq, sizeof(fapi_dl_tti_req_t));
- if(dlTtiReq != NULLP)
- {
- memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
- dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
- dlTtiReq->slot = dlTtiReqTimingInfo.slot;
- dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
- nPdu = dlTtiReq->nPdus;
- dlTtiReq->nGroup = 0;
-
- if(dlTtiReq->nPdus > 0)
- {
- if(currDlSlot->dlInfo.isBroadcastPres)
- {
- if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
- {
- if(dlTtiReq->pdus != NULLP)
- {
- for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
- {
- fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
- currDlSlot, idx, dlTtiReq->sfn);
- numPduEncoded++;
- }
- }
- printf("\033[1;31m");
- DU_LOG("\nLWR_MAC: MIB sent..");
- printf("\033[0m");
- }
- if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
- {
- /* Filling SIB1 param */
- if(numPduEncoded != nPdu)
- {
- rntiType = SI_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
- rntiType, CORESET_TYPE0);
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
- currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
- pduIndex);
- pduIndex++;
- numPduEncoded++;
- }
- printf("\033[1;34m");
- DU_LOG("\nLWR_MAC: SIB1 sent...");
- printf("\033[0m");
- }
- }
- if(currDlSlot->dlInfo.rarAlloc != NULLP)
- {
- /* Filling RAR param */
- rntiType = RA_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
- &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
- currDlSlot->dlInfo.rarAlloc->bwp,
- pduIndex);
- numPduEncoded++;
- pduIndex++;
-
- printf("\033[1;32m");
- DU_LOG("\nLWR_MAC: RAR sent...");
- printf("\033[0m");
- }
- if(currDlSlot->dlInfo.msg4Alloc != NULLP)
- {
- /* Filling Msg4 param */
- rntiType = TC_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
- &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.msg4Alloc->msg4PdschCfg,
- currDlSlot->dlInfo.msg4Alloc->bwp,
- pduIndex);
- numPduEncoded++;
- pduIndex++;
-
- printf("\033[1;32m");
- DU_LOG("\nLWR_MAC: MSG4 sent...");
- printf("\033[0m");
- }
- msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
- fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
- LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), \
- (void *)dlTtiReq);
- /* send Tx-DATA req message */
- sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
- }
- else
- {
- msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
- fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
- LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), (void *)dlTtiReq);
- }
- memset(currDlSlot, 0, sizeof(MacDlSlot));
- return ROK;
+ LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
+ if(dlTtiElem)
+ {
+ FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
+ sizeof(fapi_dl_tti_req_t));
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
+ LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 1;
+ msgHeader->handle = 0;
+
+ /* Fill Dl TTI Request */
+ dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
+ memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
+ fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
+
+ dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
+ dlTtiReq->slot = dlTtiReqTimingInfo.slot;
+ dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
+ nPdu = dlTtiReq->nPdus;
+ dlTtiReq->nGroup = 0;
+ if(dlTtiReq->nPdus > 0)
+ {
+ if(currDlSlot->dlInfo.isBroadcastPres)
+ {
+ if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
+ {
+ if(dlTtiReq->pdus != NULLP)
+ {
+ for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
+ currDlSlot, idx, dlTtiReq->sfn);
+ numPduEncoded++;
+ }
+ }
+ DU_LOG("\033[1;31m");
+ DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
+ DU_LOG("\033[0m");
+ }
+
+ if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
+ {
+ /* Filling SIB1 param */
+ if(numPduEncoded != nPdu)
+ {
+ rntiType = SI_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], currDlSlot, -1, \
+ rntiType, CORESET_TYPE0, MAX_NUM_UE);
+ numPduEncoded++;
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
+ &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
+ currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
+ pduIndex);
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+
+ if(currDlSlot->pageAllocInfo != NULLP)
+ {
+ /* Filling DL Paging Alloc param */
+ if(numPduEncoded != nPdu)
+ {
+ rntiType = P_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], currDlSlot, -1, \
+ rntiType, CORESET_TYPE0, MAX_NUM_UE);
+ numPduEncoded++;
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
+ &currDlSlot->pageAllocInfo->pagePdschCfg,
+ currDlSlot->pageAllocInfo->bwp,
+ pduIndex);
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
+ DU_LOG("\033[0m");
+ }
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
+ {
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ /* Filling RAR param */
+ rntiType = RA_RNTI_TYPE;
+ if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
+ (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
+ {
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
+ currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
+ numPduEncoded++;
+ }
+ if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
+ (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
+ &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
+ currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
+ pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+
+ DU_LOG("\033[1;32m");
+ DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
+ {
+ /* Filling Msg4 param */
+ if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
+ (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
+ {
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
+ {
+ rntiType = TC_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
+ currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
+ }
+ else
+ {
+ /* Filling other DL msg params */
+ rntiType = C_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
+ currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
+ }
+ numPduEncoded++;
+ }
+
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
+ {
+ if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
+ (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], \
+ &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+
+ DU_LOG("\033[1;32m");
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
+ }
+ else
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
+ }
+ DU_LOG("\033[0m");
+ }
+
+ }
+ /* else
+ {
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
+ }
+ */
+ }
+ }
+ }
+
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
+ dlTtiReq->nGroup++;
+
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+#endif
+
+ /* Intel L1 expects UL_TTI.request following DL_TTI.request */
+ fillUlTtiReq(currTimingInfo, dlTtiElem);
+ msgHeader->num_msg++;
+
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
+ msgHeader->num_msg++;
+
+ /* send Tx-DATA req message */
+ sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next);
+ if(dlTtiElem->p_next->p_next->p_next)
+ {
+ msgHeader->num_msg++;
+ prevElem = dlTtiElem->p_next->p_next->p_next;
+ }
+ else
+ prevElem = dlTtiElem->p_next->p_next;
+ }
+ else
+ {
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+#endif
+
+ /* Intel L1 expects UL_TTI.request following DL_TTI.request */
+ fillUlTtiReq(currTimingInfo, dlTtiElem);
+ msgHeader->num_msg++;
+
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next);
+ msgHeader->num_msg++;
+
+ prevElem = dlTtiElem->p_next->p_next;
+ }
+
+ if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
+ {
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
+ msgHeader->num_msg++;
+ macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
+ }
+ LwrMacSendToL1(headerElem);
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return ROK;
}
else
{
- DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
- memset(currDlSlot, 0, sizeof(MacDlSlot));
- return RFAILED;
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return RFAILED;
}
}
else
* RFAILED - failure
*
* ****************************************************************/
-uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
+uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem)
{
#ifdef INTEL_FAPI
- uint8_t nPdu = 0;
- uint16_t cellIdx;
- uint32_t msgLen = 0;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
+#endif
+
+ uint8_t nPdu = 0;
+ uint8_t ueIdx=0;
+ uint8_t schInfoIdx = 0;
+ uint16_t cellIdx=0;
uint16_t pduIndex = 0;
- uint32_t txDataReqMsgSize = 0;
- fapi_tx_data_req_t *txDataReq = NULLP;
+ fapi_tx_data_req_t *txDataReq =NULLP;
+ p_fapi_api_queue_elem_t txDataElem = 0;
GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
/* send TX_Data request message */
- nPdu = calcTxDataReqPduCount(dlInfo);
+ nPdu = calcTxDataReqPduCount(dlSlot);
if(nPdu > 0)
{
- txDataReqMsgSize = sizeof(fapi_tx_data_req_t);
- if(dlInfo->brdcstAlloc.sib1Trans)
+ LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
+ if(txDataElem == NULLP)
{
- txDataReqMsgSize += macCb.macCell[cellIdx]->macCellCfg.sib1Cfg.sib1PduLen;
- }
- if(dlInfo->rarAlloc != NULLP)
- {
- txDataReqMsgSize += dlInfo->rarAlloc->rarInfo.rarPduLen;
- }
- if(dlInfo->msg4Alloc != NULLP)
- {
- txDataReqMsgSize += dlInfo->msg4Alloc->msg4Info.msg4PduLen;
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
+ return RFAILED;
}
- LWR_MAC_ALLOC(txDataReq, txDataReqMsgSize);
- if(txDataReq == NULLP)
- {
- DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
- return RFAILED;
- }
+ FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
+ sizeof(fapi_tx_data_req_t));
+ txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
+ memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
+ fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
- memset(txDataReq, 0, txDataReqMsgSize);
txDataReq->sfn = currTimingInfo.sfn;
txDataReq->slot = currTimingInfo.slot;
- if(dlInfo->brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
{
- fillSib1TxDataReq(txDataReq->pdu_desc,
- &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
- pduIndex++;
- txDataReq->num_pdus++;
+ fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
+ dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
}
- if(dlInfo->rarAlloc != NULLP)
+ if(dlSlot->pageAllocInfo != NULLP)
{
- fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
- pduIndex++;
- txDataReq->num_pdus++;
-
- MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
- dlInfo->rarAlloc = NULLP;
+ fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo, \
+ dlSlot->pageAllocInfo->pagePdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->pageAllocInfo->dlPagePdu, sizeof(dlSlot->pageAllocInfo->dlPagePduLen));
+ MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
}
- if(dlInfo->msg4Alloc != NULLP && dlInfo->msg4Alloc->msg4Info.msg4Pdu != NULLP)
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
{
- fillMsg4TxDataReq(txDataReq->pdu_desc, &dlInfo->msg4Alloc->\
- msg4Info, pduIndex);
- pduIndex++;
- txDataReq->num_pdus++;
-
- MAC_FREE(dlInfo->msg4Alloc->msg4Info.msg4Pdu,\
- dlInfo->msg4Alloc->msg4Info.msg4PduLen);
- dlInfo->msg4Alloc->msg4Info.msg4Pdu = NULLP;
- MAC_FREE(dlInfo->msg4Alloc,sizeof(Msg4Alloc));
- dlInfo->msg4Alloc = NULLP;
+ if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
+ {
+ fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
+ dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ }
+ MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
+ }
+
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
+ {
+ if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
+ (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
+ {
+ fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
+ &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ }
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
+ }
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ }
}
- msgLen = txDataReqMsgSize - sizeof(fapi_msg_t);
- fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, msgLen);
- LwrMacSendToPhy(txDataReq->header.msg_id, txDataReqMsgSize, \
- (void *)txDataReq);
+
+ /* Fill message header */
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
+ prevElem->p_next = txDataElem;
}
#endif
return ROK;
}
}
+/*******************************************************************
+ *
+ * @brief Filling PUSCH PDU in UL TTI Request
+ *
+ * @details
+ *
+ * Function : fillPuschPdu
+ *
+ * Functionality: Filling PUSCH PDU in UL TTI Request
+ *
+ * @params[in]
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
{
if(ulTtiReqPdu != NULLP)
ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
macCellCfg->initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
- ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = 2;
- ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = \
- currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
- ulTtiReqPdu->pdu.pusch_pdu.mcsTable = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
+ ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
+ ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
}
}
+/*******************************************************************
+ *
+ * @brief Fill PUCCH PDU in Ul TTI Request
+ *
+ * @details
+ *
+ * Function : fillPucchPdu
+ *
+ * Functionality: Fill PUCCH PDU in Ul TTI Request
+ *
+ * @params[in]
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
MacUlSlot *currUlSlot)
{
ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
- ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
+
ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
- ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
- ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
+ ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
- ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
+
+ ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
+
ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
- ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
- ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
- ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
- ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
+ ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
+ ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
+ ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
+ ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
* RFAILED - failure
*
******************************************************************/
-uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
+uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
+#endif
+
#ifdef INTEL_FAPI
- uint16_t cellIdx;
+ uint16_t cellIdx =0;
uint8_t pduIdx = -1;
- uint32_t msgLen = 0;
- uint32_t msgSize = 0;
-
- fapi_ul_tti_req_t *ulTtiReq = NULLP;
- SlotIndInfo ulTtiReqTimingInfo;
-
+ SlotTimingInfo ulTtiReqTimingInfo;
MacUlSlot *currUlSlot = NULLP;
MacCellCfg macCellCfg;
+ fapi_ul_tti_req_t *ulTtiReq = NULLP;
+ p_fapi_api_queue_elem_t ulTtiElem;
if(lwrMacCb.phyState == PHY_STATE_RUNNING)
{
macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
/* add PHY delta */
- ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
+ ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
+ currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
- currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
- msgSize = sizeof(fapi_ul_tti_req_t);
- LWR_MAC_ALLOC(ulTtiReq, msgSize);
-
- if(ulTtiReq != NULLP)
+ LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
+ if(ulTtiElem)
{
- memset(ulTtiReq, 0, msgSize);
+ FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
+ sizeof(fapi_ul_tti_req_t));
+ ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
+ memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
+ fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
ulTtiReq->slot = ulTtiReqTimingInfo.slot;
ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
}
}
- msgLen = sizeof(fapi_ul_tti_req_t) - sizeof(fapi_msg_t);
- fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
- DU_LOG("\nLWR_MAC: Sending UL TTI Request");
- LwrMacSendToPhy(ulTtiReq->header.msg_id, msgSize, (void *)ulTtiReq);
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
+#endif
+ prevElem->p_next = ulTtiElem;
memset(currUlSlot, 0, sizeof(MacUlSlot));
return ROK;
}
else
{
- DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
memset(currUlSlot, 0, sizeof(MacUlSlot));
return RFAILED;
}
return ROK;
}
+#ifdef INTEL_FAPI
+/*******************************************************************
+ *
+ * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciPdu
+ *
+ * Functionality:
+ * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to DciInfo
+ * @return ROK
+ *
+ ******************************************************************/
+void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
+{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
+#endif
+ if(ulDciPtr != NULLP)
+ {
+ uint8_t numBytes =0;
+ uint8_t bytePos =0;
+ uint8_t bitPos =0;
+
+ uint8_t coreset1Size = 0;
+ uint16_t rbStart = 0;
+ uint16_t rbLen = 0;
+ uint8_t dciFormatId = 0;
+ uint32_t freqDomResAssign =0;
+ uint8_t timeDomResAssign =0;
+ uint8_t freqHopFlag =0;
+ uint8_t modNCodScheme =0;
+ uint8_t ndi =0;
+ uint8_t redundancyVer = 0;
+ uint8_t harqProcessNum = 0;
+ uint8_t puschTpc = 0;
+ uint8_t ul_SlInd = 0;
+
+ /* Size(in bits) of each field in DCI format 0_0 */
+ uint8_t dciFormatIdSize = 1;
+ uint8_t freqDomResAssignSize = 0;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t freqHopFlagSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t ndiSize = 1;
+ uint8_t redundancyVerSize = 2;
+ uint8_t harqProcessNumSize = 4;
+ uint8_t puschTpcSize = 2;
+ uint8_t ul_SlIndSize = 1;
+
+ ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
+ ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
+ ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
+ ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
+ ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
+ ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
+ ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
+ ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
+ ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
+ ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
+ ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
+ ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset1Size = Size of coreset 1
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ if(schDciInfo->formatType == FORMAT0_0)
+ {
+ coreset1Size = schDciInfo->coresetCfg.coreSetSize;
+ rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
+ rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
+
+ if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset1Size / 2))
+ freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
+ + (coreset1Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
+ }
+ /* Fetching DCI field values */
+ dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
+ timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
+ freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
+ modNCodScheme = schDciInfo->format.format0_0.mcs;
+ ndi = schDciInfo->format.format0_0.ndi;
+ redundancyVer = schDciInfo->format.format0_0.rv;
+ harqProcessNum = schDciInfo->format.format0_0.harqProcId;
+ puschTpc = schDciInfo->format.format0_0.tpcCmd;
+ ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
+
+ /* Reversing bits in each DCI field */
+ dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
+ harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
+ puschTpc = reverseBits(puschTpc, puschTpcSize);
+ ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
+ }
+ /* Calulating total number of bytes in buffer */
+ ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
+ + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
+ + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
+
+ numBytes = ulDciPtr->payloadSizeBits / 8;
+ if(ulDciPtr->payloadSizeBits % 8)
+ numBytes += 1;
+
+ if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ ulDciPtr->payload[bytePos] = 0;
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ dciFormatId, dciFormatIdSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ freqHopFlag, freqHopFlagSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ ndi, ndiSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ harqProcessNum, harqProcessNumSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ puschTpc, puschTpcSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ ul_SlInd, ul_SlIndSize);
+ }
+} /* fillUlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills PDCCH PDU required for UL DCI REQ to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciPdcchPdu
+ *
+ * Functionality:
+ * -Fills the Pdcch PDU info
+ *
+ * @params[in] Pointer to FAPI DL TTI Req
+ * Pointer to PdcchCfg
+ * @return ROK
+ *
+ ******************************************************************/
+uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
+{
+ if(ulDciReqPdu != NULLP)
+ {
+ memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
+ fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
+ ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
+ ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
+ ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
+ ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
+ ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
+ ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
+ ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
+ memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
+ ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
+ ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
+ ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
+ ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
+ ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
+ ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
+ ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
+
+ /* Calculating PDU length. Considering only one Ul dci pdu for now */
+ ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
+ }
+ return ROK;
+}
+#endif
+/*******************************************************************
+ *
+ * @brief Sends UL DCI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciReq
+ *
+ * Functionality:
+ * -Sends FAPI Ul Dci req to PHY
+ *
+ * @params[in] Pointer to CmLteTimingInfo
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ ******************************************************************/
+uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
+{
+#ifdef INTEL_FAPI
+ uint8_t cellIdx =0;
+ uint8_t numPduEncoded = 0;
+ SlotTimingInfo ulDciReqTimingInfo ={0};
+ MacDlSlot *currDlSlot = NULLP;
+ fapi_ul_dci_req_t *ulDciReq =NULLP;
+ p_fapi_api_queue_elem_t ulDciElem;
+
+ if(lwrMacCb.phyState == PHY_STATE_RUNNING)
+ {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
+
+ LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
+ if(ulDciElem)
+ {
+ FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
+ sizeof(fapi_ul_dci_req_t));
+ ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
+ memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
+ fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
+
+ ulDciReq->sfn = ulDciReqTimingInfo.sfn;
+ ulDciReq->slot = ulDciReqTimingInfo.slot;
+ if(currDlSlot->dlInfo.ulGrant != NULLP)
+ {
+ ulDciReq->numPdus = 1; // No. of PDCCH PDUs
+ if(ulDciReq->numPdus > 0)
+ {
+ /* Fill PDCCH configuration Pdu */
+ fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
+ numPduEncoded++;
+ /* free UL GRANT at SCH */
+ MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
+ }
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
+#endif
+ }
+ prevElem->p_next = ulDciElem;
+ }
+ }
+ else
+ {
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ }
+#endif
+ return ROK;
+}
+
lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
{
{
/* PHY_STATE_IDLE */
+#ifdef INTEL_TIMER_MODE
+ lwr_mac_procIqSamplesReqEvt,
+#endif
lwr_mac_procParamReqEvt,
lwr_mac_procParamRspEvt,
lwr_mac_procConfigReqEvt,
},
{
/* PHY_STATE_CONFIGURED */
+#ifdef INTEL_TIMER_MODE
+ lwr_mac_procInvalidEvt,
+#endif
lwr_mac_procParamReqEvt,
lwr_mac_procParamRspEvt,
lwr_mac_procConfigReqEvt,
},
{
/* PHY_STATE_RUNNING */
+#ifdef INTEL_TIMER_MODE
+ lwr_mac_procInvalidEvt,
+#endif
lwr_mac_procInvalidEvt,
lwr_mac_procInvalidEvt,
lwr_mac_procConfigReqEvt,
lwr_mac_procConfigRspEvt,
lwr_mac_procInvalidEvt,
- lwr_mac_procStopReqEvt,
+ lwr_mac_procInvalidEvt,
}
};
Code Review / o-du / l2.git / blobdiff