-antC0=./usecase/mu0_10mhz/12/ant_0.bin #CC0
-antC1=./usecase/mu0_10mhz/12/ant_1.bin #CC0
-antC2=./usecase/mu0_10mhz/12/ant_2.bin #CC0
-antC3=./usecase/mu0_10mhz/12/ant_3.bin #CC0
-antC4=./usecase/mu0_10mhz/12/ant_4.bin #CC1
-antC5=./usecase/mu0_10mhz/12/ant_5.bin #CC1
-antC6=./usecase/mu0_10mhz/12/ant_6.bin #CC1
-antC7=./usecase/mu0_10mhz/12/ant_7.bin #CC1
-antC8=./usecase/mu0_10mhz/12/ant_8.bin #CC2
-antC9=./usecase/mu0_10mhz/12/ant_9.bin #CC2
-antC10=./usecase/mu0_10mhz/12/ant_10.bin #CC2
-antC11=./usecase/mu0_10mhz/12/ant_11.bin #CC2
-antC12=./usecase/mu0_10mhz/12/ant_12.bin #CC3
-antC13=./usecase/mu0_10mhz/12/ant_13.bin #CC3
-antC14=./usecase/mu0_10mhz/12/ant_14.bin #CC3
-antC15=./usecase/mu0_10mhz/12/ant_15.bin #CC3
-antC16=./usecase/mu0_10mhz/12/ant_0.bin #CC4
-antC17=./usecase/mu0_10mhz/12/ant_1.bin #CC4
-antC18=./usecase/mu0_10mhz/12/ant_2.bin #CC4
-antC19=./usecase/mu0_10mhz/12/ant_3.bin #CC4
-antC20=./usecase/mu0_10mhz/12/ant_4.bin #CC5
-antC21=./usecase/mu0_10mhz/12/ant_5.bin #CC5
-antC22=./usecase/mu0_10mhz/12/ant_6.bin #CC5
-antC23=./usecase/mu0_10mhz/12/ant_7.bin #CC5
-antC24=./usecase/mu0_10mhz/12/ant_8.bin #CC6
-antC25=./usecase/mu0_10mhz/12/ant_9.bin #CC6
-antC26=./usecase/mu0_10mhz/12/ant_10.bin #CC6
-antC27=./usecase/mu0_10mhz/12/ant_11.bin #CC6
-antC28=./usecase/mu0_10mhz/12/ant_12.bin #CC7
-antC29=./usecase/mu0_10mhz/12/ant_13.bin #CC7
-antC30=./usecase/mu0_10mhz/12/ant_14.bin #CC7
-antC31=./usecase/mu0_10mhz/12/ant_15.bin #CC7
-antC32=./usecase/mu0_10mhz/12/ant_0.bin #CC8
-antC33=./usecase/mu0_10mhz/12/ant_1.bin #CC8
-antC34=./usecase/mu0_10mhz/12/ant_2.bin #CC8
-antC35=./usecase/mu0_10mhz/12/ant_3.bin #CC8
-antC36=./usecase/mu0_10mhz/12/ant_4.bin #CC9
-antC37=./usecase/mu0_10mhz/12/ant_5.bin #CC9
-antC38=./usecase/mu0_10mhz/12/ant_6.bin #CC9
-antC39=./usecase/mu0_10mhz/12/ant_7.bin #CC9
-antC40=./usecase/mu0_10mhz/12/ant_8.bin #CC10
-antC41=./usecase/mu0_10mhz/12/ant_9.bin #CC10
-antC42=./usecase/mu0_10mhz/12/ant_10.bin #CC10
-antC43=./usecase/mu0_10mhz/12/ant_11.bin #CC10
-antC44=./usecase/mu0_10mhz/12/ant_12.bin #CC11
-antC45=./usecase/mu0_10mhz/12/ant_13.bin #CC11
-antC46=./usecase/mu0_10mhz/12/ant_14.bin #CC11
-antC47=./usecase/mu0_10mhz/12/ant_15.bin #CC11
-
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+antC0=./usecase/mu0_10mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_10mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_10mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_10mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_10mhz/ant_0.bin #CC1
+antC5=./usecase/mu0_10mhz/ant_1.bin #CC1
+antC6=./usecase/mu0_10mhz/ant_2.bin #CC1
+antC7=./usecase/mu0_10mhz/ant_3.bin #CC1
+antC8=./usecase/mu0_10mhz/ant_0.bin #CC2
+antC9=./usecase/mu0_10mhz/ant_1.bin #CC2
+antC10=./usecase/mu0_10mhz/ant_2.bin #CC2
+antC11=./usecase/mu0_10mhz/ant_3.bin #CC2
+antC12=./usecase/mu0_10mhz/ant_0.bin #CC3
+antC13=./usecase/mu0_10mhz/ant_1.bin #CC3
+antC14=./usecase/mu0_10mhz/ant_2.bin #CC3
+antC15=./usecase/mu0_10mhz/ant_3.bin #CC3
+antC16=./usecase/mu0_10mhz/ant_0.bin #CC4
+antC17=./usecase/mu0_10mhz/ant_1.bin #CC4
+antC18=./usecase/mu0_10mhz/ant_2.bin #CC4
+antC19=./usecase/mu0_10mhz/ant_3.bin #CC4
+antC20=./usecase/mu0_10mhz/ant_0.bin #CC5
+antC21=./usecase/mu0_10mhz/ant_1.bin #CC5
+antC22=./usecase/mu0_10mhz/ant_2.bin #CC5
+antC23=./usecase/mu0_10mhz/ant_3.bin #CC5
+antC24=./usecase/mu0_10mhz/ant_0.bin #CC6
+antC25=./usecase/mu0_10mhz/ant_1.bin #CC6
+antC26=./usecase/mu0_10mhz/ant_2.bin #CC6
+antC27=./usecase/mu0_10mhz/ant_3.bin #CC6
+antC28=./usecase/mu0_10mhz/ant_0.bin #CC7
+antC29=./usecase/mu0_10mhz/ant_1.bin #CC7
+antC30=./usecase/mu0_10mhz/ant_2.bin #CC7
+antC31=./usecase/mu0_10mhz/ant_3.bin #CC7
+antC32=./usecase/mu0_10mhz/ant_0.bin #CC8
+antC33=./usecase/mu0_10mhz/ant_1.bin #CC8
+antC34=./usecase/mu0_10mhz/ant_2.bin #CC8
+antC35=./usecase/mu0_10mhz/ant_3.bin #CC8
+antC36=./usecase/mu0_10mhz/ant_0.bin #CC9
+antC37=./usecase/mu0_10mhz/ant_1.bin #CC9
+antC38=./usecase/mu0_10mhz/ant_2.bin #CC9
+antC39=./usecase/mu0_10mhz/ant_3.bin #CC9
+antC40=./usecase/mu0_10mhz/ant_0.bin #CC10
+antC41=./usecase/mu0_10mhz/ant_1.bin #CC10
+antC42=./usecase/mu0_10mhz/ant_2.bin #CC10
+antC43=./usecase/mu0_10mhz/ant_3.bin #CC10
+antC44=./usecase/mu0_10mhz/ant_0.bin #CC11
+antC45=./usecase/mu0_10mhz/ant_1.bin #CC11
+antC46=./usecase/mu0_10mhz/ant_2.bin #CC11
+antC47=./usecase/mu0_10mhz/ant_3.bin #CC11
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration