1 /******************************************************************************
3 * Copyright (c) 2020 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
20 * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and
23 * @ingroup group_source_xran
24 * @author Intel Corporation
27 #ifndef _XRAN_COMMON_H_
28 #define _XRAN_COMMON_H_
36 #include <sys/param.h>
37 #include <sys/queue.h>
39 #include <rte_common.h>
41 #include <rte_timer.h>
44 #include "xran_fh_o_du.h"
45 #include "xran_pkt_up.h"
46 #include "xran_cp_api.h"
51 extern uint64_t interval_us;
55 #define N_SC_PER_PRB 12
56 #define MAX_N_FULLBAND_SC 273
57 #define N_SYM_PER_SLOT 14
58 #define SUBFRAME_DURATION_US 1000
59 #define SLOTNUM_PER_SUBFRAME(interval) (SUBFRAME_DURATION_US/(interval))
60 #define SUBFRAMES_PER_SYSTEMFRAME 10
61 #define SLOTS_PER_SYSTEMFRAME(interval) ((SLOTNUM_PER_SUBFRAME(interval))*SUBFRAMES_PER_SYSTEMFRAME)
63 /* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144 for short sequence. The payload length is 840*16*2/8 octets.*/
64 #ifdef FCN_1_2_6_EARLIER
65 #define PRACH_PLAYBACK_BUFFER_BYTES (144*4L)
67 #define PRACH_PLAYBACK_BUFFER_BYTES (840*4L)
69 #define PRACH_SRS_BUFFER_BYTES (144*14*4L)
71 /**< this is the configuration of M-plane */
72 #define XRAN_MAX_NUM_SECTIONS (N_SYM_PER_SLOT* (XRAN_MAX_ANTENNA_NR*2) + XRAN_MAX_ANT_ARRAY_ELM_NR)
74 #define XRAN_PAYLOAD_1_RB_SZ(iqWidth) (((iqWidth == 0) || (iqWidth == 16)) ? \
75 (N_SC_PER_PRB*(MAX_IQ_BIT_WIDTH/8)*2) : (3 * iqWidth + 1))
77 #define XRAN_MAX_MBUF_LEN (13168 + XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct rte_ether_hdr) + sizeof(struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr) + sizeof(struct data_section_hdr)))
78 #define NSEC_PER_SEC 1000000000L
79 #define TIMER_RESOLUTION_CYCLES 1596*1 /* 1us */
80 #define XRAN_RING_SIZE 512 /*4*14*8 pow of 2 */
81 #define XRAN_NAME_MAX_LEN (64)
82 #define XRAN_RING_NUM (3)
84 #define XranDiffSymIdx(prevSymIdx, currSymIdx, numTotalSymIdx) ((prevSymIdx > currSymIdx) ? ((currSymIdx + numTotalSymIdx) - prevSymIdx) : (currSymIdx - prevSymIdx))
86 #define XRAN_MLOG_VAR 0 /**< enable debug variables to mlog */
89 #define DIV_ROUND_OFFSET(X,Y) ( X/Y + ((X%Y)?1:0) )
91 #define MAX_NUM_OF_XRAN_CTX (2)
92 #define XranIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_XRAN_CTX-1)) ? 0 : (ctx+1))
93 #define XranDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_XRAN_CTX-1) : (ctx-1))
95 #define MAX_NUM_OF_DPDK_TIMERS (10)
96 #define DpdkTimerIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_DPDK_TIMERS-1)) ? 0 : (ctx+1))
97 #define DpdkTimerDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_DPDK_TIMERS-1) : (ctx-1))
99 /* Callback function to send mbuf to the ring */
100 typedef int (*xran_ethdi_mbuf_send_fn)(struct rte_mbuf *mb, uint16_t ethertype, uint16_t vf_id);
103 #define XranIncrementJob(i) ((i >= (XRAN_SYM_JOB_SIZE-1)) ? 0 : (i+1))
105 /** Worker task function type */
106 typedef int32_t (*worker_task_fn)(void*);
108 /** worker thread context structure */
109 struct xran_worker_th_ctx {
112 struct sched_param sched_param;
113 char worker_name[32];
115 uint64_t worker_core_id;
116 int32_t worker_policy;
117 int32_t worker_status;
120 worker_task_fn task_func;
124 struct xran_sectioninfo_db {
125 uint32_t cur_index; /**< Current index to store for this eAXC */
126 struct xran_section_info list[XRAN_MAX_NUM_SECTIONS]; /**< The array of section information */
129 int32_t xran_generic_worker_thread(void *args);
131 int process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid);
132 int process_mbuf_batch(struct rte_mbuf* pkt[], void* handle, int16_t num, struct xran_eaxc_info *p_cid, uint32_t* ret);
133 int process_ring(struct rte_ring *r, uint16_t ring_id, uint16_t q_id);
134 int ring_processing_thread(void *args);
135 int packets_dump_thread(void *args);
136 // Support for 1-way eCPRI delay measurement per section 3.2.4.6 of eCPRI Specification V2.0
137 int32_t xran_ecpri_port_update_required(struct xran_io_cfg * cfg, uint16_t port_id);
138 int xran_ecpri_one_way_delay_measurement_transmitter(uint16_t port_id, void* handle);
139 int xran_generate_delay_meas(uint16_t port_id, void* handle, uint8_t actionType, uint8_t MeasurementID );
140 int process_delay_meas(struct rte_mbuf *pkt, void* handle, uint16_t port_id);
141 int xran_process_delmeas_request(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id);
142 int xran_process_delmeas_request_w_fup(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id);
143 int xran_process_delmeas_response(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id);
144 int xran_process_delmeas_rem_request(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id);
145 int xran_process_delmeas_rem_request_w_fup(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id);
146 int xran_process_delmeas_follow_up(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id);
147 void xran_initialize_ecpri_del_meas_port(struct xran_ecpri_del_meas_cmn* pCmn, struct xran_ecpri_del_meas_port* pPort,uint16_t full_init);
149 int send_symbol_mult_section_ex(void* handle,
150 enum xran_pkt_dir direction,
156 const enum xran_input_byte_order iq_buf_byte_order,
167 int send_symbol_ex(void* handle,
168 enum xran_pkt_dir direction,
174 const enum xran_input_byte_order iq_buf_byte_order,
185 int32_t prepare_symbol_ex(enum xran_pkt_dir direction,
191 const enum xran_input_byte_order iq_buf_byte_order,
202 enum xran_comp_hdr_type staticEn,
203 uint16_t num_sections,
204 uint16_t iq_buffer_offset);
205 int32_t prepare_sf_slot_sym (enum xran_pkt_dir direction,
210 struct xran_up_pkt_gen_params *xp);
212 static inline int32_t prepare_symbol_opt(enum xran_pkt_dir direction,
218 const enum xran_input_byte_order iq_buf_byte_order,
225 struct xran_up_pkt_gen_params *xp,
226 enum xran_comp_hdr_type staticEn);
229 int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *params,
230 struct xran_section_gen_info *sect_geninfo, uint8_t cc_id, uint8_t ru_port_id, uint8_t seq_id);
232 int32_t generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf,
233 enum xran_pkt_dir dir, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
234 uint8_t startsym, uint8_t numsym, uint16_t prb_start, uint16_t prb_num,int16_t iq_buffer_offset, int16_t iq_buffer_len,
235 uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t iqWidth, uint8_t seq_id, uint8_t symInc);
237 int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx,
238 uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id, int tti,
239 uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint16_t occasionid, uint8_t seq_id);
241 struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle);
242 int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up);
244 //uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
245 uint8_t xran_get_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
246 int32_t ring_processing_func(void* arg);
247 int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx, enum xran_ran_tech xran_tech);
248 void xran_updateSfnSecStart(void);
249 uint32_t xran_slotid_convert(uint16_t slot_id, uint16_t dir);
251 uint16_t xran_map_ecpriRtcid_to_vf(struct xran_device_ctx *p_dev_ctx, int32_t dir, int32_t cc_id, int32_t ru_port_id);
252 uint16_t xran_map_ecpriPcid_to_vf(struct xran_device_ctx *p_dev_ctx, int32_t dir, int32_t cc_id, int32_t ru_port_id);