1 #/******************************************************************************
3 #* Copyright (c) 2019 Intel.
5 #* Licensed under the Apache License, Version 2.0 (the "License");
6 #* you may not use this file except in compliance with the License.
7 #* You may obtain a copy of the License at
9 #* http://www.apache.org/licenses/LICENSE-2.0
11 #* Unless required by applicable law or agreed to in writing, software
12 #* distributed under the License is distributed on an "AS IS" BASIS,
13 #* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 #* See the License for the specific language governing permissions and
15 #* limitations under the License.
17 #*******************************************************************************/
19 xRAN Lib performs communication between the low-layer split central unit (lls-CU) and RU, it is highly-optimized software implementation based on Intel Architecture to provide the standard interface implementation based on O-RAN front haul interface specification.
22 Please refer to the Document ORAN Front Haul Interface Library based on Intel's xRAN Front Haul SW Architecture Specifications Section 4.2 Supported Feature Set, both GCC/ICC compiler are supported for this version.
25 It's first version of seed code for feature development, future fixed issues will be tracked here.
28 From current unit testing coverage, no issues have been found yet.
30 5. Prerequisites for install
34 5.1.0 System configuration
40 Intel(R) Virtualization Technology Enabled
41 Intel(R) VT for Directed I/O - Enabled
43 Coherency Support - Disabled
47 icc version 19.0.3.206 (gcc version 4.8.5 compatibility)
49 Link to ICC (community free version):
50 https://software.intel.com/en-us/system-studio/choose-download#technical
54 5.1.3 Compile DPDK with
55 [root@5gnr-sc12-xran dpdk]# ./usertools/dpdk-setup.sh // Where the root@5gnr-sc12-xran dpdk corresponds to the location in the server for the dpdk installation folder
57 select [16] x86_64-native-linuxapp-icc
58 select [19] Insert VFIO module
61 5.1.4 Find PCIe device of Fortville port
64 19:00.0 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
65 19:00.1 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
66 41:00.0 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
67 41:00.1 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
68 d8:00.0 << Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02) <<<< this one
69 d8:00.1 Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02)
71 5.1.5 Corresponding Eth device via
75 find port Eth with correct PCIe Bus address as per list above
79 version: 2.4.10 << driver
80 firmware-version: 6.80 0x80003cfd 1.2007.0
81 expansion-rom-version:
82 bus-info: 0000:da:00.0 << this one
83 supports-statistics: yes
85 supports-eeprom-access: yes
86 supports-register-dump: yes
87 supports-priv-flags: yes
89 5.1.6 install correct 2.4.10 i40e version if different (https://downloadcenter.intel.com/download/28306/Intel-Network-Adapter-Driver-for-PCIe-40-Gigabit-Ethernet-Network-Connections-Under-Linux-)
91 make sure firmare version is at least this version or higher
93 firmware-version: 6.01
95 5.1.7 make sure that linux boot arguments are correct
98 BOOT_IMAGE=/vmlinuz-3.10.0-rt56 root=/dev/mapper/centos-root ro crashkernel=auto rd.lvm.lv=centos/root rd.lvm.lv=centos/swap intel_iommu=on iommu=pt usbcore.autosuspend=-1 selinux=0 enforcing=0 nmi_watchdog=0 softlockup_panic=0 audit=0 intel_pstate=disable cgroup_disable=memory mce=off idle=poll hugepagesz=1G hugepages=20 hugepagesz=2M hugepages=0 default_hugepagesz=1G isolcpus=1-39 rcu_nocbs=1-39 kthread_cpus=0 irqaffinity=0 nohz_full=1-39
99 1.10 enable SRIOV VF port for XRAN
101 echo 2 > /sys/class/net/enp216s0f0/device/sriov_numvfs
103 see https://doc.dpdk.org/guides/nics/intel_vf.html
105 5.1.8 Check Virtual Function was created
108 19:00.0 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
109 19:00.1 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
110 41:00.0 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
111 41:00.1 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
112 d8:00.0 Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02)
113 d8:00.1 Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02)
114 d8:02.0 Ethernet controller: Intel Corporation XL710/X710 Virtual Function (rev 02) <<<< this is XRAN port (u-plane)
115 d8:02.1 Ethernet controller: Intel Corporation XL710/X710 Virtual Function (rev 02) <<<< this is XRAN port (c-plane)
118 - set mac to 00:11:22:33:44:66
119 - set Vlan tag to 2 (U-plane) for VF0
120 - set Vlan tag to 1 (C-plane) for VF1
122 [root@5gnr-sc12-xran app]# ip link set enp216s0f0 vf 0 mac 00:11:22:33:44:66 vlan 2
123 [root@5gnr-sc12-xran app]# ip link set enp216s0f0 vf 1 mac 00:11:22:33:44:66 vlan 1
124 [root@5gnr-sc12-xran app]# ip link show
125 1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT qlen 1
126 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
127 2: enp65s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
128 link/ether a4:bf:01:3e:6b:79 brd ff:ff:ff:ff:ff:ff
129 3: eno2: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
130 link/ether a4:bf:01:3e:6b:7a brd ff:ff:ff:ff:ff:ff
131 4: enp25s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
132 link/ether 90:e2:ba:d3:b2:ec brd ff:ff:ff:ff:ff:ff
133 5: enp129s0f0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT qlen 1000
134 link/ether 3c:fd:fe:a8:e0:70 brd ff:ff:ff:ff:ff:ff
135 6: enp129s0f1: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT qlen 1000
136 link/ether 3c:fd:fe:a8:e0:71 brd ff:ff:ff:ff:ff:ff
137 7: enp216s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
138 link/ether 3c:fd:fe:9e:93:68 brd ff:ff:ff:ff:ff:ff
139 vf 0 MAC 00:11:22:33:44:66, vlan 2, spoof checking on, link-state auto, trust off
140 vf 1 MAC 00:11:22:33:44:66, vlan 1, spoof checking on, link-state auto, trust off
141 8: enp25s0f1: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT qlen 1000
142 link/ether 90:e2:ba:d3:b2:ed brd ff:ff:ff:ff:ff:ff
143 9: enp216s0f1: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
144 link/ether 3c:fd:fe:9e:93:69 brd ff:ff:ff:ff:ff:ff
145 12: enp216s2: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
146 link/ether 96:fa:4d:04:4d:87 brd ff:ff:ff:ff:ff:ff
147 13: enp216s2f1: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
148 link/ether a6:67:49:bb:bd:5e brd ff:ff:ff:ff:ff:ff
152 6.1.1 start matlab and run gen_test.m with correct Numerology, Bandwidth and number of slots
153 copy ant_*.bin to /xran/app/usecase/mu{X}_{Y}MHz
154 where X is numerology: 0,1,3
155 Y is 5,10,20,100 MHz bandwidth
157 6.1.2 compile xran sample application (Please make sure that the export match your install directories for SDK, ORAN_FH_lib (i.e. XRAN_DIR), google test
158 export RTE_SDK=/opt/dpdk-18.08
159 export RTE_TARGET=x86_64-native-linuxapp-icc
160 export XRAN_DIR= /home/npg_wireless-flexran_xran/
161 export export GTEST_ROOT=/opt/gtest/gtest-1.7.0
164 Number of commandline arguments: 0
165 Building xRAN Library
167 CC ../lib/ethernet/ethdi.o
168 CC ../lib/ethernet/ethernet.o
169 CC ../lib/src/xran_up_api.o
170 CC ../lib/src/xran_sync_api.o
171 CC ../lib/src/xran_timer.o
172 CC ../lib/src/xran_cp_api.o
173 CC ../lib/src/xran_transport.o
174 CC ../lib/src/xran_common.o
175 CC ../lib/src/xran_ul_tables.o
176 CC ../lib/src/xran_frame_struct.o
177 CC ../lib/src/xran_compression.o
178 CC ../lib/src/xran_app_frag.o
179 CC ../lib/src/xran_main.o
181 INSTALL-LIB libxran.a
182 Building xRAN Test Application
183 CC ../app/src/common.o
184 CC ../app/src/sample-app.o
185 remark #11074: Inlining inhibited by limit max-size
186 remark #11076: To get full report use -qopt-report=4 -qopt-report-phase ipo
187 CC ../app/src/config.o
189 INSTALL-APP sample-app
190 INSTALL-MAP sample-app.map
193 6.1.3 update Eth port used for XRAN
200 echo 1 > /proc/sys/kernel/core_uses_pid
202 grep Huge /proc/meminfo
203 huge_folder="/mnt/huge_bbu"
204 [ -d "$huge_folder" ] || mkdir -p $huge_folder
205 if ! mount | grep $huge_folder; then
206 mount none $huge_folder -t hugetlbfs -o rw,mode=0777
210 ./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:da:02.0 0000:da:02.1
211 ^^^^^ ports have to match VF function from step 1.11 (0000:da:02.0 - U-plane 0000:da:02.1 C-plane)
219 $RTE_SDK/usertools/dpdk-devbind.py --status
220 if [ ${VM_DETECT} == 'HOST' ]; then
223 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:da:02.0 <<< port has to match VF function from step 1.11
224 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:da:02.1 <<< port has to match VF function from step 1.11
229 6.2.1 Run dpdk.sh to assign port to PMD
231 [root@5gnr-sc12-xran app]# ./dpdk.sh
233 Network devices using DPDK-compatible driver
234 ============================================
235 0000:da:02.0 'XL710/X710 Virtual Function 154c' drv=vfio-pci unused=i40evf,igb_uio
236 0000:da:02.1 'XL710/X710 Virtual Function 154c' drv=vfio-pci unused=i40evf,igb_uio
239 6.2.2 Run XRAN sample app
240 setup RU mac address in config_file_o_du.dat for corespondig usecase
243 ./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:da:02.0 0000:da:02.1
245 ruMac=00:11:22:33:44:55 #RU VF for RU
247 execute O-DU sample app
249 [root@sc12-xran-ru-1 app]# ./run_o_du.sh
254 Hugepagesize: 1048576 kB
255 Machine is synchronized using PTP!
257 nDLAbsFrePointA: 27968160
258 nULAbsFrePointA: 27968160
265 sSlotConfig0: 0 0 0 0 0 0 0 0 0 0 0 0 0 0
266 sSlotConfig1: 0 0 0 0 0 0 0 0 0 0 0 0 0 0
267 sSlotConfig2: 0 0 0 0 0 0 0 0 0 0 0 0 0 0
268 sSlotConfig3: 0 2 2 1 1 1 1 1 1 1 1 1 1 1
270 lls-CU MAC address: 00:11:22:33:44:66
271 RU MAC address: 00:11:22:33:44:55
273 antC0: ./usecase/mu3_100mhz/ant_0.bin
274 antC1: ./usecase/mu3_100mhz/ant_1.bin
275 antC2: ./usecase/mu3_100mhz/ant_2.bin
276 antC3: ./usecase/mu3_100mhz/ant_3.bin
277 antC4: ./usecase/mu3_100mhz/ant_4.bin
278 antC5: ./usecase/mu3_100mhz/ant_5.bin
279 antC6: ./usecase/mu3_100mhz/ant_6.bin
280 antC7: ./usecase/mu3_100mhz/ant_7.bin
281 antC8: ./usecase/mu3_100mhz/ant_8.bin
282 antC9: ./usecase/mu3_100mhz/ant_9.bin
283 antC10: ./usecase/mu3_100mhz/ant_10.bin
284 antC11: ./usecase/mu3_100mhz/ant_11.bin
285 antC12: ./usecase/mu3_100mhz/ant_12.bin
286 antC13: ./usecase/mu3_100mhz/ant_13.bin
287 antC14: ./usecase/mu3_100mhz/ant_14.bin
288 antC15: ./usecase/mu3_100mhz/ant_15.bin
290 Prach config index: 81
312 115 lines of config file has been read.
313 numCCPorts 1 num_eAxc4
315 IQ files size is 40 slots
316 app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
317 app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
318 Loading file ./usecase/mu3_100mhz/ant_0.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
319 from addr (0x7f62ad088010) size (1774080) bytes num (1774080)
320 Loading file ./usecase/mu3_100mhz/ant_1.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
321 from addr (0x7f62aced6010) size (1774080) bytes num (1774080)
322 Loading file ./usecase/mu3_100mhz/ant_2.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
323 from addr (0x7f62acd24010) size (1774080) bytes num (1774080)
324 Loading file ./usecase/mu3_100mhz/ant_3.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
325 from addr (0x7f62acb72010) size (1774080) bytes num (1774080)
326 Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant0.txt: from addr (0x7f62ad088010) size (1774080) IQ num (443520)
327 Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant0.bin: from addr (0x7f62ad088010) size (887040) bytes num (887040)
328 Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant1.txt: from addr (0x7f62aced6010) size (1774080) IQ num (443520)
329 Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant1.bin: from addr (0x7f62aced6010) size (887040) bytes num (887040)
330 Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant2.txt: from addr (0x7f62acd24010) size (1774080) IQ num (443520)
331 Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant2.bin: from addr (0x7f62acd24010) size (887040) bytes num (887040)
332 Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant3.txt: from addr (0x7f62acb72010) size (1774080) IQ num (443520)
333 Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant3.bin: from addr (0x7f62acb72010) size (887040) bytes num (887040)
334 TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [0]
335 TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [1]
336 TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [2]
337 TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [3]
338 System clock (rdtsc) resolution 1596250371 [Hz]
341 xran_ethdi_init_dpdk_io: Calling rte_eal_init:wls -c ffffffff -m5120 --proc-type=auto --file-prefix wls -w 0000:00:00.0
342 EAL: Detected 40 lcore(s)
343 EAL: Detected 2 NUMA nodes
344 EAL: Auto-detected process type: PRIMARY
345 EAL: Multi-process socket /var/run/dpdk/wls/mp_socket
346 EAL: No free hugepages reported in hugepages-2048kB
347 EAL: Probing VFIO support...
348 EAL: VFIO support initialized
349 EAL: PCI device 0000:da:02.0 on NUMA socket 1
350 EAL: probe driver: 8086:154c net_i40e_vf
351 EAL: using IOMMU type 1 (Type 1)
352 initializing port 0 for TX, drv=net_i40e_vf
353 Port 0 MAC: 00 11 22 33 44 66
355 Checking link status ... done
356 Port 0 Link Up - speed 40000 Mbps - full-duplex
357 EAL: PCI device 0000:da:02.1 on NUMA socket 1
358 EAL: probe driver: 8086:154c net_i40e_vf
359 initializing port 1 for TX, drv=net_i40e_vf
360 Port 1 MAC: 00 11 22 33 44 66
362 Checking link status ... done
363 Port 1 Link Up - speed 40000 Mbps - full-duplex
366 app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
367 app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
368 app_xran_cal_nrarfcn: nCenterFreq[28015680] nDeltaFglobal[60] nFoffs[24250080] nNoffs[2016667] nNRARFCN[2079427]
369 DL center freq 28015680 DL NR-ARFCN 2079427
370 app_xran_cal_nrarfcn: nCenterFreq[28015680] nDeltaFglobal[60] nFoffs[24250080] nNoffs[2016667] nNRARFCN[2079427]
371 UL center freq 28015680 UL NR-ARFCN 2079427
372 XRAN front haul xran_mm_init
373 xran_sector_get_instances [0]: CC 0 handle 0xd013380
374 Handle: 0x5a07cb8 Instance: 0xd013380
375 init_xran [0]: CC 0 handle 0xd013380
379 [ handle 0xd013380 0 0 ] [nPoolIndex 0] nNumberOfBuffers 4480 nBufferSize 3328
380 CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 0] mb pool 0x24a7ad440
382 [ handle 0xd013380 0 0 ] [nPoolIndex 1] nNumberOfBuffers 4480 nBufferSize 2216
383 CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 1] mb pool 0x24956d100
384 [ handle 0xd013380 0 0 ] [nPoolIndex 2] nNumberOfBuffers 4480 nBufferSize 3328
385 CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 2] mb pool 0x248818dc0
386 [ handle 0xd013380 0 0 ] [nPoolIndex 3] nNumberOfBuffers 4480 nBufferSize 2216
387 CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 3] mb pool 0x2475d8a80
388 [ handle 0xd013380 0 0 ] [nPoolIndex 4] nNumberOfBuffers 4480 nBufferSize 8192
389 CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 4] mb pool 0x246884740
390 @@@ NB cell 0 DL NR-ARFCN 0,DL phase comp flag 0 UL NR-ARFCN 0,UL phase comp flag 0
392 xRAN open PRACH config: Numerology 3 ConfIdx 81, preambleFmrt 6 startsymb 7, numSymbol 6, occassionsInPrachSlot 1
393 PRACH: x 1 y[0] 0, y[1] 0 prach slot: 3.. 5 .... 7 .... 9 .... 11 .... 13 ..
395 PRACH start symbol 7 lastsymbol 12
396 xran_cp_init_sectiondb:Allocation Size for Section DB : 128 (1x8x16)
397 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
398 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
399 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
400 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
401 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
402 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
403 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
404 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
405 xran_cp_init_sectiondb:Allocation Size for Section DB : 128 (1x8x16)
406 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
407 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
408 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
409 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
410 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
411 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
412 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
413 xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
414 xran_open: interval_us=125
415 nSlotNum[0] : numDlSym[14] numGuardSym[0] numUlSym[0] XRAN_SLOT_TYPE_DL
416 numDlSlots[1] numUlSlots[0] numSpSlots[0] numSpDlSlots[0] numSpUlSlots[0]
417 nSlotNum[1] : numDlSym[14] numGuardSym[0] numUlSym[0] XRAN_SLOT_TYPE_DL
418 numDlSlots[2] numUlSlots[0] numSpSlots[0] numSpDlSlots[0] numSpUlSlots[0]
419 nSlotNum[2] : numDlSym[14] numGuardSym[0] numUlSym[0] XRAN_SLOT_TYPE_DL
420 numDlSlots[3] numUlSlots[0] numSpSlots[0] numSpDlSlots[0] numSpUlSlots[0]
421 nSlotNum[3] : numDlSym[1] numGuardSym[2] numUlSym[11] XRAN_SLOT_TYPE_SP
422 numDlSlots[3] numUlSlots[0] numSpSlots[1] numSpDlSlots[1] numSpUlSlots[1]
423 xran_fs_set_slot_type: nPhyInstanceId[0] nFrameDuplexType[1], nTddPeriod[4]
424 DLRate[1.000000] ULRate[0.250000]
429 xran_timing_source_thread [CPU 7] [PID: 292331]
430 MLogOpen: filename(mlog-o-du.bin) mlogSubframes (0), mlogCores(32), mlogSize(0) mlog_mask (-1)
431 mlogSubframes (256), mlogCores(32), mlogSize(7168)
433 lls-CU: thread_run start time: 06/10/19 21:09:37.000000028 UTC [125]
434 Start C-plane DL 25 us after TTI [trigger on sym 3]
435 Start C-plane UL 55 us after TTI [trigger on sym 7]
436 Start U-plane DL 50 us before OTA [offset in sym -6]
437 Start U-plane UL 45 us OTA [offset in sym 6]
438 C-plane to U-plane delay 25 us after TTI
439 Start Sym timer 8928 ns
441 System clock (CLOCK_REALTIME) resolution 1000037471 [Hz]
443 MLog Storage: 0x7f6298487100 -> 0x7f629bc88d20 [ 58727456 bytes ]
444 localMLogFreqReg: 1000. Storing: 1000
447 ----------------------------------------
448 MLog Info: virt=0x00007f6298487100 size=58727456
449 ----------------------------------------
451 +---------------------------------------+
452 | Press 1 to start 5G NR XRAN traffic |
453 | Press 2 reserved for future use |
455 +---------------------------------------+
456 rx_counter 0 tx_counter 1376072
457 rx_counter 0 tx_counter 1720112
458 rx_counter 0 tx_counter 2064161
459 rx_counter 0 tx_counter 2408212
460 rx_counter 0 tx_counter 2752232
464 rx_counter 0 tx_counter 3096264
467 Closing timing source thread...
468 Closing l1 app... Ending all threads...
469 MLogPrint: ext_filename((null).bin)
470 Opening MLog File: mlog-o-du-c0.bin
471 MLog file mlog-o-du-c0.bin closed
472 Mlog Print successful
474 Failed at xran_mm_destroy, status -2
476 RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [0]
477 RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [1]
478 RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [2]
479 RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [3]
480 Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant0.txt: from addr (0x7f62ac9c0010) size (1774080) IQ num (443520)
481 Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant0.bin: from addr (0x7f62ac9c0010) size (887040) bytes num (887040)
482 Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant1.txt: from addr (0x7f62ac80e010) size (1774080) IQ num (443520)
483 Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant1.bin: from addr (0x7f62ac80e010) size (887040) bytes num (887040)
484 Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant2.txt: from addr (0x7f62ac65c010) size (1774080) IQ num (443520)
485 Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant2.bin: from addr (0x7f62ac65c010) size (887040) bytes num (887040)
486 Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant3.txt: from addr (0x7f62ac4aa010) size (1774080) IQ num (443520)
487 Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant3.bin: from addr (0x7f62ac4aa010) size (887040) bytes num (887040)